Three-dimensional memory devices with parallel trench capacitors

By employing parallel trench capacitors and stepped fabrication technology in three-dimensional memory devices, the problem of low integration density in memory devices has been solved, achieving higher density memory structures and more efficient electrical signal transmission.

CN114597217BActive Publication Date: 2026-06-05SK HYNIX INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SK HYNIX INC
Filing Date
2021-07-01
Publication Date
2026-06-05

AI Technical Summary

Technical Problem

Existing technologies are insufficient to effectively improve the integration of memory devices, and the design and manufacture of three-dimensional memory devices present challenges.

Method used

A three-dimensional memory device comprising a logic device layer and a memory device layer is formed by using a parallel trench capacitor with a parallel wall shape and a stepped forming process. The logic device layer, dielectric layer and capacitor are formed on a substrate, and the capacitor electrodes are formed by filling the trench with conductive material.

Benefits of technology

This improved the integration of memory devices and the capacitance of capacitors, enhanced the electrical signal transmission efficiency of memory devices, and enabled higher density memory structures.

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Abstract

The present disclosure relates to a three-dimensional memory device having parallel trench capacitors. A 3D memory device is provided. The 3D memory device can include a logic device layer on a substrate and a memory device layer stacked on the logic device layer. The logic device layer can include logic devices disposed on the substrate. The memory device layer can include a word line stack disposed in an extended region, a staircase pattern disposed in the word line stack, a dielectric layer stack in a peripheral region, and a capacitor embedded in the dielectric layer stack.
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