Optical proximity effect correction method and system and mask

Abstract

The present invention provides an optical proximity effect correction method and system and a mask, the method comprising: classifying the area of ​​the current layer in the original design graphic of the lithography according to the graphics of the previous layer of the current layer to obtain the category to which the area belongs, the category to which the area belongs includes the overlapping area in the current layer in the original design graphic that overlaps with the previous layer up and down and the non-overlapping area that does not overlap; setting priorities for areas of each category, wherein the priority of the overlapping area is higher than the priority of the non-overlapping area; setting multiple target points at the edge of the original design graphic, the density of the target points set at the edge of the overlapping area is greater than the density of the target points set in the non-overlapping area; obtaining a correction graphic of the original design graphic according to an OPC model, and simulating it to obtain a graphic simulation result; calculating the difference between the graphic simulation result at each target point and the original design graphic; and adjusting the correction graphic according to the difference and the weight of the target point.

Description

Technical Field

[0001] The present invention relates to the field of photolithography technology, and more specifically to an optical proximity effect correction method and system and a mask. Background Art

[0002] With the rapid development of ultra-large scale integration (ULSI), the manufacturing process of integrated circuits has become more and more complex and sophisticated. Among them, photolithography is the driving force for the development of integrated circuit manufacturing technology and is also one of the most complex technologies. Compared with other single manufacturing technologies, the improvement of photolithography is of great significance to the development of integrated circuits. Before the photolithography process begins, the pattern needs to be copied to the mask through a specific device, and then the pattern structure on the mask is copied to the silicon wafer for producing chips through a photolithography machine. However, due to the reduction in the size of semiconductor devices, the wavelength used for exposure is larger than the size of the ideal graphics of the physical layout design and the spacing between the graphics. The interference and diffraction effects of light waves cause a large difference between the physical graphics produced by actual photolithography and the ideal graphics of the physical layout design. The shape and spacing of the actual graphics change greatly, and even affect the performance of the circuit.

[0003] An important reason for this difference is that when the wavelength of the light beam used in lithography is larger than the size of the ideal pattern designed in the physical layout and the spacing between the patterns, the optical proximity effect (OPE) is generated. Therefore, in order to solve the problem, the optical proximity correction (OPC) can be performed on the mask before lithography. The OPC method is to pre-process the lithography mask before lithography and make advance modifications so that the amount of modification compensation can just compensate for the optical proximity effect caused by the exposure system.

[0004] At the 0.11 / 0.13um technology node, there are usually "U"-shaped graphics. In the traditional OPC correction process, due to the small space between lines and the limitation of mask rule check (MRC), this type of graphics is difficult to handle, which will cause a more serious corner rounding effect (Corner rounding), affect the critical dimension uniformity (CDU), and reduce the process window (PW). In severe cases, it may even cause circuit failure.

[0005] In view of the above problems, the present application proposes a new optical proximity effect correction method and system and mask. Summary of the invention

[0006] An embodiment of the present invention provides a method for correcting an optical proximity effect, and the method for correcting an optical proximity effect includes:

[0007] Obtaining a graphic of a previous layer of the current layer, and classifying the region of the current layer in the original design graphic of the lithography according to the graphic of the previous layer, so as to obtain the category to which the region in the original design graphic belongs, wherein the category to which the region belongs includes an overlapping region in the current layer in the original design graphic that overlaps with the previous layer up and down and a non-overlapping region that does not overlap;

[0008] Setting priorities for areas of each category, wherein the priority of the overlapping area is higher than the priority of the non-overlapping area;

[0009] A plurality of target points are set at the edge of the original design pattern, wherein the density of the target points set at the edge of the overlapping area is greater than the density of the target points set at the non-overlapping area;

[0010] Obtaining a modified graphic of the original design graphic according to the OPC model, and simulating the modified graphic to obtain a graphic simulation result;

[0011] Calculating the difference between the graphic simulation result and the original design graphic at each of the target points;

[0012] According to the difference and the weight of the target point, the correction graph is adjusted to obtain an adjusted correction graph, the adjusted correction graph is simulated to obtain a graph simulation result, and the difference between the graph simulation result and the correction graph at each of the target points is calculated;

[0013] Iteration step: repeatedly executing the steps of adjusting the corrected graph according to the difference and the weight of the target point to obtain an adjusted corrected graph, simulating the adjusted corrected graph to obtain a graph simulation result, and iterating the steps of calculating the difference between the graph simulation result and the corrected graph at each target point until a final corrected graph is obtained.

[0014] In one example, the current layer is a gate dielectric layer, and the previous layer is an active region layer.

[0015] In one example, the overlapping region is a gate region.

[0016] In one example, the original design pattern includes a U-shaped pattern.

[0017] In one example, the difference is an edge placement error.

[0018] In one example, the edge includes a line end and an adjacent edge segment, and the step of setting a target further includes:

[0019] Analytically segmenting the edge of the original design graphic to obtain a plurality of adjacent edge segments and line ends;

[0020] The target points are set at the line ends and the adjacent edge segments.

[0021] In another aspect, the present application provides an optical proximity effect correction system, the optical proximity effect correction system comprising:

[0022] A memory for storing executable program instructions;

[0023] A processor is used to execute the program instructions stored in the memory, so that the processor executes the aforementioned optical proximity effect correction method.

[0024] In another aspect, the present application provides a mask, the mask comprising:

[0025] ontology;

[0026] The mask pattern is arranged on the main body, and the mask pattern is a correction pattern obtained based on the aforementioned optical proximity effect correction method.

[0027] The optical proximity effect correction method of the embodiment of the present invention classifies the area of ​​the current layer in the original design graphic of the lithography according to the graphic of the previous layer to obtain the category to which the area in the original design graphic belongs, wherein the category to which the area belongs includes the overlapping area in the current layer in the original design graphic that overlaps with the previous layer up and down and the non-overlapping area that does not overlap; then sets priorities for the areas of each category and performs OPC correction again, thereby improving the OPC correction accuracy, improving the rounded corner effect, increasing the line width CDU, increasing the process window, and improving the accuracy of imaging the lithography pattern on the wafer, thereby reducing the deformation and deviation between the graphic obtained on the actual silicon wafer and the mask template graphic, so as to improve the circuit performance and product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The above and other purposes, features and advantages of the present invention will become more apparent by describing the embodiments of the present invention in more detail in conjunction with the accompanying drawings. The accompanying drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0029] Figure 1is a flow chart of a conventional optical proximity effect correction method;

[0030] Figure 2 It is a schematic diagram in which the design image is a 'U'-shaped figure;

[0031] Figure 3 A schematic diagram showing a correction simulation result of the rounded corner effect obtained based on a conventional optical proximity effect correction method;

[0032] Figure 4 A flow chart of an optical proximity effect correction method according to an embodiment of the present invention is shown;

[0033] Figure 5 A schematic diagram showing a GATE region obtained after introducing a previous layer based on a current layer according to an embodiment of the present invention;

[0034] Figure 6 A schematic diagram showing a comparison of the target point placement positions of a conventional correction method and the correction method of the present application;

[0035] Figure 7 A schematic diagram showing a comparison of OPC correction simulation results obtained by a conventional correction method and the correction method of the present application;

[0036] Figure 8 is a schematic block diagram of an optical proximity effect correction system according to an embodiment of the present invention. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical scheme and advantages of the present invention more obvious, the exemplary embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments of the present invention, and it should be understood that the present invention is not limited to the exemplary embodiments described herein. Based on the embodiments of the present invention described in the present invention, all other embodiments obtained by those skilled in the art without creative work should fall within the protection scope of the present invention.

[0038] The critical dimensions (CD) of key layers of 0.18μm and below technology nodes, such as active area layer (TO), gate oxide layer (GT), and An (metal connection layer), are getting smaller and smaller. CD is close to or even smaller than the wavelength of light used in the photolithography process. Therefore, during the photolithography process, due to the diffraction and interference of light, there is a certain deformation and deviation between the photolithography pattern obtained on the actual silicon wafer and the mask pattern. In order to eliminate this deviation, an effective method is the optical proximity correction (OPC) method.

[0039] The conventional OPC correction principle is: Figure 1 As shown in the figure, the outer edge of the design graphic is first analyzed and segmented (Dissection), and then the target points are placed at the line ends and adjacent edge segments. Then the graphic is simulated according to the OPC model, and the difference between the simulation result and the design graphic at the target position point (edge ​​placement error, referred to as EPE) is calculated. Then the segment position is adjusted according to EPE to obtain the desired result. In the 'U' shape (such as Figure 2 As shown in the figure, due to the small spacing and the limitation of MRC rules, this type of graphics is difficult to process and will cause a more serious "corner rounding" effect, which will affect the CDU of the line width, such as Figure 3 shown.

[0040] In view of the existence of the above-mentioned problems, an embodiment of the present application provides an optical proximity effect correction method, which includes: obtaining a graphic of a previous layer of a current layer, and classifying an area of ​​the current layer in an original design graphic of lithography according to the graphic of the previous layer, so as to obtain a category to which the area in the original design graphic belongs, wherein the category to which the area belongs includes an overlapping area in the current layer of the original design graphic that overlaps with the previous layer up and down and a non-overlapping area that does not overlap; setting a priority for areas of each category, wherein the priority of the overlapping area is higher than the priority of the non-overlapping area; setting a plurality of target points at the edge of the original design graphic, wherein the density of the target points set at the edge of the overlapping area is greater than the density of the target points set in the non-overlapping area; obtaining a corrected graphic of the original design graphic according to an OPC model, And simulating the corrected graphics to obtain graphics simulation results; calculation step: calculating the difference between the graphics simulation results and the original design graphics at each of the target points; adjusting the corrected graphics according to the difference and the weight of the target point to obtain an adjusted corrected graphics, simulating the adjusted corrected graphics to obtain graphics simulation results, and calculating the difference between the graphics simulation results and the corrected graphics at each of the target points; repeatedly performing the steps of adjusting the corrected graphics according to the difference and the weight of the target point to obtain an adjusted corrected graphics, simulating the adjusted corrected graphics to obtain graphics simulation results, and calculating the difference between the graphics simulation results and the corrected graphics at each of the target points, until the final corrected graphics is obtained.

[0041] According to the optical proximity effect correction method of the present application, the area of ​​the current layer in the original design graphic of the lithography is classified according to the graphic of the previous layer to obtain the category to which the area in the original design graphic belongs, wherein the category to which the area belongs includes the overlapping area in the current layer in the original design graphic that overlaps with the previous layer up and down and the non-overlapping area that does not overlap; then the priority is set for the areas of each category, and OPC correction is performed again, thereby improving the OPC correction accuracy, improving the rounded corner effect, increasing the line width CDU, increasing the process window, and improving the accuracy of imaging the lithography pattern on the wafer, thereby reducing the deformation and deviation between the graphic obtained on the actual silicon wafer and the mask template graphic, so as to improve the circuit performance and product yield.

[0042] Below, refer to the attached Figures 4 to 7 The optical proximity effect correction method in the embodiment of the present application is described.

[0043] As an example, Figure 4 As shown, the optical proximity effect correction method in the embodiment of the present application includes the following steps:

[0044] First, in step S1, the graphics of the previous layer of the current layer are obtained, and according to the graphics of the previous layer, the area of ​​the current layer in the original design graphics of the lithography is classified to obtain the category to which the area in the original design graphics belongs, wherein the category to which the area belongs includes the overlapping area in the current layer of the original design graphics that overlaps with the previous layer above and below and the non-overlapping area that does not overlap.

[0045] The original design graphic is a layout pattern designed according to the requirements of the semiconductor manufacturing process. It is generally consistent with the pattern obtained by transferring the pattern on the mask plate to the semiconductor substrate. For example, it can be the pattern of a gate expected to be formed on the semiconductor substrate, or the pattern of a metal layer of a metal interconnect line. Due to the optical proximity effect, when the original design graphic is directly transferred to the semiconductor substrate, the pattern formed is different from the actual desired pattern. Therefore, the original design graphic needs to be corrected. Since the layout pattern is large, the original design graphic can also be a selection of part of the layout pattern.

[0046] In the embodiment of the present application, the current layer may be a gate dielectric layer (GT layer), and the previous layer of the current layer may be an active region layer (TO layer). In other examples, the current layer may be a metal wiring layer (An), and the previous layer may be a gate dielectric layer (GT layer). The present application mainly takes the case where the current layer is a gate dielectric layer (GT layer) as an example.

[0047] like Figure 5As shown, under the current layer (GT layer), the previous layer (TO layer) is introduced to obtain an overlapping area where the two overlap up and down, and the overlapping area is, for example, the gate area (for example Figure 5 The other areas do not overlap with the TO layer, that is, they are non-overlapping areas.

[0048] The original design graphics include one or more of a U-shaped graphics, a T-shaped graphics, an H-shaped graphics, an L-shaped graphics, and a square ring graphics. In this article, the original design graphics including the U-shaped graphics are mainly taken as an example.

[0049] Next, continue to refer to Figure 4 In step S2, priorities are set for areas of each category, wherein the priority of the overlapping area is higher than the priority of the non-overlapping area.

[0050] For example, priorities are set for areas of each category in the OPC model. For example, overlapping areas such as gate areas may have a higher negative impact on the product than non-overlapping areas if graphic deformation or key dimension differences occur during lithography. Therefore, the priority of overlapping areas can be set higher than that of non-overlapping areas, so that in subsequent processing, the overlapping areas are processed to a limited extent.

[0051] Next, continue to refer to Figure 4 In step S3, a plurality of target points are set on the edge of the original design pattern.

[0052] Optionally, the edge includes a line end and an adjacent edge segment. In one example, the step of setting the target further includes: performing analytical segmentation on the edge of the original design graphic to obtain a plurality of adjacent edge segments and line ends; and setting the target point at the line end and the adjacent edge segment. This step is performed based on the setting of the OPC program.

[0053] The method for analyzing and segmenting the boundary may be based on any suitable method known to those skilled in the art, and is not limited here.

[0054] Since the priority is set, where the priority of the overlapping area is greater than that of the non-overlapping area, the placement of the target points also changes. For example, when placing the target points, the density of the target points set at the edge of the overlapping area is different from that of the target points set at the non-overlapping area according to the setting of the priority. For example, the density of the target points set at the edge of the overlapping area is greater than that of the target points set at the non-overlapping area. Figure 6 As shown, the left figure is a schematic diagram of the placement position of the target point in the existing OPC correction method, and the right figure is a schematic diagram of the placement position of the target point in the OPC correction method of the present application.

[0055] Next, continue to refer to Figure 4 In step S4, a modified graphic of the original design graphic is obtained according to the OPC model, and the modified graphic is simulated to obtain a graphic simulation result.

[0056] The photolithography process parameters are determined according to the characteristic dimensions of the current layer of the original design pattern, such as the gate. The photolithography processes performed under different gate processes use different process specifications, so it is necessary to determine the specific parameters of the photolithography process based on the gate process specifications. The specific parameters of the photolithography process include the optical parameters of the exposure light path, the material parameters of the photoresist, and the chemical parameters of the etching process. The optical parameters of the exposure light path mainly refer to the specific parameters such as the numerical aperture, zoom ratio, and exposure light source of the light path. The material parameters of the photoresist mainly refer to the specific parameters such as the resolution, exposure rate, and photosensitivity of the photoresist material. The chemical parameters of the etching process mainly refer to the specific parameters such as the acidity and alkalinity and chemical properties of the etchant. Since the photolithography processes used to produce different levels of characteristic dimensions are different, it is necessary to have a clear positioning of the photolithography process parameters.

[0057] According to the photolithography process parameters, an optical proximity correction model is determined, and an optical proximity correction operation program is established. After the photolithography process parameters are determined, OPC modeling can be performed. The basic process of modeling is as follows: First, a pre-designed test pattern is placed on the standard wafer to collect a set of data of a real photolithography wafer. Then, the same test pattern is used to simulate using the OPC modeling tool. If the simulated graphic size is well consistent with the corresponding real wafer data, it can be considered that in such a limited sampling space, the simulated model can well describe the entire exposure system and chemical effects, so it can be used to quantify the OPE effect under the predicted situation, so that it can be used for OPC. At the factory end, since the manufacturer will build a corresponding database for the product process produced by itself in most cases, the modeling process can also be simplified to the process of retrieving data. Only the corresponding data model needs to be input to retrieve the required OPC model. After the OPC model is built, it is also necessary to write an OPC processing program to perform OPC processing on the applicable graphics. Finally, a modified image of the original design image is obtained according to the OPC model, and the modified image is simulated to obtain an image simulation result, such as a simulation contour.

[0058] Next, continue to refer to Figure 4 In step S4, the difference between the graphic simulation result and the original design graphic at each target point is calculated.

[0059] The difference may be an edge placement error, based on which the graphic simulation result (eg, simulation profile) is controlled to meet specification requirements. The difference may be calculated using any suitable method known to those skilled in the art, and is not specifically limited here.

[0060] Next, continue to refer to Figure 4 In step S5, the correction graph is adjusted according to the difference and the weight of the target point to obtain an adjusted correction graph, the adjusted correction graph is simulated to obtain a graph simulation result, and the difference between the graph simulation result and the correction graph at each target point is calculated.

[0061] Step S5 also includes: step S51, adjusting the corrected graph according to the difference and the weight of the target point to obtain an adjusted corrected graph; step S52, simulating the adjusted corrected graph to obtain a graph simulation result; and step S53, calculating the difference between the graph simulation result and the corrected graph at each of the target points.

[0062] The OPC correction graph is adjusted according to the difference (EPE) of each target point and the weight of the area to which the corresponding target point belongs. During the OPC correction process, when the correction requirements of different areas conflict, the correction requirements are allocated according to the weight. The higher the weight of the area to which the corresponding target point belongs, the higher the priority of satisfying the correction requirements of the target point. For example, the weight of the target point in the overlapping area with high priority is greater than the weight of the target point in the non-overlapping area with low priority.

[0063] The adjusted corrected pattern is simulated to obtain a pattern simulation result. The simulation process can refer to the simulation process of the original design pattern in the foregoing text, and the simulation is a pattern formed on the photoresist by photolithography using the adjusted corrected image.

[0064] Finally, continue to refer to Figure 4 In step S6, the steps of adjusting the corrected graph according to the difference and the weight of the target point to obtain an adjusted corrected graph, simulating the adjusted corrected graph to obtain a graph simulation result, and calculating the difference between the graph simulation result and the corrected graph at each target point are repeated until a final corrected graph is obtained.

[0065] In each iteration, the difference between the graphic simulation result and the corrected graphic at each target point is calculated, and the iteration is stopped based on whether the difference is within a preset threshold range. If it is within the preset threshold range, the relevant steps in step S5 are executed again. If it is within the threshold range, the graphic simulation result of this time is used as the final corrected graphic.

[0066] In summary, according to the optical proximity effect correction method of the present application, the area of ​​the current layer in the original design graphic of the lithography is classified according to the graphic of the previous layer to obtain the category to which the area in the original design graphic belongs, wherein the category to which the area belongs includes the overlapping area in the current layer in the original design graphic that overlaps with the previous layer up and down and the non-overlapping area that does not overlap; then the priority is set for the areas of each category, and OPC correction is performed again. Therefore, the OPC correction accuracy can be improved, the rounding effect can be improved, the line width CDU can be increased, the process window can be increased, and the accuracy of imaging of the lithography pattern on the wafer can be improved, thereby reducing the deformation and deviation between the graphic obtained on the actual silicon wafer and the mask template graphic, so as to improve circuit performance and product yield.

[0067] In addition, the present application also provides a mask plate, which includes a main body and a mask plate pattern arranged on the main body. The mask plate pattern is a corrected pattern obtained based on the optical proximity effect correction method described above. Therefore, the mask plate of the present application also has the advantages of the aforementioned optical proximity effect correction method.

[0068] Below, refer to the attached Figure 8 The optical proximity correction system of an embodiment of the present invention is described, wherein: Figure 8 is a schematic block diagram of an optical proximity correction system according to an embodiment of the present invention, wherein the optical proximity correction system is used to execute the optical proximity effect correction method described above.

[0069] The optical proximity correction system of the embodiment of the present application may be a single chip microcomputer, which may include a central processing unit CPU with data processing capability, a random access memory RAM, a read-only memory ROM, multiple I / O ports and interrupt systems, a timer / counter, etc. For another example, the optical proximity correction system may be an electronic device such as a laptop computer or a desktop computer.

[0070] As an example, Figure 8 As shown, the optical proximity correction system 800 of the present application includes one or more memories 801, one or more processors 802, etc., and these components are interconnected through a bus system and / or other forms of connection mechanisms (not shown). It should be noted that Figure 8 The components and structures of the optical proximity correction system 800 shown are merely exemplary and not restrictive. The optical proximity correction system 800 may also have other components and structures as required.

[0071] The memory 801 is used to store various data information and executable program instructions generated during the relevant optical proximity correction process, for example, to store various application programs or algorithms for implementing various specific functions. It may include one or more computer program products, and the computer program product may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may include, for example, a read-only memory (ROM), a hard disk, a flash memory, etc.

[0072] The processor 802 may be a central processing unit (CPU), a graphics processing unit (GPU), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the optical proximity correction system 800 to perform desired functions. For example, the processor may include one or more embedded processors, processor cores, microprocessors, logic circuits, hardware finite state machines (FSMs), digital signal processors (DSPs), graphics processing units (GPUs), or combinations thereof.

[0073] The processor 802 is used to execute the program instructions stored in the memory 801, so that the processor 802 executes the optical proximity effect correction method in the aforementioned embodiment. The description of the optical proximity effect correction method is referred to the previous text and will not be repeated here.

[0074] In one example, the optical proximity correction system 800 further includes a communication interface (not shown) for communication between components in the optical proximity correction system 800 and between components of the optical proximity correction system 800 and other devices outside the system.

[0075] The communication interface is an interface of any currently known communication protocol, such as a wired interface or a wireless interface, wherein the communication interface may include one or more serial ports, USB interfaces, Ethernet ports, WiFi, wired networks, DVI interfaces, device integrated interconnect modules or other suitable various ports, interfaces, or connections. The optical proximity correction system 800 can also access a wireless network based on a communication standard, such as WiFi, 2G, 8G, 4G, 5G or a combination thereof. In an exemplary embodiment, the communication interface receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication interface also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0076] In one example, the optical proximity correction system 800 also includes an input device (not shown), which may be a device used by a user to input instructions, and may include one or more of a keyboard, a trackball, a mouse, a microphone, a touch screen, etc., or an input device consisting of other control buttons.

[0077] In one example, the optical proximity correction system 800 further includes an output device (not shown) that can output various information (eg, images or sounds) to the outside (eg, a user), and can include one or more of a display, a speaker, and the like.

[0078] In addition, the embodiment of the present application further provides a computer storage medium, such as a computer-readable storage medium, on which a computer program is stored. One or more computer program instructions can be stored on the computer storage medium, and the processor can run the program instructions stored in the memory to implement the functions (implemented by the processor) in the embodiment of the present application described herein and / or other desired functions, such as to execute the corresponding steps of the optical proximity effect correction method according to the embodiment of the present application, and various applications and various data, such as various data used and / or generated by the application, can also be stored in the computer-readable storage medium.

[0079] For example, the computer-readable storage medium may include a memory card of a smart phone, a storage component of a tablet computer, a hard disk of a personal computer, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a portable compact disk read-only memory (CD-ROM), a USB memory, or any combination of the above storage media. The computer-readable storage medium may be any combination of one or more computer-readable storage media.

[0080] Since the optical proximity correction system and computer storage medium of the embodiments of the present application can execute the corresponding steps of the aforementioned optical proximity correction method, they also have the advantages of the aforementioned optical proximity correction method.

[0081] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0082] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed.

[0083] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0084] Similarly, it should be understood that in order to streamline the present invention and help understand one or more of the various inventive aspects, in the description of the exemplary embodiments of the present invention, the various features of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, the method of the present invention should not be interpreted as reflecting the following intention: the claimed invention requires more features than the features explicitly stated in each claim. More specifically, as reflected in the corresponding claims, the inventive point is that the corresponding technical problem can be solved with less than all the features of a single disclosed embodiment. Therefore, the claims following the specific embodiment are hereby expressly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present invention.

[0085] It will be understood by those skilled in the art that, except for mutually exclusive features, all features disclosed in this specification (including the accompanying claims, abstracts and drawings) and all processes or units of any method or device disclosed in this specification may be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstracts and drawings) may be replaced by an alternative feature that provides the same, equivalent or similar purpose.

[0086] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present invention and form different embodiments. For example, in the claims, any one of the claimed embodiments may be used in any combination.

[0087] It should be noted that the above embodiments illustrate the present invention rather than limit it, and that those skilled in the art may devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference symbol between brackets shall not be construed as a limitation on the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "one" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present invention may be implemented by means of hardware comprising a number of different elements and by means of a suitably programmed computer. In a unit claim enumerating a number of devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc., does not indicate any order. These words may be interpreted as names.

[0088] The above is only a specific embodiment of the present invention or an explanation of a specific embodiment. The protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. The protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A method for correcting an optical proximity effect, characterized in that: Optical proximity effect correction methods include: Obtaining a graphic of a previous layer of the current layer, and classifying the region of the current layer in the original design graphic of the lithography according to the graphic of the previous layer, so as to obtain the category to which the region in the original design graphic belongs, wherein the category to which the region belongs includes an overlapping region in the current layer in the original design graphic that overlaps with the previous layer up and down and a non-overlapping region that does not overlap; Setting priorities for areas of each category, wherein the priority of the overlapping area is higher than the priority of the non-overlapping area; Setting a plurality of target points at the edge of the original design pattern, wherein the density of the target points set at the edge of the overlapping area is greater than the density of the target points set at the non-overlapping area; Obtaining a modified graphic of the original design graphic according to the OPC model, and simulating the modified graphic to obtain a graphic simulation result; Calculating the difference between the graphic simulation result and the original design graphic at each of the target points; According to the difference and the weight of the target point, the correction graph is adjusted to obtain an adjusted correction graph, the adjusted correction graph is simulated to obtain a graph simulation result, and the difference between the graph simulation result and the correction graph at each of the target points is calculated; The steps of adjusting the corrected graph according to the difference and the weight of the target point to obtain an adjusted corrected graph, simulating the adjusted corrected graph to obtain a graph simulation result, and iterating the steps of calculating the difference between the graph simulation result and the corrected graph at each target point until a final corrected graph is obtained.

2. The optical proximity effect correction method according to claim 1, characterized in that: The current layer is a gate dielectric layer, and the previous layer is an active region layer.

3. The optical proximity effect correction method according to claim 2, characterized in that: The overlapping area is a gate area.

4. The optical proximity effect correction method according to claim 1, wherein: The original design pattern includes a U-shaped pattern.

5. The method for correcting the optical proximity effect according to claim 1, wherein: The difference is the edge placement error.

6. The optical proximity effect correction method according to claim 1, wherein: The edge includes a line end and an adjacent edge segment, and the step of setting the target point further includes: Analytically segmenting the edge of the original design graphic to obtain a plurality of adjacent edge segments and line ends; The target points are set at the line ends and the adjacent edge segments.

7. An optical proximity effect correction system, characterized in that: The optical proximity effect correction system comprises: A memory for storing executable program instructions; A processor, configured to execute the program instructions stored in the memory, so that the processor executes the optical proximity effect correction method as described in any one of claims 1 to 6.

8. A mask, characterized in that: The mask comprises: ontology; A mask pattern is arranged on the main body, wherein the mask pattern is a correction pattern obtained based on the optical proximity effect correction method according to any one of claims 1 to 6.

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