Method for improving performance of gallium-containing light emitting devices
By improving the fabrication method of AlGaInP microLEDs through dry etching and sidewall passivation, the problem of efficiency decline after device miniaturization was solved, and a red microLED with low leakage current and high efficiency was realized.
Patent Information
- Application Number
- CN202080076582.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-10-30
- Filing Date
- 2020-10-30
- Publication Date
- 2026-01-23
- Estimated Expiration
- 2040-10-30
AI Technical Summary
In the prior art, the efficiency of AlGaInP material systems drops sharply after miniaturization of micro LED (μLED) devices, leading to problems such as high leakage current and non-radiative recombination, making it difficult to achieve high-performance red μLEDs.
In the manufacturing process of micro LEDs, gallium-containing semiconductor layers are grown by dry etching, surface treatment is performed to remove sidewall damage, dielectric materials are deposited on the sidewalls to passivate them, and nitrogen plasma and trimethylaluminum treatment are used to improve device performance.
It improves the forward current-voltage characteristics of the device, reduces leakage current, increases optical output power and efficiency, and solves the efficiency problem in small device size.
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Figure CN114631169B_ABST
Abstract
Description
[0001] Cross-references to related applications
[0002] This application claims a right under Title 35, Section 119(e) to the following co-pending and co-assigned applications:
[0003] U.S. Provisional Application Serial No. 62 / 927,859, filed on October 30, 2019, by Matthew S. Wong, Jordan M. Smith, and Steven P. Den Baars, entitled “METHOD TO IMPROVE THE PERFORMANCE OF GALLIUM-CONTAINING LIGHT-EMITTING DEVICES”, Agents’ File No. G&C 30794.0754USP 1 (UC2020-086-1);
[0004] This application is incorporated herein by reference. Technical Field
[0005] This invention generally relates to light-emitting diodes (LEDs), and more specifically, to a method for improving the performance of gallium-containing LEDs. Background Technology
[0006] In recent years, the development of displays with excellent resolution and color gamut has garnered significant research attention. Micro-LEDs (also known as micro-LEDs or μLEDs) are considered the most promising display technology for next-generation display applications. However, several challenges need to be addressed before this technology can be applied to commercial production.
[0007] Of all the challenges, the choice of materials for red μLEDs is one of the main problems in μLED displays. For full-color displays, red (~630nm), green (~525nm), and blue (~480nm) are required. High-efficiency blue and green emitting μLEDs using InGaN material systems have been demonstrated and are commercially available; however, high-performance red emitting μLEDs using InGaN material systems have not yet been developed and are difficult to achieve due to material limitations.
[0008] On the other hand, traditional III-V semiconductor materials, namely the AlGaInP / GaAs material system, have been used as mature red light emitters for various commercial applications. AlGaInP devices work well at large sizes, but their efficiency drops sharply as devices shrink because the AlGaInP material system has a high minority carrier diffusion length, which leads to problems such as leakage current and nonradiative recombination.
[0009] Accordingly, there is a need in the art for improved methods for fabricating AlGaInP-based pLEDs. The present invention satisfies this need. SUMMARY
[0010] A method of improving the performance of a gallium-containing LED is disclosed. A gallium-containing semiconductor layer is grown on a substrate, and then the gallium-containing semiconductor layer is dry etched during fabrication of the device. After dry etching, a surface treatment is performed to remove damage to the sidewalls of the device. After the surface treatment, a dielectric material is deposited on the sidewalls of the device to passivate the sidewalls of the device. These steps result in an improvement in the forward current-voltage characteristics and a reduction in the device leakage current, as well as an increase in the device light output power and efficiency. BRIEF DESCRIPTION OF DRAWINGS
[0011] Figure 1 A schematic diagram of a semiconductor material grown on a substrate is shown.
[0012] Figure 2 A schematic diagram of a semiconductor material, including an n-type doped layer, an active layer, and a p-type doped layer is shown.
[0013] Figure 3 A graph of the sidewall profile of a device after nitrogen plasma treatment is shown.
[0014] Figure 4 And Figure 5 A 20x20 pm2device with different sidewall passivation techniques is shown. 2 Forward current-voltage characteristics of an AlGaInP pLED in the range of 0 to 3.5 V and -4 to 3.5 V.
[0015] Figure 6 And Figure 7 Light output power and efficiency curves of a 100x100 and 20x20 pm2device are presented. 2 Forward current-voltage characteristics of an AlGaInP pLED in the range of 0 to 3.5 V and -4 to 3.5 V.
[0016] Figure 8 And 9 Leakage current density and efficiency of different device sizes with different sidewall passivation techniques are shown.
[0017] Figure 10 A flowchart of the process steps of the present invention. DETAILED DESCRIPTION
[0018] In the following description of preferred embodiments, reference is made to the accompanying drawings that form a part hereof, and in which are shown by way of illustration specific embodiments in which the invention can be practiced. It is to be understood that other embodiments can be utilized and structural changes can be made without departing from the scope of the present invention.
[0019] TECHNICAL DESCRIPTION
[0020] In the present invention, an inorganic semiconductor material is grown on a substrate, and wherein the inorganic semiconductor material comprises Group III and Group V elements having the chemical formula Al x Ga y In z N v P w As u wherein 0≤x≤1, 0≤y≤1, 0≤z≤1, 0≤v≤1, 0≤w≤1, 0≤u≤1, v+w+u=1, and x+y+z=1. The substrate used can be optically transparent, translucent, or opaque, and can be electrically conductive, semi-insulating, or insulating.
[0021] Figure 1 A schematic diagram of a semiconductor material comprising a substrate 100 and Al x Ga y In 1-x-y P w As 1-w 101 grown on the substrate 100 is shown.
[0022] Figure 2 A schematic diagram of a semiconductor material comprising a substrate 200, n-type doped Al x Ga y In 1-x-y P w As 1-w 201 grown on the substrate 200, followed by growth of an active region 203 and p-type doped Al x Ga y In 1-x-y P w As 1-w 204 is shown.
[0023] A plasma-based dry etch is used to define a light emitting region of the semiconductor material by etching through the light emitting active region, also referred to as a mesa. After the etching step, the semiconductor material is sent to a vacuum chamber for sidewall treatment, wherein the vacuum chamber has the capability of etching and deposition.
[0024] If the semiconductor material is exposed to ambient conditions after the mesa etch, the semiconductor material can be sent to an etch chamber as oxygen acts as a non-radiative site for the semiconductor material. In the etch chamber, a nanoscale thin layer of the semiconductor material can be removed by a low power dry etch to eliminate the presence of oxygen atoms on the exposed surface. This etching step further improves device performance.
[0025] The surface of the etched semiconductor material is then treated with alternating pulse cycles of trimethy aluminum (TMA) and nitrogen / hydrogen plasma. This TMA and plasma surface treatment suppresses the effects of dry damage by removing non-radiative binding sites, reducing surface sites, and filling vacancies with nitrogen. The use of hydrogen plasma is not as important as nitrogen plasma because hydrogen plasma can react with other constituents on the substrate. The nitrogen plasma used in the surface treatment is low power, resulting in devices that are not damaged and there is no deposition from metal organics and plasma.
[0026] Figure 3 A graph showing the sidewall profile of an AlGaInP device after nitrogen plasma treatment, including Al x Ga y In 1-x-y P w As 1-w The device sidewall 300, Al x Ga y In 1-x-y P w N v As 1-v-w The sidewall interface 301 and Al x Ga y In 1-x-y N v sidewall face 302.
[0027] In addition to reducing the effects of sidewall damage caused by the definition of the mesa, the use of nitrogen plasma introduces nitrogen atoms at the semiconductor material interface and increases the bandgap at the surface and interface of the AlGaInP material. Since nitrides form stronger chemical bonds with group III elements than phosphides and arsenides, the bandgap of nitrides is greater than phosphides and arsenides, so after nitrogen plasma treatment, injected current is less able to reach the sidewall. The plasma approach is more attractive for AlGaInP device fabrication because the AlGaInP material system has different reactivity and sensitivity to acidic or basic wet chemical treatments, so a plasma-based surface treatment is a more reliable and repeatable approach.
[0028] In the case of nitride semiconductor materials (e.g., Al x Ga y In 1-x-y N v ), nitrogen vacancies are created after dry etching of the mesa, and these nitrogen vacancies act as leakage paths and non-radiative recombination sites. By employing nitrogen plasma on the sidewalls of the nitride semiconductor material, the nitrogen plasma compensates for the nitrogen vacancies and enhances device performance.
[0029] After TMA and nitrogen plasma surface treatment, dielectric sidewall passivation is used to cover the surface of the semiconductor material with a dielectric material to terminate any surface recombination sites. The dielectric deposition method should not cause damage to the device while providing excellent dielectric material quality. Atomic layer deposition (ALD) provides damage-free material deposition with outstanding material quality.
[0030] The benefits of this sidewall treatment include better forward and reverse current-voltage device characteristics and an increase in light output power. As a result, the efficiency of small devices is also significantly improved with sidewall treatment.
[0031] Figure 4 and Figure 5 are plots of current (mA) versus voltage (V) showing 20x20 pm 2 AlGaInP pLEDs from 0 to 3.5 V and from -4 v to 3.5 V, where "Ref" refers to pLEDs without sidewall treatment and "ALD" indicates devices with Al2O3 sidewalls passivated by ALD, without TMA and nitrogen plasma surface treatment, and "ALD+N" indicates devices with Al2O3 sidewalls passivated by ALD, with TMA and nitrogen plasma surface treatment.
[0032] Figure 6 and Figure 7 are plots of light output power (LOP) (pW) versus current density (A / cm 2 ) showing 100x100 and 20x20 pm 2 light output power and efficiency curves for AlGaInP pLEDs, where "Ref" refers to pLEDs without sidewall treatment and "ALD" indicates devices with Al2O3 sidewalls passivated by ALD, without TMA and nitrogen plasma surface treatment, and "ALD+N" indicates devices with Al2O3 sidewalls passivated by ALD, with TMA and nitrogen plasma surface treatment.
[0033] Figure 8 and Figure 9 are 100 A / cm 2FIG. 4 shows plots of relative external quantum efficiency (EQE) versus device length (pm) for devices with different sidewall passivation techniques. The plots show leakage current density and efficiency for different device sizes with different sidewall passivation techniques.
[0034] Figure 10 is a flowchart of the process steps of the present invention described above.
[0035] Block 1000 represents a step of growing one or more gallium-containing semiconductor layers on a substrate. The gallium-containing semiconductor layers include one or more nitrogen, phosphorous, and / or arsenic atoms as counter atoms.
[0036] Block 1001 represents a step of performing a plasma-based dry etching of the gallium-containing semiconductor layers during fabrication of the device.
[0037] Block 1002 represents a step of performing one or more surface treatments to remove damage or change surface chemistry from sidewalls of the device after dry etching of the gallium-containing semiconductor layers. The surface treatments can include thermal-based or plasma-based nitridation, oxidation, and / or other surface chemistry modification techniques. In one or more embodiments, the surface treatments are performed at temperatures above 25 °C. In one or more embodiments, the source of the plasma can be from a gas, metal organic, and / or other volatile chemical species. In one or more embodiments, the surface treatments are performed at low power levels to avoid physical deposition and damage to the device.
[0038] Block 1003 represents a step of depositing one or more dielectric materials on the sidewalls of the device to passivate the sidewalls of the device after the surface treatment of the sidewalls. In one or more embodiments, the dielectric deposition is conformal or uniform in covering the sidewalls. In one or more embodiments, the dielectric is deposited by atomic layer deposition, sputtering, plasma-enhanced chemical vapor deposition, and / or other chemical vapor deposition. In one or more embodiments, the step can further include post-dielectric deposition to improve material quality and interface between the dielectric material and the sidewalls, such as annealing.
[0039] In one or more embodiments, material is removed from the surface of the device prior to performing the surface treatment and depositing the dielectric material.
[0040] Block 1004 represents the resulting device, where the execution and deposition steps result in an improvement in the forward current-voltage characteristics and a reduction in the leakage current of the resulting device, as well as an increase in the light output power and efficiency of the resulting device. In one or more embodiments, the device has a sidewall perimeter-to-emitting area ratio greater than 0.04 pm -1 and the device has one or more edges with a length less than 80 pm.
[0041] BENEFITS AND ADVANTAGES
[0042] The AlGalnP / GaAs system is a very mature material system for typical lighting applications, where the device size is large. However, due to the inherent material properties, the main obstacle for using this material for pLEDs is the high leakage current and low energy efficiency at small device sizes. The present invention solves the leakage current and efficiency problem for AlGalnP pLEDs by employing readily available device fabrication techniques. The AlGalnP pLEDs have low leakage current and good efficiency, and can be used as red emitters in pLED displays.
[0043] REFERENCES
[0044] The following applications and publications are incorporated by reference herein:
[0045] 1. U.S. Utility Patent Application No. 16 / 757,920, filed April 21, 2020, by Matthew S. Wong, David Hwang, Abdullah Alhassan, and Steven P. DenBaars, entitled “REDUCTION IN LEAKAGE CURRENT AND INCREASE IN EFFICIENCY OF III-NITRIDE LEDS BY SIDEWALL PASSIVATION USING ATOMIC LAYER DEPOSITION,” Attorney Docket No. 30794.0667USWO (UC 2018-256-2), which claims priority under 35 U.S.C. § 119(e) from PCT International Patent Application No. PCT / US18 / 58362, filed October 31, 2018, by Matthew S. Wong, David Hwang, Abdullah Alhassan, and Steven P. DenBaars, entitled “REDUCTION IN LEAKAGE CURRENT AND INCREASE IN EFFICIENCY OF III-NITRIDE LEDS BY SIDEWALL PASSIVATION USING ATOMIC LAYER DEPOSITION,” Attorney Docket No. 30794.0667WOU1 (UC 2018-256-2), which claims priority under 35 U.S.C. § 119(e) from “REDUCTION IN LEAKAGE CURRENT AND INCREASE IN EFFICIENCY OF III-NITRIDE LEDS BY SIDEWALL PASSIVATION USING ATOMIC LAYER DEPOSITION” Attorney Docket No. 30794.0667USP1 (UC 2018-256-1), filed November 1, 2017, by Matthew S. Wong, David Hwang, Abdullah Alhassan, and Steven P. DenBaars.
[0046] 2. PCT International Application Serial No. PCT / US19 / 59163, titled “MICRO-LEDS WITH ULTRA-LOW LEAKAGE CURRENT,” by Tal Margalith, Matthew S. Wong, Lesley Chan, and Steven P. DenBaars, Attorney Docket No. G&C 30794.0707WOU1 (UC 2019-393-2), filed October 31, 2019, which claims priority to U.S. Provisional Application Serial No. 62 / 756,252, titled “MICRO-LEDS WITH ULTRA-LOW LEAKAGE CURRENT,” by Tal Margalith, Matthew S. Wong, Lesley Chan, and Steven P. DenBaars, Attorney Docket No. G&C 30794.0707USP1 (UC 2019-393-1), filed November 6, 2018.
[0047] 3. High Efficiency of III-Nitride Micro-Light-Emitting Diodes by Sidewall Passivation Using Atomic Layer Deposition, Optics Express, 26(16), 21324 (2018).
[0048] 4. Size-independent Peak Efficiency of III-Nitride Micro-Light-Emitting Diodes using Chemical Treatment and Sidewall Passivation, Applied Physics Express, 12, 097004 (2019).
[0049] CONCLUSIONS
[0050] This concludes the description of the preferred embodiment of the application. The foregoing description of one or more embodiments of the application has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the application to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the application be limited not with this detailed description, but rather by the claims appended hereto.
Claims
1. A device comprising: One or more aluminum- and gallium-containing semiconductor layers are grown on a substrate to form a micro LED; The aluminum- and gallium-containing semiconductor layers are dry-etched to define the mesa of the micro-light-emitting diode; The sidewalls of the dry-etched mesa of the micro-LED are surface-treated by alternating pulse cycles of trimethylaluminum (TMA) and at least nitrogen plasma to remove damage to the sidewalls or alter their surface chemical properties; and This includes depositing one or more dielectric materials of sapphire (Al2O3) on the sidewalls of the surface treatment to passivate the sidewalls of the surface treatment.
2. The device of claim 1, wherein the aluminum-containing and gallium-containing semiconductor layers comprise one or more nitrogen, phosphorus, or arsenic atoms as counter atoms.
3. The device according to claim 1, wherein the miniature light-emitting diode has a size greater than 0.04 μm. -1 The ratio of the sidewall perimeter to the luminous area.
4. The device of claim 1, wherein the micro light-emitting diode has one or more edges with a length of less than 80 μm.
5. The device of claim 1, wherein the dielectric material is conformal or uniform in covering the sidewalls of the surface treatment.
6. The device of claim 1, wherein the dielectric material is deposited by atomic layer deposition, sputtering, plasma-enhanced chemical vapor deposition or other chemical vapor deposition.
7. The device of claim 1, further comprising post-dielectric deposition to improve material quality and the interface between the dielectric material and the sidewall.
8. The device of claim 1, wherein the aluminum-containing and gallium-containing semiconductor layers comprise having the chemical formula Al x Ga y In z N v P w As u The elements of Group III and Group V, where 0≤x≤1, 0≤y≤1, 0≤z≤1, 0≤v≤1, 0≤w≤1, and 0≤u≤1.
9. A device comprising: Micro LEDs include: The mezzanine includes an aluminum-containing and a gallium-containing semiconductor layer and has at least one of the following: The top surface has an area of 100×100 or 20×20 μm. 2 ; A side surface connected to the top surface, wherein the side surface is made of trimethylaluminum (TMA). The sidewalls of the mesa are surface-treated with alternating pulse cycles of at least nitrogen plasma to remove damage to the sidewalls or alter the surface chemical properties of the sidewalls; and A dielectric material, including sapphire (Al2O3), is deposited on the sidewalls to passivate the sidewalls of the mesa.
10. The device of claim 9, wherein the aluminum-containing and gallium-containing semiconductor layers comprise one or more nitrogen, phosphorus, or arsenic atoms as counter atoms.
11. The device according to claim 9, wherein the micro light-emitting diode has a size greater than 0.04 μm. -1 The ratio of the sidewall perimeter to the luminous area.
12. The device of claim 9, wherein the micro LED has one or more edges with a length of less than 80 μm.
13. The device of claim 9, wherein the dielectric is conformal or uniform in covering the sidewall.
14. The device of claim 9, wherein the dielectric is deposited by atomic layer deposition, sputtering, plasma-enhanced chemical vapor deposition or other chemical vapor deposition.
15. The device of claim 9, further comprising post-dielectric deposition to improve material quality and the interface between the dielectric and the sidewall.
16. The device of claim 9, wherein the aluminum-containing and gallium-containing semiconductor layers comprise having the chemical formula Al x Ga y In z N v P w As u The elements of Group III and Group V, where 0≤x≤1, 0≤y≤1, 0≤z≤1, 0≤v≤1, 0≤w≤1, and 0≤u≤1.
17. A method comprising: One or more aluminum- and gallium-containing semiconductor layers are grown on a substrate to form a micro LED; The aluminum- and gallium-containing semiconductor layers are dry-etched to define the mesa of the micro-light-emitting diode; The sidewalls of the dry-etched mesa of the micro-LED are surface-treated by alternating pulse cycles of trimethylaluminum (TMA) and at least nitrogen plasma to remove damage to the sidewalls or alter their surface chemical properties; and This includes depositing one or more dielectric materials of sapphire (Al2O3) on the sidewalls of the surface treatment to passivate the sidewalls of the surface treatment.
18. The method of claim 17, wherein the aluminum-containing and gallium-containing semiconductor layers comprise one or more nitrogen, phosphorus, or arsenic atoms as counter atoms.
19. The method of claim 17, wherein the micro light-emitting diode has a size greater than 0.04 μm. -1 The ratio of the sidewall perimeter to the luminous area.
20. The method of claim 17, wherein the micro LED has one or more edges with a length of less than 80 μm.
21. The method of claim 17, wherein the dielectric is conformal or uniform when covering the sidewall.
22. The method of claim 17, wherein the dielectric is deposited by atomic layer deposition, sputtering, plasma-enhanced chemical vapor deposition or other chemical vapor deposition.
23. The method of claim 17, further comprising post-dielectric deposition to improve material quality and the interface between the dielectric material and the sidewall.
24. The method of claim 17, wherein the aluminum-containing and gallium-containing semiconductor layers comprise having the chemical formula Al x Ga y In z N v P w As u The elements of Group III and Group V, where 0≤x≤1, 0≤y≤1, 0≤z≤1, 0≤v≤1, 0≤w≤1, and 0≤u≤1.
Citation Information
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