A scheduling table restart method and device, a vehicle, and a storage medium

Abstract

Embodiments of the present application provide a scheduling table restart method and device, a vehicle and a medium. The method comprises: starting the main core to process the scheduling table of at least one slave core; detecting, by the main core, an abnormal condition of the scheduling table of the at least one slave core; and restarting, for a target slave core with an abnormal condition of the scheduling table, the processing of the scheduling table of the target slave core by the main core. The scheduling table is individually specified for each slave core, and the monitoring of the scheduling table of a single slave core is implemented, so that the main core can detect the failure of a single slave core, the individual processing of the scheduling table of a single slave core is implemented, and the functional safety and flexibility of the multi-core system are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data processing, in particular to a scheduling table restart method, a scheduling table restart device, a vehicle and a readable storage medium. BACKGROUND

[0002] With the rapid development of automobile electronic technology, the electronic and electrical architecture of automobile electronics is constantly upgraded, and the functional requirements are increasingly rich, which leads to more heavy tasks carried by the vehicle-mounted system. To cope with such heavy tasks, multi-core chips are the best solution.

[0003] Compared with other electronic systems, the vehicle-mounted system has higher requirements for safety and reliability. As the core of the vehicle-mounted system, the safety and reliability of the multi-core chip need to be improved. SUMMARY

[0004] The purpose of the embodiments of the present application is to provide a scheduling table restart method, device, vehicle and storage medium, thereby solving the technical problem that the safety and reliability of the multi-core chip need to be improved.

[0005] In order to solve the above problems, in the first aspect of the present application, a scheduling table restart method is first provided, comprising:

[0006] starting the main core to process the scheduling table of at least one slave core;

[0007] detecting, by the main core, abnormal conditions of the scheduling table of the at least one slave core;

[0008] restarting, for a target slave core with an abnormal condition of the scheduling table, the processing of the scheduling table of the target slave core by the main core.

[0009] Optionally, the detecting, by the main core, of the abnormal conditions of the scheduling table of the at least one slave core comprises:

[0010] providing, to the main core, survival counter information corresponding to the at least one slave core;

[0011] detecting, according to the survival counter information corresponding to the at least one slave core, the target slave core with the abnormal condition of the scheduling table.

[0012] Optionally, the providing, to the main core, of the survival counter information corresponding to the at least one slave core comprises:

[0013] sending, by a loop task in the at least one slave core, the corresponding survival counter information to the main core;

[0014] receiving, by a task in the main core with the same periodic time as the loop task, the survival counter information.

[0015] Optionally, the detecting the target slave core whose scheduling table is in abnormal condition according to the survival counter information corresponding to the at least one slave core comprises:

[0016] determining count increment information between the survival counter information sent this time and the survival counter information sent last time in the loop task;

[0017] in response to the count increment information satisfying a preset condition, determining that the corresponding slave core is the target slave core.

[0018] Optionally, the restarting, by the master core, the processing of the scheduling table of the target slave core in response to the target slave core whose scheduling table is in abnormal condition comprises:

[0019] stopping the processing of the scheduling table of the target slave core by the master core;

[0020] starting the processing of the scheduling table of the target slave core by the master core;

[0021] controlling the target slave core to restart through a power management integrated circuit.

[0022] In a second aspect of the embodiment of the present application, a scheduling table restarting device is provided, comprising:

[0023] a processing starting module configured to start the processing of the scheduling table of at least one slave core by a master core;

[0024] a condition detecting module configured to detect, by the master core, an abnormal condition of the scheduling table of the at least one slave core;

[0025] a processing restarting module configured to restart, in response to a target slave core whose scheduling table is in abnormal condition, the processing of the scheduling table of the target slave core by the master core.

[0026] Optionally, the condition detecting module comprises:

[0027] an information providing sub-module configured to provide the master core with survival counter information corresponding to the at least one slave core;

[0028] a slave core detecting sub-module configured to detect, according to the survival counter information corresponding to the at least one slave core, a target slave core whose scheduling table is in abnormal condition.

[0029] Optionally, the information providing sub-module comprises:

[0030] an information sending unit configured to send, by a loop task in the at least one slave core, the corresponding survival counter information to the master core;

[0031] An information receiving unit is configured to receive the survival counter information through a task in the main core that has the same task cycle time as the survival counter information.

[0032] Optionally, the slave core detecting submodule comprises:

[0033] An information determining unit is configured to determine count increment information between survival counter information sent this time and survival counter information sent last time in the cyclic task.

[0034] A slave core determining unit is configured to determine that a corresponding slave core is the target slave core in response to the count increment information meeting a preset condition.

[0035] Optionally, the processing restart module comprises:

[0036] A processing stopping submodule is configured to stop processing of a schedule table of the target slave core by the main core.

[0037] A processing starting submodule is configured to start processing of the schedule table of the target slave core by the main core.

[0038] A restart control submodule is configured to control the target slave core to restart through a power management integrated circuit.

[0039] In a third aspect of the embodiment of the present application, a vehicle is provided, and the vehicle comprises a processor, a communication interface, a memory and an integrated circuit bus, wherein the processor, the communication interface and the memory communicate with each other through the integrated circuit bus.

[0040] The memory is configured to store a computer program.

[0041] The processor is configured to execute the program stored on the memory, and implement the method steps in any of the above aspects.

[0042] In a fourth aspect of the embodiment of the present application, a computer readable storage medium is provided, and the computer readable storage medium stores a computer program, and the program is executed by a processor to implement the method in any of the above aspects.

[0043] The embodiment of the present application provides a scheduling table restart method and device, a vehicle and a storage medium, the processing of the schedule table of at least one slave core by the main core is started, the main core detects the abnormal situation of the schedule table of the at least one slave core, the processing of the schedule table of the target slave core in which the abnormal situation occurs by the main core is restarted, the schedule table is specified for each slave core, the monitoring of the schedule table of the single slave core is implemented, the main core can detect the failure of the single slave core, the separate processing of the schedule table of the single slave core is implemented, and the functional safety and flexibility of the multi-core system are improved. BRIEF DESCRIPTION OF DRAWINGS

[0044] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the accompanying drawings needed to be used in the embodiments or prior art description will be briefly introduced.

[0045] Figure 1 A step flow chart of an embodiment of the scheduling table restart method of the present application is shown;

[0046] Figure 2 A step flow chart of an embodiment of the scheduling table restart method of the present application is shown;

[0047] Figure 3 A step flow chart of an embodiment of the scheduling table restart method of the present application is shown;

[0048] Figure 4 A sequence diagram of the multi-core monitoring of the present application is shown;

[0049] Figure 5 A structure block diagram of a scheduling table restart device of an embodiment of the present application is shown;

[0050] Figure 6 A schematic diagram of a vehicle of an embodiment of the present application is shown. DETAILED DESCRIPTION

[0051] In order to make the above-mentioned objects, features and advantages of the present application more apparent and comprehensible, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0052] With reference to Figure 1 A step flow chart of an embodiment of the scheduling table restart method of the present application is shown, and can specifically include the following steps:

[0053] Step 101, starting the main core to process the scheduling table of the at least one slave core.

[0054] In an embodiment of the present application, the multi-core chip refers to a chip integrating two or more complete computing cores. The multi-core chip includes a main core and a slave core, the main core is usually one, and the slave core can be many. If the main core is closed, it means that the device is powered off, but the slave core can be closed and can be reawakened. During the device startup process, the main core is started first, and then the slave core is started to be awakened.

[0055] In the embodiment of the present application, the master core and the slave core are also resources that need to be managed, so that the programs are assigned to achieve the highest efficiency. The schedule table is used to manage the master core and the slave core, and the schedule table can be used to activate the task and set the event. The schedule table is used to determine which program obtains the clock cycle of the master core / slave core. The processing of the schedule table of the slave core by the master core means that the schedule table of the slave core is managed on the master core. The present application proposes to make a schedule table for the slave core separately, and the master core manages the schedule table of all cores.

[0056] In the embodiment of the present application, the operating system can start the processing of the schedule table of the slave core by the master core, and the processing of the schedule table of the slave core by the master core is separate. For example, the control (such as Start / Stop) and the predefined Schedule Table of the Master Core (the master core, i.e. Core0) to the Slave Cores (the slave core, i.e. Core1 / 2 / 3) will be executed by the Os (Operating System) on the Master Core.

[0057] Step 102, detecting the abnormal situation of the schedule table of the at least one slave core by the master core.

[0058] In the embodiment of the present application, the abnormal situation of the schedule table means that the abnormal situation occurs in the running of the schedule table, for example, the error of the program obtaining the clock cycle of the master core / slave core, the unexpected processing causing the slave core to deviate from the normal running path in the schedule table, and staying outside the executable instructions in the schedule table to cause the crash, etc.

[0059] In the embodiment of the present application, the detection of the abnormal situation of the schedule table of the at least one slave core is executed by the master core. For example, the program of the operating system for detecting the abnormal situation of the schedule table of the at least one slave core runs on the master core.

[0060] In the embodiment of the present application, the master core should provide the algorithm for judging the normal or abnormal situation of the schedule table of the slave core. In the normal situation, the master core will always monitor the slave core. When the abnormal situation occurs, the master core will detect the slave core with the abnormal situation of the schedule table, and the slave core needs to be restarted. The implementation manner of detecting the abnormal situation of the schedule table of the at least one slave core by the master core can include various manners. For example, the survival counter information corresponding to the at least one slave core is provided to the master core, and the target slave core with the abnormal situation of the schedule table is detected according to the survival counter information corresponding to the at least one slave core. The embodiment of the present application does not limit this by any applicable implementation manner.

[0061] Step 103, restarting the processing of the schedule table of the target slave core by the master core for the target slave core with the abnormal situation of the schedule table.

[0062] In the embodiment of the present application, the slave core whose schedule table is abnormal is recorded as a target slave core. The master core can restart the processing of the schedule table of the target slave core. For example, when the master core detects the target slave core whose schedule table is abnormal, the master core calls the service of the operating system to restart the processing of the schedule table, thereby restarting the processing of the schedule table of the target slave core, and the cause of the abnormality can also be detected through the corresponding schedule table.

[0063] According to the embodiment of the present application, the master core starts the processing of the schedule table of at least one slave core, detects the abnormality of the schedule table of the at least one slave core through the master core, restarts the processing of the schedule table of the target slave core whose schedule table is abnormal by the master core, individually specifies the schedule table for each slave core, and monitors the schedule table of the single slave core, so that the master core can detect the failure of the single slave core, realizes the individual processing of the schedule table of the single slave core, and improves the functional safety and flexibility of the multi-core system.

[0064] In an optional embodiment of the present application, as shown in Figure 2 Step 102 includes:

[0065] Step 1021 provides the master core with the survival counter information corresponding to the at least one slave core.

[0066] Step 1022 detects the target slave core whose schedule table is abnormal according to the survival counter information corresponding to the at least one slave core.

[0067] Each operating system provides at least one survival counter derived from a timer. The survival counter is used to drive the schedule table. In order to synchronize the schedule tables on different cores, the corresponding survival counters need to be synchronized. In addition, each schedule table corresponds to a survival counter respectively, and when the value of the survival counter reaches the value corresponding to the task, the task will be triggered. The survival counter information refers to the value of the survival counter.

[0068] The slave core should provide the master core with the survival counter information corresponding to the slave core, and the master core obtains the survival counter information corresponding to the slave core, and then detects whether the schedule table of the slave core is abnormal according to the survival counter information. For example, it is verified whether the value of the survival counter is different from the last time, which is the simplest verification. As long as it is different from the last time, it means that the survival counter is changing, which means that the output end is updating. If it is the same as the last time, it means that the schedule table is abnormal. For another example, it is verified whether the deviation between the value of the survival counter this time and the value of the survival counter last time is expected, i.e. less than a certain error. For example, it is expected to increase by 1 each time, and the deviation of [1, 4] can be accepted.

[0069] In an optional embodiment of the present application, the specific implementation of providing the master core with the corresponding alive counter information of the at least one slave core can include: sending the corresponding alive counter information to the master core by a loop task in the at least one slave core; and receiving the alive counter information by a task in the master core with the same period as the loop task.

[0070] The loop task refers to a task that is executed in a cycle. The alive counter information is sent to the master core each time the loop task is executed. In order to process in time, a task with the same period is configured in the master core to receive the alive counter information.

[0071] In an optional embodiment of the present application, the specific implementation of detecting the target slave core in which the scheduling table is abnormal according to the alive counter information of the at least one slave core can include: determining the count increment information between the alive counter information sent this time and the alive counter information sent last time in the loop task; and determining the corresponding slave core as the target slave core in response to the count increment information satisfying a preset condition.

[0072] The difference between the alive counter information sent this time and the alive counter information sent last time is recorded as the count increment information. For example, the difference between the value of the alive counter information sent this time and the value of the alive counter information sent last time. The count increment information is detected to see whether it satisfies the preset condition. If the count increment information satisfies the preset condition, the corresponding slave core is determined as the target slave core. The preset condition includes exceeding a preset threshold. The preset threshold can be set according to actual conditions, and the embodiments of the present application do not limit this.

[0073] In an optional embodiment of the present application, as shown in Figure 3 Step 103 includes:

[0074] Step 1031: stopping the master core from processing the scheduling table of the target slave core.

[0075] Step 1032: starting the master core to process the scheduling table of the target slave core.

[0076] Step 1033: controlling the target slave core to restart through a power management integrated circuit.

[0077] One way of restarting the master core to process the scheduling table of the target slave core is to stop the master core from processing the scheduling table of the target slave core first, and then start the master core to process the scheduling table of the target slave core. In addition, the target slave core is controlled to restart through a power management integrated circuit (PMIC).

[0078] For example, such as Figure 4 The diagram shows the sequence of multi-core monitoring. Ecum (Electronic Control Unit StateManager) starts the kernel under Ecum control through the StartCore function of OS, and starts OS through the StartOs function provided by OS. OS starts the main core Core0 through the Ecu_StartupTast_Core0 function. After the main core Core0 completes the initial hardware initialization, it starts the slave core Core1 through the Ecu_StartupTast_Core1 function, the slave core Core2 through the Ecu_StartupTast_Core2 function, and the slave core Core3 through the Ecu_StartupTast_Core3 function. The main core then starts the scheduling tables of all kernels through the Os_StartScheduleTableRel function provided by OS. Each slave core provides liveness counter information to the main core through the Monitor Alive Counter function. If the master core detects that the slave core's scheduler table is in a normal state, it will continuously monitor the slave core. When the slave core's scheduler table becomes abnormal (AbNormal), the master core will detect the target slave core whose scheduler table is abnormal, and the target slave core needs to be restarted. The master core stops processing the scheduler table of the target slave core (Core1 / Core2 / Core3) using the `Os_StopScheduleTable` function, and then resumes processing the scheduler table of the target slave core (Core1 / Core2 / Core3) using the `Os_StartScheduleTableRel` function. Every task in the master core is monitored by WdgM (Watchdog Manager), and at least the basic and critical tasks in the slave cores should also be monitored to enhance the overall security integrity.

[0079] Among them, StartScheduleTableRel provided by OS can start a scheduler table residing in another kernel. And StopScheduleTable provided by the operating system module can process the scheduler table immediately when it runs.

[0080] It should be noted that, for the method embodiments, the series of acts combined is described for simplicity, but those skilled in the art should know that the embodiments of the present application are not limited to the order of the acts described, because according to the embodiments of the present application, certain steps can be performed in other orders or at the same time. Secondly, those skilled in the art should know that the embodiments described in the specification are all preferred embodiments, and the acts involved are not necessarily essential to the embodiments of the present application.

[0081] With reference to Figure 5 , a structure block diagram of a scheduling table restart device is shown, which can specifically include the following steps:

[0082] The processing start module 201 is configured to start the processing of the scheduling table of the at least one slave core by the master core.

[0083] The condition detection module 202 is configured to detect the abnormal condition of the scheduling table of the at least one slave core by the master core.

[0084] The processing restart module 203 is configured to restart the processing of the scheduling table of the target slave core in which the abnormal condition occurs by the master core.

[0085] In an optional embodiment of the present application, the condition detection module includes:

[0086] The information providing sub-module is configured to provide the survival counter information corresponding to the at least one slave core to the master core.

[0087] The slave core detection sub-module is configured to detect the target slave core in which the abnormal condition occurs of the scheduling table according to the survival counter information corresponding to the at least one slave core.

[0088] In an optional embodiment of the present application, the information providing sub-module includes:

[0089] The information sending unit is configured to send the survival counter information corresponding to the at least one slave core to the master core through a loop task in the at least one slave core.

[0090] The information receiving unit is configured to receive the survival counter information through a task in the master core with the same period time as the loop task.

[0091] In an optional embodiment of the present application, the slave core detection sub-module includes:

[0092] The information determination unit is configured to determine the counting increment information between the survival counter information sent this time and the survival counter information sent last time in the loop task.

[0093] The slave core determination unit is used to determine the corresponding slave core as the target slave core in response to the count increment information satisfying a preset condition.

[0094] In an optional embodiment of the present invention, the restart processing module includes:

[0095] The stop processing submodule is used to stop the master core from processing the scheduling table of the target slave core;

[0096] The startup processing submodule is used to initiate the processing of the scheduling table of the target slave core by the master core;

[0097] The restart control submodule is used to control the target to restart from the core via the power management integrated circuit.

[0098] According to embodiments of the present invention, by initiating the processing of the scheduling table of at least one slave core by the master core, and by detecting abnormalities in the scheduling table of the at least one slave core by the master core, the processing of the scheduling table of the target slave core by the master core is restarted for the target slave core whose scheduling table is abnormal. This enables the allocation of a separate scheduling table for each slave core and achieves monitoring of the scheduling table of a single slave core, so that the master core can detect the fault of a single slave core and realize the individual processing of the scheduling table of a single slave core, thereby improving the functional security and flexibility of the multi-core system.

[0099] This invention also provides a vehicle, such as... Figure 6 As shown, it includes a processor 901, a communication interface 902, a memory 903, and an integrated circuit bus 904. The processor 901, communication interface 902, and memory 903 communicate with each other via the integrated circuit bus 904.

[0100] Memory 903 is used to store computer programs;

[0101] When the processor 901 executes the program stored in the memory 903, it implements the steps described in any of the foregoing method embodiments.

[0102] The integrated circuit bus mentioned in the above terminal can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This integrated circuit bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, only one thick line is used to represent it in the diagram, but this does not indicate that there is only one bus or one type of bus.

[0103] The communication interface is used for communication between the aforementioned terminal and other devices.

[0104] The memory can include a random access memory (RAM) and can also include a non-volatile memory, such as at least one disk memory. Optionally, the memory can also be at least one storage device located remotely from the aforementioned processor.

[0105] The aforementioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc., and can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component.

[0106] In yet another embodiment provided by the present application, a computer readable storage medium is also provided, which stores instructions, when running on a computer, causes the computer to perform the dispatch table restart method in any of the above embodiments.

[0107] In yet another embodiment provided by the present application, a computer program product containing instructions is also provided, when running on a computer, causes the computer to perform the dispatch table restart method in any of the above embodiments.

[0108] In the embodiments described above, all or some of the steps can be implemented by software, hardware, firmware or any combination thereof. When implemented in software, all or some of the steps can be implemented in the form of one or more computer programs which are stored in a computer readable storage medium. The computer readable storage medium can be located in a computing device which is in operation. These computer programs (which may

[0109] It should be noted that, in the present document, the terms such as first and second are used only to differentiate one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Also, the terms "comprising", "containing" or any other similar term are intended to encompass non-exclusive inclusion such that a process, method, article or apparatus that comprises a list of elements does not necessarily include only those elements in the list, but can include other elements not expressly listed or inherent to such process, method, article or apparatus.

[0110] Each of the embodiments in the present document is described in a related manner, and the same or similar parts among the embodiments can be referred to each other. Each of the embodiments focuses on the difference from other embodiments. In particular, for the system embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the description of the method embodiments.

[0111] The above merely provides the preferred embodiments of the application, and not intended to limit the protection scope of the application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the application shall fall within the protection scope of the application.

Claims

1. A dispatch table restart method, characterized by, The method comprises the following steps: starting the main core to process the schedule table of the at least one slave core; the schedule table is used for managing the main core and the slave core, activating tasks and setting events; the processing of the schedule table of the slave core by the main core is independent; detecting an abnormal situation of the schedule table of the at least one slave core by the main core, comprising: providing the main core with survival counter information corresponding to the at least one slave core; the survival counter information is the value of a survival counter driving the schedule table; detecting a target slave core in which the schedule table appears an abnormal situation according to the survival counter information corresponding to the at least one slave core; the schedule table abnormal situation is an abnormal situation in which the schedule table runs; restarting the processing of the schedule table of the target slave core by the main core for the target slave core in which the schedule table appears an abnormal situation; detecting the cause of the abnormal situation through the restarted corresponding schedule table; the step of providing the main core with the survival counter information corresponding to the at least one slave core comprises: sending the corresponding survival counter information to the main core by a loop task in the at least one slave core; receiving the survival counter information by a task in the main core with the same periodic time as the loop task; the step of detecting the target slave core in which the schedule table appears an abnormal situation according to the survival counter information corresponding to the at least one slave core comprises: determining the count increment information between the survival counter information sent this time and the survival counter information sent last time in the loop task; determining the corresponding slave core as the target slave core in response to the count increment information meeting a preset condition.

2. The method of claim 1, wherein, the step of restarting the processing of the schedule table of the target slave core by the main core for the target slave core in which the schedule table appears an abnormal situation comprises: stopping the processing of the schedule table of the target slave core by the main core; starting the processing of the schedule table of the target slave core by the main core; controlling the target slave core to restart through a power management integrated circuit.

3. A schedule restart apparatus characterized by comprising: The method comprises the following steps: a processing starting module is configured to start the main core to process the schedule table of the at least one slave core; the schedule table is used for managing the main core and the slave core, activating tasks and setting events; the processing of the schedule table of the slave core by the main core is independent; The case detection module is configured to detect an abnormal case of the schedule table of the at least one slave core by the master core, and includes: an information providing submodule configured to provide the master core with survival counter information corresponding to the at least one slave core; the survival counter information is a value of a survival counter driven by the schedule table; a slave core detection submodule configured to detect a target slave core in which the schedule table appears an abnormal case according to the survival counter information corresponding to the at least one slave core; the schedule table abnormal case is a case in which the schedule table runs abnormally; the information providing submodule includes: an information sending unit configured to send the corresponding survival counter information to the master core by a loop task in the at least one slave core; and an information receiving unit configured to receive the survival counter information by a task in the master core with a same period as the loop task; the slave core detection submodule includes: an information determination unit configured to determine count increment information between survival counter information sent this time and survival counter information sent last time in the loop task; and a slave core determination unit configured to determine that a corresponding slave core is the target slave core in response to the count increment information satisfying a preset condition. The processing restart module is configured to restart processing of the schedule table of the target slave core in which the schedule table appears an abnormal case by the master core; and detect a reason for the abnormal case through the corresponding schedule table after the restart.

4. The apparatus of claim 3, wherein, The processing restart module includes: A processing stop submodule configured to stop the processing of the schedule table of the target slave core by the master core; A processing start submodule configured to start the processing of the schedule table of the target slave core by the master core; and A restart control submodule configured to control the target slave core to restart by a power management integrated circuit.

5. A vehicle characterized by comprising: The system includes a processor, a communication interface, a memory, and an integrated circuit bus, wherein the processor, the communication interface, and the memory complete communication with each other through the integrated circuit bus. The memory is configured to store a computer program. The processor is configured to execute the program stored on the memory to implement the method steps in any one of claims 1-2.

6. A computer-readable storage medium having stored thereon a computer program, characterized in that, The program is executed by the processor to implement the method in any one of claims 1-2.

Images