Circuit structure, driving method, and display device
By cascading the shift units and control circuits, the functional partitions of the display device can be individually controlled, solving the problem of incomplete circuit function in the last row of the functional partitions, improving the fingerprint recognition accuracy and display effect, and optimizing the pixel density.
Patent Information
- Application Number
- CN202210288280.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-22
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2042-03-22
AI Technical Summary
The shift circuit in the existing display device is difficult to support the realization of more diverse functions of the display device, resulting in the last row of functional circuits in the functional partition being unable to realize its complete functions, affecting the display effect or fingerprint recognition effect.
By adopting multiple shift units and control circuits in a cascaded setting, the transmission path of the shift signal is ensured by turning on and off the control unit, and the functional partitions are individually controlled, so that the functional circuits in the last row can operate normally and avoid setting up dummy circuits.
During partition control, ensure that the last row of functional circuits in the functional partition can realize its complete functions, improve fingerprint recognition accuracy or display effect, optimize picture continuity, and at the same time increase pixel density to avoid space occupation and poor effect caused by dummy circuits.
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Figure CN114639333B_ABST
Abstract
Description
Technical field
[0001] The present invention relates to the field of display technology, and in particular to a circuit structure and a driving method, and a display device. [Background Technology]
[0002] With the continuous development of display technology, the functions of display devices are becoming more and more abundant and diversified. However, the shift circuits in existing display devices are difficult to support the realization of more diverse functions of display devices, which has brought adverse limitations to the further optimization of display device performance. [Summary of the invention]
[0003] In view of this, embodiments of the present invention provide a circuit structure, a driving method, and a display device, which enable the last row of functional circuits in a functional partition to achieve complete functions while realizing partition control.
[0004] In one aspect, an embodiment of the present invention provides a circuit structure, including:
[0005] a plurality of shifting units arranged in cascade, wherein the plurality of shifting units include a first shifting unit, a second shifting unit, and a third shifting unit;
[0006] A control circuit comprising a first control unit and a second control unit;
[0007] Wherein, the first control unit is electrically connected between the first shift unit and the second shift unit, and is used to control the shift control signal output by the first shift unit to be transmitted to the second shift unit when it is turned on; the second control unit is electrically connected between the second shift unit and the third shift unit, and is used to control the shift control signal output by the second shift unit to be transmitted to the third shift unit when it is turned on;
[0008] At a first moment, one of the first control unit and the second control unit is turned on, and the other is turned off.
[0009] On the other hand, an embodiment of the present invention provides a driving method of a circuit structure, which is applied to the above circuit structure, including:
[0010] controlling the shift unit to output a scan signal, so that at the first moment, one of the first control unit and the second control unit is turned on and the other is not turned on;
[0011] When the first control unit is turned on and the second control unit is not turned on, the first control unit controls the shift control signal output by the first shift unit to be transmitted to the second shift unit, so that the second shift unit outputs a driving signal in sequence, and the second control unit controls the shift control signal output by the second shift unit to be unable to be transmitted to the third shift unit.
[0012] On the other hand, an embodiment of the present invention provides a display device including the above circuit structure.
[0013] One of the above technical solutions has the following beneficial effects:
[0014] Taking the example of the first shift unit being the nth shift unit, the second shift unit being the n+1th shift unit, and the third shift unit being the n+2th shift unit, in an embodiment of the present invention, when it is necessary to individually control the functional partitions where the m1th row of functional circuits to the nth row of functional circuits are located, the first control unit is turned on and the second control unit is not turned on. Specifically, the m1th shift unit to the nth shift unit (the first shift unit) sequentially output drive signals. Since the first control unit is turned on, the shift control signal output by the nth shift unit (the first shift unit) can be transmitted to the n+1th shift unit (the second shift unit), triggering the n+1th shift unit (the second shift unit) to continue outputting the drive signal. This drive signal can then serve as the second drive signal for the nth row of functional circuits, causing the nth row of functional circuits to perform the second operation. At the same time, since the second control unit is not turned on, the shift control signal output by the n+1th shift unit (second shift unit) is no longer transmitted to the n+2th shift unit (third shift unit), and the shift unit no longer shifts downward.
[0015] It can be seen that the embodiment of the present invention can ensure that the last row of functional circuits in a functional partition can achieve its full functionality while achieving partition control. When the functional circuit is a photosensitive circuit, it can ensure that the photosensitive circuit in the last row of the functional partition can be reset normally, avoiding affecting the fingerprint recognition of the next frame and improving the fingerprint recognition accuracy; when the functional circuit is a pixel circuit, it can ensure that the last row of pixel circuits in the functional partition can write data signals normally, thereby enabling the light-emitting elements electrically connected to it to emit light normally, improving the picture continuity between two adjacent functional partitions and optimizing the display effect.
[0016] In addition, the embodiment of the present invention does not need to set up a dummy circuit between two adjacent functional partitions, which not only avoids the dummy circuit occupying the space of the original functional circuit, which is conducive to improving pixel density, but also avoids the problem of picture discontinuity or poor fingerprint recognition accuracy caused by the dummy circuit.
Brief Description of the Drawings
[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0018] Figure 1 A top view of a display device provided by the inventor during the research process;
[0019] Figure 2 A top view of a display device provided by an embodiment of the present invention;
[0020] Figure 3 A schematic diagram of a circuit structure provided by an embodiment of the present invention;
[0021] Figure 4 A schematic diagram of a connection between a shift unit and a functional circuit provided in an embodiment of the present invention;
[0022] Figure 5 A schematic diagram of the functional partitioning provided by an embodiment of the present invention;
[0023] Figure 6 Another structural diagram of the circuit structure provided by an embodiment of the present invention;
[0024] Figure 7 A schematic diagram of another structure of the circuit structure provided by an embodiment of the present invention;
[0025] Figure 8 A schematic diagram of another structure of the circuit structure provided by an embodiment of the present invention;
[0026] Figure 9 A schematic diagram of another structure of the circuit structure provided by an embodiment of the present invention;
[0027] Figure 10 A schematic diagram of another structure of the circuit structure provided by an embodiment of the present invention;
[0028] Figure 11 A schematic diagram of another structure of the circuit structure provided by an embodiment of the present invention;
[0029] Figure 12 A schematic diagram of another structure of the circuit structure provided by an embodiment of the present invention;
[0030] Figure 13 A schematic diagram of another structure of the circuit structure provided by an embodiment of the present invention;
[0031] Figure 14 A schematic structural diagram of a dummy unit provided in an embodiment of the present invention;
[0032] Figure 15 A schematic diagram of the structure of a functional circuit proposed in an embodiment of the present invention;
[0033] Figure 16Another structural diagram of the functional circuit used in the embodiment of the present invention;
[0034] Figure 17 A schematic diagram of a connection structure between a circuit group and a driving signal line provided by an embodiment of the present invention;
[0035] Figure 18 A schematic diagram of a connection layout between a circuit group and a driving signal line provided by an embodiment of the present invention;
[0036] Figure 19 A schematic structural diagram of a display device provided by an embodiment of the present invention. [Specific implementation method]
[0037] In order to better understand the technical solution of the present invention, the embodiments of the present invention are described in detail below with reference to the accompanying drawings.
[0038] It should be understood that the embodiments described are only a portion of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative work are within the scope of protection of the present invention.
[0039] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The singular forms "a", "an", "the" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.
[0040] It should be understood that the term "and / or" as used herein is merely a description of the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, or B exists alone. Furthermore, the character " / " in this document generally indicates that the associated objects are in an "or" relationship.
[0041] The display device includes a functional area for image display or fingerprint recognition, and a plurality of functional circuits are arranged in the functional area.
[0042] During their research, the inventors discovered that, in current panel structures, drive signal lines electrically connected to different rows of functional circuits are typically connected to the same shift unit. However, due to this connection method, when the display panel is partitioned, the last row of functional circuits in each functional partition cannot fully function, thus affecting the display quality or fingerprint recognition performance.
[0043] Specifically, if Figure 1 As shown, Figure 1This is a top view of a display device provided by the inventors during their research. The display device includes a functional area 101, which includes multiple functional circuits 102 arranged in a matrix. The functional area 101 may include an identification functional area for implementing a fingerprint recognition function, where the functional circuit in the identification functional area is a light sensing circuit. The functional area 101 may also include a display functional area for implementing a screen display function, where the functional circuit in the display functional area is a pixel circuit.
[0044] The functional circuit 102 is electrically connected to the first drive signal line S1 and the second drive signal line S2, respectively. The functional circuit 102 is configured to perform a first operation under the action of the first drive signal and to perform a second operation under the action of the second drive signal. Figure 1 The first driving signal line S1 electrically connected to the i-th row functional circuit 102 is denoted by reference symbol S1_i, and the second driving signal line S2 electrically connected to the i-th row functional circuit 102 is denoted by reference symbol S2_i.
[0045] For example, when the functional circuit 102 is a light sensing circuit, the first drive signal line S1 is a read control signal line, and the second drive signal line S2 is a reset control signal line. The light sensing circuit is configured to perform a read operation under the action of the read control signal and a reset operation under the action of the reset control signal. When the functional circuit 102 is a pixel circuit, the first drive signal line S1 is a first scan signal line, and the second drive signal line S2 is a second scan signal line. The pixel circuit is configured to perform a reset operation under the action of the first scan signal and a data write operation under the action of the second scan signal.
[0046] Furthermore, it is understood that the display device further includes multiple cascaded shift units 105 for providing drive signals to the functional circuits 102. In current panel designs, the drive signals required by two adjacent rows of functional circuits 102 are provided by the same stage of shift units 105. Specifically, the i-th stage shift unit 105 is electrically connected to the i-th row of functional circuits 102 via a first drive signal line S1_i. The i-th stage shift unit 105 is also electrically connected to the i-1-th row of functional circuits 102 via a second drive signal line S2_i-1. In other words, the drive signal output by the i-th stage shift unit 105 serves as both a first drive signal for the i-th row of functional circuits 102, controlling the i-th row of functional circuits 102 to perform a first operation, and a second drive signal for the i-1-th row of functional circuits 102, controlling the i-1-th row of functional circuits 102 to perform a second operation.
[0047] It should be emphasized that when the drive signals required by two adjacent rows of functional circuits 102 are provided by the same shift unit 105, the drive signals provided by the shift unit 105 do not necessarily play the same role in the two rows of functional circuits 102. For example, in conjunction with the above description, when the functional circuits 102 are photosensitive circuits, the drive signal provided by the shift unit 105 serves as a read control signal (first drive signal) for the previous row of functional circuits 102 to drive the functional circuits 102 in that row to perform a read operation, while for the next row of functional circuits 102, the drive signal serves as a reset control signal (second drive signal) to drive the functional circuits 102 in that row to perform a reset operation. When the functional circuits 102 are pixel circuits, the drive signal provided by the shift unit 105 serves as a first scanning signal (first drive signal) for the previous row of functional circuits 102 to drive the functional circuits 102 in that row to perform a reset operation, while for the next row of functional circuits 102, the drive signal serves as a second scanning signal (second drive signal) to drive the functional circuits 102 in that row to perform a data write operation.
[0048] At present, in order to realize the flexible control of different areas of functional area 101, see again Figure 1 The functional area 101 is divided into multiple functional subareas 103, each of which includes multiple rows of functional circuits 102. Accordingly, the display device is provided with multiple shift circuits 104 corresponding one-to-one to the multiple functional subareas 103. Each shift circuit 104 includes multiple cascaded shift units 105. When controlling a functional subarea 103 to operate independently, it is only necessary to control the shift circuit 104 corresponding to the functional subarea 103 so that the shift units 105 in the shift circuit 104 output drive signals in sequence.
[0049] However, combined with the above description of the connection between the functional circuits 102 and the shift unit 105, it can be seen that when a functional partition 103 is controlled to operate independently, the second driving signal required by the last row of functional circuits 102 in the functional partition 103 needs to be provided by the shift unit 105 corresponding to the first row of functional circuits 102 in the next functional partition 103. However, because the shift circuit 104 corresponding to the next functional partition 103 is not operating, the functional circuits 102 in the last row of the functional partition 103 cannot receive the second driving signal, that is, cannot perform the second operation, resulting in incomplete functions performed by these functional circuits 102.
[0050] In this regard, the embodiment of the present invention further proposes a solution, such as Figure 2 As shown, Figure 2This is a top view of a display device provided by an embodiment of the present invention. In this embodiment, a row of dummy circuits 106 is provided after the last row of functional circuits 102 in a functional partition 103, and a level of dummy units 107 is provided after the last shift unit 105 in the shift circuit 104. The structure and connection method of the dummy circuits 106 and dummy units 107 are identical to those of the original functional circuits 102 and shift units 105, except that these dummy circuits 106 do not perform specific functions. For example, the dummy circuits 106 are not connected to the light-emitting element and therefore do not perform the image display function, or the dummy circuits 106 are not connected to the photosensitive element and therefore do not perform the fingerprint recognition function.
[0051] With this arrangement, when a certain functional partition 103 is controlled to work alone, the last shift unit 105 in the shift circuit 104 will continue to trigger downward, causing the dummy unit 107 to output a drive signal. At this time, the drive signal can be transmitted to the last row of functional circuits 102 in the functional partition 103 as the second drive signal of the row of functional circuits 102, so that this part of the functional circuits 102 can perform the second operation normally.
[0052] However, further research by the inventors revealed that, using this configuration, a row of dummy circuits 106 is required between each adjacent functional partition 103. Because these dummy circuits 106 do not perform specific screen display or fingerprint recognition functions, the screen at the location of the dummy circuits 106 is discontinuous or fingerprints cannot be recognized, resulting in poor screen display or fingerprint recognition. Furthermore, these dummy circuits 106 occupy the space reserved for the original functional circuits 102. Given a given functional area 101, the number of rows of functional circuits 102 that can be placed in each functional partition 103 is reduced, hindering the achievement of high pixel density.
[0053] To this end, an embodiment of the present invention further proposes a circuit structure, which can enable the functional circuit in the last row of a functional partition to achieve its full function during partition control without setting a dummy circuit between two adjacent functional partitions.
[0054] like Figure 3 As shown, Figure 3 This is a structural diagram of a circuit structure provided by an embodiment of the present invention. The circuit structure includes a plurality of shift units 1 arranged in cascade, and the plurality of shift units 1 include a first shift unit 11 , a second shift unit 12 and a third shift unit 13 .
[0055] Combined with the above content, such as Figure 4 As shown, Figure 4This is a schematic diagram illustrating a connection between shift units and functional circuits provided by an embodiment of the present invention. In a plurality of cascaded shift units 1, the i-th shift unit 1_i is electrically connected to the i-th row of functional circuits 3 via a first drive signal line S1_i. The i-th shift unit 1_i is also electrically connected to the i-1-th row of functional circuits 3 via a second drive signal line S2_i-1. The drive signal output by the i-th shift unit 1_i is used to simultaneously control the i-1-th row of functional circuits 3 to perform a second operation and the i-th row of functional circuits 3 to perform a first operation.
[0056] For ease of understanding, Figure 4 The i-th shift unit 1 is represented by the reference numeral 1_i. Figure 4 In the figure, the first drive signal line S1 electrically connected to the i-th row functional circuit 3 is denoted by reference numeral S1_i, and the second drive signal line S2 electrically connected to the i-th row functional circuit 3 is denoted by reference numeral S2_i. In addition, for convenience of description, in the embodiment of the present invention, the i-th shift unit and the i-th row functional circuit are defined as the corresponding shift unit 1 and functional circuit 3.
[0057] In addition, the circuit structure also includes a control circuit 2, which includes a first control unit 21 and a second control unit 22. The first control unit 21 is electrically connected between the first shift unit 11 and the second shift unit 12, and is used to control the shift control signal output by the first shift unit 11 to be transmitted to the second shift unit 12 when the first shift unit 11 is turned on; the second control unit 22 is electrically connected between the second shift unit 12 and the third shift unit 13, and is used to control the shift control signal output by the second shift unit 12 to be transmitted to the third shift unit 13 when the first shift unit 11 is turned on.
[0058] At a first moment, one of the first control unit 21 and the second control unit 22 is turned on, and the other is not turned on.
[0059] It is understandable that, in the process of the shift units 1 sequentially outputting drive signals, the preceding shift unit 1 will synchronously output a shift control signal when outputting the drive signal, and the shift control signal will be transmitted to the succeeding shift unit 1, thereby triggering the succeeding shift unit 1 to continue outputting the drive signal, thereby achieving sequential shifting of the multiple shift units 1. In a feasible embodiment, the drive signal output by the shift unit 1 can be multiplexed as the shift control signal.
[0060] Combine Figure 4Taking the first shift unit 11 as the nth shift unit 1_n, the second shift unit 12 as the n+1th shift unit 1_n+1, and the third shift unit 13 as the n+2th shift unit 1_n+2 as an example, in an embodiment of the present invention, when it is necessary to separately control the functional partitions where the m1th row functional circuit 3 to the nth row functional circuit 3 are located, the first control unit 21 is turned on and the second control unit 22 is not turned on. Specifically, the m1th shift unit 1_m1 to the nth shift unit 1_n (first shift unit 11) sequentially output drive signals. Since the first control unit 21 is turned on, the shift control signal output by the nth shift unit 1_n (first shift unit 11) can be transmitted to the n+1th shift unit 1_n+1 (second shift unit 12), triggering the n+1th shift unit 1_n+1 (second shift unit 12) to continue outputting the drive signal. This drive signal can then serve as the second drive signal for the nth row functional circuit 3, causing the nth row functional circuit 3 to perform the second operation. At the same time, since the second control unit 22 is not turned on, the shift control signal output by the n+1th shift unit 1_n+1 (second shift unit 12) is no longer transmitted to the n+2th shift unit 1_n+2 (third shift unit 13), and the shift unit 1 no longer continues to shift downward.
[0061] It can be seen that the embodiment of the present invention can ensure that the functional circuit 3 in the last row of the functional partition can achieve its full function while achieving partition control. When the functional circuit 3 is a photosensitive circuit, it can ensure that the photosensitive circuit in the last row of the functional partition can be reset normally, avoiding affecting the fingerprint recognition of the next frame and improving the fingerprint recognition accuracy. When the functional circuit 3 is a pixel circuit, it can ensure that the pixel circuit in the last row of the functional partition can write data signals normally, thereby enabling the light-emitting elements electrically connected to it to emit light normally, improving the image continuity between two adjacent functional partitions and optimizing the display effect.
[0062] In addition, the embodiment of the present invention does not need to set up a dummy circuit between two adjacent functional partitions, which not only avoids the dummy circuit occupying the space of the original functional circuit 3, which is conducive to improving pixel density, but also avoids the problem of discontinuous picture or poor fingerprint recognition accuracy caused by the dummy circuit.
[0063] In the embodiment of the present invention, Figure 5 As shown, Figure 5The schematic diagram of functional partitioning provided in an embodiment of the present invention divides the entire functional area into at least two functional partitions 4 arranged along a first direction x. Each functional partition 4 corresponds to a shift circuit 5, and the shift circuit 5 includes multiple cascaded shift units 1. It is understood that, for two adjacent shift circuits 5, the last shift unit in the preceding shift circuit 5 is the first shift unit 11, the first shift unit in the succeeding shift unit 1 is the second shift unit 12, and the second shift unit in the succeeding shift unit 1 is the third shift unit 13. When controlling a functional partition 4 individually, it is only necessary to control the normal operation of the shift circuit 5 and control circuit 2 corresponding to that functional partition 4.
[0064] For example, combined Figure 4 and Figure 5 The functional area includes a first functional partition 41 and a second functional partition 42. The first functional partition 41 includes the functional circuits 3 in the m1th to nth rows, where m≥1. The first functional partition 41 includes the functional circuits 3 in the n+1th to m2th rows.
[0065] The circuit structure includes a first shift circuit 51 and a second shift circuit 52. The first shift circuit 51 is used to drive the first functional partition 41 and includes the m1th shift unit 1_m1 to the nth shift unit 1_n arranged in cascade. The second shift circuit 52 is used to drive the second functional partition 42 and includes the n+1th shift unit 1_n+1 to the m2th shift unit 1_m2 arranged in cascade.
[0066] The nth shift unit 1_n is the first shift unit 11 , the n+1th shift unit 1_n+1 is the second shift unit 12 , and the n+2th shift unit 1_n+2 is the third shift unit 13 .
[0067] When the first functional partition 41 is individually controlled, the first shift circuit 51 operates, the first control unit 21 connected between the nth shift unit 1_n and the n+1th shift unit 1_n+1 is turned on, and the second control unit 22 connected between the n+1th shift unit 1_n+1 and the n+2th shift unit 1_n+2 is turned off. During this process, the m1th shift unit 1_m1 to the nth shift unit 1_n sequentially output drive signals. Since the first control unit 21 is turned on, the shift control signal output by the nth shift unit 1_n can trigger the n+1th shift unit 1_n+1 to continue outputting the drive signal. However, since the second control unit 22 is turned off, the shift control signal output by the n+1th shift unit 1_n+1 cannot trigger the n+2th shift unit 1_n+2, and thus the shift unit 1 no longer continues to shift downward.
[0068] When the second functional area 42 is controlled separately, the second shift circuit 52 operates, the first control unit 21 connected between the nth shift unit 1_n and the n+1th shift unit 1_n+1 is not turned on, and the second control unit 22 connected between the n+1th shift unit 1_n+1 and the n+2th shift unit 1_n+2 is turned on. During this process, the n+1th shift unit 1_n+1 outputs a drive signal. Since the second control unit 22 is turned on, the shift control signal output by the n+1th shift unit 1_n+1 can trigger the n+2th shift unit 1_n+2 to continue outputting a drive signal, thereby achieving continued downward shifting.
[0069] In one possible implementation, see again Figure 3 and Figure 4 The first control unit 21 includes a first transistor M1, which is electrically connected between the first shift unit 11 and the second shift unit 12. The second control unit 22 includes a second transistor M2, which is electrically connected between the second shift unit 12 and the third shift unit 13. At a first moment, one of the first transistor M1 and the second transistor M2 is turned on, and the other is turned off.
[0070] Specifically, a first electrode of the first transistor M1 is electrically connected to the shift output terminal of the first shift unit 11, and a second electrode of the first transistor M1 is electrically connected to the shift control terminal of the second shift unit 12. By controlling the conduction state of the first transistor M1, the signal transmission path between the first shift unit 11 and the second shift unit 12 is controlled. A first electrode of the second transistor M2 is electrically connected to the shift output terminal of the second shift unit 12, and a second electrode of the second transistor M2 is electrically connected to the shift control terminal of the third shift unit 13. By controlling the conduction state of the second transistor M2, the signal transmission path between the second shift unit 12 and the third shift unit 13 is controlled.
[0071] When the first control unit 21 and the second control unit 22 adopt a transistor structure, in a feasible embodiment, the first transistor M1 and the second transistor M2 are of the same transistor type. For example, the first transistor M1 and the second transistor M2 are both as follows: Figure 3 The first transistor M1 and the second transistor M2 are N-type transistors shown, or both the first transistor M1 and the second transistor M2 may be P-type transistors. At a first moment, one of the first transistor M1 and the second transistor M2 receives an on-level voltage, and the other receives an off-level voltage, so that only one of the first transistor M1 and the second transistor M2 is turned on at the first moment.
[0072] The first control unit 21 and the second control unit 22 use the same type of transistor structure. In the process of the circuit structure, the manufacturing process of the two transistors, such as the doping process, is the same, so the process is simpler.
[0073] Furthermore, if Figure 6 As shown, Figure 6 This is another schematic diagram of a circuit structure provided by an embodiment of the present invention. The gate of the first transistor M1 is electrically connected to the first control signal line CL1, and the gate of the second transistor M2 is electrically connected to the second control signal line CL2. With this arrangement, at a first moment, only the first control signal line CL1 and the second control signal line CL2 need to provide signals of opposite levels to turn on one of the first transistor M1 and the second transistor M2 and turn off the other.
[0074] In addition, the first transistor M1 and the second transistor M2 are independently controlled by two control signal lines, and the control method of the two transistors is more flexible. For example, at other times other than the first moment, the first control signal line CL1 and the second control signal line CL2 can also provide signals with the same level state to control the first transistor M1 and the second transistor M2 to be turned on or turned off at the same time. Figure 3 Based on the above setting, the embodiment of the present invention can also control the first functional area 41 and the second functional area 42 to work: the first control signal line CL1 and the second control signal line CL2 simultaneously provide the conduction level to control the first transistor M1 and the second transistor M2 to be turned on at the same time. At this time, the first shift unit 11 in the first shift circuit 51 triggers the second shift unit 12 in the second shift circuit 52 to continue to output the driving signal, and the second shift unit 12 can further trigger the second shift unit 13, so that the shift unit 1 below the second shift unit 12 sequentially outputs the driving signal.
[0075] Furthermore, if Figure 7 As shown, Figure 7 This is another structural diagram of the circuit structure provided by the embodiment of the present invention. The circuit structure includes at least two shift groups 6. Each shift group 6 includes a first shift unit 11, a second shift unit 12 and a third shift unit 13.
[0076] At least two shift groups 6 include a first shift group 61 and a second shift group 62, wherein the first transistor M1 connected between the first shift unit 11 and the second shift unit 12 in the first shift group 61 is a first A transistor M11, and the second transistor M2 connected between the second shift unit 12 and the third shift unit 13 in the first shift group 61 is a second A transistor M21; the first transistor M1 connected between the first shift unit 11 and the second shift unit 12 in the second shift group 62 is a first B transistor M12, and the second transistor M2 connected between the second shift unit 12 and the third shift unit 13 in the second shift group 62 is a second B transistor M22.
[0077] Among them, the first control signal line CL1_1 electrically connected to the first A transistor M11 and the second control signal line CL2_2 electrically connected to the second B transistor M22 are multiplexed, and the second control signal line CL2_1 electrically connected to the second A transistor M21 and the first control signal line CL1_2 electrically connected to the first B transistor M12 are multiplexed.
[0078] Combine Figure 5 Taking the example of the first shift unit 11 in the first shift group 61 being located in the first shift circuit 51 and the first shift unit 11 in the second shift group 62 being located in the second shift circuit 51, assuming that the first functional partition 41 is independently controlled, at a first moment, the first control signal line CL1 electrically connected to the first A transistor M11 provides an on-level voltage, and the second control signal line CL2 electrically connected to the second A transistor M21 provides an off-level voltage, controlling the first A transistor M11 to be on and the second A transistor M21 to be off. At this point, although the second B transistor M22 receives an on-level voltage and the first B transistor M12 receives an off-level voltage, since the second shift circuit 52 corresponding to the second functional partition 42 is not operating, no shift control signal is transmitted, and thus, the second functional partition 42 is not affected. When both the first functional partition 41 and the second functional partition 42 are not operating, both control signal lines provide an off-level voltage. This configuration simplifies wiring and reduces the space occupied by the control signal lines.
[0079] In addition, when the circuit structure includes 2x shift groups 6, the odd-numbered shift groups 6 can be made the first shift group 61, and the even-numbered shift groups 6 can be made the second shift group 62, and then the first control signal line CL1 and the second control signal line CL2 corresponding to the two adjacent first shift groups 61 and the second shift groups 62 are multiplexed as described above. At this time, the entire circuit structure only needs to set 2x control signal lines, the number of control signal lines is small, and the wiring is simplified.
[0080] When the first transistor M1 and the second transistor M2 are of the same transistor type, the first transistor M1 and the second transistor M2 may also be electrically connected to the same control signal line. Figure 8 As shown, Figure 8 This is another structural diagram of the circuit structure provided by an embodiment of the present invention. The gate of the first transistor M1 is electrically connected to the third control signal line CL3, and the gate of the second transistor M2 is electrically connected to the third control signal line CL3 through the inverter 7.
[0081] At a first moment, when it is necessary to control the first control unit 21 to be turned on and the second control unit 22 to be turned off, the third control signal line CL3 provides an on-level voltage to control the first transistor M1 to be turned on. At the same time, the on-level voltage provided by the third control signal line CL3 is converted to an off-level voltage via the inverter 7 and transmitted to the second transistor M2 to control the second transistor M2 to be turned off. In the above configuration, only one third control signal line CL3 is required to drive the first transistor M1 and the second transistor M2. Based on the configuration of the inverter 7, the first transistor M1 and the second transistor M2 can receive signals with opposite voltage levels at the same time, thereby ensuring that the operating states of the first transistor M1 and the second transistor M2 are opposite at the first moment.
[0082] Or, in another possible embodiment, as Figure 9 As shown, Figure 9 This is another structural diagram of a circuit structure provided by an embodiment of the present invention. The transistor types of the first transistor M1 and the second transistor M2 can also be set to different. For example, the first transistor M1 is an N-type transistor and the second transistor M2 is a P-type transistor, or the second transistor M2 is a P-type transistor and the second transistor M2 is an N-type transistor. The gate of the first transistor M1 and the gate of the second transistor M2 are respectively electrically connected to the fourth control signal line CL4.
[0083] When the first control unit 21 needs to be turned on and the second control unit 22 needs to be turned off, the fourth control signal line CL4 provides a first voltage level, causing the first transistor M1 to be turned on and the second transistor M2 to be turned off. When the first control unit 21 needs to be turned off and the second control unit 22 needs to be turned on, the fourth control signal line CL4 provides a second voltage level, causing the first transistor M1 to be turned off and the second transistor M2 to be turned on. This configuration utilizes only one fourth control signal line CL4 to control only one of the first transistor M1 and the second transistor M2 to be turned on at a given moment, while the other is turned off. This reduces the number of drive signal lines connected to the control circuit 2, and accordingly, the number of signal sources used to provide signals to the drive signal lines is also reduced.
[0084] Furthermore, if two control signals are used to control the first control unit 21 and the second control unit 22 separately, the timing of the two control signals must be coordinated to ensure that one of the first control unit 21 and the second control unit 22 is turned on and the other is turned off at the same time. However, in the embodiment of the present invention, only a fourth control signal is used to control the first control unit 21 and the second control unit 22 simultaneously. This allows the first control unit 21 and the second control unit 22 to be turned on at different times without having to consider the timing coordination.
[0085] In the embodiment of the present invention, Figure 10 As shown, Figure 10 This is another schematic diagram of a circuit structure provided by an embodiment of the present invention. When a functional area is divided into multiple functional subareas 4, the shift circuit 5 corresponding to each functional subarea 4 can be electrically connected to a frame start signal line STV. When the xth functional subarea 4 is individually controlled, the frame start signal line STV electrically connected to the xth shift circuit 5 provides a frame start signal to the xth shift circuit 5 to control its operation.
[0086] Or, as Figure 11 As shown, Figure 11 This is another schematic diagram of a circuit structure provided by an embodiment of the present invention. Multiple shift circuits 5 can be electrically connected to a frame start signal line STV via a third control unit 23. When the xth functional partition 4 is individually controlled, the third control unit 23 electrically connected to the xth shift circuit 5 is turned on and transmits the frame start signal provided by the frame start signal line STV to the shift circuit 5, thereby controlling the operation of the shift circuit 5.
[0087] Specifically, if Figure 12 As shown, Figure 12 This is another structural schematic diagram of the circuit structure provided in an embodiment of the present invention, where the control circuit 2 also includes a third control unit 23, at least part of the third control unit 23 is electrically connected to the second shift unit 12, and the third control unit 23 is used to turn on when the second control unit 22 is turned on, and transmit the frame start signal to the second shift unit 12.
[0088] As can be seen from the above, the second shift unit 12 is the first shift unit in each shift circuit 5. By providing a third control unit 23 electrically connected to the second shift unit 12, when it is necessary to control the activation of the functional partition 4, the third control unit 23 is activated to trigger the second shift unit 12 in the shift circuit 5, causing the second shift unit 12 to output a drive signal. Simultaneously, the second control unit 22 controls the second shift unit 12 to trigger the third shift unit 13, achieving further downward shifting. In other words, the third control unit 23 can function as a gating switch, controlling multiple third control units 23 to activate at different times to achieve time-sharing transmission of the frame start signal provided by the frame start signal line STV to different second shift units 12. Under this setting, the second shift units 12 in the shift circuits 5 corresponding to all functional partitions 4 are triggered only by the same frame start signal line STV. Compared with the method in which each second shift unit 12 is electrically connected to a frame start signal line STV separately, the number of frame start signal lines STV required to be set in the display panel is reduced, especially for display devices with a large number of functional partitions 4, the number of frame start signal lines STV can be greatly saved.
[0089] In addition, it should be noted that in order to improve the reliability of the circuit operation, the second control unit 22 and the third control unit 23 can be turned on at the same time, that is, when the third control unit 23 controls the frame start signal to trigger the second shift unit 12, the second control unit 22 controls the transmission path of the shift control signal between the second shift unit 12 and the third shift unit 13 to be turned on, so as to ensure that the shift control signal output after the second shift unit 12 is triggered can be transmitted to the third shift unit 13 more quickly, so as to realize downward shifting in time.
[0090] Further, see again Figure 12 The third control unit 23 includes a third transistor M3, which is electrically connected between the frame start signal line STV and the second shift unit 12. Specifically, a first electrode of the third transistor M3 is electrically connected to the frame start signal line STV, and a second electrode of the third transistor M3 is electrically connected to the shift control terminal of the second shift unit 12. By controlling the conduction state of the third transistor M3, the signal transmission path between the frame start signal line STV and the second shift unit 12 is controlled.
[0091] When the third control unit 23 includes a third transistor M3, as shown in FIG. Figure 13 As shown, Figure 13Another structural diagram of the circuit structure provided by an embodiment of the present invention, the second control unit 22 includes a second transistor M2, and the second transistor M2 is electrically connected between the second shift unit 12 and the third shift unit 13. The second transistor M2 and the third transistor M3 are of the same transistor type, and the gate of the second transistor M2 and the gate of the third transistor M3 are electrically connected to the fifth control signal line CL5 respectively, so as to use the fifth control signal to control the second transistor M2 and the third transistor M3 to be synchronously turned on or turned off. It can be understood that if two different control signals are used to control the second transistor M2 and the third transistor M3 separately, the timing of the two control signals needs to be coordinated with each other to achieve synchronous control of the second transistor M2 and the third transistor M3. However, in the embodiment of the present invention, only one fifth control signal is needed to control the second transistor M2 and the third transistor M3, and no timing coordination is required. Therefore, it is easier to accurately achieve the synchronous conduction or synchronous cutoff of the second transistor M2 and the third transistor M3.
[0092] In order to further reduce the number of control signal lines electrically connected to the control circuit 2, see again Figure 13 , the transistor types of the first transistor M1 and the second transistor M2 are opposite. At this time, the gate of the first transistor M1 can also be electrically connected to the fifth control signal line CL5.
[0093] In one possible implementation, Figure 14 As shown, Figure 14 This is a schematic diagram of the structure of a dummy unit provided in an embodiment of the present invention. The circuit structure also includes a dummy unit 8, which is cascaded with a fourth shift unit 14. The fourth shift unit 14 is the last shift unit 1 in the multiple cascaded shift units 1. That is, the fourth shift unit 14 corresponds to the last row of functional circuits 3 in the entire functional area. The dummy unit 8 is electrically connected to the last row of functional circuits 3 in the entire functional area via a second drive signal line S2. The dummy unit 8 is configured to output a drive signal when the fourth shift unit 14 transmits a shift control signal to the dummy unit 8, thereby enabling the last row of functional circuits 3 in the entire functional area to perform a second operation under the influence of the second drive signal, thereby achieving its full functionality.
[0094] It should be noted that, see again Figure 14A row of dummy circuits 10 may also be added after the last row of functional circuits 3 in the entire functional area. The structure and connection method of the dummy circuits 10 and dummy units 8 are the same as those of the original functional circuits 3 and shift units 1, except that the dummy circuits 10 do not perform any specific functions. For example, the dummy circuits 10 are not connected to the light-emitting elements and therefore do not perform the screen display function, or the dummy circuits 10 are not connected to the photosensitive elements and therefore do not perform the fingerprint recognition function. It should be emphasized that even if the dummy circuits 10 are provided in the embodiments of the present invention, since the dummy circuits 10 are only located on the lower side of the functional area, they will not affect the connection between the screen of the functional area or the connection of fingerprint recognition.
[0095] In one possible implementation, see again Figure 4 The circuit structure further includes a plurality of circuit groups 9, each of which includes a plurality of functional circuits 3. The functional circuits 3 are electrically connected to the first drive signal line S1 and the second drive signal line S2, respectively, and are configured to perform a first operation in response to the first drive signal and a second operation in response to the second drive signal. It will be appreciated that one circuit group 9 can be considered a row of functional circuits 3 as described above, and of course, one circuit group 9 can also be considered a column of functional circuits 3.
[0096] Among them, the i-th shift unit 1_i is electrically connected to the first drive signal line S1_i electrically connected to the i-th circuit group 9, and the i-th shift unit 1_i is also electrically connected to the second drive signal line S2_i electrically connected to the i-1-th circuit group 9, and i is a positive integer greater than or equal to 2.
[0097] Combined with the above analysis, based on the mutual cooperation between the shift unit 1 and the control circuit 2, while realizing partition control, the functional circuit 3 in the last circuit group 9 of the functional partition 4 can normally receive the second drive signal, and thus can normally perform the second operation, making its execution function more perfect.
[0098] In one possible implementation, Figure 15 As shown, Figure 15 This is a schematic diagram of the structure of a functional circuit used in an embodiment of the present invention. In this embodiment, the functional area may include an identification functional area for implementing a fingerprint recognition function. In this case, the functional circuit 3 includes a light sensing circuit 31. The first drive signal line S1 is a read control signal line "read," and the second drive signal line S2 is a reset control signal line "rst." The light sensing circuit 31 is configured to perform a read operation (a first operation) in response to a read control signal and a reset operation (a second operation) in response to a reset control signal.
[0099] Specifically, the light-sensing circuit 31 includes a reset transistor K1, a drive transistor K2, and a read transistor K3. During the operation of the light-sensing circuit 31, the photosensitive element D1 generates a leakage current based on the light reflected from the finger, controlling the conduction of the drive transistor K2. Then, under the action of the read control signal, the read transistor K3 reads the detection voltage and transmits it to the detection signal line test. This detection voltage can feedback the degree of conduction of the drive transistor K2, and then feedback the magnitude of the leakage current generated by the photosensitive element D1. Therefore, the valleys and ridges of the fingerprint can be judged based on the magnitude of the leakage current. Finally, under the action of the reset control signal, the reset transistor K1 uses the fixed potential signal provided by the fixed potential signal line VDD to reset the gate of the drive transistor K2 to ensure that the gate potential of the drive transistor K2 in the next frame is a uniform initial potential.
[0100] Based on the above analysis, it can be seen that the i-th shift unit 1_i is electrically connected to the read transistor K3 of the light sensing circuit 31 in the i-th circuit group 9 via the read control signal line read, and is also electrically connected to the reset transistor K1 of the light sensing circuit 31 in the i-1-th circuit group 9 via the reset control signal line rst. The drive signal output by the i-th shift unit 1_i serves as both a read control signal for the light sensing circuit 31 in the i-th circuit group 9, causing it to perform a read operation, and a reset control signal for the light sensing circuit 31 in the i-1-th circuit group 9, causing it to perform a reset operation.
[0101] When using the traditional setting method, the light-sensing circuit 31 in the last circuit group 9 of functional partition 4 cannot receive the reset control signal and thus cannot perform the reset operation on the driving transistor K2. This will cause the initial voltage of the gate of the driving transistor K2 of the light-sensing circuit 31 at different positions in the next frame to be uneven, thereby resulting in inaccurate recognition. In the embodiment of the present invention, the light-sensing circuit 31 in the last circuit group 9 of functional partition 4 can normally receive the reset control signal and thus can perform the reset operation under the action of the reset control signal, thereby improving the uniformity of the initial voltage of the gate of the driving transistor K2 of the light-sensing circuit 31 at different positions. In turn, the detection voltage detected in the next frame can accurately feedback the magnitude of the leakage current generated by the light-sensing element D1, thereby effectively improving the accuracy of fingerprint recognition.
[0102] Or, in another possible embodiment, as Figure 16 As shown, Figure 16This is a structural schematic diagram of the functional circuit proposed in an embodiment of the present invention. The functional area in the embodiment of the present invention may include a display functional area for realizing a screen display function. At this time, the functional circuit 3 includes a pixel circuit 32, the first drive signal line S1 is the first scanning signal line Scan1, and the second drive signal line S2 is the second scanning signal line Scan2; the pixel circuit 32 is used to perform a reset operation (first operation) under the action of the first scanning signal and to perform a data writing operation (second operation) under the action of the second scanning signal.
[0103] Specifically, the pixel circuit 32 includes a driving transistor T0 , a gate reset transistor T1 , an anode reset transistor T2 , a data writing transistor T4 , a threshold compensation transistor T3 , a first light emission control transistor T5 , a second light emission control transistor T6 and a storage capacitor Cst.
[0104] First, under the action of the first scanning signal, the gate reset transistor T1 writes the reset signal provided by the reset signal line Vref into the gate of the driving transistor T0, thereby resetting the gate of the driving transistor T0; under the action of the first scanning signal, the anode reset transistor T2 writes the reset signal provided by the reset signal line Vref into the anode of the light-emitting element D2, thereby resetting the anode of the light-emitting element D2, that is, performing a reset operation.
[0105] Then, under the action of the second scanning signal, the data writing transistor T4 and the threshold compensation transistor T3 write the data signal provided by the data line Data into the gate of the driving transistor T0 and perform threshold compensation on the driving transistor T0, that is, perform a data writing operation.
[0106] Finally, under the action of the light-emitting control signal provided by the light-emitting control signal line Emit, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 control the signal transmission path between the power signal line PVDD and the anode of the light-emitting element D2 to be turned on, and transmit the driving current converted by the driving transistor T0 to the light-emitting element D2 to drive the light-emitting element D2 to emit light.
[0107] As can be seen from the above description, the i-th shift unit 1_i is electrically connected to the gate reset transistor T1 and the anode reset transistor T2 of the pixel circuit 32 in the i-th circuit group 9 via the first scan signal line Scan1, and is also electrically connected to the data write transistor T4 and the threshold compensation transistor T3 of the pixel circuit 32 in the i-1-th circuit group 9 via the second scan signal line Scan2. The drive signal output by the i-th shift unit 1_i serves as both a first scan signal for the pixel circuit 32 in the i-th circuit group 9 to perform a reset operation, and a second scan signal for the pixel circuit 32 in the i-1-th circuit group 9 to perform a data write operation.
[0108] In a conventional configuration, the pixel circuits 32 in the last circuit group 9 of functional partition 4 cannot receive the second scanning signal, and thus the data write transistor T4 and the threshold compensation transistor T3 cannot perform the data write operation. This results in a failure to charge the pixel circuits 32, and thus inability to drive the light-emitting element D2 connected thereto, resulting in a discontinuous image. In contrast, in the embodiment of the present invention, the light-sensing circuit 31 in the last circuit group 9 of functional partition 4 can normally receive the second scanning signal. Therefore, under the influence of the second scanning signal, the data write operation can be performed, controlling the light-emitting element D2 to emit light, effectively improving the display effect.
[0109] Furthermore, to simplify wiring and save space occupied by driving signal lines, the first driving signal line S1_i electrically connected to the i-th circuit group 9 can also be multiplexed with the second driving signal line S2_i-1 electrically connected to the i-1-th circuit group 9 .
[0110] Take the functional circuit 3 as the light sensing circuit 31 as an example, Figure 17 and Figure 18 As shown, Figure 17 A schematic diagram of a connection structure between the circuit group 9 and the drive signal line provided in an embodiment of the present invention is shown. Figure 18 This is a schematic diagram of a connection layout between the circuit group 9 and the drive signal line provided in an embodiment of the present invention. The read control signal line read electrically connected to the i-th circuit group 9 can be multiplexed with the reset control signal line rst electrically connected to the i-1-th circuit group 9.
[0111] Based on the same inventive concept, an embodiment of the present invention further provides a driving method for a circuit structure, and the driving method is applied to the circuit structure described above.
[0112] Combine Figure 3 and Figure 4 The driving method includes: controlling the shift unit 1 to output a scanning signal; at a first moment, one of the first control unit 21 and the second control unit 22 is turned on and the other is turned off. When the first control unit 21 is turned on and the second control unit 22 is turned off, the first control unit 21 controls the shift control signal output by the first shift unit 11 to be transmitted to the second shift unit 12, so that the second shift unit 12 sequentially outputs a driving signal; and the second control unit 22 controls the shift control signal output by the second shift unit 12 to be unable to be transmitted to the third shift unit 13.
[0113] The specific working principle of the circuit structure has been described in detail in the above embodiments and will not be repeated here.
[0114] Based on the above-described driving method, the embodiment of the present invention can achieve partition control while ensuring that the last row of functional circuits 3 in the functional partition 4 can fully perform its functions. Furthermore, the embodiment of the present invention does not require the installation of dummy circuits 10 between two adjacent functional partitions 4. This not only prevents the dummy circuits 10 from occupying the space of the original functional circuits 3, which is conducive to improving pixel density, but also avoids problems such as image discontinuity or poor fingerprint recognition accuracy caused by the dummy circuits 10.
[0115] In one possible embodiment, combining Figure 11 and Figure 12 The control circuit 2 further includes a third control unit 23 , at least part of the third control unit 23 is electrically connected to the second shift unit 12 .
[0116] When the first control unit 21 is not turned on and the second control unit 22 is turned on, the third control unit 23 is turned on, and the third control unit 23 transmits the frame start signal to the second shift unit 12, so that the second shift unit 12 outputs the driving signal. The second control unit 22 controls the shift control signal output by the second shift unit 12 to be transmitted to the third shift unit 13, so that the third shift unit 13 sequentially outputs the driving signal.
[0117] The specific working principle of the third control unit 23 has been described in detail in the above embodiment and will not be repeated here.
[0118] In the above-described driving method, the third control unit 23 can be considered a gating unit. When individually controlling the xth functional partition 4, the third control unit 23 and the xth shift circuit 5 are turned on, transmitting the frame start signal provided by the frame start signal line STV to the shift circuit 5, thereby triggering the shift circuit 5 to operate. In this configuration, multiple third control units 23 only need to be electrically connected to one frame start signal line STV. Compared to a method in which a frame start signal line STV is provided for each second shift unit 12 and driven separately, the number of frame start signal lines STV is reduced.
[0119] In one possible embodiment, combining Figure 4 The circuit structure also includes multiple circuit groups 9, each circuit group 9 includes multiple functional circuits 3, and the functional circuits 3 are electrically connected to the first drive signal line S1 and the second drive signal line S2, respectively. The i-th shift unit 1_i is electrically connected to the first drive signal line S1_i electrically connected to the i-th circuit group 9 and the second drive signal line S2_i-1 electrically connected to the i-1-th circuit group 9, respectively, where i is a positive integer greater than or equal to 2.
[0120] When the i-th shift unit 1_i outputs the driving signal, the functional circuit 3 in the (i-1)-th circuit group 9 is controlled to perform the second operation, and the functional circuit 3 in the i-th circuit group 9 is controlled to perform the first operation.
[0121] When the functional circuit 3 is a photosensitive circuit 31, it can ensure that the last row of photosensitive circuits 31 of the functional partition 4 can be reset normally, avoiding affecting the fingerprint recognition of the next frame and improving the fingerprint recognition accuracy; when the functional circuit 3 is a pixel circuit 32, it can ensure that the last row of pixel circuits 32 of the functional partition 4 can write data signals normally, thereby enabling the light-emitting elements electrically connected thereto to emit light normally, improving the picture continuity between the two adjacent functional partitions 4 and optimizing the display effect.
[0122] Based on the same inventive concept, an embodiment of the present invention further provides a display device, such as Figure 19 As shown, Figure 19 This is a schematic diagram of a structure of a display device provided by an embodiment of the present invention, and the display device includes the above-mentioned circuit structure 100, wherein the specific structure of the circuit structure 100 has been described in detail in the above-mentioned embodiment and will not be repeated here. Figure 19 The display device shown is for illustrative purposes only. The display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a laptop computer, an e-reader, or a television.
[0123] It should be noted that when the functional circuit 3 in the circuit structure includes a light-sensing circuit 31, the display device may specifically include a display module and a fingerprint recognition substrate, wherein the fingerprint recognition substrate is located on the side of the display module facing away from the light-emitting direction of the display device, and the circuit structure is located in the fingerprint recognition substrate. Furthermore, to increase pixel arrangement density, the fingerprint recognition substrate includes a circuit layer and a photosensitive layer located on the side of the circuit layer facing the display module. The circuit structure is located in the circuit layer, and the photosensitive element D1 electrically connected to the light-sensing circuit 31 in the circuit structure is located in the photosensitive layer.
[0124] When the functional circuit 3 in the circuit structure includes the pixel circuit 32 , the display device may specifically include a display module, and the circuit structure is located in the display module.
[0125] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
[0126] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A circuit structure, characterized in that: include: a plurality of shifting units arranged in cascade, wherein the plurality of shifting units include a first shifting unit, a second shifting unit, and a third shifting unit; A control circuit comprising a first control unit and a second control unit; Wherein, the first control unit is electrically connected between the first shift unit and the second shift unit, and is used to control the shift control signal output by the first shift unit to be transmitted to the second shift unit when it is turned on; the second control unit is electrically connected between the second shift unit and the third shift unit, and is used to control the shift control signal output by the second shift unit to be transmitted to the third shift unit when it is turned on; The circuit structure includes a first shift circuit and a second shift circuit, wherein the first shift circuit is used to drive the first functional partition and includes an m1th shift unit to an nth shift unit arranged in cascade, and the second shift circuit is used to drive the second functional partition and includes an n+1th shift unit to an m2th shift unit arranged in cascade; The nth shift unit is the first shift unit, the n+1th shift unit is the second shift unit, and the n+2th shift unit is the third shift unit; At a first moment, one of the first control unit and the second control unit is turned on, and the other is turned off.
2. The circuit structure according to claim 1, wherein: The first control unit includes a first transistor electrically connected between the first shift unit and the second shift unit; The second control unit includes a second transistor electrically connected between the second shift unit and the third shift unit; At the first moment, one of the first transistor and the second transistor is turned on, and the other is turned off.
3. The circuit structure according to claim 2, wherein: The first transistor and the second transistor are of the same transistor type; At the first moment, one of the first transistor and the second transistor receives an on-level, and the other receives an off-level.
4. The circuit structure according to claim 3, wherein: A gate of the first transistor is electrically connected to a first control signal line, and a gate of the second transistor is electrically connected to a second control signal line.
5. The circuit structure according to claim 4, characterized in that: The circuit structure includes at least two shift groups, each of the shift groups includes the first shift unit, the second shift unit and the third shift unit, and the at least two shift groups include a first shift group and a second shift group; The first transistor connected between the first shift unit and the second shift unit in the first shift group is a first A transistor, and the second transistor connected between the second shift unit and the third shift unit in the first shift group is a second A transistor; The first transistor connected between the first shift unit and the second shift unit in the second shift group is a first B transistor, and the second transistor connected between the second shift unit and the third shift unit in the second shift group is a second B transistor; The first control signal line electrically connected to the first A transistor and the second control signal line electrically connected to the second B transistor are multiplexed, and the second control signal line electrically connected to the second A transistor and the first control signal line electrically connected to the first B transistor are multiplexed.
6. The circuit structure according to claim 3, characterized in that: A gate of the first transistor is electrically connected to a third control signal line, and a gate of the second transistor is electrically connected to the third control signal line via an inverter.
7. The circuit structure according to claim 2, wherein: The first transistor and the second transistor are of different transistor types; The gate of the first transistor and the gate of the second transistor are electrically connected to a fourth control signal line, respectively.
8. The circuit structure according to claim 1, wherein: The control circuit further includes a third control unit, at least part of which is electrically connected to the second shift unit and configured to be turned on when the second control unit is turned on, and transmit a frame start signal to the second shift unit.
9. The circuit structure according to claim 8, characterized in that: The third control unit includes a third transistor electrically connected between a frame start signal line and the second shift unit.
10. The circuit structure according to claim 9, characterized in that: The second control unit includes a second transistor electrically connected between the second shift unit and the third shift unit; The second transistor and the third transistor are of the same transistor type, and a gate of the second transistor and a gate of the third transistor are electrically connected to a fifth control signal line, respectively.
11. The circuit structure according to claim 1, wherein: The circuit structure also includes a dummy unit, which is cascaded with the fourth shift unit and is used to output a driving signal when the fourth shift unit transmits a shift control signal to the dummy unit, wherein the fourth shift unit is the last shift unit among multiple cascaded shift units.
12. The circuit structure according to claim 1, wherein: The circuit structure further includes a plurality of circuit groups, each of which includes a plurality of functional circuits, each of which is electrically connected to the first drive signal line and the second drive signal line, and is configured to perform a first operation under the action of the first drive signal and a second operation under the action of the second drive signal; The i-th shift unit is electrically connected to the first drive signal line electrically connected to the i-th circuit group, and the i-th shift unit is also electrically connected to the second drive signal line electrically connected to the i-1-th circuit group, where i is a positive integer greater than or equal to 2.
13. The circuit structure according to claim 12, wherein: The first driving signal line electrically connected to the i-th circuit group and the second driving signal line electrically connected to the (i-1)-th circuit group are multiplexed.
14. The circuit structure according to claim 12, wherein: The functional circuit includes a light sensing circuit, the first drive signal line is a read control signal line, and the second drive signal line is a reset control signal line; The light sensing circuit is used to perform a reading operation under the action of a reading control signal, and to perform a reset operation under the action of a reset control signal.
15. The circuit structure according to claim 12, wherein: The functional circuit includes a pixel circuit, the first driving signal line is a first scanning signal line, and the second driving signal line is a second scanning signal line; The pixel circuit is configured to perform a reset operation under the action of a first scanning signal and to perform a data writing operation under the action of a second scanning signal.
16. A method for driving a circuit structure, characterized in that: Applicable to the circuit structure according to any one of claims 1 to 15, comprising: controlling the shift unit to output a scan signal, so that at the first moment, one of the first control unit and the second control unit is turned on and the other is not turned on; When the first control unit is turned on and the second control unit is not turned on, the first control unit controls the shift control signal output by the first shift unit to be transmitted to the second shift unit, so that the second shift unit outputs a driving signal in sequence, and the second control unit controls the shift control signal output by the second shift unit to be unable to be transmitted to the third shift unit.
17. The driving method according to claim 16, wherein: The control circuit further includes a third control unit, at least part of which is electrically connected to the second shift unit; When the first control unit is not turned on and the second control unit is turned on, the third control unit is turned on, and the third control unit transmits a frame start signal to the second shift unit, so that the second shift unit outputs a driving signal. The second control unit controls the shift control signal output by the second shift unit to be transmitted to the third shift unit, so that the third shift unit sequentially outputs a driving signal.
18. The driving method according to claim 16, wherein: The circuit structure further includes a plurality of circuit groups, each of which includes a plurality of functional circuits, each of which is electrically connected to a first drive signal line and a second drive signal line, respectively. The i-th shift unit is electrically connected to the first drive signal line electrically connected to the i-th circuit group and the second drive signal line electrically connected to the i-1-th circuit group, respectively, where i is a positive integer greater than or equal to 2. When the i-th shift unit outputs a driving signal, the functional circuit in the (i-1)-th circuit group is controlled to perform the second operation, and the functional circuit in the i-th circuit group is controlled to perform the first operation.
19. A display device, characterized in that: Comprising the circuit structure according to any one of claims 1 to 15.
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