Indirect time-of-flight sensors

Abstract

An indirect time-of-flight sensor is provided. The indirect time-of-flight sensor includes a pixel matrix, wherein each pixel includes at least two controllable transfer devices. A first conductor transmits first control signals to the transfer devices, these first signals being provided by a first circuit. A device is provided for illuminating a scene divided into at least two first regions. The device continuously illuminates each first region. The matrix is similarly divided into at least two second regions. The matrix and the illumination device are arranged such that each first region corresponds to a second region. The first circuit provides different first signals to different second regions.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority from European patent application No. 20306680.8, filed on December 23, 2020, the contents of which are incorporated herein by reference in their entirety to the maximum extent permitted by law. Technical Field

[0003] The present disclosure relates generally to image sensors and, more particularly, to time-of-flight sensors. Background Art

[0004] Time-of-flight image sensors are known. Among these sensors, indirect time-of-flight sensors are configured to determine the phase shift between periodic light emitted by the sensor toward the scene to be captured and the light received by the sensor's pixels, corresponding to the light reflected by the scene when illuminated by the sensor. Based on the phase shift determined for each pixel of the sensor, the distance between that pixel and a conjugate point of the scene can be calculated. Based on the distances determined for each pixel, a depth map of the scene can be generated.

[0005] There is a need to overcome all or some of the disadvantages of known indirect time-of-flight sensors. Summary of the Invention

[0006] Embodiments herein address all or some of the disadvantages of known indirect time-of-flight sensors.

[0007] One embodiment provides an indirect time-of-flight sensor, comprising: a pixel matrix, wherein each pixel includes a photoconversion region and at least two sets, each set including a charge storage region and a controllable transfer device for transferring charge from the photoconversion region to the storage region; first conductive lines parallel to each other, configured to transmit a first control signal to the transfer device; a first circuit configured to provide a first signal to the first conductive lines; an illumination device for illuminating a scene to be captured; and a second circuit configured to control the illumination device. The scene is divided into a plurality of first regions, and the illumination device and the second circuit are configured to illuminate each first region sequentially. The matrix is divided into a plurality of second regions, each second region including adjacent lines of pixels parallel to the first conductive lines, wherein the matrix and the illumination device are arranged such that each first region corresponds to one of the second regions. The first circuit is configured to provide different first signals to different second regions.

[0008] According to one embodiment, an illumination device includes an array of laser light sources and an optical device configured to direct light emitted by the array of laser light sources toward a scene. The array is divided into sets of laser light sources, each set configured to illuminate a corresponding first area, and a second circuit configured to control the sets one by one. The optical device is configured to direct the emitted light differently based on a control signal, and the second circuit is configured to provide a control signal corresponding to directing light toward the first area each time a first area is illuminated.

[0009] According to one embodiment: the sensor includes a second conductor parallel to the first conductor and configured to receive the output signal of the pixel; each pixel includes a selection device, which is configured to selectively couple the (multiple) outputs of the pixel to at least one corresponding second conductor; and the first circuit is configured to provide a second control signal to the selection device via a third conductor, which is perpendicular to the second conductor.

[0010] According to one embodiment, the first circuit is configured to control the reading of all pixels after each illumination of a first area and before the illumination of a next first area by means of the second signal.

[0011] According to one embodiment, the sensor includes second conductive lines parallel to each other and perpendicular to the first conductive lines, the second conductive lines being configured to receive pixel output signals. Each pixel includes a selection device configured to selectively couple the pixel's output(s) to at least one corresponding second conductive line. The first circuit is configured to provide a second control signal to the selection device via a third conductive line, the third conductive line being perpendicular to the second conductive lines.

[0012] According to one embodiment, the second circuit is configured to control several consecutive illumination cycles before each reading of all pixels controlled by the first circuit, each illumination cycle comprising a unique illumination of each first area, and to control the illumination device to emit no light during the reading.

[0013] According to one embodiment, the first circuit is configured to control the reading of only the pixels of the second area corresponding to the first area after each illumination of the first area.

[0014] According to one embodiment, the second circuit is configured to control the illumination device not to emit light when the first circuit controls reading of pixels in the second area.

[0015] According to one embodiment, the matrix is divided into a first half and a second half, the partition between the first half and the second half being parallel to the first line, and the second conductive line of each half terminating at the partition. A first circuit is configured to simultaneously control charge transfer in pixels in the second region of one half and readout of pixels in the second region of the other half. A first portion of a semiconductor substrate comprises the first half of the matrix, and a second portion of the semiconductor substrate comprises the second half of the matrix; an isolation structure extending through the semiconductor substrate isolates the portions of the semiconductor substrate from each other. A reference voltage provided to the first portion of the semiconductor substrate is electrically decoupled from a reference voltage provided to the second portion of the semiconductor substrate.

[0016] According to one embodiment, for each voltage level intended to be supplied to at least one pixel of the first half of the matrix and simultaneously to at least one pixel of the second half of the matrix, the sensor comprises a generator of said voltage level for the first half and a generator of said voltage level for the second half, the generators being electrically decoupled from one another.

[0017] According to one embodiment, the sensor includes a first readout circuit coupled to the second conductor of the first half of the matrix, and a second readout circuit coupled to the second conductor of the second half of the matrix, a reference voltage of the first readout circuit being electrically decoupled from a reference voltage of the second readout circuit.

[0018] According to one embodiment, the first readout circuit is arranged on one side of the first half along a first edge of the matrix, and the second readout circuit is arranged on one side of the second half along a second edge of the matrix, the first edge and the second edge being parallel.

[0019] According to one embodiment: a semiconductor substrate comprising a pixel matrix is located on another semiconductor substrate comprising a commutator, the commutator being preferably arranged below the partition between the two halves of the matrix; each commutator comprises a first input connected to one of the second wires of the first half, a second input connected to the corresponding second wire of the second half, and an output configured to be selectively coupled to one of the inputs; and the sensor comprises a read circuit connected to the output of each commutator, the read circuit preferably belonging to the same semiconductor substrate as the commutator.

[0020] According to one embodiment: a semiconductor substrate including a pixel matrix is located on another semiconductor substrate including a commutator, the commutator is preferably arranged under the partition between the two halves of the matrix; each commutator includes a first input connected to one of the second wires of the first half, a second input connected to the corresponding second wire of the second half, and an output configured to selectively couple to one of the inputs; the pixels of the matrix are arranged in columns parallel to the second wires; each commutator connected to the second wires of the odd columns connects its output to the first reading circuit; each commutator connected to the second wires of the even columns connects its output to the second reading circuit; and the first reading circuit and the second reading circuit preferably belong to the same semiconductor substrate as the commutator.

[0021] According to one embodiment, the sensor comprises a control circuit for controlling the commutators such that the output of each commutator is coupled to the first input of the commutator during reading of pixels of the first half of the matrix and to the second input of the commutator during reading of pixels of the second half of the matrix. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The foregoing features and advantages, as well as other features and advantages, will be described in detail in the following description of specific embodiments given by way of illustration and not limitation with reference to the accompanying drawings, in which:

[0023] Figure 1 An example of a circuit for a pixel of an indirect time-of-flight sensor is illustrated;

[0024] Figure 2 An indirect time-of-flight sensor is illustrated according to one embodiment;

[0025] Figure 3 illustrates an illumination device of an indirect time-of-flight sensor according to one embodiment;

[0026] Figure 4 illustrates an illumination device of an indirect time-of-flight sensor according to an alternative embodiment;

[0027] Figure 5 A diagram illustrating a method according to an embodiment of the present invention is shown. Figure 2 A timing diagram of the operation of the sensor;

[0028] Figure 6 A diagram is shown according to an alternative embodiment Figure 2 A timing diagram of the operation of the sensor;

[0029] Figure 7 An indirect time-of-flight sensor according to another embodiment is illustrated;

[0030] Figure 8A diagram illustrating a method according to an embodiment of the present invention is shown. Figure 7 A timing diagram of the operation of the sensor;

[0031] Figure 9 An indirect time-of-flight sensor according to another embodiment is illustrated;

[0032] Figure 10 Shown Figure 9 A very schematic top view of two adjacent pixels of a sensor;

[0033] Figure 11 Shown along Figure 10 A very schematic cross-sectional view of plane AA;

[0034] Figure 12 A diagram illustrating a method according to an embodiment of the present invention is shown. Figure 7 A timing diagram of the operation of the sensor;

[0035] Figure 13 The diagram is shown in a very schematic way Figure 9 The implementation of the sensor;

[0036] Figure 14 The diagram is shown in a very schematic way Figure 9 Another implementation of the sensor;

[0037] Figure 15 Pictured Figure 9 Alternative embodiments of indirect time-of-flight sensors;

[0038] Figure 16 The diagram is shown in a very schematic way Figure 15 The implementation of the sensor;

[0039] Figure 17 Pictured Figure 9 Another alternative embodiment of an indirect time-of-flight sensor; and

[0040] Figure 18 The diagram is shown in a very schematic way Figure 17 The implementation of the sensor. DETAILED DESCRIPTION

[0041] In the various drawings, similar features are represented by similar reference numerals. Specifically, common structural and / or functional features among the various embodiments may have the same references and may have the same structure, dimensions, and material properties.

[0042] For clarity, only operations and elements useful for understanding the embodiments described herein are shown and described in detail. In particular, common electronic systems and applications in which indirect time-of-flight sensors may be provided, with which the described embodiments are compatible, are not described in detail.

[0043] Unless otherwise specified, when reference is made to two elements being connected together, this means a direct connection without any intervening elements other than conductors, and when reference is made to two elements being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0044] In the following disclosure, unless otherwise stated, when reference is made to absolute position qualifiers (such as terms "front", "back", "up", "down", "left", "right", etc.) or relative position qualifiers (such as terms "above", "below", "higher", "lower", etc.) or direction qualifiers (such as "horizontal", "vertical", etc.), reference is made to the orientation shown in the accompanying drawings.

[0045] Unless otherwise indicated, the expressions "about," "approximately," "substantially," and "approximately" mean within 10%, and preferably within 5%.

[0046] Figure 1 An example of a circuit for a pixel 1 of an indirect time-of-flight sensor is shown.

[0047] Pixel 1 includes a photoconversion region or photosensitive region PD, such as a photodiode, preferably a pinned photodiode. The photoconversion region PD has an electrode (e.g., an anode thereof) connected to a node 100, which is configured to receive a reference voltage (e.g., ground GND). The photoconversion region PD is configured such that charge is generated therein when light is received by the region PD.

[0048] Pixel 1 also includes two identical memory circuit sets E1 and E2. Figure 1 Each set E1 , E2 is coupled to a region PD, more specifically to an electrode 102 of the region PD that is not connected to the node 100 .

[0049] Each set E1 , E2 of pixels 1 comprises a charge storage area mem1 , mem2 and a controllable charge transfer device TGmem1 , TGmem2 .

[0050] Device TGmem1 (and TGmem2, respectively) is connected between region PD and region mem1 (and mem2, respectively). Device TGmem1 (and TGmem2, respectively) is configured to transfer charge from region PD to region mem1 (and mem2, respectively). More precisely, device TGmem1 (and TGmem2, respectively) is configured to transfer charge from region PD to region mem1 (and mem2, respectively) when its control signal TG1 (and TG2, respectively) is valid (e.g., at a high level), and to prevent any charge transfer between region PD and region mem1 (and mem2, respectively) when the control signal is invalid (e.g., at a low level). Each device TGmem1, TGmem2 is, for example, a transfer gate transistor.

[0051] Region mem1 (and mem2, respectively) is configured to store charge transferred thereto by transfer device TGmem1 (and TGmem2, respectively) until such charge is transferred elsewhere in pixel 1 during a read phase. Each region mem1, mem2 is, for example, a pinned diode. For example, each pinned diode mem1, mem2 has an electrode connected to node 100 (e.g., its anode) and another electrode 104 (e.g., its cathode) coupled to electrode 102 of region PD via corresponding transfer devices TGmem1 and TGmem2.

[0052] Pixel 1 has an output 106. During a read phase of pixel 1, the output signal of pixel 1 is available on output 106.

[0053] Pixel 1 includes a selection device 108, such as a metal oxide semiconductor (MOS) transistor. Device 108 is connected between output 106 and a read conductor Vx. Selection device 108 is configured to selectively couple output 106 of pixel 1 to line Vx. More specifically, during a read phase of pixel 1, e.g., when control signal RD of device 108 is active (e.g., at a high level), device 108 couples output 106 to line Vx, and outside of the read phase of pixel 1, e.g., when signal RD is inactive (e.g., at a low level), device 108 isolates output 106 from line Vx.

[0054] For example, in a known time-of-flight sensor comprising a matrix of pixels 1 arranged in rows and columns, all pixels 1 belonging to the same column share a line Vx. To read a given pixel of the matrix, all pixels of the row are selected by activating the signal RD of the row to which the pixel belongs.

[0055] Pixel 1 included Figure 11. The controllable output circuit 110 is bounded by a dashed line in FIG. The circuit 110 is configured to selectively generate an output signal on the output 106 indicating the amount of charge stored in the charge storage region mem1 of the pixel or an output signal indicating the amount of charge stored in the charge storage region mem2 of the pixel.

[0056] For example, during a read phase of the pixel, when the first signal RD1 is valid (e.g., at a high level), the circuit 110 provides a signal indicating the amount of charge stored in the region mem1, such as a voltage referenced to the node 100, and when the second signal RD2 is valid (e.g., at a high level), the circuit 110 provides a signal indicating the amount of charge stored in the region mem2, such as a voltage referenced to the node 100.

[0057] exist Figure 1 In a specific example, the circuit 110 includes a controllable coupling device TGRD1, TGRD2, such as a transmission gate, for each set E1, E2. Device TGRD1 (and TGRD2, respectively) is connected to the set E1 (and E2, respectively), and more precisely, to the region mem1 (and mem2, respectively), for example, to the electrode 104 of the region mem1 (and mem2, respectively). Device TGRD1 (and TGRD2, respectively) is configured to couple the region mem1 (and mem2, respectively) to a node 111 when a signal RD1 (and RD2, respectively) is active, and to isolate the region mem1 (and mem2, respectively) from the node 111 when the signal RD1 (and RD2, respectively) is inactive. The circuit 110 also includes a source-follower MOS transistor 112 having its gate connected to the node 111, its source connected to the output 106, and its drain connected to a node 114, which is configured to receive a supply voltage Vdd.

[0058] For example, pixel 1 further includes a transistor AB connected between electrode 102 of region PD and node 118 configured to receive bias voltage VAB. Transistor AB is controlled by signal TGAB. Transistor AB is configured to operate as an antiblooming device for region PD when turned off, and to reset region PD when turned on, that is, to dissipate all photogenerated charges accumulated in region PD toward node 118.

[0059] In a conventional indirect time-of-flight sensor comprising a matrix of pixels 1 arranged in rows and columns, during the integration phase, all transfer devices TGmem1 and TGmem2 of all pixels 1 of the matrix are driven simultaneously to transfer the photogenerated charge in the area PD of each pixel alternately to the areas mem1 and mem2 of that pixel. Furthermore, during the integration phase, the scene to be captured is illuminated by the sensor in a flashing manner, that is, each time the sensor emits light, the entire scene is illuminated. For example, during the integration phase, light is emitted in the form of a continuous, periodic train of light pulses. After the integration phase, all pixels 1 of the matrix are read. More specifically, during the reading of all pixels 1 of the matrix, pixel rows are selected one by one using the signal RD, and all pixels 1 of the selected rows are read simultaneously.

[0060] Despite Figure 1 In the example shown, the pixel includes only two identical sets E1 and E2, but in other examples not shown, the pixel may include more than two identical sets, for example, 4 identical sets.

[0061] In addition, despite the Figure 1 In the example shown, pixel 1 has only one output 106, but in other examples not shown, a pixel may include more than one output 106. For example, a pixel may include one output 106 for each set E1, E2, and circuit 110 may then be connected between sets E1, E2 and the outputs 106. Selection device 108 is then configured to selectively couple the outputs 106 to at least one corresponding line Vx. For example, output 106 associated with set E1 is selectively coupled by device 108 to a first line Vx, and output 106 associated with set E2 is selectively coupled by device 108 to a second line Vx.

[0062] More generally, many different pixels known to those skilled in the art may be used in the pixel matrix of an indirect time-of-flight sensor, and Figure 1 The pixel 1 is only one example of these known pixels. Furthermore, the ordinary control of these different pixels during the integration phase and during the readout phase is well known to those skilled in the art.

[0063] In the following description, unless otherwise stated, when referring to a pixel of an indirect time-of-flight sensor, this means referring to a pixel of an indirect time-of-flight sensor. Figure 1 However, a person skilled in the art will be able to adapt the following description to other pixels, for example pixels comprising more than two identical sets and / or more than one output 106 .

[0064] It is proposed here to capture a scene with an indirect time-of-flight sensor by successively illuminating different regions of the scene, illuminating only one region of the scene at a time. In other words, the scene is divided into a plurality of regions and the scene is fully illuminated by successively illuminating each region of the scene, each of the regions being illuminated at least once.

[0065] Figure 2 An indirect time-of-flight sensor 2 according to one embodiment is shown.

[0066] The sensor 2 comprises a matrix 200 of pixels 1, in Figure 2 Only one pixel 1 is referenced above to avoid complicating the diagram. The pixels 1 are arranged in rows ( Figure 2 horizontally) and columns ( Figure 2 vertical direction on the ). Figure 2 In the example shown, the matrix 200 includes 8 rows and 8 columns, although in reality, the matrix 200 may include hundreds of rows and columns.

[0067] The sensor 2 includes a reading circuit READOUT. The circuit READOUT is configured to receive output signals of pixels of the matrix 200 coupled to the Vx line when these pixels are selected. In other words, the circuit READOUT is configured to receive output signals of pixels that are selected by means of their selection devices 108 ( Figure 1 ) couples its output 106 to a corresponding line Vx. As is usual in an indirect time-of-flight sensor, in sensor 2 the Vx lines are arranged parallel to the columns of the matrix 200, or in other words, the Vx lines are arranged parallel to the columns of the matrix 200. Figure 2 Each Vx line is coupled (preferably connected) to the circuit READOUT. Figure 2 To complicate matters, in this figure, only one Vx line is represented completely by a dotted line. Figure 2 As can be seen above, each Vx line is shared by several pixels, and more specifically, by Figure 2 For example, the read circuit READOUT comprises a plurality of analog-to-digital converters (ADCs), preferably one ADC for each Vx line.

[0068] The sensor 2 comprises a control circuit CTRL1 . The control circuit CTRL1 is configured to control the reading phase and the integration phase of the pixels of the matrix 200 .

[0069] In order to provide control signals TG1 and TG2 to the transfer devices TGmem1 and TGmem2 of each pixel 1 ( Figure 1 ), the sensor 2 includes parallel wires 204. The wires 204 are connected to a control circuit CTRL1. The control circuit CTRL1 is configured to provide control signals TG1 and TG2 to the wires 204 ( Figure 1 ).

[0070] exist Figure 2 In the embodiment of , the lines 204 are parallel to the line Vx. Each line 204 is shared by all pixels of the corresponding column of the matrix, for example. Figure 2 In order to avoid complicating the diagram, only one line 204 is shown completely in dashed form. Figure 2 In FIG. 2 , only one line 204 is shown in each column. However, in practice, each pixel receives control signals TG1 and TG2 via two corresponding lines 204 ( Figure 1 ), and therefore each column is associated with one line 204 for sending a signal TG1 to all the pixels of that column, and with another line 204 for sending a signal TG2 to all these pixels.

[0071] In order to provide the control signal RD ( Figure 1 ), the sensor 2 further comprises parallel conductive lines 206. The lines 206 are connected to a control circuit CTRL1. The control circuit CTRL1 is configured to provide a control signal RD to the lines 206.

[0072] In this embodiment, the lines 206 are perpendicular to the line Vx. Each line 206 is shared by all pixels of the corresponding row of the matrix, for example. Figure 2 In order to avoid complicating the diagram, only one line 206 is shown completely in dashed form.

[0073] although Figure 2 Not shown, but other control signals provided to the pixels of the matrix 200 are preferably provided by the control circuit CTRL1. As is common in indirect time-of-flight sensors, the sensor 2 includes other conductors (not shown) to provide other control signals and voltages to the pixels of the matrix 200. For example, Figure 2 In the embodiment of the present invention, the sensor 2 comprises: for each row of the matrix 200, a voltage GND ( Figure 1 ) is sent to all pixels in the row; for each column of the matrix 200, a wire for sending the signal TGAB ( Figure 1 ) is sent to each pixel of the column; for each column of the matrix 200, a bias voltage VAB ( Figure 1 ) is sent to all pixels of the column; for each row of the matrix 200, a conductor for sending the signal RD ( Figure 1 ) is sent to all pixels in the row; for each row of the matrix 200, the signal RD1 ( Figure 1 ) is sent to all pixels of the row; and for each row of the matrix 200, a conductor for sending the signal RD2 ( Figure 1 ) is sent to all pixels in that row.

[0074] Sensor 2 includes an illumination device 205. Illumination device 205 is configured to illuminate a scene to be captured. Sensor 2 also includes a control circuit CTRL2 configured to control illumination device 205. For example, control circuit CTRL2 provides a control signal cmd to device 205. Signal cmd is, for example, a digital signal comprising several bits.

[0075] As described above, the scene to be captured is divided into multiple regions, and it is proposed herein to illuminate each region of the scene sequentially by illuminating only one region at a time. It should be understood that, in practice, portions of the scene adjacent to the illuminated region may also receive some light. In other words, device 205 and its control circuit CTRL2 are configured to illuminate each region of the scene sequentially. For example, device 205 is configured to illuminate different regions of the scene to be captured, with signal cmd determining the region illuminated by device 205.

[0076] The control circuits CTRL1 and CTRL2 are synchronized, for example, by means of a synchronization circuit SYNC coupling the circuits CTRL1 and CTRL2. In other words, the circuit SYNC receives and / or sends synchronization signals from and / or to the circuits CTRL1 and CTRL2.

[0077] In a similar manner to the scene, the matrix 200 is divided into a plurality of regions, the total number of regions of the matrix preferably being equal to the total number of regions of the scene. Figure 2 In the example of FIG. 2 , the matrix 200 is divided into four regions M1 , M2 , M3 and M4 .

[0078] Each region M1, M2, M3, M4 comprises adjacent lines of pixels 1, these lines of pixels being parallel to the conductive line 204. Figure 2 In the embodiment, each region M1 , M2 , M3 , M4 includes two adjacent lines of pixel 1 that are parallel to line 204 , or in other words, each region M1 , M2 , M3 , M4 includes two adjacent lines of pixel 1 .

[0079] The matrix 200 and the device 205 are arranged relative to each other so that each region M1, M2, M3, M4 of the matrix 200 corresponds to a region of the scene (taken from the regions into which the scene is divided and which are sequentially illuminated). In other words, the matrix 200 and the device 205 are arranged relative to each other so that each time the device 205 illuminates a region of the scene (taken from the regions into which the scene is divided), light reflected from that region of the scene is received by the pixel 1 of the corresponding region M1, M2, M3, M4 of the matrix 200. It should be understood that, in practice, some other pixels of the matrix arranged near the corresponding region M1, M2, M3, or M4 may also receive a portion of the light reflected from the scene. The implementation of this arrangement of the matrix 200 and the device 205 relative to each other is within the capabilities of those skilled in the art.

[0080] Sensor 2 allows for scanned illumination of the scene to be captured. For a given power supplied to device 205 during illumination of a region of the scene, all light generated by device 205 is directed toward that region of the scene. This differs from conventional indirect time-of-flight sensors, in which a given power is used to provide flash illumination of the entire scene to be captured. As a result, the signal-to-noise ratio of the light received by sensor 2 is increased compared to the signal-to-noise ratio of the light received by these conventional sensors. In fact, for a given power, the light received by each region of the scene during flash illumination carries less optical power than the light received by a single region of the scene illuminated by sensor 2 during scanned illumination.

[0081] The control circuit CTRL1 is further configured to provide different control signals TG1 and TG2 to different regions M1, M2, M3, and M4 of the matrix 200. In other words, the control circuit CTRL1 is configured to independently control the charge transfer in each region M1, M2, M3, and M4 of the matrix 200, or in other words, to independently control the charge transfer between the regions M1, M2, M3, and M4. For example, for each region M1, M2, M3, and M4 of the matrix, the control circuit CTRL1 includes different subcircuits ( Figure 2 ), each sub-circuit is configured to provide a control signal for charge transfer in the pixels of the region M1, M2, M3 or M4 associated with the sub-circuit.

[0082] For example, control circuit CTRL1 is configured to control the integration phase of pixels in any one of regions M1, M2, M3, and M4, while control circuit CTRL1 does not control the integration phase of pixels in other regions. More specifically, when one region of a scene is illuminated by device 205 and light reflected by that region of the scene is received by the corresponding region M1, M2, M3, or M4 of matrix 200, control circuit CTRL1 maintains control signals TG1 and TG2 in an inactive state for the other regions of matrix 200. Control signals TG1 and TG2 are repeatedly commutated between active and inactive states only for pixels 1 in regions M1, M2, M3, or M4 that are receiving light. In other words, control signals TG1 and TG2 are repeatedly commutated between active and inactive states only for pixels 1 in the region of matrix 200 corresponding to the illuminated region of the scene, so that, in each pixel of the region of matrix 200, charge is alternately transferred from region PD to each of the pixel's storage regions mem1 and mem2.

[0083] In practice, each commutation of the signal TG1 (and TG2, respectively) corresponds to the charging or discharging of a capacitance, which is typically the gate capacitance of the charge transfer element TGmem1 (and TGmem2, respectively). Thus, by reducing the number of pixels in which the signals TG1 and TG2 commutate simultaneously, the power consumption of the sensor 2 is reduced compared to a conventional indirect time-of-flight sensor in which the signal TG1 (and TG2, respectively) commutates simultaneously in all pixels of the sensor.

[0084] Figure 3 An illumination device 205 according to one embodiment is shown in a very schematic manner.

[0085] The illumination device 205 includes an array 300 of laser light sources 301. To avoid complicating the diagram, Figure 3 Only one laser light source is cited in FIG. Each laser light source 301 is preferably a VCSEL (“Vertical-Cavity Surface-Emitting Laser”). Figure 3 In the example shown, the array 300 includes 8×2 laser light sources 301, although the number of light sources 301 in the array may be different in other examples.

[0086] Device 205 also includes Figure 3 3. An optical device (or element) 302 is shown in block form in FIG. The optical device 302 is configured to direct or direct light emitted by the array 300 of laser light sources 301 to a scene to be captured.

[0087] In this embodiment, the array 300 is divided into multiple sets of laser light sources. Figure 3In the example of FIG, the array 300 is divided into four sets A1, A2, A3 and A4 of laser light sources 301. Preferably, the number of sets of the array 300 is equal to the number of regions of the scene and equal to the number of regions M1, M2, M3, M4 of the matrix 200 ( Figure 2 ).

[0088] Each set A1, A2, A3, and A4 is configured to illuminate a corresponding area of the scene to be captured. In practice, each laser light source 301 in the array can be controlled independently of the other laser light sources 301. For example, array 300 can be controlled such that when laser light sources 301 in a given set A1, A2, A3, or A4 of array 300 emit light, laser light sources 301 in other sets do not emit light. For example, the laser light sources 30 that emit light and the laser light sources 301 that do not emit light are determined by signal cmd.

[0089] Control circuit CTRL2( Figure 2 ) is configured to control the sets A1, A2, A3 and A4 to emit light one after another using the signal cmd. More precisely, the set A1, A2, A3 or A4 that emits light depends on the value of the signal cmd.

[0090] For each set A1, A2, A3, A4, when the laser light source 301 of the set emits light, the emitted light is directed to the corresponding area of the scene to be captured by the device 302. For each set A1, A2, A3, A4 of the array 300 of laser light sources 301, the illuminated area of the scene is different.

[0091] For example, in Figure 3 In FIG, the optical device 302 (e.g., a lens or an objective) is configured to direct the light emitted by the laser light sources 301 of the corresponding set A1, A2, A3, or A4 into the corresponding direction O1, O2, O3, or O4. Thus, when the set A1 (and A2, A3, or A4, respectively) emits light, the first (and second, third, or fourth, respectively) area of the scene is illuminated, and the reflected light is received by the area M1 (and M2, M3, or M4, respectively) of the matrix 200 ( Figure 2 ).

[0092] For example, the device 205 includes a control circuit CTRL3 configured to control each light source 301 of the array 300 to emit light based on the signal cmd.

[0093] exist Figure 3In the device 205, a given power supplied to the array 300 is shared or divided among the light sources 301 emitting light. Therefore, for a given power supplied to the array 300, when only the light sources of the set A1, A2, A3, or A4 corresponding to an area of the scene emit light (scanning illumination), the optical power of the light received by the area is greater than the optical power when all the light sources 301 emit light simultaneously (flash illumination).

[0094] Figure 4 An illumination device 205 according to an alternative embodiment is shown.

[0095] as Figure 3 The device 205, Figure 4 The device 205 includes an array 300 of laser light sources 301 and an optical device 302 .

[0096] However, in Figure 4 In an embodiment, array 300 is not divided into a plurality of independently controllable light sets. For example, based on signal cmd, all light sources 301 either emit light or do not emit light. For example, device 205 includes control circuit CTRL3, which is configured to control the emission of all light sources 301 in array 300 based on signal cmd.

[0097] In addition, Figure 4 In the embodiment of the present invention, the optical device 302 is controllable. More precisely, the direction in which the light emitted by the array 300 is directed by the device 302 is controllable. In other words, the device 302 is configured to direct the emitted light differently according to the signal cmd. The control circuit CTRL2 ( Figure 2 ) is configured to provide, at each illumination of a region of the scene to be captured, a control signal cmd corresponding to the device 302 directing light towards this region of the scene.

[0098] For example, in Figure 4 In FIG, the optical device 302 is configured to direct the light emitted by the array of laser light sources 301 into four different directions O1, O2, O3 or O4, each direction corresponding to a different area of the scene. Thus, when the signal cmd is at a first (and second, third or fourth, respectively) value, the first (and second, third or fourth, respectively) area of the scene is illuminated and the reflected light is reflected by the matrix 200 ( Figure 2 ) is received by area M1 (and M2, M3 or M4 respectively).

[0099] For example, the device 302 includes (a plurality of) mirrors and / or one or more lenses, the orientation of which can be controlled by the signal cmd. Preferably, the optical device 302 includes at least one controllable movable micromirror, or in other words, a controllable movable micro-electromechanical system (MEMS) micromirror. The implementation of the optical device 302 is within the capabilities of those skilled in the art.

[0100] exist Figure 4 In device 205, the given power supplied to array 300 during the illumination phase is shared among all light sources 301. However, all light emitted by array 300 is focused by optical device 302 toward a given area of the scene. This differs from flash illumination, in which the light emitted by array 300 is directed or diffused toward the entire scene to be captured. Thus, for a given power supplied to array 300, the scanned illumination of the scene allows each area of the scene to receive light sequentially with increased power compared to the light received simultaneously by all areas of the scene during flash illumination.

[0101] Figure 3 and Figure 4 Furthermore, the described embodiments of the indirect time-of-flight sensor are not limited to combinations of Figure 3 and Figure 4 An embodiment of the device 205 is described. A person skilled in the art will be able to use other controllable illumination devices so that the emitted light is directed only to one area of the scene to be captured, which area is selected in a controllable manner among a plurality of areas of the scene.

[0102] Figure 5 A diagram illustrating a method according to an embodiment of the present invention is shown. Figure 2 More specifically, in this example, the scene to be captured is divided into four areas S1, S2, S3, and S4, and according to time t, Figure 5 The illumination device 205 ( Figure 2 ) emits light (“light”), which area of S1, S2, S3 or S4 receives the light (“illuminated area of the scene”), the matrix 200 ( Figure 2 ) receives the reflected light and places its pixel in the integration phase ("integration region"), and which pixels of the matrix are read ("read"). In this example, the device 205 emits light in the form of a periodic train of light pulses.

[0103] Between time t0 and time t1 after time t0, device 205 emits light in direction O1 toward region S1 of the scene. The light reflected by region S1 is received by the corresponding region M1 of the matrix. The integration phase of the received light is completed only in the pixels of region M1 by switching the control signals TG1, TG2 of the charge transfer devices TGmem1, TGmem2 of the pixels of region M1 between their active and inactive states at a frequency higher than the frequency of the emitted light.

[0104] Between time t1 and time t2 after time t1, device 205 does not emit light, and reads the pixels of region M1. Figure 2 ), so reading the pixels of the area M1 means reading all the pixels of the matrix ("all matrix"). Therefore, between the instants t1 and t3, the control circuit CTRL1 is configured to control the reading of all the pixels of the matrix 200 by reading the rows of the matrix one by one, by means of the signal RD.

[0105] Between time t2 and time t3 after time t2, device 205 emits light in direction O2 towards area S2 of the scene. The light reflected by area S2 is received by the corresponding area M2 of the matrix and the integration phase is performed only in the pixels of area M2.

[0106] Between time t3 and time t4 following time t3, device 205 does not emit light, and the pixels of region M2 are read by reading all pixels of the matrix ("all matrix"), similar to what was done between times t1 and t2.

[0107] Between time t4 and time t5 after time t4, device 205 emits light in direction O3 towards area S3 of the scene. The light reflected by area S3 is received by the corresponding area M3 of the matrix and the integration phase is performed only in area M3.

[0108] Between time t5 and time t6 after time t5, device 205 does not emit light, and the pixels of region M3 are read by reading all pixels of the matrix ("all matrix").

[0109] Between instant t6 and instant t7 after instant t6, device 205 emits light in direction O4 towards area S4 of the scene. The light reflected by area S4 is received by the corresponding area M4 of the matrix and the integration phase is performed only in area M4.

[0110] At the time t7 , all regions S1 , S2 , S3 , S4 of the scene have been illuminated once during the scanning illumination of the scene.

[0111] Between time t7 and time t8 after time t7 , device 205 does not emit light, and the pixels of region M4 are read by reading all pixels of the matrix (“all matrix”).

[0112] At time t8, the output signals of the pixels of region M1 read after irradiation of region M1 (between time t1 and t2), the output signals of the pixels of region M2 read after irradiation of region M2 (between time t3 and t4), the output signals of the pixels of region M3 read after irradiation of region M3 (between time t5 and t6), and the output signals of the pixels of region M4 read after irradiation of region M4 (between time t7 and t8) can be used to generate or calculate an image or depth map of the scene.

[0113] At time t8 , a new scanning illumination of the scene is started by illuminating region M1 of the scene with device 205 .

[0114] In combination Figure 5 In the described operating mode, after each irradiation of a region S1, S2, S3 or S4 of the matrix 200, all the pixels of the matrix are read out to obtain the output signals of the pixels of the region M1, M2, M3 or M4 of the matrix 200 corresponding to the irradiated region. More precisely, after each irradiation of a region S1, S2, S3 or S4, all the pixels of the matrix are read out before the next region S1, S2, S3 or S4 is irradiated.

[0115] Preferably, when capturing a scene, during the continuous illumination of a region of the scene, an average power supply having a given peak power is supplied to device 205, which is equal to the average power having the same peak power supplied to the illumination device of a conventional sensor during flash illumination of the scene. In this case, the duration T of the illumination phase of each region of the scene during the scanning illumination is preferably equal to the duration of the flash illumination divided by the number of regions of the scene. This allows the signal-to-noise ratio in sensor 2 to be further increased compared to conventional sensors, without having to modify the power supply used to illuminate the scene to be captured.

[0116] Figure 6 A diagram is shown according to an alternative embodiment Figure 2 In this example, the scene to be captured is divided into 4 areas S1, S2, S3 and S4, and according to the time t, Figure 6The diagram shows the light emitted by the illumination device 205 ("Light"), which area of S1, S2, S3, or S4 receives the light ("Illuminated Area of the Scene"), which corresponding area M1, M2, M3, or M4 of the matrix 200 receives the reflected light and places its pixel in the integration phase ("Integration Area"), and which pixels of the matrix are read. In this example, the device 205 emits light in the form of a periodic train of light pulses.

[0117] Between time t10 and time t11 after time t10, device 205 emits light in direction O1 toward region S1 of the scene. The light reflected by region S1 is received by the corresponding region M1 of the matrix. The integration phase of the received light is completed only in the pixels of region M1 by switching the control signals TG1, TG2 of the charge transfer devices TGmem1, TGmem2 of the pixels of region M1 between their active and inactive states at a frequency higher than the frequency of the emitted light.

[0118] Between time t11 and time t12 after time t11, device 205 emits light in direction O2 towards area S2 of the scene. The light reflected by area S2 is received by the corresponding area M2 of the matrix and the integration phase is performed only in the pixels of area M2.

[0119] Between instant t12 and instant t13 after instant t12, device 205 emits light in direction O3 towards area S3 of the scene. The light reflected by area S3 is received by the corresponding area M3 of the matrix and the integration phase is performed only in the pixels of area M3.

[0120] Between instant t13 and instant t14 after instant t13, device 205 emits light in direction O4 towards area S4 of the scene. The light reflected by area S4 is received by the corresponding area M4 of the matrix and the integration phase is performed only in the pixels of area M4.

[0121] like Figure 6 As shown, the cycle of successive illumination of the regions S1, S2, S3 and S4 (where each region S1, S2, S3, S4 is illuminated once) can be repeated several times before all pixels of the matrix ("all matrix") are read out. Figure 6 In the example, before reading, a cycle of continuous irradiation of areas S1, S2, S3 and S4 is performed four times, once between time t10 and time t14, once between time t14 and time t15 after time t14, once between time t15 and time t16 after time t15, and once between time t16 and time t17 after time t16.

[0122] At time t17, the control circuit CTRL1 ( Figure 2) By means of the signal RD, the reading of all pixels of the matrix ("all matrix") is controlled by reading the rows of the matrix one by one. No light is emitted during the reading phase. At the end of the reading phase, a depth map of the scene can be generated or calculated based on the output signals of the pixels read during the reading phase.

[0123] In combination Figure 6 In the described operation, before each reading of all pixels (this reading being controlled by the control circuit CTRL1), the control circuit CTRL2 is configured to control several consecutive illumination cycles, each illumination cycle comprising a unique illumination of each of the regions S1, S2, S3 and S4. The control circuit CTRL1 is also configured to control the illumination device 205 to not emit light during the reading.

[0124] Combined with Figure 5 The described operation of capturing the complete scene is compared to combining Figure 6 In the described operation, the reading of all pixels of the matrix is performed only once, which reduces the time required to capture the scene.

[0125] Preferably, Figure 6 The duration T1 of each illumination phase of each region S1, S2, S3 and S4 is equal to the combined Figure 5 The duration T of the illumination phase of each of the described areas S1, S2, S3 and S4 is divided by the number of times the illumination cycle of the areas S1, S2, S3 and S4 is repeated before the matrix is completely read. In other words, in this example, the illumination duration T1 is equal to one quarter of the illumination duration T ( Figure 5 ). As a result, Figure 6 In the operating mode and Figure 5 In the operating mode of the device 205, the power supply provided to the device 205 for capturing the scene is the same. Figure 3 When implemented as described above, combined with Figure 5 Compared with the operation described above, the combination Figure 6 The described operation allows mitigation of temperature increases in the array 300 of devices 205 .

[0126] In combination Figures 2 to 6 In the described embodiment, the line 204 for providing the control signals TG1, TG2 to the transfer devices TGmem1, TGmem2 of the pixel is parallel to the line Vx. Other embodiments will be described below in which the line 204 is perpendicular to the line Vx.

[0127] Figure 7 An indirect time-of-flight sensor 2 ′ according to another embodiment is shown, wherein the line 204 is perpendicular to the line Vx.

[0128] As sensor 2 ( Figure 2), the sensor 2' comprises a matrix 200 of pixels 1, a circuit READOUT, a line Vx coupled to the circuit READOUT, a line 206, and an illumination device 205 and its control circuit CTRL2, which will not be described again.

[0129] Instead of the control circuit CTRL1, the sensor 2' comprises a control circuit CTRL1'. The control circuit CTRL1' is configured to control the reading phase and the integration phase of the pixels of the matrix 200. The control circuit CTRL1' is configured to provide control signals TG1 and TG2 to the line 204 ( Figure 1 The control circuit CTRL1 ′ is further configured to provide a control signal RD to the line 206 .

[0130] exist Figure 7 In the embodiment of , each line 204 connected to the control circuit CTRL1 ' is perpendicular to the line Vx. Each line 204 is shared by all pixels of the corresponding row of the matrix. Figure 7 In order to avoid complicating the diagram, only one line 204 is shown completely in dashed form. Figure 7 In FIG. 2 , only one line 204 is shown in the row. However, in practice, each pixel receives control signals TG1 and TG2 via two corresponding lines 204 ( Figure 1 ), and therefore each row is associated with one line 204 for sending the signal TG1 to all the pixels of the row, and with another line 204 for sending the signal TG2 to all these pixels.

[0131] Despite Figure 7 Not shown, but other control signals provided to the pixels of the matrix 200 are preferably provided by the control circuit CTRL1 '. Figure 2 As described for the sensor 2, the sensor 2' includes other wires (not shown) to provide other control signals and voltages to the pixels of the matrix 200. For example, Figure 7 In an embodiment of the present invention, the sensor 2' comprises: for each row of the matrix 200, a control signal TGAB ( Figure 1 ) wire; for each row of the matrix 200, for biasing the voltage VAB ( Figure 1 ) is sent to all pixels in the row; for each row of the matrix 200, a voltage GND ( Figure 1 ) is sent to all pixels in the row; for each row of the matrix 200, a conductor for sending the signal RD ( Figure 1 ) is sent to each pixel of the row; for each row of the matrix 200, the signal RD1 ( Figure 1) is sent to all pixels of the row; and for each row of the matrix 200, a conductor for sending the signal RD2 ( Figure 1 ) is sent to all pixels in that row.

[0132] The control circuits CTRL1 ′ and CTRL2 are synchronized, for example, by means of a synchronization circuit SYNC coupling the circuits CTRL1 ′ and CTRL2. In other words, the circuit SYNC receives and / or sends synchronization signals from and / or to the circuits CTRL1 ′ and CTRL2.

[0133] Like the sensor 2, the matrix 200 of the sensor 2' is divided into a plurality of regions, the total number of regions of the matrix preferably being equal to the total number of regions of the scene. Figure 7 In the example of FIG. 2 , the matrix 200 is divided into four regions M1 , M2 , M3 and M4 .

[0134] Each region M1, M2, M3, M4 comprises adjacent lines of pixels 1, these lines of pixels being parallel to the conductive line 204. Figure 7 In the embodiment, each region M1 , M2 , M3 , M4 includes two adjacent lines of pixels 1 parallel to the line 204 , or in other words, each region M1 , M2 , M3 , M4 includes two adjacent lines of pixels 1 .

[0135] As already described for sensor 2 , in sensor 2 ′, matrix 200 and device 205 are arranged relative to one another such that each region M1 , M2 , M3 , M4 of matrix 200 corresponds to a region of the scene.

[0136] and Figure 2 Like the sensor 2 of FIG. 1 , the sensor 2 ′ allows for a scanning illumination of the scene to be captured. As a result, the signal-to-noise ratio of the light received by the sensor 2 ′ is increased compared to the signal-to-noise ratio of the light received by a conventional sensor.

[0137] The control circuit CTRL1′ is configured to provide different control signals TG1 and TG2 to different regions M1, M2, M3 and M4 of the matrix 200. In other words, the control circuit CTRL1′ is configured to independently control the charge transfer in each region M1, M2, M3, M4 of the matrix 200. For example, the control circuit CTRL1′ includes different subcircuits ( Figure 7 ), each sub-circuit is configured to provide a control signal for charge transfer in the pixels of the region M1, M2, M3 or M4 associated with the sub-circuit.

[0138] For example, control circuit CTRL1' is configured to control the integration phase of pixels in any one of regions M1, M2, M3, and M4, while not controlling the integration phase of pixels in other regions. More specifically, when one region of a scene is illuminated by device 205 and light reflected by that region of the scene is received by the corresponding region M1, M2, M3, or M4 of matrix 200, control circuit CTRL1' maintains control signals TG1 and TG2 in an inactive state for the other regions of matrix 200. Control signals TG1 and TG2 are repeatedly switched between active and inactive states only for pixels 1 in regions M1, M2, M3, or M4 receiving light. In other words, control signals TG1 and TG2 are repeatedly switched between active and inactive states only for pixels 1 in the region of matrix 200 corresponding to the illuminated region of the scene, such that, in each pixel of that region of matrix 200, charge is alternately transferred from region PD to each of the pixel's storage regions mem1 and mem2. As a result, the power consumption of the sensor 2 ′ is reduced compared to the power consumption of a typical indirect time-of-flight sensor.

[0139] One advantage of sensor 2 ′ compared to sensor 2 is that the pixels of a given area M1 , M2 , M3 or M4 of matrix 200 of sensor 2 ′ can be read without performing a complete read of matrix 200 , by reading only the rows of this area one by one.

[0140] Figure 8 A diagram illustrating a method according to an embodiment of the present invention is shown. Figure 7 More specifically, in this example, the scene to be captured is divided into 4 areas S1, S2, S3 and S4, and according to the time t, Figure 8 The illumination device 205 ( Figure 7 ) emits light (“light”), which area of S1, S2, S3 or S4 receives the light (“illuminated area of the scene”), the matrix 200 ( Figure 7 ) receives the reflected light and places its pixel in the integration phase ("integration region"), and which pixels of the matrix are read ("read"). In this example, the device 205 emits light in the form of a periodic train of light pulses.

[0141] Figure 8 Timing diagram and Figure 5 Exactly the same except for the reading phase. In fact, Figure 8In operation, after each illumination of an area S1, S2, S3 or S4 of the scene, only the pixels of the area M1, M2, M3 or M4 of the matrix corresponding to this area of the scene are read. In other words, the control circuit CTRL1 ' is configured to control the reading of only the pixels of the area M1, M2, M3 or M4 corresponding to this area S1, S2, S3 or S4 after each illumination of the area S1, S2, S3 or S4 and before the illumination of the next area of the scene. The control circuit CTRL2 is configured to control the device 205 not to emit light during the reading of the pixels of a given area M1, M2, M3 or M4 of the matrix.

[0142] More specifically, in Figure 8 Middle: Only pixels of region M1 are read between times t1 and t2, only pixels of region M2 are read between times t3 and t4, only pixels of region M3 are read between times t5 and t6, and only pixels of region M4 are read between times t7 and t8.

[0143] In sensor 2 ′, the duration of reading the pixels of a given area of the matrix is shortened compared to sensor 2 , since it is no longer necessary to read all the pixels of the matrix in order to read the pixels of a given area of the matrix.

[0144] In an alternative embodiment, the sensor 2' is combined with Figure 6 In such an alternative embodiment, the control circuit CTRL2 is configured to control several consecutive illumination cycles, each illumination cycle comprising a unique illumination of each region S1, S2, S3 and S4 of the scene, before each reading of all pixels (which is controlled by the control circuit CTRL1 '). The control circuit CTRL2 is also configured to control the illumination device 205 not to emit light during the reading of the matrix.

[0145] To take advantage of the fact that line 204 is perpendicular to line Vx, it is proposed to read pixels of a region M1, M2, M3, or M4 of matrix 200 while another region of matrix 200 is receiving light. However, when the pixels of a given region M1, M2, M3, or M4 receiving light are in the integration phase, and when the pixels of another region are simultaneously in the reading phase, it has been shown that the high-frequency commutation of the signal sent to the pixels in the integration phase using line 204 generates noise in the output signal of the pixels in the reading phase, which is available on line Vx. This noise is transmitted, for example, via the reference voltage GND supplied to all pixels of the various circuits and sensors and / or by cross-coupling between line Vx and line 204.

[0146] To suppress this noise, a split ground and biasing strategy is proposed to minimize unwanted coupling. More specifically, the pixel matrix is divided into two isolated halves. In addition, separated or electrically decoupled supply voltages, reference voltages, bias voltages, and control signals are provided to each matrix half. The pixels of one half of the matrix can then be read while integrating the pixels of the other half without generating noise. Different embodiments of indirect time-of-flight sensors that implement this strategy will now be described.

[0147] Figure 9 An indirect time-of-flight sensor 2" is shown according to another embodiment. The sensor 2" is similar to Figure 7 Sensor 2' in the , and only the differences between the two sensors are described in detail. Figure 9 In the figure, the illumination device 205 and its control circuit CTRL2 are not shown.

[0148] In sensor 2 ″, matrix 200 is divided into two halves P1 and P2 . More specifically, the division between the P1 and P2 portions of matrix 200 is parallel to line 204 .

[0149] The P1 and P2 portions of the matrix 200 are adjacent, with the P1 portion positioned along the P2 portion. More specifically, each column includes a first portion or first half belonging to the P1 portion, and a second portion or second half belonging to the P2 portion and aligned with the first portion of the column. For example, the P1 and P2 portions have a common edge corresponding to the separation between the P1 and P2 portions.

[0150] Furthermore, lines Vx, which are parallel to the columns of the matrix and perpendicular to line 204, are interrupted at the division between the P1 and P2 portions of the matrix 200. In other words, lines Vx of the P1 portion of the matrix 200 and lines Vx of the P2 portion of the matrix end at the division between the P1 and P2 portions of the matrix 200. In other words, lines Vx of the P1 portion of the matrix are isolated from lines Vx of the P2 portion of the matrix, and lines Vx of the P1 portion (and respectively the P2 portion) do not extend above or below the P2 portion (and respectively the P1 portion). Figure 9 In order not to complicate the figure, only one line Vx of the P1 portion is represented by a dotted line, and only one corresponding line Vx of the P2 portion is represented by a dotted line.

[0151] When the line Vx of the P2 portion and the line Vx of the P1 portion belong to the same column of the matrix 200, the two lines Vx correspond to each other. For example, in each column of the matrix 200, when the line Vx of the P1 portion is selectively coupled to a given output of a pixel of the P1 portion disposed in the column, the line Vx of the P2 portion corresponds to the line Vx of the P1 portion, and the line Vx is selectively coupled to the corresponding output of the pixel of the P2 portion disposed in the column.

[0152] The P1 portion of the matrix 200 is electrically decoupled from the P2 portion of the matrix 200. More specifically, the semiconductor substrate to which the pixel 1 of the matrix 200 belongs has a first portion that includes the P1 portion of the matrix 200 and a second portion that includes the P2 portion of the matrix 200. In other words, the first portion of the substrate includes the P1 half of the matrix, and the second portion of the substrate includes the P2 half of the matrix.

[0153] The first and second portions of the substrate are isolated from each other using an isolation structure passing through the substrate, preferably an isolation structure disposed between pixels to isolate the pixels from each other.

[0154] Figure 10 According to an example Figure 9 A very schematic top view of two adjacent pixels 1 of a sensor. Figure 11 Shown along Figure 10 1. A very schematic cross-sectional view of plane AA of FIG. 1. In this example, two adjacent pixels 1 belong to the same column of the matrix, but to two different adjacent rows. The pixels 1 are arranged in and on a semiconductor substrate 1003.

[0155] exist Figure 10 and Figure 11 In the example of FIG. 1 , two adjacent pixels are laterally bounded or surrounded by an isolation structure 1000. The isolation structure 1000 is formed between the pixels of FIG. Figure 10 The isolation structure 1000 passes through the substrate 1003. Figure 11 As can be seen in more detail in FIG, the isolation structure 1000 is preferably a capacitive deep trench isolation (CDTI) isolated from a semiconductor substrate 1003 by an isolation layer 1002, i.e., a trench filled with a conductive material 1001. Preferably, the conductive material is a metal (e.g., tungsten or aluminum) or a metal alloy. In fact, the use of metals or metal alloys allows for reduced optical crosstalk.

[0156] In this example, the region PD of each pixel 1 is isolated by a capacitive deep trench 1005 (e.g. Figure 101000 and a portion of the structure 1005 that is opposite and parallel to the portion of the structure 1000. In other words, each memory region mem1, mem2 is laterally bounded in a direction perpendicular to its length by two parallel portions of the respective structures 1000 and 1005.

[0157] In this example, each pixel 1 further comprises transfer devices TGmem1 and TGmem2 , coupling devices TGRD1 and TGRD2 , a transistor 112 , and a selection device 108 , which are shared by two adjacent pixels.

[0158] Figure 10 and Figure 11 The example shown is not limiting. For example, the pixels of the matrix 200 can be arranged into groups of four pixels, with the pixels of each group sharing the same transistor 112 and select device 108. In another example, each pixel of the matrix 200 has its own transistor 112 and select device 108. In addition, the memory regions mem1 and mem2 of each pixel can be defined by a CDTI that is not part of the isolation structure 1000 that laterally defines the pixel.

[0159] In addition, despite the Figure 10 and Figure 11 In the example shown, the isolation structure 1000 is of CDTI type, but in other examples, the isolation structure may be a deep trench insulation (DTI), ie, a trench filled with an isolation material, the DTI passing through the substrate.

[0160] Return Reference Figure 9 , for example, the set of all pixels 1 of the P1 portion of the matrix is surrounded by an isolation structure 1000 delimiting a first portion of the substrate, and the set of all pixels of the P2 portion of the matrix is surrounded by another isolation structure 1000 delimiting a second portion of the substrate.

[0161] The reference voltage GND supplied to the first portion of the substrate and the reference voltage GND supplied to the second portion of the substrate are electrically decoupled from each other. For example, a reference voltage GND supplied to the first portion of the substrate, or in other words, to each pixel of the P1 portion of the matrix, is supplied by a first pad 900 of the sensor 2″, and another reference voltage GND supplied to the second portion of the substrate, or in other words, to each pixel of the P2 portion of the matrix, is supplied by a second pad 902 of the sensor 2″. Each pad 900, 902 receives an off-chip reference voltage GND. Each pad 900, 902 acts as a low-pass filter, such as Figure 9It is schematically represented by a resistor R and an inductor L connected in series in each pad.

[0162] Preferably, the isolation structure 1000 is a CDTI. In this case, it is preferred to provide a bias voltage to the structure 1000 defining the P1 portion of the matrix 200 that is electrically decoupled from the bias voltage provided to the structure 1000 defining the P2 portion of the matrix 200. For example, in Figure 9 , the bias voltage for CDTI 1000 of portion P1 of matrix 200 is provided by voltage generator 904 , and the bias voltage for CDTI 1000 of portion P2 of matrix 200 is provided by voltage generator 906 , which is electrically decoupled from generator 904 .

[0163] Instead of the control circuit CTRL1 ′, the sensor 2 ″ comprises a control circuit CTRL1 . The control circuit CTRL1 ″ is configured to control the reading phase and the integration phase of the pixels of the matrix 200 . The control circuit CTRL1 ″ is configured to provide control signals TG1 and TG2 to the line 204 ( Figure 1 ). The control circuit CTRL1 ″ is further configured to provide a control signal RD to the line 206.

[0164] exist Figure 9 In the embodiment of FIG. 1 , the lines 204 each connected to the control circuit CTRL1 ″ are parallel to the line Vx. Each line 204 is shared by all pixels of the corresponding row of the matrix. Figure 9 In order to avoid complicating the diagram, each part of the matrix P1, P2 has only one line 204 represented by a dotted line. Figure 9 In FIG. 2 , only one line 204 is shown in the row. However, in practice, each pixel receives control signals TG1 and TG2 via two corresponding lines 204 ( Figure 1 ), and therefore each row is associated with one line 204 for sending the signal TG1 to all the pixels of the row, and with another line 204 for sending the signal TG2 to all these pixels.

[0165] Despite Figure 9 Not shown in FIG, but other control signals provided to the pixels of the matrix 200 are preferably provided by the control circuit CTRL1 '. Figure 7 As described above, the sensor 2' includes other wires (not shown) to provide other control signals and voltages to the pixels of the matrix 200. For example, Figure 9 In the embodiment of the present invention, the sensor 2 ″ comprises: for each row of the matrix 200, a control signal TGAB ( Figure 1 ) wire; for each row of the matrix 200, for biasing the voltage VAB ( Figure 1 ) is sent to all pixels in the row; for each row of the matrix 200, a voltage GND ( Figure 1 ) is sent to all pixels in the row; for each row of the matrix 200, a conductor for sending the signal RD ( Figure 1 ) is sent to each pixel of the row; for each row of the matrix 200, the signal RD1 ( Figure 1 ) is sent to all pixels of the row; and for each row of the matrix 200, a conductor for sending the signal RD2 ( Figure 1 ) is sent to all pixels in that row.

[0166] Control circuit CTRL1" and CTRL2( Figure 9 (not shown) for example by means of the synchronization circuit SYNC ( Figure 9 (not shown) for synchronization.

[0167] As for the sensors 2', 2", the matrix 200 of the sensors is divided into a plurality of areas, the total number of areas of the matrix preferably being equal to the total number of areas of the scene. Figure 9 In the example of FIG, the matrix 200 is divided into four regions M1, M2, M3 and M4. Each region M1, M2, M3, M4 includes adjacent lines of pixels 1 parallel to the conductive line 204. Figure 9 In the embodiment of FIG. 2 , each region M1, M2, M3, M4 comprises two adjacent lines of pixels 1 parallel to line 204, or in other words, each region M1, M2, M3, M4 comprises two adjacent lines of pixels 1. As already described for sensors 2 and 2 ′, in sensor 2 ″, matrix 200 and device 205 ( Figure 9 ) are arranged relative to each other so that each region of the scene corresponds to a region M1, M2, M3, M4 of the matrix 200. Figure 9 In the example of , regions M1 and M2 belong to the P1 portion of the matrix 200 , and regions M3 and M4 belong to the P2 portion of the matrix 200 .

[0168] The control circuit CTRL1′ is configured in a manner similar to that for the control circuit CTRL1′ ( Figure 7 ) in the manner described above, different control signals TG1 and TG2 are provided to different regions M1, M2, M3 and M4 of the matrix 200. Figure 7Compared to the control circuit CTRL1′ of the sensor 2′, the control circuit CTRL1″ is further configured to simultaneously control the charge transfer in the pixels of the area of one of the P1 half and the P2 half of the matrix 200, and the reading of the pixels of the area of the other of the P1 half and the P2 half. For example, when the pixels of the area M1 or M2 of the P1 part are in the reading phase (and respectively in the integration phase) controlled by the control circuit CTRL1″, the pixels of the area M3 or M4 of the P2 part are in the integration phase (and respectively in the reading phase) controlled by the control circuit CTRL1″.

[0169] Preferably, for each voltage level supplied to at least one pixel 1 of portion P1 of the matrix 200 and simultaneously to at least one pixel 1 of another portion P2 of the matrix, the sensor 2 ″ comprises a voltage generator configured to supply that voltage level to portion P1 of the matrix, and a voltage generator configured to supply that voltage level to another portion P2 of the matrix. The two generators are electrically decoupled from each other.

[0170] exist Figure 9 In FIG. 2 , for example, this is illustrated for the signals TG1 and TG2 supplied by the control circuit CTRL1 ′ to the line 204. More specifically, when a pixel 1 of the matrix is in the reading phase, in the region PD ( Figure 1 ) with area mem1 and mem2( Figure 1 ) between the transfer devices TGmem1 and TGmem2 ( Figure 1 ) are maintained in an inactive state, which in this example corresponds to a low voltage level TGmemL. The same situation occurs when pixel 1 is neither in the reading phase nor in the integration phase. However, when pixel 1 of the matrix is in the integration phase, in region PD ( Figure 1 ) with area mem1 and mem2( Figure 1 ) between which the charge transfer is performed. Therefore, the transfer devices TGmem1 and TGmem2 ( Figure 1) repeatedly switches between their inactive state (low voltage level TGmemL in this example) and their active state (corresponding to high voltage level TGmemH in this example). As a result, in the sensor 2″, the voltage level TGmemH of the signals TG1 and TG2 is never simultaneously supplied to the pixels of the P1 portion and the pixels of the P2 portion, while the low voltage level TGmemL is simultaneously supplied to the pixels of the P1 portion and the pixels of the P2 portion. Therefore, the sensor 2″ includes a voltage generator 910 configured to supply the voltage level TGmemL to the P1 portion of the matrix 200, and a voltage generator 920 configured to supply the voltage level TGmemL to the P2 portion of the matrix 200. In addition, as Figure 9 As shown, the sensor 2 ″ may comprise only one voltage generator 908 configured to provide a voltage level TGmemH, which may be provided to the P1 part and the P2 part of the matrix, for example, alternatively by the control circuit CTRL1 ″.

[0171] Although only two generators are shown here for voltage level TGmemL, which are electrically decoupled from each other and configured to simultaneously provide the same voltage level to both parts P1 and P2 of the matrix 200, those skilled in the art will be able to implement other pairs of electrically decoupled voltage generators to generate any voltage level that is simultaneously provided to both parts P1 and P2 of the matrix.

[0172] according to Figure 9 In one embodiment shown, sensor 2 ″ includes a first readout circuit READOUT1 coupled to line Vx of the P1 half of matrix 200 , and a second readout circuit READOUT2 coupled to line Vx of the P2 half of matrix 200 .

[0173] Circuit READOUT1 (and respectively READOUT2) is configured to receive output signals of pixels of portion P1 (and respectively portion P2) of matrix 200, and when these pixels are selected, the output signals are coupled to the Vx line of portion P1 (and respectively portion P2). Each read circuit READOUT1 and READOUT2 includes, for example, a plurality of analog-to-digital converters (ADCs), preferably one ADC for each Vx line coupled to the read circuit.

[0174] Circuit READOUT1 receives a reference voltage (ground GND in this example), and circuit READOUT2 receives a reference voltage (ground GND in this example). The reference voltage GND of circuit READOUT1 is electrically decoupled from the reference voltage of circuit READOUT2. For example, the reference voltage GND applied to circuit READOUT1 is provided by the third pad 912 of sensor 2″, and the other reference voltage GND applied to circuit READOUT2 is provided by the fourth pad 914 of sensor 2″. Each pad 912, 914 receives an off-chip reference voltage GND. Each pad 912, 914 acts as a low-pass filter, such as Figure 9 It is schematically represented by a resistor R and an inductor L connected in series in each pad.

[0175] Figure 12 A diagram illustrating a method according to an embodiment of the present invention is shown. Figure 9 More specifically, in this example, the scene to be captured is divided into 4 areas S1, S2, S3 and S4, and according to time, Figure 12 The diagram shows light emitted by the illumination device 205 of the sensor 2″ (“light”), which area of S1, S2, S3, or S4 receives the light (“illuminated area of the scene”), which corresponding area of the areas M1, M2 of the P1 portion or the areas M3, M4 of the P2 portion receives the reflected light and causes its pixels to integrate the light (“integration area of P1” and “integration area of P2”), and which areas of the areas M1, M2 of the P1 portion or the areas M3, M4 of the P2 portion are read (“reading area of P1” and “reading area of P2”). In this example, the device 205 emits light in the form of a periodic train of light pulses.

[0176] Between time t20 and time t21 after time t20, device 205 emits light in direction O1 toward region S1 of the scene. The light reflected by region S1 is received by the corresponding region M1 of portion P1 of the matrix. The integration phase of the received light is completed only in the pixels of region M1, and therefore only in portion P1 of the matrix.

[0177] Between time t21 and time t22, which follows time t21, device 205 emits light in direction O3 toward region S3 of the scene. The light reflected by region S3 is received by the corresponding region M3 in portion P2 of the matrix. The integration phase for the received light is completed only for the pixels in region M3, and therefore only in portion P2 of the matrix. Simultaneously, region M1 of portion P1 of the matrix is read. More specifically, the reading of the pixels in region M1 is controlled by control circuit CTRL1″ and is accomplished by reading the pixels of region M1 row by row.

[0178] Between time t22 and time t23 after time t22, device 205 emits light in direction O2 toward region S2 of the scene. Light reflected by region S2 is received by corresponding region M2 of the matrix, and the integration phase is performed only in the pixels of region M2, and therefore only in portion P1 of the matrix. Simultaneously, region M3 of portion P2 of matrix 200 is read in a manner similar to that of region M1 between times t21 and t22.

[0179] Between time t23 and time t24, which follows time t23, device 205 emits light in direction O4 toward region S4 of the scene. Light reflected by region S4 is received by corresponding region M4 of the matrix, and the integration phase is performed only in the pixels of region M4, and therefore only in portion P2 of the matrix. Simultaneously, region M2 of portion P1 of matrix 200 is read in a manner similar to how region M1 was read between times t21 and t22.

[0180] Between time t24 and time t25, which follows time t24, region M4 of portion P2 of matrix 200 is read similarly to how region M1 was read between time t21 and t22. At time t25, a depth map of the scene can be calculated. More specifically, the depth map is generated based on the output signals of the pixels in region M1 read between time t21 and t22, region M2 read between time t22 and t23, region M3 read between time t23 and t24, and region M4 read between time t24 and t25.

[0181] As in Figure 12 As shown, between times t24 and t25, device 205 can emit light in direction O1 toward region S1 of the scene, so that the reflected light is integrated only by region M1. This allows a new acquisition of the scene to be captured to be initiated, similar to that described between times t20 and t25. In another example, a blanking time is provided after time t25 and before a new acquisition of the scene is performed as described between times t20 and t25.

[0182] Figure 13 In a very schematic manner, a schematic diagram of a circuit according to an embodiment of the present invention is shown. Figure 9 Implementation of the sensor. Figure 13 is a top view of the arrangement of circuits READOUT1 and READOUT2 relative to the matrix 200 .

[0183] In this embodiment, circuit READOUT1 is disposed along a first edge of the matrix 200 on one side of the P1 half of the matrix, and circuit READOUT2 is disposed along a second edge of the matrix on one side of the P2 half of the matrix. The first edge and the second edge are parallel. More specifically, the first edge and the second edge are perpendicular to line Vx( Figure 13 not shown).

[0184] Such an arrangement of the circuits READOUT1 and READOUT2 relative to the matrix 200 is used, for example, when the circuits READOUT1 and READOUT2 belong to the same semiconductor substrate as the matrix 200 .

[0185] Figure 14 In a very schematic manner, a schematic diagram of a circuit according to an alternative embodiment is shown. Figure 9 The implementation of the sensor. Figure 14 is a perspective view of the arrangement of circuits READOUT1 and READOUT2 relative to the matrix 200 .

[0186] exist Figure 14 In an embodiment of the present invention, the matrix belongs to a first semiconductor substrate and the circuits READOUT1 and READOUT2 belong to a second semiconductor substrate. The first substrate is stacked on the second substrate.

[0187] The lines Vx of the P1 portion of the matrix 200 are coupled to the circuit READOUT1, for example, by means of an interconnect structure (not shown) sandwiched between the first substrate and the second substrate. Similarly, the lines Vx of the P2 portion of the matrix 200 are coupled to the circuit READOUT2, for example, by means of the same interconnect structure. Figure 14 In each part P1 , P2 of the matrix 200 , only one line Vx is represented by a dotted line.

[0188] Preferably, if Figure 14 As shown, circuit READOUT1 is disposed under portion P1 of matrix 200 and circuit READOUT2 is disposed under portion P2 of the matrix.

[0189] Figure 14 The embodiment allows to obtain a more compact sensor 2".

[0190] Preferably, the second substrate further comprises digital circuits (for example in CMOS technology), for example circuits for processing the signals provided by the circuits READOUT1 and READOUT2 in order to generate a depth map of the scene.

[0191] Figure 15 Shown Figure 9 An alternative embodiment of the indirect time-of-flight sensor 2" is described in detail only. Figure 9 Sensor 2" with Figure 15 The difference between the sensors 2". Figure 15 In the example, the two portions P1 and P2 of the matrix 200 are spaced apart from each other to simplify the illustration of the sensor 2", although in practice the two portions P1 and P2 are adjacent to each other with the portion P1 being arranged along the portion P2, similar to the one already combined. Figure 9 Descriptive.

[0192] In this alternative embodiment, a first semiconductor substrate comprises the matrix 200 and is located on a second semiconductor substrate, in other words, two substrates, one stacked on top of the other.

[0193] Sensor 2" also includes a commutator 1500. In order to avoid complicating the diagram, Figure 15 Only one commutator 1500 is shown. Commutator 1500 belongs to the second substrate. Preferably, commutator 1500 is arranged below the partition between the two parts P1 and P2 of matrix 200. Sensor 2 ″ comprises as many commutators 1500 as the P1 half of matrix 200 comprises lines Vx.

[0194] Each commutator 1500 includes a first input 1501, a second input 1502, and an output 1503, and is controlled by a signal Sel. Each commutator 1500 is configured to electrically couple its input 1501 to its output 1503 when the signal Sel is in a first state, and to couple its input 1502 to its output 1503 when the signal Sel is in a second state.

[0195] exist Figure 15 In the illustrated alternative embodiment, each commutator 1500 has its input 1501 connected to a line Vx of the P1 portion of the matrix 200 and its input 1502 connected to a corresponding line Vx of the P2 portion of the matrix 200. A line Vx of the P2 portion and a line Vx of the P1 portion correspond to each other when the two lines belong to the same column of the matrix 200. Within each column of the matrix 200, for example, when a line Vx of the P1 portion is selectively coupled to a given output of a pixel of the P1 portion disposed in that column, a line Vx of the P2 portion of the matrix 200 corresponds to a line Vx of the P1 portion of the matrix 200, and the line Vx of the P2 portion is selectively coupled to a corresponding output of a pixel of the P2 portion disposed in that column.

[0196] In this alternative embodiment, instead of two circuits READOUT1 and READOUT2, the sensor 2" comprises only one reading circuit READOUT3. Preferably, the circuit READOUT3 belongs to the same substrate as the commutator 1500. Although in Figure 15In FIG, the line Vx of the P1 portion appears to pass through the circuit READOUT3, as shown by the line Vx of the dotted portion, but this is not the case in practice. Preferably, the reference voltage GND applied to the circuit READOUT3 is provided by the pad 1505 of the sensor 2″, which receives the off-chip reference voltage GND and acts as a low-pass filter, as shown in FIG. Figure 15 1505 is schematically represented by a resistor R and an inductor L connected in series in pad 1505.

[0197] Each commutator 1500 preferably has its output 1503 connected to a circuit READOUT3. For example, the circuit READOUT3 comprises an ADC for each commutator 1500.

[0198] The control circuit (e.g., control circuit CTRL1″) is configured to control the commutators 1500 so that the output 1503 of each commutator is coupled to the input 1501 of the commutator during the reading of pixels in the P1 half of the matrix, and is coupled to the input 1502 of the commutator during the reading of pixels in the P2 half of the matrix. In other words, the circuit for controlling the commutators (control circuit CTRL1″ in this example) is configured to provide a signal Sel in a first state during the reading of pixels in the P1 half of the matrix, and to provide a signal Sel in a second state during the reading of pixels in the P2 half of the matrix.

[0199] exist Figure 15 In the sensor 2″, when reading pixels of the P1 portion (and respectively the P2 portion) of the matrix 200, each line Vx of the P1 portion (and respectively the P2 portion) is coupled to the circuit READOUT3 through the corresponding commutator 1500, and the circuit READOUT3 then receives the output signals of these pixels. In addition, when reading pixels of the P1 portion (and respectively the P2 portion) of the matrix 200, the circuit READOUT3 is isolated from the lines Vx of the P2 portion (and respectively the P1 portion) by the commutator 1500.

[0200] Combined with Figure 9 The sensor described in 2" is compared to Figure 15 The sensor 2" is more compact because it only includes a readout circuit.

[0201] Figure 16 In a very schematic manner, a schematic diagram of a circuit according to an embodiment of the present invention is shown. Figure 15 Implementation of sensor 2". Figure 16 is a perspective view of the arrangement of the circuit READOUT3 and the commutator 1500 relative to the matrix 200 .

[0202] If combined Figure 15 As indicated, the matrix 200 belongs to a first semiconductor substrate ( Figure 16), and the commutator 1500 belongs to the second semiconductor substrate ( Figure 16 ), the first substrate is stacked on the second substrate.

[0203] The lines Vx of the P1 and P2 portions of the matrix 200 are, for example, conductive lines of an interconnect structure sandwiched between a first substrate and a second substrate. In order to avoid complicating the diagram, Figure 16 Only one line Vx of the P1 portion and a corresponding line Vx of the P2 portion are shown.

[0204] The commutator 1500 is disposed below the division between the P1 and P2 portions of the matrix 200 , or in other words, below the common edge of the P1 and P2 portions of the matrix 200 .

[0205] In this particular embodiment, the circuit READOUT3 belongs to the same substrate as the commutator 1500. The circuit READOUT3 is preferably arranged below the matrix 200, for example as Figure 16 Below is the P2 portion of the matrix represented.

[0206] Preferably, the second substrate further comprises digital circuits (for example in CMOS technology), for example circuits for processing the signal provided by the circuit READOUT3 in order to generate a depth map of the scene.

[0207] For example, combined with Figure 15 and Figure 16 The described embodiment corresponds to the case where the pitch of the inputs of the circuit READOUT3 , each of which is connected to an output 1503 of a corresponding commutator 1500 , is equal to or narrower than the pitch of the pixels 1 of the matrix 200 between two adjacent columns of the matrix 200 .

[0208] Figure 17 Shown Figure 9 Another alternative embodiment of the sensor 2". This document only describes in detail Figure 15 Sensor 2" with Figure 17 The difference between the sensors is 2".

[0209] In this alternative embodiment, the sensor 2″ comprises two read circuits READOUT4 and READOUT5 instead of the read circuit READOUT3. Preferably, the circuits READOUT4 and READOUT5 belong to the same substrate as the commutator 1500. Although in Figure 17, the line Vx of the P1 portion (and the P2 portion, respectively) appears to pass through the circuit READOUT4 (and the READOUT5, respectively), as shown by the line Vx of the dotted portion, but this is not the case in practice. Preferably, the reference voltage GND applied to the circuit READOUT4 is provided by the pad 1700 of the sensor 2", and the reference voltage GND applied to the circuit READOUT5 is provided by the pad 1702 of the sensor 2". Each of the pads 1700 and 1702 receives the off-chip reference voltage GND and acts as a low-pass filter, as shown in FIG. Figure 17 It is schematically represented by a resistor R and an inductor L connected in series in each pad.

[0210] like Figure 15 As shown, each commutator 1500 has its input 1501 connected to a line Vx of the matrix P1 portion and its input 1502 connected to a corresponding line Vx of the matrix P2 portion.

[0211] However, in Figure 17 In the embodiment of the present invention, each commutator 1500 connected to a line Vx of an odd column of the matrix 200 connects its output 1503 to the circuit READOUT4, while each commutator 1500 connected to a line Vx of an even column of the matrix 200 connects its output 1503 to the circuit READOUT5. Each circuit READOUT4, READOUT5 comprises, for example, an ADC for coupling (preferably connected) to each commutator 1500 of the circuit.

[0212] If combined Figure 15 As indicated, the control circuit (e.g. control circuit CTRL1") is configured to control the commutators 1500 so that the output 1503 of each commutator is coupled to the first input 1501 of the commutator during reading of pixels of the P1 half of the matrix and to the second input 1502 of the commutator during reading of pixels of the P2 half of the matrix.

[0213] exist Figure 17In the sensor 2″, when reading pixels of the P1 portion (and the P2 portion, respectively) of the matrix 200, for each line Vx of the P1 portion (and the P2 portion, respectively), when the line Vx belongs to an odd column of the matrix 200, the corresponding commutator 1500 couples the line Vx to the circuit READOUT4, and when the line Vx belongs to an even column of the matrix 200, the corresponding commutator 1500 couples the line Vx to the circuit READOUT5, so that each output signal of each of these pixels is received by the circuit READOUT4 or the circuit READOUT5. In addition, during the reading of the pixels of the P1 portion (and the P2 portion, respectively), the circuits READOUT4 and READOUT5 are isolated from the lines Vx of the P2 portion (and the P1 portion, respectively) by the commutator 1500.

[0214] Preferably, commutator 1500 is disposed under the space between P1 and P2 portions of matrix 200. Preferably, circuit READOUT4 is disposed under one of P1 and P2 portions of matrix 200, and circuit READOUT5 is disposed under the other of P1 and P2 portions.

[0215] Figure 18 In a very schematic manner, a schematic diagram of a circuit according to an embodiment of the present invention is shown. Figure 17 Implementation of sensor 2". Figure 18 is a perspective view of the arrangement of the circuits READOUT4 and READOUT5 and the commutator 1500 relative to the matrix 200 .

[0216] If combined Figure 17 As indicated, the matrix 200 belongs to a first semiconductor substrate ( Figure 18 ), and the commutator 1500 belongs to the second semiconductor substrate ( Figure 18 ), the first substrate is stacked on the second substrate.

[0217] The lines Vx of the P1 and P2 portions of the matrix 200 are, for example, conductive lines of an interconnect structure sandwiched between a first substrate and a second substrate. In order to avoid complicating the diagram, Figure 18 Only one line Vx of the P1 portion and a corresponding line Vx of the P2 portion are shown.

[0218] The commutator 1500 is disposed under the space between the P1 portion and the P2 portion of the matrix 200 , or in other words, under the common edge of the P1 portion and the P2 portion of the matrix 200 .

[0219] In this particular embodiment, circuits READOUT4 and READOUT5 belong to the same substrate as commutator 1500. Circuit READOUT4 is disposed under one of the P1 and P2 portions of matrix 200, and circuit READOUT5 is disposed under the other of the P1 and P2 portions. Figure 18 In the example of FIG. 5 , circuit READOUT4 is disposed under the P1 portion of the matrix, and circuit READOUT5 is disposed under the P2 portion of the matrix.

[0220] Preferably, the second substrate further comprises digital circuits (for example in the form of CMOS technology), such as circuits for processing the signals provided by the circuits READOUT4 and READOUT5 in order to generate a depth map of the scene.

[0221] For example, combined with Figure 17 and Figure 18 The described embodiment corresponds to the case where the pitch of the inputs of circuits READOUT4 and READOUT5 is greater than the pitch of the pixels 1 of the matrix 200 between two adjacent columns of the matrix 200 , each input of which is connected to an output 1503 of a corresponding commutator 1500 .

[0222] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these embodiments may be combined and that other variations will readily occur to those skilled in the art. Specifically, although in the above-described embodiments the scene to be captured is divided into only four regions S1, S2, S3 and S4, the illumination device 205 is configured to direct light to each of the regions S1, S2, S3, S4 of the scene by illuminating only one region at a time, and the matrix 200 is divided into four corresponding regions M1, M2, M3 and M4, those skilled in the art are able to implement embodiments in which the scene is divided into more than (or less than) four regions, the device 205 is configured to independently illuminate each of these regions of the scene, and the matrix 200 is divided into a plurality of regions such that each region of the matrix corresponds to an area of the scene. Furthermore, those skilled in the art are able to implement embodiments in which the pixels of the matrix 200 are different from those in the combined Figure 1 The embodiments of the pixel 1 are described, and more particularly with respect to the combination Figure 10 and Figure 11 Specific examples described.

[0223] Finally, based on the functional description provided above, the actual implementation of the embodiments and variations described herein is within the capabilities of those skilled in the art.

Claims

1. An indirect time-of-flight sensor, comprising: a matrix of pixels, wherein each pixel in the matrix comprises a photoconversion region, the photoconversion region being coupled to at least two sets of memory circuits, each set of memory circuits comprising a charge storage region and a controllable transfer device for transferring charge from the photoconversion region to the storage region; first conductive lines extending parallel to each other and configured to send a first control signal to the controllable transfer device; a first circuit configured to provide the first control signal to the first wire; an illumination device configured to illuminate a scene, the scene being divided into a plurality of first regions; as well as a second circuit configured to control the illuminating device to continuously illuminate each first area; wherein the pixel matrix is divided into a plurality of second regions, each second region comprising adjacent lines of pixels parallel to the first conductive lines, and wherein each first region corresponds to one second region among the second regions; and The first circuit is configured to provide different first control signals to different second areas, wherein the first control signal repeatedly switches between an effective state and an ineffective state only for pixels in the second area corresponding to the illuminated first area.

2. The sensor of claim 1 , wherein the illumination device comprises an array of laser light sources and an optical device configured to direct light emitted by the array of laser light sources toward the scene, and wherein: The laser light source array is divided into a plurality of laser light source sets, each laser light source set is configured to illuminate a corresponding one of the first areas, and the second circuit is configured to control the laser light source sets one by one.

3. The sensor of claim 1 , wherein the illumination device comprises an array of laser light sources and an optical device configured to direct light emitted by the array of laser light sources toward the scene, and wherein: The optical device is configured to guide the emitted light differently according to a control signal, and the second circuit is configured to provide the control signal each time one of the first areas is illuminated, resulting in the light being directed to the one of the first areas.

4. The sensor according to claim 1, wherein: The sensor includes a second conductive line extending parallel to the first conductive line and configured to receive an output signal of the pixel; Each pixel includes a selection device configured to selectively couple an output of the pixel to at least one corresponding second conductive line; and The first circuit is configured to provide a second control signal to the selection device via a third conductive line, the third conductive line extending perpendicular to the second conductive line. 5 . The sensor of claim 4 , wherein the first circuit is configured to control, using the second signal, reading of all pixels after each illumination of one of the first areas and before illumination of a next one of the first areas.

6. The sensor according to claim 4, wherein the second circuit is configured to control several consecutive illumination cycles before each reading of all pixels controlled by the first circuit, each illumination cycle comprising a unique illumination of each first area, and to control the illumination device not to emit light during the reading.

7. The sensor according to claim 1, wherein: The sensor includes second conductive lines extending parallel to each other and perpendicular to the first conductive lines, the second conductive lines being configured to receive output signals of the pixels; Each pixel includes a selection device configured to selectively couple an output of the pixel to at least one corresponding second conductive line; and The first circuit is configured to provide a second control signal to the selection device via a third conductive line, the third conductive line being perpendicular to the second conductive line.

8. The sensor according to claim 7 , wherein the second circuit is configured to control several consecutive illumination cycles before each reading of all pixels controlled by the first circuit, each illumination cycle comprising a unique illumination of each first area, and to control the illumination device not to emit light during the reading. 9 . The sensor according to claim 7 , wherein the first circuit is configured to control reading of only pixels of the second area corresponding to one of the first areas after each illumination of the one of the first areas. 10 . The sensor according to claim 9 , wherein the second circuit is configured to control the illumination device not to emit light when the first circuit controls reading of pixels in the second area.

11. The sensor according to claim 9, wherein: the matrix being divided into a first half and a second half, the partition between the first half and the second half being parallel to the first conductor, and the second conductor of each half terminating at the partition; The first circuit is configured to simultaneously control charge transfer in pixels of a second region of one of the first half and the second half and readout of pixels of a second region of the other of the first half and the second half; A first portion of the semiconductor substrate comprises a first half of the matrix, and a second portion of the semiconductor substrate comprises a second half of the matrix; an isolation structure passing through the semiconductor substrate to isolate the first portion and the second portion of the substrate from each other; and A reference voltage provided to the first portion of the semiconductor substrate is electrically decoupled from a reference voltage provided to the second portion of the semiconductor substrate.

12. The sensor according to claim 11, wherein For each voltage level supplied to at least one pixel of the first half of the matrix and simultaneously to at least one pixel of the second half of the matrix, the sensor comprises a first generator of the voltage level for the first half and a second generator of the voltage level for the second half, the first generator and the second generator being electrically decoupled from each other.

13. The sensor according to claim 11, comprising: a first readout circuit coupled to a second conductor of the first half of the matrix, and A second readout circuit is coupled to a second conductive line of the second half of the matrix, a reference voltage of the first readout circuit being electrically decoupled from a reference voltage of the second readout circuit.

14. The sensor of claim 13, wherein the first readout circuit is disposed on one side of the first half along a first edge of the matrix, and the second readout circuit is disposed on one side of the second half along a second edge of the matrix, the first edge and the second edge being parallel.

15. The sensor according to claim 11, wherein: The semiconductor substrate comprising the pixel matrix is located above another semiconductor substrate comprising a commutator, the commutator being arranged below the partition between the first half and the second half of the matrix; Each commutator includes a first input connected to one of the second conductors of the first half, a second input connected to a corresponding second conductor of the second half, and an output configured to be selectively coupled to one of the inputs; and The sensor includes a readout circuit connected to an output of each commutator, the readout circuit being provided on the other semiconductor substrate.

16. A sensor according to claim 15, comprising a control circuit, which is configured to control the commutators so that the output of each commutator is coupled to the first input of the commutator during the reading of the pixels of the first half of the matrix, and is coupled to the second input of the commutator during the reading of the pixels of the second half of the matrix.

17. The sensor according to claim 11, wherein: The semiconductor substrate comprising the pixel matrix is located above another semiconductor substrate comprising a commutator, the commutator being arranged below the partition between the first half and the second half of the matrix; Each commutator includes a first input connected to one of the second conductors of the first half, a second input connected to a corresponding second conductor of the second half, and an output configured to be selectively coupled to one of the first input and the second input; The pixels of the matrix are arranged in columns, the columns being parallel to the second conductive line; Each commutator connected to the second conductor of the odd-numbered columns has its output connected to the first reading circuit; Each commutator connected to the second conductor of the even-numbered columns has its output connected to the second reading circuit; and The first readout circuit and the second readout circuit are on the other semiconductor substrate.

18. A sensor according to claim 17, comprising a control circuit, which is configured to control the commutators so that the output of each commutator is coupled to the first input of the commutator during the reading of the pixels of the first half of the matrix, and is coupled to the second input of the commutator during the reading of the pixels of the second half of the matrix.

Images