Method, electronic device and storage medium for reducing multidimensional vectors

Abstract

The present invention relates to electronic devices, methods, and readable storage media for regulating multidimensional image vectors. The processing device of the present invention is included in an integrated circuit device, which includes a universal interconnect interface and a computing device. The computing device and the processing device interact to jointly perform user-specified computing operations. The integrated circuit device may also include a storage device, which is connected to the computing device and the processing device, respectively, for storing data in the computing device and the processing device.

Description

Technical Field

[0001] The present invention generally relates to the field of neural networks and, more particularly, to a method for reducing a multi-dimensional image vector, an electronic device, and a readable storage medium. Background Art

[0002] When processing image vectors, reduction is often used to compress the dimensions of the image vectors. In multi-axis reduction scenarios, the general multi-axis reduction is converted into a single-axis reduction, which is then repeated to complete the multi-axis reduction calculation. This general multi-axis reduction scheme has the following problems: Each single-axis reduction requires a temporary workspace to store the temporary results, wasting memory space; and reading the temporary results from the workspace for the next reduction is redundant I / O, significantly impacting operator performance.

[0003] The TensorFlow framework's solution for non-contiguous multi-axis reductions is to first transpose the input vector (tensor) to transfer all dimensions to be reduced to the tensor's lower dimensions, and then perform the reduction on the lower dimensions. This solution has two drawbacks: it requires configuring a transpose operator, which incurs computational and I / O overhead; and the transpose calculation results require a temporary workspace to store intermediate results, which consumes additional memory.

[0004] Therefore, it can be seen that no matter which existing solution is used, it is not ideal. In order to solve the above problem, the present invention proposes a multi-axis reduction solution for multi-dimensional vectors. Summary of the Invention

[0005] In order to at least partially solve the technical problems mentioned in the background technology, the solution of the present invention provides a method for reducing a multi-dimensional image vector, a readable storage medium and an electronic device.

[0006] In one aspect, the present invention discloses a method for reducing a multidimensional image vector, characterized in that the method includes: setting the dimension of the image vector as a reduction group; determining the first axis to be reduced in the reduction group in a specific order; dividing the reduction group into a first basic block and a second basic block based on the axis to be reduced, wherein the first basic block includes all dimensions of the image vector before the axis to be reduced, and the second basic block includes all dimensions of the image vector after the axis to be reduced; judging whether there is an axis to be reduced in the second basic block; if so, performing the following steps: updating the reduction group with all dimensions in the second basic block; and performing the determining, dividing, and judging steps until there is no axis to be reduced in the second basic block; and performing cumulative operations on the at least one first basic block and the at least one second basic block to obtain the reduction result of the image vector.

[0007] In another aspect, the present invention discloses an electronic device, characterized in that it includes: a processor; a memory for storing executable instructions; wherein the processor is configured to call the instructions stored in the memory to execute the above method.

[0008] In another aspect, the present invention discloses a computer-readable storage medium storing computer program instructions for reducing a multi-dimensional image vector, wherein the computer program instructions implement the above method when executed by a server.

[0009] The present invention determines the axes to be reduced based on the dimensionality of the image vector and calculates the basic block size corresponding to each axis. Based on the basic blocks, cumulative operations are performed on multiple axes to be reduced simultaneously, completing the reduction operations on multiple axes in one go. This eliminates the generation of intermediate variables, saving temporary space and avoiding multiple intermediate I / O operations. The present invention transforms multiple reduction operations on multidimensional vectors into a single cumulative operation on the multidimensional vector data, improving computational efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above and other objects, features and advantages of the exemplary embodiments of the present invention will become readily understood by reading the detailed description below with reference to the accompanying drawings. In the accompanying drawings, several embodiments of the present invention are shown in an exemplary and non-limiting manner, and the same or corresponding reference numerals represent the same or corresponding parts.

[0011] Figure 1 1 is a schematic diagram showing the structure of a board according to an embodiment of the present invention;

[0012] Figure 2 is a structural diagram showing an integrated circuit device according to an embodiment of the present invention;

[0013] Figure 3 is a schematic diagram illustrating a multi-axis reduction according to an embodiment of the present invention;

[0014] Figure 4 is a method flow chart illustrating an embodiment of the present invention;

[0015] Figure 5 is a schematic diagram illustrating an embodiment of the present invention;

[0016] Figure 6 is a method flow chart illustrating an embodiment of the present invention;

[0017] Figure 7 is a method flow chart illustrating an embodiment of the present invention;

[0018] Figure 8 is a schematic diagram illustrating an embodiment of the present invention; and

[0019] Figure 9 is a diagram showing an apparatus according to an embodiment of the present invention. DETAILED DESCRIPTION

[0020] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work shall fall within the scope of protection of the present invention.

[0021] It should be understood that the terms "first," "second," "third," and "fourth," etc. in the claims, description, and drawings of the present invention are used to distinguish different objects, rather than to describe a specific order. The terms "comprise" and "comprising" used in the description and claims of the present invention indicate the presence of the described features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or combinations thereof.

[0022] It should also be understood that the terminology used in this specification is for the purpose of describing specific embodiments only and is not intended to limit the present invention. As used in the specification and claims, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should further be understood that the term "and / or" as used in the specification and claims refers to any and all possible combinations of one or more of the associated listed items, including and including these combinations.

[0023] As used in this specification and claims, the term "if" may be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context.

[0024] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0025] Figure 1 FIG. 1 is a schematic diagram showing the structure of a board 10 according to an embodiment of the present disclosure. Figure 1 As shown, board 10 includes chip 101, which is a system-on-chip (SoC), or system-on-chip, integrated with one or more combined processing devices. The combined processing device is an artificial intelligence computing unit that supports various deep learning and machine learning algorithms to meet the intelligent processing needs in complex scenarios in fields such as computer vision, speech, natural language processing, and data mining. In particular, deep learning technology is widely used in the field of cloud intelligence. A notable feature of cloud-based intelligent applications is the large amount of input data, which places high demands on the platform's storage and computing capabilities. Board 10 of this embodiment is suitable for cloud-based intelligent applications and has extensive off-chip storage, on-chip storage, and a large amount of computing power.

[0026] Chip 101 is connected to external device 103 via external interface device 102. External device 103 may be, for example, a server, computer, camera, monitor, mouse, keyboard, network card, or Wi-Fi interface. Data to be processed can be transmitted from external device 103 to chip 101 via external interface device 102. Calculation results from chip 101 can be transmitted back to external device 103 via external interface device 102. Depending on the application scenario, external interface device 102 may have different interface formats, such as a PCIe interface.

[0027] Board 10 also includes a memory device 104 for storing data, which includes one or more storage units 105. Memory device 104 is connected to a control device 106 and chip 101 via a bus for data transmission. Control device 106 in board 10 is configured to control the state of chip 101. To this end, in one application scenario, control device 106 may include a microcontroller (MCU).

[0028] Figure 2 FIG. 1 is a block diagram showing the combined processing device in the chip 101 of this embodiment. Figure 2 As shown in , the combined processing device 20 includes a computing device 201 , an interface device 202 , a processing device 203 and a DRAM 204 .

[0029] The computing device 201 is configured to perform user-specified operations and is mainly implemented as a single-core intelligent processor or a multi-core intelligent processor to perform deep learning or machine learning calculations. It can interact with the processing device 203 through the interface device 202 to jointly complete the user-specified operations.

[0030] Interface device 202 is used to transmit data and control instructions between computing device 201 and processing device 203. For example, computing device 201 can obtain input data from processing device 203 via interface device 202 and write it to a storage device on-chip of computing device 201. Furthermore, computing device 201 can obtain control instructions from processing device 203 via interface device 202 and write them to a control cache on-chip of computing device 201. Alternatively or optionally, interface device 202 can also read data from the storage device of computing device 201 and transmit it to processing device 203.

[0031] The processing device 203 is a general processing device that performs basic controls including but not limited to data handling, starting and / or stopping the computing device 201. Depending on the implementation, the processing device 203 can be a central processing unit (CPU), a graphics processing unit (GPU) or one or more types of processors in other general and / or special processors, which include but are not limited to digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc., and their number can be determined according to actual needs. As mentioned above, with respect to the computing device 201 disclosed herein, it can be regarded as having a single-core structure or a homogeneous multi-core structure. However, when the computing device 201 and the processing device 203 are integrated and considered together, the two are regarded as forming a heterogeneous multi-core structure.

[0032] The DRAM 204 is used to store data to be processed. It is a DDR memory, typically 16G or larger, and is used to store data of the computing device 201 and / or the processing device 203 .

[0033] In neural network operations, many operators have reduction functions, such as layernorm, batchnorm, groupnorm, weightnorm, and normalize. These operators require reduction computations within their internal implementation. Image and video processing falls within the field of computer vision, and these tasks are primary applications of neural network operations, making extensive use of normalization operators. Speech recognition and natural language processing, for example, are primarily based on the Transform-BERT network, which makes extensive use of reduction operators. The Transform-BERT network fully utilizes the attention mechanism to solve natural language translation problems. This mechanism, modeled after human attention, is designed to quickly filter out high-value information from a large amount of information. It is used to address the difficulty of obtaining a reasonable final vector representation for long input sequences in models with time series (such as LSTM / RNN models). This approach preserves the model's intermediate results, learns them with a new model, and associates them with the output to achieve information filtering. Neural networks execute these operators to process images, speech, video, and other data.

[0034] The following describes several basic concepts of vector (tensor) reduction operations.

[0035] Vector reduction: This involves reducing the dimensions of a vector to unity by calculating the corresponding axes to be reduced. Reduction essentially involves dimensionality reduction, but there are many ways to do this: sum, mean, product, and maximum. The most common method is summation.

[0036] Vector shape: describes the dimensions of a vector. For example, a two-dimensional vector with a shape of (2,3) means that the first and second dimensions of the two-dimensional vector are 2 and 3, respectively. In layman's terms, the two-dimensional vector is a vector with two rows and three columns.

[0037] Axis: Identifies the dimension of a vector to be reduced. Dimension and axis are different ways of representing the dimensions of a vector. For example, axis = 0 means reducing the first dimension of the vector.

[0038] This example uses the most common four-dimensional tensor to explain the above concepts. The shape of a four-dimensional tensor can be described as nchw, representing the data format of the feature map, which includes the dimensions n, c, h, and w. n represents the batch, h represents the height, w represents the width, and c represents the channel. Taking image data as an example, n represents the number of images in the batch, h represents the number of vertical pixels in the image, w represents the number of horizontal pixels, and c represents the number of channels (for example, c is 1 for a black and white image and 3 for an RGB color image). This shape corresponds to the dimensions. If arranged in the nchw order, the nth dimension can be called the 0th dimension (axis 0). Reduction in the nth dimension is said to be reduction on axis 0, meaning that multiple batches are compressed into one. Similarly, reduction in the cth dimension is said to be reduction on axis 1, meaning that multiple channels are compressed into one channel. Reduction in the hth dimension is said to be reduction on axis 2, meaning that the height is compressed into one. The specific dimension to be reduced depends mainly on the specific application scenario.

[0039] Taking the reduction of a two-dimensional tensor image in a summation manner as an example, the reduction process is specifically described. This process is applied to the above-mentioned board 10 or combination device 20 and its processor.

[0040] Assume a two-dimensional image vector with a shape of (2,3), which means the first dimension and second dimension of the two-dimensional vector are 2 and 3 respectively. The two-dimensional vector is a vector with two rows and three columns. Assume the specific data of the two-dimensional vector is Axis=0 means that the processor performs a reduction operation on the first dimension of the vector, compresses the first dimension of the image vector to one, and reduces the shape (2,3) to (1,3). Specifically, the reduction is performed in the 0 dimension, and the tensor is accumulated in the 0 dimension direction (column direction), and two rows are turned into one row. Specifically, 1+4=5, 2+5=7, 3+6=9, and the result is [5,7,9], and the shape changes from (2,3) to (1,3). After the reduction, the vector of two rows and three columns is converted into a vector of one row and three columns. Similarly, assuming axis=1, it means that the processor reduces the second dimension of the two-dimensional tensor to one column. Reduce the shape (2,3) to (2,1), accumulate in the row direction, and compress the row into one column. That is, 1+2+3=6, 4+5+6=15, so the result of the reduction is For example, for a 5-dimensional tensor with a shape of (3, 6, 2, 3, 4), if its third axis (axis = 2) is reduced, the reduced dimensions are (3, 6, 1, 3, 4).

[0041] From the above example, we can see that reduction is the compression of dimensions, which can reduce storage space.

[0042] Natural language processing is a task that analyzes words, sentences, semantics, or information. In natural language processing tasks (NLP tasks), reduction is often used, and the reduction scenario is often multi-axis reduction. For example, in NLP tasks, the weightnorm operator is a relatively common operator. The function of this operator is to normalize the weight w of the convolutional layer and extract the direction vector v and magnitude vector g of w. If the dimension of the input w is nchw, then the dimension of the output v is nchw. Normalizing the weights means compressing the weights of each dimension into one dimension. The c dimension represents the number of channels and does not include weights. Therefore, the c dimension is not compressed. The final dimension of g is 1c11. At this time, the process of calculating g includes the process of multi-axis reduction, and the n-axis, h-axis, and w-axis are reduced at the same time.

[0043] Multi-axis reduction refers to the reduction operation on multiple dimensions in a multi-dimensional vector. In single-axis reduction, axis is a number, while in multi-axis reduction, axis is an array, which may be two, three, or even more numbers. Furthermore, when reducing multiple axes, the multiple axes can be continuous or discontinuous. For example, the example of the weightnorm operator mentioned above is a discontinuous reduction. For another example, for a 5-dimensional tensor, its shape and size are (3, 6, 2, 3, 4). When multi-axis reduction is performed on this 5-dimensional tensor, when axis = [1, 2], the dimensions after reduction are (3, 1, 1, 3, 4), which is a continuous multi-axis reduction; when axis = [1, 3], the dimensions after reduction are (3, 1, 2, 1, 4), which is a discontinuous multi-axis reduction.

[0044] Figure 3 The diagram of multi-axis reduction is shown in Figure 2. The input data is a five-dimensional vector with dimensions (3, 6, 2, 3, 4) and axis = [1, 3] for reduction. Figure 3As shown, the processor first loads the five-dimensional vector into the first storage space, and then the processor performs a reduction operation on the second dimension of the five-dimensional vector stored in the first storage space, that is, the dimension corresponding to axis=1, to obtain a temporary result (3,1,2,3,4). At the same time, the processor opens up a second storage space as a temporary space to store the obtained temporary result (3,1,2,3,4). Next, the processor reads the intermediate result from the second storage space, and then performs a reduction operation on the dimension corresponding to axis=3 to obtain the final reduced result (3,1,2,1,4), and stores the final reduced result in the first storage space overwriting the original five-dimensional vector. Among them, the above-mentioned first storage space and second storage space can be the storage device 104 in the board 10 or the DRAM 204 in the combination device 20. The processor is the processing device 204 in the combination device.

[0045] In summary, the multi-axis reduction method is implemented through a loop of single-axis reductions. Each temporary result obtained after the reduction requires a temporary storage space, wasting memory. Saving the temporary result to the temporary storage space and then reading data from the temporary storage space for the next reduction step involves repeated I / O, impacting operator performance.

[0046] In view of the multi-axis reduction scenario, an embodiment of the present invention provides an efficient multi-axis reduction method, which is applied to the processing device 204 in the above-mentioned board 10 or combination device 20 . Figure 4 A flow chart showing this method is shown.

[0047] Step 401: Set the dimension of the image vector to a reduction group. The dimension of the image vector is described by the shape of the image. The dimension of the vector is set to a reduction group according to the shape of the image vector. Figure 5 A schematic diagram of an embodiment of the present invention is shown. This embodiment takes a 5-dimensional tensor (2, 3, 2, 3, 6) as an example. Stage 501 shows that the vector is stored in the first storage space, and its shape and size are (2, 3, 2, 3, 6). The dimension of the vector is set to the reduction group, that is, the reduction group is (2, 3, 2, 3, 6).

[0048] Step 402: Determine the first axis to be reduced in the reduction group in a specific order. The vector to be reduced includes one or more axes to be reduced, and the reduction group includes all dimensions of the vector. First, determine the first axis to be reduced in the reduction group in a specific order. The specific order can be a forward or reverse order. Forward refers to the order from left to right along the reduction group, while reverse refers to the order from right to left along the reduction axes. In addition, the specific order can also be an order along a certain direction along any dimension, and the present invention does not impose any limitations on this.

[0049] Assume that the axis to be reduced for the 5-dimensional tensor in stage 501 is axis = [1, 3], indicating that the axes to be reduced for the vector are the second and fourth dimensions. If the first axis to be reduced is determined in the above reduction group in the forward order, from left to right, the first axis to be reduced is dimension 51. If the first axis to be reduced is determined in the above reduction group in the reverse order, from right to left, the first axis to be reduced is dimension 52. This embodiment uses the reverse order as an example, and the first axis to be reduced is dimension 52.

[0050] Step 403: Based on the axis to be reduced, the reduction group is divided into a first basic block and a second basic block, wherein the first basic block includes all dimensions of the image vector before the axis to be reduced, and the second basic block includes all dimensions of the image vector after the axis to be reduced.

[0051] Split the reduction group into two parts, centering on the first axis to be reduced. The first or second basic block of the division contains zero, one, or multiple dimensions. When the first axis in the reduction group is the axis to be reduced, there are no dimensions before it. In this case, when the reduction group is partitioned around the axis to be reduced, the first basic block is an empty set. Similarly, when the first axis to be reduced is the last axis in the reduction group, there are no dimensions after it. In this case, when the reduction group is partitioned around the axis to be reduced, the second basic block is an empty set.

[0052] In this embodiment, the dimensions before and after the axis to be reduced are relative. For the forward order, the dimension to the left of the axis to be reduced is before the axis to be reduced, and the dimension to the right of the axis to be reduced is after the axis to be reduced; for the reverse order, the dimension to the right of the axis to be reduced is before the axis to be reduced, and the dimension to the left of the axis to be reduced is after the axis to be reduced.

[0053] Based on the reverse order, after determining that the first axis to be reduced is dimension 52, stage 502 divides the reduction group into basic blocks according to the first axis to be reduced. As shown in stage 502, the reduction group is divided into two parts: a first basic block 513 and a second basic block 523. The first basic block 513 includes the dimension corresponding to (6), and the second basic block 513 includes the dimension corresponding to (2, 3, 2).

[0054] Step 404: Determine whether there is an axis to be reduced in the second basic block.

[0055] If there are axes to be reduced in the second basic block, step 405 is executed to update the reduction group using all dimensions in the second basic block. Based on the updated reduction group, the process returns to step 402 and executes steps 402-404 to create a corresponding first basic block and a corresponding second basic block until the second basic block no longer has axes to be reduced. The number of reduction group updates and the number of first basic blocks and second basic blocks generated corresponds to the number of dimensions to be reduced in the image vector.

[0056] exist Figure 5 According to stage 502, the second basic block 523 is (2, 3, 2). Since axis = [1, 3], the second basic block 523 (2, 3, 2) has an axis to be reduced. Then, all dimensions in the second basic block 523 are updated to form a reduction group. The updated reduction group is (2, 3, 2). Repeat the above determination step, division step, and interpretation step. At this time, the first axis to be reduced in the reduction group is dimension 51. In stage 503, the vector is divided into the first basic block 533, i.e., (2, 3, 6), and the second basic block 543, i.e., (2) according to the first axis to be reduced. It is determined that the second basic block 543 does not have an axis to be reduced, and then step 406 is executed.

[0057] Step 406: Perform a cumulative operation on at least one first basic block and at least one second basic block to obtain a reduced result of the image vector.

[0058] As can be seen from step 405 above, each axis to be reduced in the vector corresponds to a set of first basic blocks and second basic blocks. When there is only one axis to be reduced in the vector, one first basic block and one second basic block are generated. When there are multiple axes to be reduced in the vector, multiple first basic blocks and second basic blocks are generated.

[0059] Figure 5 The example generates two first basic blocks and two second basic blocks, namely the first basic block 513 and the second basic block 523, and the first basic block 533 and the second basic block 543. Cumulative operations are performed based on the generated first basic blocks 513, 533 and the second basic blocks 523, 543 to obtain the reduction result of the image vector. The cumulative operations correspond to the reduction methods one by one. If the image vector is reduced in a summation manner, the cumulative operation is an addition operation; if the image vector is reduced in a product manner, the cumulative operation is a multiplication operation. The reduction methods include one of summation, averaging, multiplication, maximum value and minimum value, and the corresponding cumulative operations include one of cumulative summation, averaging, multiplication, maximum value and minimum value.

[0060] This embodiment first finds the basic block values ​​and offset values ​​corresponding to all axes to be reduced, takes out all values ​​from the first storage space at one time for calculation based on the offset value, and stores the final result back in the first storage space. According to the basic block and offset, (2, 3, 2, 3, 6) is directly reduced to (2, 1, 2, 1, 6) through one-step calculation, and the result is stored in the first storage space, without the need to open up an additional intermediate storage space.

[0061] like Figure 5 As shown in stage 504 in FIG, the specific process is:

[0062] Obtain the basic block value of each first basic block, where the basic block value is the product of all unreduced dimensions in the first basic block; and then perform accumulation operation based on the basic block value. Figure 5 In a corresponding example, two first basic blocks 513 and 533 are obtained according to the axis to be reduced of the image vector. The basic block value corresponding to the first basic block 513 is 6, and the basic block value corresponding to the first basic block 533 is 2×6=12.

[0063] Furthermore, this embodiment will determine whether the first basic block is empty. If the first basic block is empty, the basic block value is set to 1. When the dimension corresponding to the first axis in the reduction group is the dimension to be reduced, then when the first basic block and the second basic block are divided according to the dimension to be reduced, the first basic block is empty, that is, there is no unreduced dimension. When calculating the basic block value, it cannot be calculated based on the product of the unreduced dimensions. In this case, the basic block value is set to 1. Figure 5 There is no empty first basic block in the example.

[0064] When retrieving data from an image vector, it is necessary not only to know the size of the data to be retrieved, i.e., the basic block value, but also to know the location from which the data is to be retrieved. Furthermore, the step of performing the accumulation operation further includes: calculating an offset, where the offset is the product of all dimensions in the first basic block; determining a data address for the accumulation operation based on the offset; and retrieving data of the basic block value size from the data address for accumulation operation.

[0065] The offset refers to the distance between the actual address of the data stored in the storage unit and the first address of the storage unit where it is located. The address of the data can be obtained based on the offset, that is, the first address plus the offset is the actual address of the data storage. The size of the offset is determined according to the first basic block, and the product of all dimensions in the first basic block is the size of the offset. Moreover, the offset is also one-to-one corresponding to the axis to be reduced and the basic block value. During the cumulative operation, when multiple axes to be reduced are reduced, the data of the corresponding basic block value size is taken from the position of the corresponding offset for operation. Figure 5In the example, the offset corresponding to the first basic block 513 is 6, and the offset corresponding to the first basic block 533 is 2×3×6=36.

[0066] In an optional embodiment, the above method also includes: multiplying the unreduced dimensions in the first basic block in each second basic block to obtain first data; and dividing the accumulation operation into multiple parts of a specific size based on the value of the first data, wherein the multiple parts perform accumulation operations in parallel.

[0067] In an embodiment of the present invention, the reduction group is divided into three parts based on the axis to be reduced: a first basic block, the axis to be reduced, and a second basic block. These three parts can be abstracted as a three-dimensional vector, namely the first, second, and third dimensions. The axis to be reduced is the second dimension, representing the compression of that dimension into one dimension. The value of the axis to be reduced represents the number of data points required to perform calculations to compress that dimension into one. For example, if the axis to be reduced is 3, it means there are three data points on that dimension, and three data points must be calculated to reduce the three to one. The first basic block is the first dimension, and the basic block value is obtained based on the first basic block. The value corresponding to the first dimension represents the number of data points at the same position in the second dimension that participate in the calculation. Because the operations (accumulation, retrieval, etc.) for multiple data points at the same position in the second dimension are the same, they can be treated as a whole. This is the meaning of the basic block value. The second basic block corresponds to the third dimension and can be understood as the number of data groups that need to be reduced in the third dimension. The operations for each data group are completely identical and can be performed in parallel.

[0068] According to the method of dividing the first basic block and the second basic block above, taking each second basic block as the starting point, find the first basic block corresponding to the second basic block. The product of all unreduced dimensions in the first basic block is equivalent to the third dimension of the above three-dimensional vector.

[0069] therefore Figure 5 , the basic block value, offset, and parallel number corresponding to the first axis dimension 52 to be reduced are 6, 6, and 2 respectively; the basic block value, offset, and parallel number corresponding to the second axis dimension 51 to be reduced are 12, 36, and 2 respectively.

[0070] For the specific accumulation process, see Figure 5 Middle stage 504: According to the above steps, the two parts corresponding to labels (1) and (2) are Figure 5The reduction process corresponding to 52 and 51 in the figure. The value of each small block is a basic block value, which is 6 numbers. The storage distance between two adjacent small blocks is one small block, which is 6, so the offset is one small block, which is 6. When only 52 is accumulated (accumulation operation in this embodiment), the addresses of the data are: in process a, the first data is taken at its own position at the beginning, and the address is 0*offset value 6=0; in process b, the second data is taken and calculated with the first data, and the address of the second data is 1*offset value 6=6; in process c, the third data is taken, and the address of the third data is 2*offset 6=12. The data of the basic block value 6 data are taken from the above three addresses respectively for accumulation operation. Label (2) is another part parallel to label (1), and the accumulation process is exactly the same.

[0071] Similarly, if only Figure 5 When performing reduction in step 51, the first three dimensions (2,3,6) of the vector (2,3,2,3,6) are considered as a whole D, and the second dimension of the reduced vector (2,3,D) is reduced. From the above analysis, the basic block value is 12 numbers and the offset is 36. In addition to the above analysis, the calculation of the basic block value and the offset value can also be understood as follows: In the figure stage 504, the labels (1) and (2) are Figure 5 In the reduction process corresponding to 52, labels (1) and (2) are run in parallel. The basic block of label (1) is 6 numbers. Therefore, the basic block with labels (1) and (2) as a whole is two groups of 6 numbers. Therefore, the second axis to be reduced is Figure 5 The basic block value corresponding to 51 is 12 numbers. For the offset, the first number is taken from the first address, that is, the first number in label (1), and the second number is taken from the first number in label (3). The numbers contained in labels (1) and (2) are separated in the middle. The numbers of labels (1) and (2) have been taken away in the first reduction process. Therefore, the offset at this time is 6*3*2=36. Therefore, the addresses of the data are: the first time the data is taken from the first address, the data address is 0*36=0; in the second process d, the data address is 1*36=36; the third time is process e, the data address is 2*36=72. The number of basic block values ​​(i.e. 12 numbers) is taken from the above three addresses for accumulation operation.

[0072] From the above analysis, we can see that the first data is obtained by multiplying the unreduced dimensions of the first basic block in each second basic block. Based on the value of the first data, the accumulation operation is divided into multiple parts of a specific size, where the accumulation operation is performed in parallel in multiple parts. Therefore, the parallel parts corresponding to the second axis to be reduced (dimension 51) are two parts, and these two parts perform exactly the same operation. Therefore, there is another part that can complete the same operation in parallel (this other part is not shown in the figure).

[0073] During the calculation process, the processor determines the basic block value, offset, and number of parallel operations corresponding to each value to be reduced. It then extracts the corresponding basic block values ​​from different locations and performs a cumulative calculation. Finally, the accumulated result is stored back in the first storage space. This eliminates the need for additional intermediate storage space, avoiding space waste and I / O operations during the calculation process, thereby improving computational efficiency.

[0074] Figure 6 A flow chart showing a method for reducing a multi-dimensional image vector according to another embodiment of the present invention.

[0075] Step 601: Set the dimension of the image vector to the reduced group. Figure 4 Step 401. The dimension of the image vector is described by the shape of the image. The dimension of the vector is set to a reduction group. For example, for a 5-dimensional tensor, its shape size is (3, 6, 2, 3, 4). The corresponding reduction group of this vector is (3, 6, 2, 3, 4).

[0076] Step 602: Determine the first axis to be reduced in the reduction group in a specific order. Figure 4 Step 402. The vector to be reduced includes one or more axes to be reduced, and the reduction group includes all dimensions of the vector. First, the first axis to be reduced in the reduction group is determined according to a specific order. The specific order can be a forward or reverse order. The forward order represents the order from left to right along the reduction group, while the reverse order represents the order from right to left along the reduction axis. In addition, the specific order can also be an order along a certain direction along any dimension, and the present invention does not impose any limitation on this.

[0077] Step 603: Based on the axis to be reduced, the reduction group is divided into a first basic block and a second basic block. Figure 4 Step 403. The first basic block includes all dimensions of the image vector before the axis to be reduced, and the second basic block includes all dimensions of the image vector after the axis to be reduced.

[0078] Split the reduction group into two parts, centered around the first axis to be reduced. The first or second basic block of the division contains zero, one, or multiple dimensions. When the first axis in the reduction group is the axis to be reduced, and there are no dimensions before the axis to be reduced, then the first basic block is an empty set when the reduction group is partitioned around the axis to be reduced. Similarly, when the first axis to be reduced in the reduction group is the last axis to be reduced, and there are no dimensions after the axis to be reduced, then the second basic block is an empty set when the reduction group is partitioned around the axis to be reduced.

[0079] Step 604: Determine whether the first axis of the second basic block is an axis to be reduced. As can be seen from step 602, the divided second basic block may include zero, one, or multiple dimensions. If the second basic block is not empty, the dimensions of the second basic block may include dimensions to be reduced or dimensions not to be reduced, and the order of the dimensions to be reduced and dimensions not to be reduced is undefined. If the first axis of the second basic block is an axis to be reduced, proceed to step 605.

[0080] Step 605: Fuse the first axis to be reduced in the reduction group with the first axis. Fusing means multiplying the values ​​of the two axes, and the product value is the value corresponding to the axis after fusion.

[0081] Step 606: Update the fused axis to the first axis to be reduced in the reduction group; wherein the partitioning step is performed based on the updated first axis to be reduced. The fused axis refers to the product obtained by multiplying two dimensions.

[0082] For example, the dimension size of the 5-dimensional tensor in step 601 is (3, 6, 2, 3, 4), where the axis to be reduced is axis = [1, 2, 3]. First, determine the first axis to be reduced in the dimension in the forward order, corresponding to axis = 1, which corresponds to the second dimension 6 in the vector. Divide the dimension of the vector into the first basic block (3) and the second basic block (2, 3, 4). Next, determine whether the first axis 2 in the second basic block is the axis to be reduced. Since axis = [1, 2, 3], the dimensions to be reduced corresponding to the axis to be reduced are the second, third, and fourth dimensions, and the first axis in the second basic block corresponds to the third dimension in the 5-dimensional tensor, which is exactly the axis to be reduced. Therefore, the first axis to be reduced in the reduction group is fused with the first axis, that is, the dimension 6 corresponding to the first axis to be reduced in the reduction group and the dimension 2 corresponding to the first axis are fused into a dimension 6×2=12. Then use the fused axis to update the first axis to be reduced in the reduction group. At this time, the first axis in the reduction group is no longer 6, but the fused result 12. At this point, the vector's dimensions are updated to (3, 12, 3, 4). Re-perform the partitioning steps based on the updated vector's dimensions. The updated reduction group is (3, 12, 3, 4), and the axis to be reduced becomes axis = [1, 2]. In the forward order, determine the first axis to be reduced in the reduction group as axis = 1, corresponding to the second dimension of the vector. The vector is partitioned into the first basic block (3) and the second basic block (3, 4). The first axis of the second basic block is determined to be the non-reducible axis.

[0083] Returning to step 604, if the first axis of the second basic block is an unreduced axis, execute step 607, i.e., execute Figure 4 In step 404 and subsequent steps, the reduced result of the image vector is finally obtained.

[0084] Figure 7 A flow chart showing a method for reducing a multi-dimensional image vector according to another embodiment of the present invention.

[0085] Step 700: Standardize the image vector. The image vector obtained can be an original image vector or an optimized image vector. The dimensions of the image vector include dimensions to be reduced or dimensions not to be reduced. Before reducing the image vector, the image vector is standardized into a standard form to facilitate subsequent reduction calculations. The standard form refers to the dimensional form of the image vector being an alternating arrangement of dimensions to be reduced and dimensions not to be reduced. The specific steps of the image vector standard are:

[0086] Step 710, determine whether there are continuous axes to be reduced or axes not to be reduced in the dimension of the image vector. The standard form of the image vector is that the axes to be reduced and the axes not to be reduced are arranged alternately. When encountering continuous axes to be reduced or continuous axes not to be reduced, it is necessary to process the continuous axes to be reduced or continuous axes not to be reduced into the standard form. During the judgment process, first find the axes to be reduced and the axes not to be reduced of the image vector and mark them with different marks. The mark can be a number, a letter or other, as long as the axes to be reduced and the axes not to be reduced can be distinguished, and the present invention does not impose any restrictions on this.

[0087] Furthermore, we determine whether there are continuous identical marks in the marked image vector. If there are, it means that the image vector has continuous axes to be reduced or axes not to be reduced. For example, the dimensions of a set of image vectors are (1,2,3,4,5,6,7,8,9,10,11,12), where axis = [2,4,5,6,8,10]. We mark the dimensions of the image vector with different marks according to the axis. For example, the axis to be reduced is represented by A, the axis not to be reduced is represented by D, and the numerical subscripts are used to distinguish the data represented by each axis. After marking, Figure 8 A schematic diagram of multi-axis reduction is shown. Original dimension 801 represents the dimensions of the image vector (D0, D1, A0, D2, A1, A2, A3, D3, A4, D4, A5, D5), where A represents the axis to be reduced and D represents the axis not to be reduced. Therefore, it is easy to determine if there are consecutive A's or consecutive D's, i.e., there are consecutive axes to be reduced or consecutive axes not to be reduced.

[0088] Optionally, when determining whether there are consecutive axes to be reduced or unreduced, it is also possible to determine one by one whether the subsequent dimension and the previous dimension are of the same type. The same type refers to the dimensions to be reduced or unreduced.

[0089] Step 720: If there are continuous axes to be reduced or axes not to be reduced in the dimension of the image vector, the continuous axes to be reduced or axes not to be reduced are fused.

[0090] Fusion refers to converting multiple axes to be reduced or unreduced into one axis to be reduced or unreduced in the form of a product. Figure 8 According to the judgment result (D0, D1, A0, D2, A1, A2, A3, D3, A4, D4, A5, D5), the dimensions corresponding to the consecutive axes to be reduced or the unreduced axes are multiplied to obtain a new axis to be reduced or a new unreduced axis, thereby obtaining an updated dimension 802.

[0091] Step 730: Update the dimensions based on the fusion result. The fusion dimension is reduced relative to the original image vector dimension. The new fusion dimension is used to update the pre-fusion image vector dimension, so that the fusion image vector dimension is arranged alternately with the unreduction axis and the unreduction axis. Figure 8The updated dimension 803 is the updated dimension (D0, A0, D1, A1, D2, A2, D3, A3, D4), and this dimension is set as the specification group.

[0092] After the processing in step 700 , the image vector to be processed is converted into an image vector in a standard form.

[0093] Step 701: Set the dimension of the image vector to the reduced group. Figure 4 Step 401. Figure 8 The update dimension 803 of the image vector is (D0, A0, D1, A1, D2, A2, D3, A3, D4), and this dimension is set as the reduction group.

[0094] Step 702: Determine the first axis to be reduced in the reduction group in a specific order. Figure 4 Step 402, wherein the specific order refers to a forward order or a reverse order. Figure 8 Taking the forward order as an example, the updated dimension 804 has the first axis to be reduced as A0, which is the shaded area in the figure.

[0095] Step 703: Based on the axis to be reduced, the reduction group is divided into a first basic block and a second basic block. Figure 4 Step 403, wherein the first basic block includes all dimensions of the image vector before the axis to be reduced, and the second basic block includes all dimensions of the image vector after the axis to be reduced. Figure 8 The specification group is divided into a first basic block and a second basic block. Figure 8 The first basic block shown is D0, and the second basic block is (D1, A1, D2, A2, D3, A3, D4).

[0096] Step 704: Determine whether there is an axis to be reduced in the second basic block. Figure 4 Step 404: If there is an axis to be reduced in the second basic block, execute step 705.

[0097] Step 705, this step is the same as Figure 4 In step 405, the reduction group is updated with all dimensions in the second basic block, and the process returns to step 702 to execute steps 702-704 until no axis to be reduced exists in the second basic block. Otherwise, the process executes step 706.

[0098] Step 706, this step is the same as Figure 4 In step 406, a cumulative operation is performed on at least one first basic block and at least one second basic block to obtain a reduced result of the image vector.

[0099] Back to Figure 8In the example, the second basic block (D1, A1, D2, A2, D3, A3, D4) still has an axis A1 to be reduced. Therefore, step 705 is executed to update the reduction group using all dimensions in the second basic block. The updated reduction group is (D1, A1, D2, A2, D3, A3, D4). Steps 702-704 are repeated to determine that the first axis to be reduced in the reduction group is A1. Based on this axis to be reduced, the reduction group is divided into the first basic block (D0, A0, D1) and the second basic block (D2, A2, D3, A3, D4). The second basic block (D2, A2, D3, A3, D4) still has an axis to be reduced. The reduction group is updated using all dimensions in the second basic block. The updated reduction group is (D2, A2, D3, A3, D4). Repeat steps 702-704 to determine that the first axis to be reduced in the reduction group is A2, and based on the axis to be reduced, divide the reduction group into the first basic block (D0, A0, D1, A1, D2) and the second basic block (D3, A3, D4). The second basic block (D3, A3, D4) still has an axis to be reduced, and the reduction group is updated with all dimensions in the second basic block. The updated reduction group is (D3, A3, D4). Repeat steps 702-704 to determine that the first axis to be reduced in the reduction group is A3, and based on the axis to be reduced, divide the reduction group into the first basic block (D0, A0, D1, A1, D2, A2, D3) and the second basic block (D4). At this time, the second basic block does not have an axis to be reduced, and step 706 is executed. Figure 8 The basic block information 805 displays the basic block value, offset, and parallel times corresponding to each axis to be reduced.

[0100] Step 706: Perform a cumulative operation on the at least one first basic block and the at least one second basic block to obtain the reduced image vector. The basic block value and offset corresponding to each axis to be reduced are found. The data storage address is found based on the offset. Data corresponding to the basic block value is retrieved from the data storage location and cumulatively calculated to obtain the final reduced result 806. The specific cumulative operation steps are similar to those in step 406 above and will not be further described.

[0101] Figure 9 1 is a diagram showing a multi-dimensional vector reduction apparatus 900 for executing the above method, comprising a setting unit 901, a determining unit 902, a dividing unit 903, a judging unit 904, an updating unit 905, and a calculating unit 906.

[0102] The setting unit 901 is used to set the reduced dimension of the image vector as a reduced group. The dimension of the image vector is described by the shape of the image, and the dimension of the vector is set as a reduced group according to the shape of the image vector.

[0103] The determination unit 902 is used to determine the first axis to be reduced in the reduction group in a specific order. The vector to be reduced includes one or more axes to be reduced, and the reduction group includes all dimensions of the vector. First, the determination unit 902 determines the first axis to be reduced in the reduction group in a specific order. The specific order is a forward or reverse order. The forward order refers to the order from left to right according to the reduction group, and the reverse order refers to the order from right to left according to the reduction axis. In addition, the specific order can also be an order along a certain direction from any dimension, and the present invention does not impose any limitation on this.

[0104] The division unit 903 is configured to divide the reduction group into a first basic block and a second basic block based on the axis to be reduced, wherein the first basic block includes all dimensions of the image vector that are before the axis to be reduced, and the second basic block includes all dimensions of the image vector that are after the axis to be reduced. The terms "before" and "after" are relative: in the forward order, the dimensions to the left of the axis to be reduced are before the axis to be reduced, and the dimensions to the right of the axis to be reduced are after the axis to be reduced; whereas in the reverse order, the dimensions to the right of the axis to be reduced are before the axis to be reduced, and the dimensions to the left of the axis to be reduced are after the axis to be reduced.

[0105] Determination unit 904 is configured to determine whether there are any axes to be reduced in the second basic block. If so, updating unit 905 updates the reduction group using all dimensions within the second basic block. Based on the updated reduction group, setting unit 901, determination unit 902, partitioning unit 903, determination unit 904, and updating unit 905 re-execute the aforementioned operations until no axes to be reduced exist in the second basic block.

[0106] The calculation unit 906 is configured to perform a cumulative operation on at least one first basis block and at least one second basis block to obtain a reduction result for the image vector. Each axis to be reduced in the vector corresponds to a set of first basis blocks and second basis blocks. When there is only one axis to be reduced in the vector, one first basis block and one second basis block are generated. When there are multiple axes to be reduced in the vector, multiple first basis blocks and second basis blocks are generated.

[0107] The calculation unit 906 is further configured to obtain a basic block value of each first basic block and perform a cumulative operation based on the basic block value, wherein the basic block value is the product of all unreduced dimensions in the first basic block.

[0108] The judging unit 904 is further configured to judge whether the first basic block is empty. If the first basic block is empty, the calculating unit 906 sets the basic block value corresponding to the first basic block to 1.

[0109] The determination unit 904 is further configured to determine whether the first axis of the second basic block is an axis to be reduced. The apparatus 900 further includes a fusion unit 907. If so, the fusion unit 907 is configured to fuse the first axis to be reduced in the reduction group with the first axis. The updating unit 905 is configured to update the fused axis to the first axis to be reduced in the reduction group. The division unit 903 performs a division step based on the updated first axis to be reduced.

[0110] The calculation unit 906 is also used to calculate the offset, where the offset is the product of all dimensions in the first basic block; the calculation unit determines the data address of the accumulation operation based on the offset; and takes out the data of the basic block value size from the data address and performs the accumulation operation.

[0111] The computing unit 906 is also used to multiply the unreduced dimensions in the first basic block in each second basic block to obtain first data; and divide the accumulation operation into multiple parts of a specific size based on the value of the first data, wherein the multiple parts perform accumulation operations in parallel.

[0112] Another embodiment of the present invention is a computer-readable storage medium having a computer program code for reducing a multidimensional vector stored thereon. When the computer program code is run by a server, the server includes a processor and a memory, the memory stores the aforementioned computer program code, and the processor runs the computer program code in the memory. In some implementation scenarios, the above-mentioned integrated unit can be implemented in the form of a software program module. If implemented in the form of a software program module and sold or used as an independent product, the integrated unit can be stored in a computer-readable memory. Based on this, when the solution of the present invention is embodied in the form of a software product (such as a computer-readable storage medium), the software product can be stored in a memory, which may include several instructions for causing a computer device (such as a personal computer, a server or a network device, etc.) to perform some or all of the steps of the method described in the embodiment of the present invention. The aforementioned memory may include, but is not limited to, various media that can store program code, such as a USB flash drive, a flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0113] Depending on the application scenario, the electronic device or device of the present invention may include a server, a cloud server, a server cluster, a data processing device, a robot, a computer, a printer, a scanner, a tablet computer, a smart terminal, a PC device, an Internet of Things terminal, a mobile terminal, a mobile phone, a driving recorder, a navigator, a sensor, a camera, a camera, a video camera, a projector, a watch, a headset, a mobile storage, a wearable device, a visual terminal, an automatic driving terminal, a vehicle, a household appliance, and / or a medical device. The vehicle includes an airplane, a ship and / or a vehicle; the household appliance includes a television, an air conditioner, a microwave oven, a refrigerator, an electric rice cooker, a humidifier, a washing machine, an electric light, a gas stove, and a range hood; the medical device includes an MRI, an ultrasound machine and / or an electrocardiograph. The electronic device or device of the present invention may also be applied to the Internet, the Internet of Things, data centers, energy, transportation, public administration, manufacturing, education, power grids, telecommunications, finance, retail, construction sites, medical care and other fields. Furthermore, the electronic device or device of the present invention may also be used in application scenarios related to artificial intelligence, big data and / or cloud computing, such as the cloud, edge, and terminal. In one or more embodiments, electronic devices or apparatuses with high computing power according to the solution of the present invention can be applied to cloud devices (such as cloud servers), while electronic devices or apparatuses with low power consumption can be applied to terminal devices and / or edge devices (such as smartphones or cameras). In one or more embodiments, the hardware information of the cloud device and the hardware information of the terminal device and / or edge device are compatible with each other, so that according to the hardware information of the terminal device and / or edge device, appropriate hardware resources can be matched from the hardware resources of the cloud device to simulate the hardware resources of the terminal device and / or edge device, so as to complete the unified management, scheduling and collaborative work of end-to-end or cloud-edge-to-end.

[0114] It should be noted that, for the purpose of simplicity, the present invention describes some methods and embodiments thereof as a series of actions and combinations thereof, but those skilled in the art will understand that the scheme of the present invention is not limited by the order of the described actions. Therefore, based on the disclosure or teachings of the present invention, those skilled in the art will understand that some of the steps therein can be performed in other orders or simultaneously. Further, those skilled in the art will understand that the embodiments described in the present invention can be regarded as optional embodiments, that is, the actions or modules involved therein are not necessarily necessary for the implementation of one or more schemes of the present invention. In addition, depending on the different schemes, the present invention also has different emphases on the description of some embodiments. In view of this, those skilled in the art will understand that the parts that are not described in detail in a certain embodiment of the present invention may also refer to the relevant descriptions of other embodiments.

[0115] In terms of specific implementation, based on the disclosure and teachings of the present invention, those skilled in the art can understand that several embodiments disclosed in the present invention can also be implemented in other ways not disclosed herein. For example, with respect to the various units in the electronic device or device embodiments described above, this article splits them based on the consideration of logical functions, and there may be other ways of splitting them in actual implementation. For another example, multiple units or components can be combined or integrated into another system, or some features or functions in the units or components can be selectively disabled. With respect to the connection relationship between different units or components, the connection discussed above in conjunction with the accompanying drawings can be a direct or indirect coupling between units or components. In some scenarios, the aforementioned direct or indirect coupling involves a communication connection using an interface, wherein the communication interface can support electrical, optical, acoustic, magnetic or other forms of signal transmission.

[0116] In the present invention, the units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units. The aforementioned components or units may be located in the same location or distributed across multiple network elements. In addition, according to actual needs, some or all of the units may be selected to achieve the purpose of the solutions described in the embodiments of the present invention. In addition, in some scenarios, multiple units in the embodiments of the present invention may be integrated into a single unit or each unit may exist physically separately.

[0117] In some other implementation scenarios, the above-mentioned integrated units can also be implemented in the form of hardware, that is, as specific hardware circuits, which may include digital circuits and / or analog circuits, etc. The physical implementation of the hardware structure of the circuit may include but is not limited to physical devices, and the physical devices may include but are not limited to devices such as transistors or memristors. In view of this, the various devices described herein (such as computing devices or other processing devices) can be implemented by appropriate hardware processors, such as central processing units, GPUs, FPGAs, DSPs, and ASICs. Furthermore, the aforementioned storage unit or storage device can be any appropriate storage medium (including magnetic storage media or magneto-optical storage media, etc.), which can be, for example, resistive random access memory (RRAM), dynamic random access memory (DRAM), static random access memory (SRAM), enhanced dynamic random access memory (EDRAM), high bandwidth memory (HBM), hybrid memory cube (HMC), ROM and RAM, etc.

[0118] The foregoing content can be better understood in accordance with the following terms:

[0119] Item A1. A method for reducing a multidimensional image vector, wherein the method includes: setting the reduction dimension of the image vector as a reduction group; determining the first axis to be reduced in the reduction group in a specific order; dividing the reduction group into a first basic block and a second basic block based on the axis to be reduced, wherein the first basic block includes all dimensions before the axis to be reduced in the reduction dimension of the image vector, and the second basic block includes all dimensions after the axis to be reduced in the reduction dimension of the image vector; judging whether there is an axis to be reduced in the second basic block; if so, performing the following steps: updating the reduction group with all dimensions in the second basic block; and performing the determining, dividing, and judging steps until there is no axis to be reduced in the second basic block; and performing cumulative operations on the at least one first basic block and the at least one second basic block to obtain the reduction result of the image vector.

[0120] Clause A2. According to the method described in Clause A1, the accumulation operation step includes: obtaining the basic block value of each first basic block, the basic block value being the product of all unreduced dimensions in the first basic block; and performing accumulation operation based on the basic block value.

[0121] Clause A3. According to the method described in Clause A2, the accumulation operation step also includes: determining whether the first basic block is empty; and if it is empty, setting the basic block value to 1.

[0122] Item A4. According to the method described in Item A1, the division step includes: determining whether the first axis of the second basic block is the axis to be reduced; if so, fusing the first axis to be reduced in the reduction group with the first axis; updating the fused axis to the first axis to be reduced in the reduction group; wherein the division step is performed based on the updated first axis to be reduced.

[0123] Item A5. The method according to Item A1 further includes: determining whether there are continuous axes to be reduced or unreduced axes in the reduced dimension of the image vector; if so, fusing the continuous axes to be reduced or unreduced axes; and updating the reduced dimension based on the fusion result.

[0124] Clause A6. According to the method described in Clause A2, the accumulation operation step also includes: calculating an offset, wherein the offset is the product of all dimensions in the first basic block; determining a data address for the accumulation operation based on the offset; and taking out data of the basic block value size from the data address to perform an accumulation operation.

[0125] Item A7. According to the method described in Item A4 or A5, the accumulation operation step also includes: multiplying the unreduced dimensions in the first basic block in each second basic block to obtain first data; and dividing the accumulation operation into multiple parts of a specific size based on the value of the first data, wherein the multiple parts perform accumulation operations in parallel.

[0126] Item A8. According to the method described in Item A1, the specific order is a forward or reverse order.

[0127] Clause A9. According to the method described in any one of clauses A1-A8, the cumulative operation includes one of cumulative sum, average, product, maximum and minimum.

[0128] Item A10, an electronic device, characterized in that it includes: a processor; a memory for storing executable instructions; wherein the processor is configured to call the instructions stored in the memory to execute the method described in any one of items A1 to A10.

[0129] Item A11. A computer-readable storage medium having stored thereon a computer program code for reducing a multi-dimensional image vector, wherein when the computer program code is executed by a processing device, the method described in any one of Items A1 to A10 is executed.

[0130] Item A12. A reduction device for multidimensional vector reduction, the device comprising a setting unit, a determination unit, a division unit, a judgment unit, an update unit and a calculation unit; wherein the setting unit is used to set the reduction dimension of the image vector as a reduction group; the determination unit is used to determine the first axis to be reduced in the reduction group in a specific order; the division unit is used to divide the reduction group into a first basic block and a second basic block based on the axis to be reduced, wherein the first basic block includes all dimensions of the image vector before the axis to be reduced, and the second basic block includes all dimensions of the image vector after the axis to be reduced; the judgment unit is used to determine whether there is an axis to be reduced in the second basic block, and if there is an axis to be reduced in the second basic block, the update unit updates the reduction group with all dimensions in the second basic block; according to the updated reduction group, the setting unit, the determination unit, the division unit, the judgment unit and the update unit re-execute the above operations until there is no axis to be reduced in the second basic block; the calculation unit is used to perform cumulative operations on at least one first basic block and at least one second basic block to obtain the reduction result of the image vector.

[0131] Item A13. According to the device described in Item A12, the calculation unit is also used to obtain the basic block value of each first basic block and perform cumulative operations based on the basic block value; wherein, the basic block value is the product of all unreduced dimensions in the first basic block.

[0132] Clause A14. According to the device described in Clause A13, the judgment unit is also used to judge whether the first basic block is empty; if the first basic block is empty, the calculation unit is also used to set the basic block value corresponding to the first basic block to 1.

[0133] Item A15. The apparatus according to Item A12, wherein the determination unit is further configured to determine whether the first axis of the second basic block is a to-be-reduced axis, and the apparatus further comprises a fusion unit. If so, the fusion unit is configured to fuse the first to-be-reduced axis in the reduction group with the first axis, the updating unit is configured to update the fused axis to the first to-be-reduced axis in the reduction group, and the partitioning unit performs the partitioning step based on the updated first to-be-reduced axis.

[0134] Item A16. According to the device described in Item A12, the calculation unit is also used to calculate an offset, wherein the offset is the product of all dimensions in the first basic block; the calculation unit determines the data address of the accumulation operation based on the offset; and takes out data of the basic block value size from the data address to perform accumulation operation.

[0135] Item A17. According to the device described in Item A12, the computing unit is also used to multiply the unreduced dimensions in the first basic block in each second basic block to obtain first data; and divide the accumulation operation into multiple parts of a specific size based on the value of the first data, wherein the multiple parts perform accumulation operations in parallel.

[0136] Clause A18. The apparatus of clause A12, wherein the specific order is a forward or reverse order.

[0137] Item A19. The device according to any one of items A12-A18, wherein the accumulation operation includes one of cumulative sum, average, product, maximum and minimum.

[0138] The embodiments of the present invention are described in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core ideas. At the same time, for those skilled in the art, according to the ideas of the present invention, there may be changes in the specific implementation methods and application scopes. In summary, the contents of this specification should not be understood as limiting the present invention.

Claims

1. A method for reducing a multidimensional image vector, characterized in that: The method comprises: Setting the reduced dimension of the image vector to a reduced group; Determine the first axis to be reduced in the reduction group in reverse order; Based on the axis to be reduced, the reduction group is divided into a first basic block and a second basic block, wherein the first basic block includes all dimensions of the image vector before the axis to be reduced, and the second basic block includes all dimensions of the image vector after the axis to be reduced; Determining whether there is an axis to be reduced in the second basic block; If so, perform the following steps: updating the reduction group with all dimensions in the second basic block; and Repeating the determining step for the updated reduction group, and repeating the dividing step for the original reduction group, to further divide a first basic block and a second basic block accordingly, and repeating the judging step for the re-divided second basic block until no to-be-reduced axis exists in the re-divided second basic block, wherein the number of times the reduction group is updated corresponds to the number of to-be-reduced dimensions in the image vector, and the number of first basic blocks and second basic blocks generated; and performing a cumulative operation on the at least one first basic block and the at least one second basic block to obtain a reduced result of the image vector; The cumulative operation step includes: Obtaining a basic block value for each first basic block, where the basic block value is the product of all unreduced dimensions in the first basic block; and performing a cumulative operation based on the basic block value; The accumulation operation step also includes: calculating an offset, where the offset is the product of all dimensions in the first basic block; determining a data address for the accumulation operation based on the offset; and taking data of the basic block value size from the data address to perform an accumulation operation.

2. The method according to claim 1, characterized in that The cumulative operation step further includes: Determining whether the first basic block is empty; and If empty, set the basic block value to 1.

3. The method according to claim 1, characterized in that The dividing step comprises: determining whether the first axis of the second basic block is an axis to be reduced; If so, merging the first axis to be reduced in the reduction group with the first axis; Updating the fused axis to the first axis to be reduced in the reduction group; The partitioning step is performed according to the updated first axis to be reduced.

4. The method according to claim 1, wherein The method further comprises: Determining whether there are continuous axes to be reduced or axes not to be reduced in the reduced dimension of the image vector; If so, merging the continuous axes to be reduced or the axes not to be reduced; and The reduced dimension is updated according to the fusion result.

5. The method according to claim 3 or 4, characterized in that The cumulative operation step further includes: multiplying the unreduced dimensions of the first basic block in each second basic block to obtain first data; and The accumulation operation is divided into a plurality of parts of a specific size based on the value of the first data, wherein the accumulation operation is performed in parallel on the plurality of parts.

6. The method according to claim 1, characterized in that The accumulation operation includes one of cumulative sum, average, product, maximum and minimum.

7. An electronic device, characterized in that: include: processor; a memory for storing executable instructions; The processor is configured to call the instructions stored in the memory to execute the method according to any one of claims 1 to 6.

8. A computer-readable storage medium having stored thereon computer program instructions for reducing a multi-dimensional image vector, characterized in that: When the computer program instructions are executed by the server, the method according to any one of claims 1 to 6 is implemented.

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