Wafer bonding structure and method of forming the same and method of manufacturing a semiconductor device

Abstract

The application discloses a wafer bonding structure and a forming method thereof and a preparation method of a semiconductor device. The wafer bonding structure comprises a bonding carrier, a medium layer, a bonding glue layer and a wafer to be bonded which are stacked in sequence. The material of the bonding carrier is the same as that of the wafer to be bonded, and the refractive index of the material of the medium layer is different from that of the bonding carrier and the wafer to be bonded. The wafer bonding structure can distinguish the wafer to be bonded and the bonding carrier by the medium layer and the bonding glue layer stacked on the bonding carrier in sequence and the different refractive indexes of the materials of the wafer to be bonded, the bonding carrier and the medium layer. The wafer bonding structure can meet good bonding effect, keep close and complete bonding under subsequent severe high-temperature process conditions such as high-temperature vacuum plasma bombardment or high-temperature annealing, and can also help subsequent operators to measure the thickness of the wafer to be bonded.

Description

Technical Field

[0001] This invention relates to the field of semiconductor processes, and in particular to a wafer bonding structure, a method for forming the same, and a method for fabricating semiconductor devices. Background Technology

[0002] Wafer bonding is an emerging microelectronics manufacturing technology that involves chemically and physically joining two mirror-polished homogeneous or heterogeneous wafers together. After bonding, the atoms at the interface react under external forces to form covalent bonds, achieving a specific bonding strength. Therefore, its applications are increasingly widespread in materials preparation, three-dimensional microstructure integration, and the manufacturing and packaging of integrated circuits (ICs) and microelectromechanical systems (MEMS) devices. Furthermore, wafer bonding technology is used to fabricate electrodes and cavities in many MEMS component processes. Wafer bonding technology can also be applied to many promising industries, from airbag accelerometers in the MEMS field and microfluidic components in the biomedical field, to wafer-level packaging in microelectronics, silicon-on-insulator (SOI) material fabrication, and thin-film transfer technology for optoelectronic communication components. Wafer bonding technology is gradually becoming the fundamental technology for fabricating these components. The exploration of wafer bonding processes has always been the most crucial part of the entire wafer bonding technology and its applications. Over the past few decades, wafer bonding processes have flourished. Different technologies impose different requirements on the manufacturing process, leading to the development of a wide variety of wafer bonding process flows. These advancements in process flows have further expanded the scope of applications. The overall trend in wafer bonding is characterized by material diversification and the practical application of processes.

[0003] Taking silicon carbide as an example of the material to be bonded wafers, traditional bonding carriers can be selected from silicon carbide, sapphire, glass, or silicon. When sapphire or glass is used as the bonding carrier, the large difference in the coefficients of thermal expansion between the wafer and the carrier material can lead to bonding bubbles or deterioration of the bonding adhesive under harsh high-temperature processes such as high-temperature vacuum plasma bombardment or high-temperature annealing after bonding, which can also affect subsequent back-end processes. Therefore, to avoid bonding problems caused by the coefficients of thermal expansion of the wafer and the carrier material, silicon carbide, the same material as the wafer, is often chosen as the bonding carrier. However, since the bonding adhesive, the wafer, and the silicon carbide carrier are all transparent, it can make it difficult for operators to distinguish between the wafer and the carrier after bonding, interfering with subsequent wafer thickness measurements. Summary of the Invention

[0004] Therefore, it is necessary to provide a wafer bonding structure and bonding method that can easily distinguish between wafers to be bonded and bonding carriers of the same material and achieve good bonding effect, as well as a method for fabricating semiconductor devices.

[0005] The present invention provides a wafer bonding structure, comprising a bonding carrier, a dielectric layer, a bonding adhesive layer and a wafer to be bonded, which are stacked sequentially.

[0006] The bonding carrier is made of the same material as the wafer to be bonded, and the dielectric layer has a different refractive index than both the bonding carrier and the wafer to be bonded.

[0007] In one embodiment, the material of the bonding carrier and the material of the wafer to be bonded are selected from at least one of silicon carbide, silicon, and gallium nitride.

[0008] In one embodiment, both the bonding carrier and the wafer to be bonded are made of silicon carbide.

[0009] In one embodiment, the dielectric layer is made of silicon dioxide or metal.

[0010] In one embodiment, the metal is tungsten, aluminum, or copper, or an alloy of at least two of the metals selected from tungsten, aluminum, and copper.

[0011] In one embodiment, the thickness of the dielectric layer is 0.1 μm to 10 μm.

[0012] In one embodiment, the thickness of the dielectric layer is 0.5 μm to 5 μm.

[0013] In one embodiment, the thickness of the bonding adhesive layer is 1 μm to 80 μm.

[0014] The present invention also provides a method for forming a wafer bonding structure as described above, comprising the following steps:

[0015] Step S10: Form the dielectric layer on the bonding substrate;

[0016] Step S20: Form the bonding adhesive layer on the dielectric layer;

[0017] Step S30: Place the wafer to be bonded on the bonding adhesive layer.

[0018] In one embodiment, in step S10, the method for forming the dielectric layer is thermal oxidation, high-pressure oxidation, thermal decomposition deposition, anodic oxidation, electron beam evaporation, chemical vapor deposition, atomic layer deposition, physical vapor deposition, or sputtering.

[0019] Furthermore, the present invention also provides a method for fabricating a semiconductor device, comprising processing the above-described wafer bonding structure.

[0020] The aforementioned wafer bonding structure, through the sequential stacking of dielectric and bonding adhesive layers on a bonding carrier, allows for the differentiation of the wafer and carrier based on their different refractive indices. This wafer bonding structure not only achieves excellent bonding performance, maintaining a tight and intact bond even under harsh high-temperature processes such as high-temperature vacuum plasma bombardment or high-temperature annealing, but also facilitates subsequent measurement of the wafer thickness. Attached Figure Description

[0021] Figure 1 This is the wafer bonding structure of the present invention;

[0022] Figure 2 This is a flowchart of the method for forming the wafer bonding structure of the present invention;

[0023] Figure 3 The specific steps of the method for forming a specific wafer bonding structure in Example 1 are as follows; Attached image description:

[0025] 10: Wafer bonding structure; 110: Bonding carrier; 120: Dielectric layer; 130: Bonding adhesive layer; 140: Wafer to be bonded. Detailed Implementation

[0026] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0027] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of the invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified. In the description of the present invention, "a number" means at least one, such as one, two, etc., unless otherwise explicitly specified.

[0028] The terms "preferred," "more preferably," etc., used in this invention refer to embodiments of the invention that provide certain beneficial effects under certain circumstances. However, other embodiments may also be preferred under the same or other circumstances. Furthermore, the description of one or more preferred embodiments does not imply that other embodiments are unavailable, nor is it intended to exclude other embodiments from the scope of this invention.

[0029] When a numerical range is disclosed herein, the range is considered continuous and includes the minimum and maximum values ​​of the range, as well as every value between the minimum and maximum values. Furthermore, when the range refers to integers, it includes every integer between the minimum and maximum values ​​of the range. Additionally, when multiple ranges are provided to describe a feature or characteristic, the ranges may be combined. In other words, unless otherwise specified, all ranges disclosed herein should be understood to include any and all subranges to which they are incorporated.

[0030] When describing positional relationships, unless otherwise specified, when an element such as a layer, film, or substrate is referred to as being "on" another film layer, it may be directly on the other film layer or there may be intermediate film layers. Furthermore, when a layer is referred to as being "below" another layer, it may be directly below it or there may be one or more intermediate layers. It is also understood that when a layer is referred to as being "between" two layers, it may be the only layer between the two layers, or there may be one or more intermediate layers.

[0031] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as the second element, component, area, layer, or portion.

[0032] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “under” the other element or feature will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0033] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0034] When using “including,” “having,” and “contains” as described herein, the intention is to cover non-exclusive inclusion, unless an explicit qualifying term such as “only,” “consisting of,” etc., is used, in which case another component may be added.

[0035] Unless otherwise stated, a singular term may include a plural term and should not be understood as having a quantity of one.

[0036] Furthermore, the accompanying drawings are not drawn to a 1:1 scale, and the relative dimensions of the elements are shown in the drawings only as examples to facilitate understanding of the invention, but are not necessarily drawn to actual scale. The scale in the drawings does not constitute a limitation on the invention. It should be noted that when a component is referred to as "on another component," "connected to another component," "coupled to another component," or "in contact with another component," it can be directly on, connected to, coupled to, or in contact with that other component, or there may be an inserting component. In contrast, when a component is referred to as "directly on another component," "directly connected to," "directly coupled to," or "directly in contact with" another component, there is no inserting component. Similarly, when the first component is referred to as "electrically contacting" or "electrically coupling" to the second component, there is an electrical path between the first and second components that allows current to flow. This electrical path may include capacitors, coupled inductors, and / or other components that allow current to flow, even without direct contact between the conductive components.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0038] like Figure 1 As shown, the present invention provides a wafer bonding structure 10, including a bonding carrier 110, a dielectric layer 120, a bonding adhesive layer 130, and a wafer 140 to be bonded, which are stacked sequentially; wherein, the bonding carrier 110 is made of the same material as the wafer 140 to be bonded, and the dielectric layer 120 has a different refractive index than the materials of the bonding carrier 110 and the wafer 140 to be bonded.

[0039] Understandably, the above statement that the bonding carrier 110 and the wafer to be bonded 140 are made of the same material specifically means that the two are made of the same material and have the same texture. They are completely identical in appearance and cannot be distinguished from each other by appearance or other means.

[0040] The aforementioned wafer bonding structure 10, through the sequentially stacked dielectric layer 120 and bonding adhesive layer 130 on the bonding carrier 110, allows for the differentiation of the wafer 140 to be bonded and the bonding carrier 110 based on their different refractive indices compared to the dielectric layer 120. This wafer bonding structure not only achieves excellent bonding performance, maintaining a tight and intact bond even under harsh high-temperature processes such as high-temperature vacuum plasma bombardment or high-temperature annealing, but also facilitates subsequent measurement of the thickness of the wafer 140 to be bonded.

[0041] In one specific example, the material of the bonding carrier 110 and the material of the wafer 140 to be bonded are selected from at least one of silicon carbide, silicon, and gallium nitride.

[0042] Silicon carbide materials have higher breakdown electric field strength (2~4)×10 6 With a voltage of V / cm, its maximum junction temperature can reach 600℃. Silicon carbide materials possess comprehensive properties far superior to silicon materials. High-voltage silicon devices can only be used in conditions with junction temperatures below 200℃, and the blocking voltage is limited to several kilovolts. Due to its wider band gap, silicon carbide possesses a higher breakdown electric field and a lower intrinsic carrier concentration, both of which enable devices to operate at high voltages and high temperatures. In addition, due to its higher saturation migration velocity and lower dielectric constant, silicon carbide devices exhibit good high-frequency characteristics. The band gap of silicon carbide is 2.8 times that of silicon, and its saturation electron velocity is twice that of silicon, making it more suitable for fabricating high-power devices and high-frequency microwave devices. Furthermore, the critical breakdown electric field of silicon carbide is 10 times that of silicon, which can significantly reduce the energy loss of silicon carbide semiconductor devices during operation. Due to its high thermal conductivity, silicon carbide can also be used as a heat sink or heat dissipation material. Devices made from it can withstand higher power densities, improve integration density, and have better stability, making them suitable for harsh operating environments.

[0043] Gallium nitride (GaN) is an extremely stable compound and a hard, high-melting-point material with a melting point of approximately 1700°C. GaN exhibits high ionization, the highest among group III-V compounds (0.5 or 0.43). Under atmospheric pressure, GaN crystals typically have a hexagonal wurtzite structure. It contains four atoms per unit cell, and its atomic volume is approximately half that of gallium arsenide, making it suitable for fabricating optoelectronic devices, high-temperature high-power devices, and high-frequency microwave devices.

[0044] Preferably, both the bonding carrier and the wafer to be bonded are made of silicon carbide.

[0045] In a specific example, the dielectric layer is made of silicon dioxide or metal.

[0046] In a specific example, the coefficient of thermal expansion of the dielectric layer material is less than that of the carrier and the wafer to be bonded, to avoid stress bending caused by deformation at high temperatures, which could lead to fragmentation in severe cases.

[0047] Understandably, metals include elemental metals and metal alloys. Specifically, the metal is tungsten, aluminum, or copper, or an alloy of at least two of the metals selected from tungsten, aluminum, and copper.

[0048] Furthermore, the aforementioned metals are tungsten, aluminum, copper, tungsten-aluminum alloys, aluminum-copper alloys, or tungsten-copper alloys.

[0049] Preferably, the metal is aluminum.

[0050] In one specific example, the thickness of the dielectric layer is 0.1 μm to 10 μm.

[0051] Further, the thickness of the dielectric layer is 0.5 μm to 5 μm. Preferably, the thickness of the dielectric layer can be, but is not limited to, 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm or 5 μm.

[0052] In one specific example, the thickness of the bonding adhesive layer is 1 μm to 80 μm.

[0053] Preferably, the thickness of the bonding adhesive layer is 5 μm to 80 μm.

[0054] Specifically, the thickness of the bonding adhesive can be, but is not limited to, 5μm, 10μm, 15μm, 20μm, 25μm, 30μm, 35μm, 40μm, 45μm, 50μm, 55μm, 60μm, 65μm, 70μm, 75μm or 80μm.

[0055] Furthermore, such as Figure 2 As shown, the present invention also provides a method for forming the above-mentioned wafer bonding structure, comprising the following steps:

[0056] Step S10: Form a dielectric layer on the bonding substrate;

[0057] Step S20: Form a bonding adhesive layer on the dielectric layer;

[0058] Step S30: Place the wafer to be bonded on the bonding adhesive layer.

[0059] It should be understood that, although Figure 2 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders.Figure 2 At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0060] Understandably, the above description of placing the substrate to be bonded in the bonding adhesive layer is only one bonding method. For the above bonding process, a bonding adhesive layer can also be formed on the wafer to be bonded first, and then further compounded with the bonding substrate having a dielectric layer to form a bonding substrate, dielectric layer, bonding adhesive layer and wafer to be bonded stacked in sequence.

[0061] In a specific example, in step S10, the method for forming the dielectric layer is thermal oxidation, high-pressure oxidation, thermal decomposition deposition, anodic oxidation, electron beam evaporation, chemical vapor deposition, atomic layer deposition, physical vapor deposition, or sputtering.

[0062] Understandably, when the aforementioned dielectric layer is a silicon dioxide layer, the method of formation may include, but is not limited to, thermal oxidation, high-pressure oxidation, thermal decomposition deposition, anodic oxidation, electron beam evaporation, or chemical vapor deposition.

[0063] Furthermore, when the dielectric layer is a metal layer, the method of formation can be, but is not limited to, chemical vapor deposition, atomic layer deposition, physical vapor deposition, or sputtering.

[0064] Furthermore, the sputtering methods described above can be, but are not limited to, DC sputtering, AC sputtering, reactive sputtering, and magnetron sputtering.

[0065] Wafer bonding using bonding adhesives is an important bonding technology. It involves placing an organic bonding adhesive between the surfaces of two wafers, followed by curing to form an intermediate layer with a certain bonding strength, thus allowing the two wafers to adhere tightly. This method has advantages such as simple process, low cost, low introduced stress, low bonding temperature (tB), low requirements on surface morphology, and high bonding strength, and is widely used in advanced microelectronics manufacturing. Traditional bonding adhesives generally consist of organic media, solvents, additives, and fillers, with a curing temperature mostly around 150℃. Commonly used organic media include epoxy resins, silicone resins, acrylic resins, and polyimides, among which epoxy resins provide stronger adhesion, while silicone resins provide higher thermal stability. The boiling point of the solvent should be higher than the curing temperature of the bonding adhesive to avoid the formation of bubbles during curing. Additives enhance the performance of the bonding adhesive, such as adhesion and tack. Fillers improve the thermal and electrical conductivity of the bonding adhesive; commonly used fillers include graphite, ceramics, and metal particles.

[0066] The general steps for wafer bonding using bonding adhesive are as follows: ① Clean and dry the surface of the wafers to be bonded; ② Spin coat the bonding adhesive evenly onto one or both surfaces of the wafer pair, the thickness of which should be sufficient to compensate for particles or defects on the wafer surface; ③ Pre-cure the bonding adhesive; ④ Align and bond the wafer pair and place them in a vacuum chamber, where the bonding adhesive is cured under a certain pressure and specific temperature; ⑤ Purge the chamber, cool, and release the bonding pressure.

[0067] Understandably, the above-mentioned method for forming the bonding adhesive layer may be, but is not limited to, coating.

[0068] Furthermore, the present invention also provides a method for fabricating a semiconductor device, comprising processing the above-described wafer bonding structure.

[0069] Understandably, after the bonding is completed as described above, subsequent processes are performed on the unbonded side of the wafer to be bonded. Furthermore, the subsequent processes may include, but are not limited to, thinning processes, metal sputtering processes, or evaporation coating processes.

[0070] Furthermore, the above-mentioned methods for fabricating semiconductor devices may include, but are not limited to, methods for packaging semiconductor devices.

[0071] The following specific embodiments further illustrate the wafer bonding method of the present invention in detail. Unless otherwise specified, all raw materials are commercially available.

[0072] Example 1

[0073] like Figure 3 As shown, this embodiment provides a wafer bonding structure and a method for forming the same. The specific steps for forming the silicon carbide wafer bonding structure to be bonded are as follows:

[0074] Step S10: A silicon dioxide layer with a thickness of 500 nm to 10 μm is formed on the silicon carbide bonding carrier 110 by thermal oxidation as a dielectric layer 120;

[0075] Step S20: Coat a bonding adhesive layer 130 with a thickness of 5μm to 80μm on the silicon dioxide layer;

[0076] Step S30: A silicon carbide wafer 140 to be bonded is formed on the bonding adhesive layer 130 to obtain the wafer bonding structure of this embodiment.

[0077] Example 2

[0078] This embodiment provides a wafer bonding structure and a method for forming the same. The specific steps for forming the silicon carbide wafer bonding structure to be bonded are as follows:

[0079] Step S10: A 100 nm to 5 μm thick aluminum layer is formed on the silicon carbide bonding carrier 110 by magnetron sputtering as a dielectric layer 120;

[0080] Step S20: Coat a bonding adhesive layer 130 with a thickness of 5μm to 80μm on the silicon dioxide layer;

[0081] Step S30: A silicon carbide wafer 140 to be bonded is formed on the bonding adhesive layer 130 to obtain the wafer bonding structure of this embodiment.

[0082] The aforementioned wafer bonding structure, through the sequential stacking of dielectric and bonding adhesive layers on a bonding carrier, allows for the differentiation of the wafer and carrier based on their different refractive indices. This wafer bonding structure not only achieves excellent bonding performance, maintaining a tight and intact bond even under harsh high-temperature processes such as high-temperature vacuum plasma bombardment or high-temperature annealing, but also facilitates subsequent measurement of the wafer thickness.

[0083] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0084] The embodiments described above are merely illustrative of several implementations of the present invention, designed to facilitate a detailed understanding of the technical solutions of the present invention, but should not be construed as limiting the scope of protection of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the scope of protection of the present invention. It should be understood that technical solutions obtained by those skilled in the art based on the technical solutions provided by the present invention through logical analysis, reasoning, or limited experimentation are all within the scope of protection of the appended claims. Therefore, the scope of protection of this invention patent should be determined by the content of the appended claims, and the specification and drawings can be used to interpret the content of the claims.

Claims

1. A wafer bonding structure, characterized in that, It includes a bonding carrier, a dielectric layer, a bonding adhesive layer and a wafer to be bonded, which are stacked in sequence. The bonding carrier and the wafer to be bonded are both made of silicon carbide. The refractive index of the dielectric layer is different from that of the bonding carrier and the wafer to be bonded. The coefficient of thermal expansion of the dielectric layer is less than that of the bonding carrier and the wafer to be bonded.

2. The wafer bonding structure as described in claim 1, characterized in that, The dielectric layer is made of silicon dioxide or metal.

3. The wafer bonding structure as described in claim 2, characterized in that, The metal is tungsten, aluminum, or copper, or an alloy of at least two of the metals selected from tungsten, aluminum, and copper.

4. The wafer bonding structure as described in claim 1, characterized in that, The thickness of the dielectric layer is 0.1 μm to 10 μm.

5. The wafer bonding structure as described in claim 4, characterized in that, The thickness of the dielectric layer is 0.5 μm to 5 μm.

6. The wafer bonding structure as described in claim 1, characterized in that, The thickness of the bonding adhesive layer is 1μm to 80μm.

7. A method for forming a wafer bonding structure as described in any one of claims 1 to 6, characterized in that, Includes the following steps: step S10: Form the dielectric layer on the bonding substrate; Step S20: Form the bonding adhesive layer on the dielectric layer; Step S30: Place the wafer to be bonded on the bonding adhesive layer.

8. A method for fabricating a semiconductor device, characterized in that, This includes processing the wafer bonding structure as described in any one of claims 1 to 6.

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