Control System of Synchronous Rectifier in Active Clamp Converter

Abstract

The present invention discloses a control system for a synchronous rectifier in an active clamp converter, comprising a signal transmission and isolation circuit for converting an input control signal v GSP3 Converted into an intermediate control signal v R1_ctrl , and realize electrical isolation; the control signal v GSP3 Active clamp tube S P3 The driving control signal generating circuit is used to generate a driving control signal according to the intermediate control signal v R1_ctrl Generate synchronous rectifier S R1 The control signal v GSR1 The present invention can effectively suppress premature shutdown caused by package parasitic inductance, improving converter efficiency and output voltage control accuracy. The circuit utilizes high-frequency isolation, and the high-frequency transformer can be implemented as an air-core transformer composed of PCB windings. This compact design helps improve the converter's power density. Furthermore, the present invention helps reduce the turn-on delay of the synchronous rectifier, shortening the body diode conduction time and improving conversion efficiency.

Description

Technical Field

[0001] The invention belongs to the field of synchronous rectifier tube control, in particular to a control system of a synchronous rectifier tube in an active clamping converter. Background Art

[0002] Active clamp converters, such as active clamp flyback converters ( Figure 1 (a)) and the double-clamped zero-voltage converter ( Figure 1 (b) has the characteristics of simple circuit structure, input and output electrical isolation, etc., and can recover the leakage inductance energy of the transformer, effectively suppress the voltage spike problem, and at the same time realize zero-voltage turn-on of the switch tube, so it is widely used in power conversion occasions requiring high efficiency, high switching frequency, and high power density.

[0003] like Figure 1 As shown in (b), the double-clamped zero-voltage converter is mainly composed of the primary side switch tube S P1 ~S P4 , power transformer T1 (including magnetizing inductor L m And the primary side equivalent leakage inductance L r ), clamping capacitor C L , secondary side synchronous rectifier S R1 and output filter capacitor C o Composition, of which S P3 It is an active clamp tube. The typical working waveform of the converter is as follows: Figure 2 As shown in Figure 1, the converter has three main working stages in one switching cycle, including the input energy storage stage (t0~t1), the power transmission stage (t1~t2) and the current clamping stage (t2~t3). In the input energy storage stage (t0~t1), the primary side switch tube S P1 and S P4 On, input voltage V in Applied to the primary side of the power transformer T1, due to the leakage inductance L r Much smaller than the magnetizing inductance L m , magnetizing inductor current i Lm Linear rise, slope is V in / L m At time t1, S P1 and S P4 Shutdown, the input energy storage phase ends, after which the primary switch tube S P2 and S P3 And the secondary side synchronous rectifier S R1 When the converter is turned on, it enters the power transmission stage (t1~t2), and the magnetizing inductor L m Transfer energy to the load, exciting the inductor current i Lm Linear decrease, slope is -V CL / L m , due to Lr Much smaller than L m , then V CL / n=V o , where n is the ratio of the primary turns of the power transformer T1 to the secondary turns, that is, the clamping capacitor voltage V CL and the output voltage V o is proportional to the clamping capacitor voltage V CL To achieve closed-loop control of the output voltage, no signal isolation circuit is required, the implementation is simple, and it is beneficial to improve the power density of the converter; at the same time, the clamping capacitor C L and leakage inductance L r Resonance and absorption of its energy, to avoid voltage spikes, because the leakage inductance energy is not transferred to the secondary side, the design ensures that L r Much smaller than L m And with the clamping capacitor C L The resonant frequency is much higher than the switching frequency of the converter (Clamp C L It is also required to be relatively small) to achieve high-precision output voltage control and efficient power conversion. At time t2, the magnetizing inductor current i Lm To zero, S P3 and S R1 Turn off, the power transmission phase ends, and then the primary switch tube S P4 When the converter is turned on, it enters the current clamping stage (t2~t3), the voltage across the primary side of the transformer is zero, and the magnetizing inductor current i Lm remains unchanged, and its negative current is S P3 、S P4 and S R1 The parasitic capacitance and magnetizing inductance L m Resonance generation ( Figure 2 (a) t2~t 2a stage).

[0004] The double-clamped zero-voltage converter adopts synchronous rectification control on the secondary side to reduce the conduction loss of the rectifier tube and improve the converter efficiency. The synchronous rectification driver samples the synchronous rectifier tube S R1 The voltage across the drain and source is used to determine the zero voltage turn-on and zero current turn-off to generate S R1 The driving control signal v GSR1 , that is, when the drain-source voltage is lower than the turn-off threshold voltage V th_on When S R1 , when the drain-source voltage is higher than the turn-off threshold voltage V th_off When S is turned off R1 According to the above analysis, the double-clamped zero-voltage converter is designed to ensure that the leakage inductance L r and the clamping capacitor C LThe resonant frequency is much higher than the switching frequency of the converter to achieve high-precision output voltage regulation and efficient power conversion. Therefore, as shown in Figure 2(b), the current flowing through the secondary synchronous rectifier will contain a high-frequency resonant component and an inductive voltage component L introduced by the package parasitic inductance of the synchronous rectifier. S ×(di SR1 / dt), which will lead to premature shutdown, making the body diode conduction time longer, thereby deteriorating the converter efficiency and output voltage control accuracy, etc. S The parasitic inductance of the switch tube package. To address this issue, the paper "D. Fu, et al. A Novel Driving Scheme for Synchronous Rectifiers in LLC Resonant Converters. IEEE Trans. on Power Electron., vol. 24, no. 5, pp. 1321-1329, May 2009" proposes an RC-based compensation circuit. However, the compensation effect is easily affected by factors such as parameter tolerance and temperature. Furthermore, the compensation circuit's device parameters must be adjusted based on the switch tube selection, the number of series and parallel connections, and PCB layout, resulting in limited versatility. Summary of the Invention

[0005] The object of the present invention is to provide a control system for synchronous rectifier tubes in an active clamped converter in order to solve the problems existing in the prior art.

[0006] The technical solution for achieving the object of the present invention is: a control system for a synchronous rectifier tube in an active clamp converter, the system comprising a signal transmission and isolation circuit and a drive signal generation circuit;

[0007] The signal transmission and isolation circuit is used to convert the input control signal v GSP3 Converted into an intermediate control signal v R1_ctrl , and realize electrical isolation; the control signal v GSP3 Active clamp tube S P3 The driving control signal;

[0008] The driving signal generating circuit is used to generate a signal according to the intermediate control signal v R1_ctrl Generate synchronous rectifier S R1 The control signal v GSR1 .

[0009] Furthermore, the signal transmission and isolation circuit includes a high-pass filter circuit, a high-frequency isolation circuit and a low-pass filter circuit, wherein:

[0010] The high-pass filter circuit is used to filter out the control signal v GSP3 The low-frequency components in the output are output on the rising and falling edges;

[0011] The high-frequency isolation circuit is used to transmit high-frequency signals;

[0012] The low-pass filter circuit is used to filter out high-frequency interference signals.

[0013] Furthermore, the driving signal generating circuit includes a first capacitor, a first resistor, a bias voltage V bias , a first comparator, a second comparator, a first RS flip-flop and a first driver;

[0014] The intermediate control signal v R1_ctrl The first capacitor is input to the positive input terminal of the first comparator and the negative input terminal of the second comparator. At the same time, the positive input terminal of the first comparator and the negative input terminal of the second comparator are connected to the bias voltage V through the first resistor. bias The negative input terminal of the first comparator and the positive input terminal of the second comparator are respectively input with the turn-on threshold voltage V th1 and the turn-off threshold voltage V th2 The output terminals of the first comparator and the second comparator are connected to the S terminal and the R terminal of the first RS trigger respectively, and the Q terminal of the first RS trigger outputs the synchronous rectifier tube S after passing through the first driver. R1 The control signal v GSR1 .

[0015] Furthermore, the driving signal generating circuit includes a second capacitor, a third capacitor, a second resistor to a fifth resistor, a bias voltage V bias , a third comparator, a fourth comparator, a second RS flip-flop and a second driver;

[0016] The intermediate control signal v R1_ctrl The positive input terminal of the third comparator and the negative input terminal of the fourth comparator are connected through the second capacitor, and the positive input terminal of the third comparator is connected to the bias voltage V through the second resistor. bias , intermediate control signal v R1_ctrl The negative input terminal of the third comparator and the positive input terminal of the fourth comparator are connected through the third capacitor, and the negative input terminal of the third comparator is connected to the bias voltage V through the third resistor. bias The positive input terminal of the third comparator and the negative input terminal of the fourth comparator are connected to the output terminal of the third comparator and the S terminal of the second RS trigger through a fourth resistor. The positive input terminal of the fourth comparator is connected to the output terminal of the fourth comparator and the R terminal of the second RS trigger through a fifth resistor. The Q terminal of the second RS trigger outputs the synchronous rectifier tube S after passing through the second driver. R1 The control signal v GSR1 .

[0017] Compared with the prior art, the present invention has the following significant advantages: (1) it can effectively suppress the problem of premature shutdown caused by package parasitic inductance, thereby improving the converter efficiency and output voltage control accuracy; (2) the circuit adopts high-frequency isolation, and the high-frequency transformer can be realized by an air-core transformer composed of PCB windings, which is small in size and is conducive to improving the power density of the converter; (3) it helps to reduce the turn-on delay of the synchronous rectifier tube, shorten the body diode conduction time, and improve the conversion efficiency.

[0018] The present invention is further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 Schematic diagram of active clamped converter, where (a) is an active clamped flyback converter and (b) is a double clamped zero voltage converter.

[0020] Figure 2 (a) is the typical working waveform of the double-clamped zero-voltage converter. Figure 2 (b) is the operating waveform when the converter is shut down prematurely due to package parasitic inductance.

[0021] Figure 3 The figure is a schematic diagram of the circuit structure of the control system of the synchronous rectifier tube in the active clamped converter of the present invention.

[0022] Figure 4 Figure 2 is a specific implementation method of the signal transmission and isolation circuit and its key working waveforms, where Figure (a) is a schematic diagram of the circuit structure of the signal transmission and isolation circuit, and Figure (b) is a specific implementation circuit of the signal transmission and isolation circuit, and its key working waveforms are shown in (c).

[0023] Figure 5 Detailed description of the embodiment 1 of the driving signal generating circuit and its key working waveforms, wherein Figure (a) is the embodiment 1 of the driving signal generating circuit and Figure (b) is the key working waveforms of Figure (a).

[0024] Figure 6 This is a second specific implementation of a driving signal generating circuit and its key working waveforms, wherein Figure (a) is a second specific implementation of a driving signal generating circuit, and Figure (b) is a key working waveform of Figure (a).

[0025] Figure 7 These are simulation waveforms of a specific implementation of a drive signal generating circuit, wherein Figure (a) is a simulation waveform when the system adopts the first specific implementation of the drive signal generating circuit, and Figure (b) is a simulation waveform when the system adopts the second specific implementation of the drive signal generating circuit.

[0026] Figure 8The figure is a comparison diagram of experiments before and after using the control system of the synchronous rectifier tube in the active clamp converter of the present invention. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0028] It should be noted that if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in this field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0029] The present invention takes a double-clamped zero-voltage converter as an embodiment. It should be noted that the solution of the present invention can also be used in circuit topologies such as an active-clamped flyback converter.

[0030] According to the working principle analysis of the double-clamped zero-voltage converter, its secondary side synchronous rectifier tube S R1 The driving control signal and the primary side active clamp tube S P3 The driving control signal is the same, so the active clamp tube S P3 The driving control signal v GSP3 To generate S R1 The driving control signal v GSR1 , to avoid the premature shutdown problem caused by package parasitic inductance, thereby improving conversion efficiency and output voltage control accuracy.

[0031] Figure 3 The circuit structure diagram of the control system proposed in the present invention is given, which includes a signal transmission and isolation circuit and a drive signal generating circuit. The signal transmission and isolation circuit converts the input control signal v GSP3 Converted into an intermediate control signal v R1_ctrl , and realize electrical isolation, the driving signal generating circuit is based on the intermediate control signal v R1_ctrl Generate synchronous rectifier S R1 The control signal v GSR1 .

[0032] Figure 4The specific implementation of the signal transmission and isolation circuit in the control system and the key working waveforms are given. Figure 4 As shown in (a), the signal transmission and isolation circuit consists of a high-pass filter circuit, a high-frequency isolation circuit and a low-pass filter circuit, wherein the high-pass filter circuit filters the control signal v GSP3 The low-frequency components in the circuit are outputted by taking its rising and falling edges. The isolation circuit only needs to transmit high-frequency signals, so a small-volume high-frequency transformer can be selected, which is conducive to improving the power density of the converter. The low-pass filter circuit is used to filter out very high-frequency interference signals, such as the common-mode interference caused by the fast dv / dt of the switching tube, to avoid the circuit malfunction caused by the subsequent drive signal. When designing, ensure that the high-pass filter cutoff frequency f H0 and the low-pass filter cutoff frequency f L0 Satisfies the relationship f H0 <f L0 , f L0 =5~10f H0 .

[0033] Figure 4 (b) shows a specific implementation circuit of the signal transmission and isolation circuit, and its key working waveforms are as follows Figure 4 (c) is shown. The high-pass filter circuit consists of capacitor C H1 , resistor R H1 and high frequency transformer T H1 The magnetizing inductance L H1 The high-frequency transformer realizes the electrical isolation transmission of high-frequency signals, and its turns ratio is 1:1. The low-pass filter circuit is composed of resistor R L1 and capacitor C L1 Composition, and there is f L0 =1 / (R L1 ·C L1 ). The transfer function of the high-pass filter circuit is:

[0034]

[0035] where ω n =2πf H0 ,for:

[0036]

[0037] When designing, ensure that the high-pass filter circuit works in an overdamped state, then:

[0038]

[0039] That is, resistance R H1 , capacitor C H1 and high frequency transformer T H1 The magnetizing inductance LH1 The following relationship is satisfied:

[0040]

[0041] According to the step response characteristics of the second-order overdamped system, GSP3 When the rising and falling edges of the signal come, the capacitor C H1 The voltage across the terminals and the current flowing through the inductor L H1 The direction of the current remains unchanged, that is, it flows through the inductor L H1 The absolute value of the current will increase first and then decrease, and will not commutate, but the inductance L H1 The voltage across the two ends will reverse, for example, v GSP3 When the rising edge of the signal comes, the inductor L H1 The voltage at both ends first suddenly changes to V GSP3 , and then quickly decrease to -V σ , and then return to zero voltage. The typical working waveform is as follows Figure 5 (b) shown, where V GSP3 is the control signal v GSP3 The high level voltage value, V σ is the step response commutation voltage, and:

[0042]

[0043] Among them, L -1 () is the symbol of inverse Laplace transform, and min() is the minimum operator symbol.

[0044] The driving signal output circuit is based on the intermediate control signal v R1_ctrl The rising and falling edges of the synchronous rectifier S R1 The turn-on and turn-off enable signals control S R1 The disconnection.

[0045] Figure 5 (a) provides a specific implementation circuit of a driving signal generating circuit, including a first capacitor C1, a first resistor R1, a bias voltage V bias , the first comparator CP1 and the second comparator CP2, the first RS flip-flop RS1 and the first driver B1, V th1 and V th2 are the turn-on threshold voltage and turn-off threshold voltage, respectively, v C1 is the voltage at the connection point between the first capacitor C1 and the first resistor R1.

[0046] Combine Figure 5 (b) shows the key working waveforms, and the working principle of the circuit is explained as follows: For the intermediate control signal v R1_ctrlAs far as the first capacitor C1 and the first resistor R1 are concerned, they play the role of high-pass filtering, and the high-frequency intermediate control signal v R1_ctrl can be transmitted to the connection point between the first capacitor C1 and the first resistor R1, and for the bias voltage V bias As far as the first capacitor C1 and the first resistor R1 are concerned, they play the role of low-pass filtering, and the bias voltage V bias The DC component can be transferred to the connection point between the first capacitor C1 and the first resistor R1, that is, the voltage v C1 =V bias +v R1_ctrl .

[0047] In the control signal v GSP3 When the rising edge of comes, the signal isolation and transmission circuit takes its rising edge, making the voltage v C1 >V th1 and v C1 >V th2 The first comparator CP1 outputs a high level, the second comparator CP2 outputs a low level, the first RS trigger RS1 is set and outputs a high level, and after the first driver B1 amplifies the current capability, the control signal v GSR1 Output high level, turn on synchronous rectifier S R1 , then the voltage v C1 Restore to V bias , and there is v C1 <V th1 and v C1 >V th2 , the first comparator CP1 and the second comparator CP2 both output low level, the output of the first RS trigger RS1 remains unchanged, and the control signal v GSR1 Keep high level, synchronous rectifier S R1 Maintain the open state; when the control signal v GSP3 When the falling edge of comes, the signal isolation and transmission circuit takes its falling edge, making the voltage v C1 <V th1 and v C1 <V th2 The first comparator CP1 outputs a low level, the second comparator CP2 outputs a high level, the first RS trigger RS1 is reset and outputs a low level, and after the first driver B1 amplifies the current capability, the control signal v GSR1 Output low level, turn off the synchronous rectifier S R1 , then the voltage v C1 Restore to V bias , and there is v C1 <V th1 and v C1 >V th2 , comparators CP1 and CP2 both output low level, the output of the first RS flip-flop RS1 remains unchanged, and the control signal vGSR1 Keep low level, synchronous rectifier S R1 Maintain the off state.

[0048] When designing, ensure that the bias voltage V bias , turn-on threshold voltage V th1 , turn-off threshold voltage V th2 and commutation voltage V σ The following relations are satisfied:

[0049] V th1 >V bias +V σ

[0050] V th2 <V bias -V σ

[0051] Figure 6 (a) shows another specific implementation circuit of the driving signal generating circuit, including a second capacitor C2, a third capacitor C3, a second resistor R2 to a fifth resistor R5, a bias voltage V bias , the third comparator CP3, the fourth comparator CP4, the second RS flip-flop RS2 and the second driver B2, and C2=C3, R2=R3, R4=R5, v C2 is the voltage at the connection point between the second capacitor C2 and the second resistor R2, v C3 is the voltage at the connection point between the third capacitor C3 and the third resistor R3.

[0052] Combine Figure 6 The key working waveforms shown in (b) explain the working principle of the circuit as follows: Figure 5 The circuit shown in (a) has the same principle, and the voltage v C2 and v C3 is the intermediate control signal v R1_ctrl and bias voltage V bias Consider the superposition of capacitors C2 and C3 on the high-frequency intermediate control signal v R1_ctrl The partial pressure is v C2 =V bias +0.5v R1_ctrl 、v C2 =V bias -0.5v R1_ctrl .

[0053] In the control signal v GSP3 When the rising edge of comes, the signal isolation and transmission circuit takes its rising edge, so that the intermediate control signal v R1_ctrl >0, then v C2 >v C3The third comparator CP3 outputs a high level, the fourth comparator CP4 outputs a low level, the second RS trigger RS2 is set and outputs a high level, and after the first driver B1 amplifies the current capability, the control signal v GSR1 Output high level, turn on synchronous rectifier S R1 , then the voltage v C2 and v C3 Returning to the steady-state value, due to the hysteresis voltage introduced by resistors R4 and R5, we have:

[0054]

[0055]

[0056] Where V CC is the output high level voltage of the third comparator CP3 and the fourth comparator CP4. C2 >v C3 The third comparator CP3 outputs a high level, the fourth comparator CP4 outputs a low level, the second RS flip-flop RS2 outputs a high level, and the control signal v GSR1 Keep high level, synchronous rectifier S R1 Keep it open.

[0057] In the control signal v GSP3 When the falling edge of comes, the signal isolation and transmission circuit takes its falling edge, so that the intermediate control signal v R1_ctrl <0, then v C2 <v C3 The third comparator CP3 outputs a low level, the fourth comparator CP4 outputs a high level, the second RS trigger RS2 is reset and outputs a low level, and after the first driver B1 amplifies the current capability, the control signal v GSR1 Output low level, turn off the synchronous rectifier S R1 , then the voltage v C2 and v C3 Returning to the steady-state value, due to the hysteresis effect introduced by resistors R4 and R5, we have:

[0058]

[0059]

[0060] There is still v C2 <v C3 The third comparator CP3 outputs a low level, the fourth comparator CP4 outputs a high level, the second RS flip-flop RS2 outputs a low level, and the control signal v GSR1 Keep low level, synchronous rectifier S R1 Maintain the off state.

[0061] When designed, the third comparator CP3 and the fourth comparator CP4 output a high level voltage V CC and commutation voltage V σ The following relations are satisfied:

[0062]

[0063] To further verify the effectiveness of the system described in the present invention, Figure 7 and Figure 8 The simulation and experimental results of specific embodiments are given. Figure 7 (a) is a key point simulation waveform of the first embodiment of the driving signal generating circuit. Figure 7 (b) is the key point simulation waveform of the second embodiment of the driving signal generating circuit. The waveform is consistent with the theory. It can be seen that the system can be based on the active clamping transistor S P3 The control signal v GSP3 Generate synchronous rectifier S R1 The control signal v GSR1 , achieving accurate synchronous rectification control, i.e. zero voltage turn-on and zero current turn-off. Figure 8 The experimental comparison diagram before and after the system of the present invention is given. Before the adoption (synchronous rectification driver solution), due to the influence of the package parasitic inductance, the synchronous rectifier tube S R1 There is a serious premature shutdown problem (v GSR1 The falling edge time is greater than v GSP3 A lot in advance), and the opening delay is also very large (v GSR1 The rising edge time is greater than v GSP3 Late), using the solution of the present invention, the synchronous rectifier tube S R1 The control signal v GSR1 and active clamp tube S P3 The control signal v GSP3 They are basically completely consistent, there is no premature shutdown, and the turn-on delay is also reduced, which can effectively reduce the body diode conduction time, reduce conduction loss, and improve output voltage control accuracy.

[0064] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are only illustrative of the principles of the present invention. Without departing from the spirit and scope of the present invention, any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention shall be included in the scope of protection of the present invention.

Claims

1. A control system for a synchronous rectifier in an active clamp converter, characterized in that: The system includes a signal transmission and isolation circuit and a drive signal generating circuit; The signal transmission and isolation circuit is used to convert the input control signal v GSP3 Converted into an intermediate control signal v R1_ctrl , and realize electrical isolation; the control signal v GSP3 Active clamp tube S P3 The driving control signal; The driving signal generating circuit is used to generate a signal according to the intermediate control signal v R1_ctrl Generate synchronous rectifier S R1 The control signal v GSR1 ; The signal transmission and isolation circuit includes a high-pass filter circuit, a high-frequency isolation circuit and a low-pass filter circuit, wherein: The high-pass filter circuit is used to filter out the control signal v GSP3 The low-frequency components in the output are output on the rising and falling edges; The high-frequency isolation circuit is used to transmit high-frequency signals; The low-pass filter circuit is used to filter out high-frequency interference signals; The high-frequency isolation circuit includes a high-frequency transformer T H1 , the high-pass filter circuit includes capacitor C H1 , resistor R H1 and the high frequency transformer T H1 The primary equivalent magnetizing inductance L H1 , the low-pass filter circuit includes resistor R L1 and capacitor C L1 , and f L0 =1 / (R L1 ·C L1 ); the control signal v GSP3 Input phase series capacitor C H1 , resistor R H1 , the resistor R H1 and magnetizing inductance L H1 That is, high-frequency transformer T H1 The primary side of the high frequency transformer T H1 The secondary side is connected in series with the resistor R L1 and capacitor C L1 , capacitor C L1 Both ends output intermediate control signal v R1_ctrl ; The transfer function of the high-pass filter circuit is: where ω n =2πf H0 ,for: When designing, ensure that the high-pass filter circuit works in an overdamped state, then: That is, resistance R H1 , capacitor C H1 and high frequency transformer T H1 The magnetizing inductance L H1 The following relationship is satisfied: Magnetizing inductance L H1 Step response commutation voltage V σ for: Where, L -1 () is the symbol of inverse Laplace transform, and min() is the minimum operator symbol.

2. The control system of the synchronous rectifier in the active clamp converter according to claim 1, characterized in that: The high-pass filter circuit cutoff frequency f H0 And the low-pass filter circuit cutoff frequency f L0 Satisfies the relationship f H0 <f L0 .

3. The control system of the synchronous rectifier in the active clamp converter according to claim 2, characterized in that: The f L0 =5f H0 ~10f H0 .

4. The control system of the synchronous rectifier in the active clamp converter according to claim 1, characterized in that: The driving signal generating circuit includes a first capacitor (C1), a first resistor (R1), a bias voltage V bias , a first comparator (CP1), a second comparator (CP2), a first RS flip-flop (RS1) and a first driver (B1); The intermediate control signal v R1_ctrl The voltage is input to the positive input terminal of the first comparator (CP1) and the negative input terminal of the second comparator (CP2) through the first capacitor (C1), and the positive input terminal of the first comparator (CP1) and the negative input terminal of the second comparator (CP2) are connected to the bias voltage V through the first resistor (R1). bias The negative input terminal of the first comparator (CP1) and the positive input terminal of the second comparator (CP2) are respectively input with the turn-on threshold voltage V th1 and the turn-off threshold voltage V th2 The output terminals of the first comparator (CP1) and the second comparator (CP2) are connected to the S terminal and the R terminal of the first RS trigger (RS1), respectively. The Q terminal of the first RS trigger (RS1) outputs the synchronous rectifier S after passing through the first driver (B1). R1 The control signal v GSR1 .

5. The control system of the synchronous rectifier in the active clamp converter according to claim 4, characterized in that: The bias voltage V bias , turn-on threshold voltage V th1 , turn-off threshold voltage V th2 and step response commutation voltage V σ The following relations are satisfied: V th1 >V bias +V σ V th2 <V bias -V σ 。 6. The control system of the synchronous rectifier in the active clamp converter according to claim 1, characterized in that: The driving signal generating circuit includes a second capacitor (C2), a third capacitor (C3), a second resistor (R2) to a fifth resistor (R5), a bias voltage V bias , a third comparator (CP3), a fourth comparator (CP4), a second RS flip-flop (RS2) and a second driver (B2); The intermediate control signal v R1_ctrl The positive input terminal of the third comparator (CP3) and the negative input terminal of the fourth comparator (CP4) are connected via the second capacitor (C2), and the positive input terminal of the third comparator (CP3) is also connected to the bias voltage V through the second resistor (R2). bias , intermediate control signal v R1_ctrl The negative input terminal of the third comparator (CP3) and the positive input terminal of the fourth comparator (CP4) are connected via a third capacitor (C3), and the negative input terminal of the third comparator (CP3) is connected to the bias voltage V through a third resistor (R3). bias The positive input terminal of the third comparator (CP3) and the negative input terminal of the fourth comparator (CP4) are connected to the output terminal of the third comparator (CP3) and the S terminal of the second RS trigger (RS2) through a fourth resistor (R4); the positive input terminal of the fourth comparator (CP4) is connected to the output terminal of the fourth comparator (CP4) and the R terminal of the second RS trigger (RS2) through a fifth resistor (R5); the Q terminal of the second RS trigger (RS2) outputs the synchronous rectifier tube S after passing through the second driver (B2). R1 The control signal v GSR1 .

7. The control system of the synchronous rectifier in the active clamp converter according to claim 6, characterized in that: The numerical relationships among the second capacitor (C2), the third capacitor (C3), and the second resistor (R2) to the fifth resistor (R5) are: C2=C3, R2=R3, and R4=R5.

8. The control system of the synchronous rectifier in the active clamp converter according to claim 6, characterized in that: The third comparator (CP3) and the fourth comparator (CP4) output a high level voltage V CC and step response commutation voltage V σ The following relations are satisfied:

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