A watchdog-based combined reset device and method

Abstract

This invention provides a watchdog-based combined reset device and method in the field of reset circuit technology. The device includes a microcontroller MCU1, a microcontroller MCU2, a watchdog chip WDT, an XOR circuit, and a switch K1. Pin 1 of the microcontroller MCU1 is connected to pin 1 of the microcontroller MCU2, pin 2 is connected to pin 1 of the watchdog chip WDT, and pin 3 is connected to pin 3 of the microcontroller MCU2 and the XOR circuit. Pin 2 of the microcontroller MCU2 is connected to the XOR circuit, and pin 4 is connected to pin 1 of the watchdog chip WDT. One end of the switch K1 is connected to pin 3 of the watchdog chip WDT, and the other end is grounded. Pin 4 of the watchdog chip WDT is connected to the XOR circuit. The advantage of this invention is that it greatly improves the reliability of the reset.

Description

Technical Field

[0001] This invention relates to the field of reset circuit technology, and in particular to a combined reset device and method based on a watchdog timer. Background Technology

[0002] A reset circuit is used to perform a global or partial reset of the circuit system when an abnormality occurs, so as to restore the circuit system to a normal operating state. Because the operating environments of circuit systems vary greatly, especially in industrial control or automotive fields where the working environments are often very harsh, a reliable reset circuit is particularly important in these harsh environments.

[0003] Traditionally, there are three types of reset circuits:

[0004] Firstly, the RC reset circuit can only guarantee reset during the power-on phase and is easily interfered with. If the voltage is unstable during the initial power-on phase, repeated resets or incomplete resets may occur.

[0005] Secondly, there is the power monitoring and reset chip. This type of chip can monitor the power status at the beginning of power-on. The circuit is in a reset state until the power rises to a reliable value. The reset time is often extended by tens to hundreds of milliseconds. Compared with the RC reset circuit, it is more reliable. However, this type of chip cannot trigger a reset when the main control chip malfunctions.

[0006] Thirdly: Watchdog chips that integrate manual reset, power-on reset, and hardware watchdog reset. These chips can ensure reliable reset during power-on and can also trigger watchdog overflow reset when the main control chip malfunctions (such as program crash). However, during the firmware download process of the main control chip, the main control chip cannot output a feed signal to the watchdog chip. If an overflow reset occurs at this time, it will interrupt the download process and cause download failure. In severe cases, it may even cause the main control chip to be permanently locked (such as DSP chips).

[0007] Therefore, how to provide a watchdog-based combined reset device and method to improve the reliability of reset has become an urgent technical problem to be solved. Summary of the Invention

[0008] The technical problem to be solved by the present invention is to provide a watchdog-based combined reset device and method to improve the reliability of reset.

[0009] In a first aspect, the present invention provides a watchdog-based joint reset device, comprising a microcontroller MCU1, a microcontroller MCU2, a watchdog chip WDT, an XOR circuit, and a switch K1;

[0010] Pin 1 of the microcontroller MCU1 is connected to pin 1 of the microcontroller MCU2, pin 2 is connected to pin 1 of the watchdog chip WDT, and pin 3 is connected to pin 3 of the microcontroller MCU2 and the XOR circuit; pin 2 of the microcontroller MCU2 is connected to the XOR circuit, and pin 4 is connected to pin 1 of the watchdog chip WDT; one end of the switch K1 is connected to pin 3 of the watchdog chip WDT, and the other end is grounded; pin 4 of the watchdog chip WDT is connected to the XOR circuit.

[0011] Furthermore, the XOR circuit includes a diode D1, a diode D2, a transistor Q1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a power supply VCC1, and a power supply VCC2.

[0012] The positive terminal of power supply VCC1 is connected to resistor R1, and the negative terminal is grounded; the input terminal of diode D1 is connected to resistor R1, resistor R4, and pin 3 of microcontroller MCU1, and the output terminal is connected to the emitter of transistor Q1; the positive terminal of power supply VCC2 is connected to resistor R2, and the negative terminal is grounded; the input terminal of diode D2 is connected to resistor R2, resistor R5, and pin 2 of microcontroller MCU2, and the output terminal is connected to the emitter of transistor Q1.

[0013] One end of resistor R3 is connected to the collector of transistor Q1 and pin 4 of the watchdog chip WDT, and the other end is grounded; the base of transistor Q1 is connected to resistors R4 and R5.

[0014] Furthermore, the transistor Q1 is a PNP type.

[0015] Secondly, the present invention provides a watchdog-based combined reset method, comprising the following steps:

[0016] Step S10: Microcontroller MCU1 inputs the first watchdog waveform WDI1 to the XOR circuit, and microcontroller MCU2 inputs the second watchdog waveform WDI2 to the XOR circuit.

[0017] Step S20: The XOR circuit generates a watchdog signal WD0 based on the first watchdog waveform WDI1 and the second watchdog waveform WDI2, and inputs the watchdog signal WD0 into the watchdog chip WDT.

[0018] Step S30: The watchdog chip WDT performs a reset operation based on the feed signal WD0, the trigger signal of switch K1, and the power-on reset signal.

[0019] Furthermore, in step S10, both the first dog-feeding waveform WDI1 and the second dog-feeding waveform WDI2 are high level, low level, or square wave; the square wave frequencies of the first dog-feeding waveform WDI1 and the second dog-feeding waveform WDI2 are different.

[0020] Furthermore, in step S20, the dog-feeding signal WD0 is the waveform signal obtained by XORing the first dog-feeding waveform WDI1 and the second dog-feeding waveform WDI2.

[0021] Further, step S30 specifically includes:

[0022] Step S31: In the initial working state, the first dog feed waveform WDI1 is a square wave, the second dog feed waveform WDI2 is low level, the dog feed signal WD0 is a square wave, and the reset operation is not performed.

[0023] Step S32: When the microcontroller MCU2 detects that the first watchdog waveform WDI1 is not a square wave, it outputs the second watchdog waveform WDI2, which is a square wave, to the watchdog chip WDT, thereby causing the XOR circuit to output the watchdog signal WD0, which does not perform the reset operation.

[0024] The microcontroller MCU2 continuously detects the first watchdog waveform WDI1. When it detects that the first watchdog waveform WDI1 is a square wave, the first watchdog waveform WDI1 and the second watchdog waveform WDI2 with different square wave frequencies are input into the XOR circuit, which in turn causes the XOR circuit to output a square wave watchdog signal WD0, and does not perform a reset operation.

[0025] The microcontroller MCU2 outputs a low-level second watchdog waveform WDI2, restoring it to its initial operating state;

[0026] Step S33: When the microcontroller MCU1 detects a communication abnormality of the microcontroller MCU2, it outputs a low-level first watchdog waveform WDI1. The low-level first watchdog waveform WDI1 and the second watchdog waveform WDI2 are input to the XOR circuit, which in turn causes the XOR circuit to output a low-level watchdog signal WD0, thus performing a reset operation.

[0027] Step S34: When both microcontroller MCU1 and microcontroller MCU2 malfunction, the watchdog chip WDT will automatically perform a reset operation if it fails to detect the feed signal WD0 within a preset first time period.

[0028] Step S35: The watchdog chip WDT automatically performs a reset operation based on the trigger signal of switch K1;

[0029] Steps S32, S33, S34, and S35 are not in any particular order.

[0030] Furthermore, in step S30, when performing the reset operation, the watchdog chip WDT detects whether the voltage value of the power-on reset signal reaches a preset voltage threshold through pin 2 and continues for a preset second duration. If yes, it exits the reset state; if no, it maintains the reset state.

[0031] Furthermore, in step S10, microcontroller MCU1 has built-in watchdog software, while microcontroller MCU2 does not.

[0032] The advantages of this invention are:

[0033] By configuring microcontrollers MCU1 and MCU2, the watchdog chip WDT, the XOR circuit, and switch K1, the first feed waveform WDI1 of microcontroller MCU1 is simultaneously output to both the XOR circuit and microcontroller MCU2. Pin 1 of microcontroller MCU1 is communicatively connected to pin 1 of microcontroller MCU2. Pin 1 of the watchdog chip WDT is connected to pin 2 of microcontroller MCU1 and pin 4 of microcontroller MCU2. In the initial operating state, microcontroller MCU1 has the right to feed the watchdog. Microcontrollers MCU1 and MCU2 output a square wave and a low level to the XOR circuit, respectively, which in turn causes the XOR circuit to output a square wave feed signal WD0 to the watchdog chip WDT. When microcontroller MCU1 is downloading firmware, it cannot output a square wave. U2 receives the watchdog permission output square wave, ensuring that the watchdog signal WD0 remains a square wave, thus maintaining the current working state of the reset device. When microcontroller MCU1 detects a communication abnormality with microcontroller MCU2, it automatically outputs a low level. Alternatively, if both microcontrollers MCU1 and MCU2 experience abnormalities, the watchdog signal WD0 will be low, automatically triggering a reset operation. The reset operation can also be manually triggered via switch K1. During the reset operation, the watchdog chip WDT detects the power-on reset signal through pin 2 to determine whether to exit the reset state. This integrates hardware watchdog reset, manual reset, and power-on reset (power-on reset signal), and will not trigger a reset during firmware download on microcontroller MCU1, thus greatly improving the reliability of the reset device. Attached Figure Description

[0034] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0035] Figure 1 This is a circuit diagram of a watchdog-based combined reset device according to the present invention.

[0036] Figure 2 This is a flowchart of a watchdog-based combined reset method according to the present invention.

[0037] Figure 3This is a waveform diagram of the initial working state of the present invention.

[0038] Figure 4 This is a waveform diagram of the MCU2 taking over the dog-feeding permission in this invention.

[0039] Figure 5 This is a waveform diagram of MCU1 and MCU2 feeding the dog simultaneously according to the present invention.

[0040] Figure 6 This is a waveform diagram of an abnormal state in this invention. Detailed Implementation

[0041] The technical solution in this application embodiment has the following general idea: set up an XOR circuit to XOR the watchdog waveforms output by microcontroller MCU1 and microcontroller MCU2 to obtain watchdog signal WD0. When microcontroller MCU1 cannot output a square wave due to firmware download, microcontroller MCU2 takes over the watchdog permission and outputs a square wave, so that watchdog signal WD0 maintains a square wave, avoiding reset caused by microcontroller MCU1 downloading firmware, thereby improving the reliability of reset.

[0042] Please refer to Figures 1 to 6 As shown, a preferred embodiment of the watchdog-based joint reset device of the present invention includes a microcontroller MCU1, a microcontroller MCU2, a watchdog chip WDT, an XOR circuit, and a switch K1.

[0043] The microcontroller MCU1 comes with built-in watchdog software, used to output a first watchdog waveform WDI1 (high level, low level, or square wave) to the microcontroller MCU2 and the XOR circuit, and to communicate with the microcontroller MCU2. In specific implementations, any microcontroller capable of performing this function can be selected from existing technologies, regardless of its model, such as DSPs or ARM microcontrollers with built-in watchdog software. The control program is well-known to those skilled in the art and can be obtained without creative effort. The microcontroller MCU2 outputs a second watchdog waveform WDI2 (high level, low level, or square wave) to the XOR circuit and communicates with the microcontroller MCU1. In specific implementations, any microcontroller capable of performing this function can be selected from existing technologies. Any microcontroller with the required functionality is acceptable, regardless of its model. For example, microcontrollers without built-in watchdog software, such as CPLDs and FPGAs, are acceptable. The control program must be well-known to those skilled in the art, meaning it can be obtained without creative effort. The watchdog chip WDT integrates manual reset, power-detection reset, and watchdog reset. In specific implementations, any watchdog chip capable of performing this function can be selected from existing technologies, regardless of its model. The control program must be well-known to those skilled in the art, meaning it can be obtained without creative effort. The XOR circuit is used to XOR the signals output by microcontrollers MCU1 and MCU2. The switch K1 is used to manually trigger the reset operation of the watchdog chip WDT.

[0044] Pin 1 of the microcontroller MCU1 is connected to pin 1 of the microcontroller MCU2, pin 2 is connected to pin 1 of the watchdog chip WDT, and pin 3 is connected to pin 3 of the microcontroller MCU2 and the XOR circuit; pin 2 of the microcontroller MCU2 is connected to the XOR circuit, and pin 4 is connected to pin 1 of the watchdog chip WDT; one end of the switch K1 is connected to pin 3 of the watchdog chip WDT, and the other end is grounded; pin 4 of the watchdog chip WDT is connected to the XOR circuit.

[0045] The XOR circuit includes a diode D1, a diode D2, a transistor Q1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a power supply VCC1, and a power supply VCC2.

[0046] The positive terminal of power supply VCC1 is connected to resistor R1, and the negative terminal is grounded; the input terminal of diode D1 is connected to resistor R1, resistor R4, and pin 3 of microcontroller MCU1, and the output terminal is connected to the emitter of transistor Q1; the positive terminal of power supply VCC2 is connected to resistor R2, and the negative terminal is grounded; the input terminal of diode D2 is connected to resistor R2, resistor R5, and pin 2 of microcontroller MCU2, and the output terminal is connected to the emitter of transistor Q1.

[0047] One end of resistor R3 is connected to the collector of transistor Q1 and pin 4 of the watchdog chip WDT, and the other end is grounded; the base of transistor Q1 is connected to resistors R4 and R5.

[0048] The transistor Q1 is a PNP type.

[0049] A preferred embodiment of the watchdog-based combined reset method of the present invention includes the following steps:

[0050] Step S10: Microcontroller MCU1 inputs the first watchdog waveform WDI1 to the XOR circuit, and microcontroller MCU2 inputs the second watchdog waveform WDI2 to the XOR circuit.

[0051] Step S20: The XOR circuit generates a watchdog signal WD0 based on the first watchdog waveform WDI1 and the second watchdog waveform WDI2, and inputs the watchdog signal WD0 into the watchdog chip WDT.

[0052] Step S30: The watchdog chip WDT performs a reset operation based on the feed signal WD0, the trigger signal of switch K1, and the power-on reset signal; the feed signal WD0 is valid on either the rising edge or the falling edge.

[0053] In step S10, both the first dog-feeding waveform WDI1 and the second dog-feeding waveform WDI2 are high level, low level, or square wave; the square wave frequencies of the first dog-feeding waveform WDI1 and the second dog-feeding waveform WDI2 are different.

[0054] In step S20, the dog feeding signal WD0 is the waveform signal obtained by XORing the first dog feeding waveform WDI1 and the second dog feeding waveform WDI2.

[0055] Step S30 specifically includes:

[0056] Step S31: In the initial working state, the first watchdog waveform WDI1 is a square wave, the second watchdog waveform WDI2 is low, and the watchdog signal WD0 is a square wave. No reset operation is performed. Figure 3 As shown;

[0057] Step S32: When the microcontroller MCU2 detects that the first watchdog waveform WDI1 is not a square wave (constantly 0, constant 1, or constant high impedance), it outputs a square wave second watchdog waveform WDI2 to the watchdog chip WDT, thereby causing the XOR circuit to output a square wave watchdog signal WD0, and not performing a reset operation. Figure 4 As shown;

[0058] The microcontroller MCU2 continuously monitors the first watchdog waveform WDI1. When it detects that the first watchdog waveform WDI1 is a square wave, the first watchdog waveform WDI1 and the second watchdog waveform WDI2, which have different square wave frequencies, are input to the XOR circuit. This causes the XOR circuit to output a square wave watchdog signal WD0, and the reset operation is not performed. Figure 5 As shown;

[0059] For example, when the microcontroller MCU1 is downloading firmware, it cannot output a square wave, but it continues to output a square wave after the firmware download is complete; when the microcontroller MCU1 malfunctions and cannot output a square wave, the built-in watchdog software triggers a reset and restarts, after which it continues to output a square wave.

[0060] The microcontroller MCU2 outputs a low-level second watchdog waveform WDI2, restoring it to its initial operating state. Figure 3 As shown;

[0061] Step S33: When microcontroller MCU1 detects a communication abnormality in microcontroller MCU2, it outputs a low-level first watchdog waveform WDI1. The low-level first watchdog waveform WDI1 and the second watchdog waveform WDI2 are input to the XOR circuit, which in turn causes the XOR circuit to output a low-level watchdog signal WD0, thus performing a reset operation. Figure 6 As shown;

[0062] Since the microcontroller MCU2 does not have built-in watchdog software, it cannot reset itself when an abnormality occurs. Therefore, the microcontroller MCU1 communicates with the microcontroller MCU2 to detect it. When a communication abnormality is detected, the microcontroller MCU2 is reset through the watchdog chip WDT.

[0063] Step S34: When both microcontrollers MCU1 and MCU2 malfunction, the watchdog chip WDT will automatically perform a reset operation if it fails to detect the feed signal WD0 within a preset first time period. Figure 6 As shown;

[0064] Step S35: The watchdog chip WDT automatically performs a reset operation based on the trigger signal of switch K1;

[0065] Steps S32, S33, S34, and S35 are not in any particular order.

[0066] In step S30, when performing the reset operation, the watchdog chip WDT detects whether the voltage value of the power-on reset signal reaches a preset voltage threshold through pin 2 and continues for a preset second duration. If so, it exits the reset state; otherwise, it maintains the reset state. That is, it waits until the power supply is stable before exiting the reset state, further improving the reliability of the reset.

[0067] In step S10, microcontroller MCU1 has built-in watchdog software, while microcontroller MCU2 does not. That is, microcontroller MCU1 can automatically reset itself when it malfunctions, while microcontroller MCU2 requires microcontroller MCU1 to send a signal to the watchdog chip WDT to reset it when it malfunctions.

[0068] In summary, the advantages of this invention are as follows:

[0069] By configuring microcontrollers MCU1 and MCU2, the watchdog chip WDT, the XOR circuit, and switch K1, the first feed waveform WDI1 of microcontroller MCU1 is simultaneously output to both the XOR circuit and microcontroller MCU2. Pin 1 of microcontroller MCU1 is communicatively connected to pin 1 of microcontroller MCU2. Pin 1 of the watchdog chip WDT is connected to pin 2 of microcontroller MCU1 and pin 4 of microcontroller MCU2. In the initial operating state, microcontroller MCU1 has the right to feed the watchdog. Microcontrollers MCU1 and MCU2 output a square wave and a low level to the XOR circuit, respectively, which in turn causes the XOR circuit to output a square wave feed signal WD0 to the watchdog chip WDT. When microcontroller MCU1 is downloading firmware, it cannot output a square wave. U2 receives the watchdog permission output square wave, ensuring that the watchdog signal WD0 remains a square wave, thus maintaining the current working state of the reset device. When microcontroller MCU1 detects a communication abnormality with microcontroller MCU2, it automatically outputs a low level. Alternatively, if both microcontrollers MCU1 and MCU2 experience abnormalities, the watchdog signal WD0 will be low, automatically triggering a reset operation. The reset operation can also be manually triggered via switch K1. During the reset operation, the watchdog chip WDT detects the power-on reset signal through pin 2 to determine whether to exit the reset state. This integrates hardware watchdog reset, manual reset, and power-on reset (power-on reset signal), and will not trigger a reset during firmware download on microcontroller MCU1, thus greatly improving the reliability of the reset device.

[0070] While specific embodiments of the present invention have been described above, those skilled in the art should understand that the specific embodiments described are merely illustrative and not intended to limit the scope of the present invention. Equivalent modifications and variations made by those skilled in the art in accordance with the spirit of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A watchdog-based joint reset method, characterized in that: The method needs to use one watchdog-based joint reset device, which comprises a microcontroller MCU1, a microcontroller MCU2, a watchdog chip WDT, an XOR circuit and a switch K1; Pin 1 of the microcontroller MCU1 is connected with pin 1 of the microcontroller MCU2, pin 2 is connected with pin 1 of the watchdog chip WDT, pin 3 is connected with pin 3 of the microcontroller MCU2 and the XOR circuit; pin 2 of the microcontroller MCU2 is connected with the XOR circuit, pin 4 is connected with pin 1 of the watchdog chip WDT; one end of the switch K1 is connected with pin 3 of the watchdog chip WDT, and the other end is grounded; pin 4 of the watchdog chip WDT is connected with the XOR circuit; The XOR circuit comprises a diode D1, a diode D2, a transistor Q1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a power supply VCC1 and a power supply VCC2; The positive pole of the power supply VCC1 is connected with the resistor R1, and the negative pole is grounded; the input end of the diode D1 is connected with the resistor R1, the resistor R4 and pin 3 of the microcontroller MCU1, and the output end is connected with the emitter of the transistor Q1; the positive pole of the power supply VCC2 is connected with the resistor R2, and the negative pole is grounded; the input end of the diode D2 is connected with the resistor R2, the resistor R5 and pin 2 of the microcontroller MCU2, and the output end is connected with the emitter of the transistor Q1; One end of the resistor R3 is connected with the collector of the transistor Q1 and pin 4 of the watchdog chip WDT, and the other end is grounded; the base of the transistor Q1 is connected with the resistor R4 and the resistor R5; The transistor Q1 is PNP type; The method comprises the following steps: In step S10, the microcontroller MCU1 inputs a first watchdog waveform WDI1 to the XOR circuit, and the microcontroller MCU2 inputs a second watchdog waveform WDI2 to the XOR circuit; In step S20, the XOR circuit generates a watchdog signal WD0 based on the first watchdog waveform WDI1 and the second watchdog waveform WDI2, and inputs the watchdog signal WD0 to the watchdog chip WDT; In step S30, the watchdog chip WDT performs a reset operation based on the watchdog signal WD0, a trigger signal of the switch K1 and a power-on reset signal; The step S30 specifically comprises: In step S31, in the initial working state, the first watchdog waveform WDI1 is a square wave, the second watchdog waveform WDI2 is a low level, the watchdog signal WD0 is a square wave, and no reset operation is performed; In step S32, when the microcontroller MCU2 detects that the first watchdog waveform WDI1 is not a square wave, the microcontroller MCU2 outputs the second watchdog waveform WDI2 which is a square wave to the watchdog chip WDT, so that the XOR circuit outputs the watchdog signal WD0 which is a square wave, and no reset operation is performed; The microcontroller MCU2 continuously detects the first watchdog waveform WDI1, and when the first watchdog waveform WDI1 is a square wave, the first watchdog waveform WDI1 and the second watchdog waveform WDI2 with different square wave frequencies are input into an exclusive-OR circuit, so that the exclusive-OR circuit outputs a square wave watchdog signal WD0, and no reset operation is performed; The microcontroller MCU2 outputs the second watchdog waveform WDI2 with a low level, and returns to the initial working state; When the microcontroller MCU1 detects that the microcontroller MCU2 has a communication exception, the microcontroller MCU1 outputs the first watchdog waveform WDI1 with a low level, the first watchdog waveform WDI1 with a low level and the second watchdog waveform WDI2 are input into the exclusive-OR circuit, so that the exclusive-OR circuit outputs the watchdog signal WD0 with a low level, and the reset operation is performed; When the microcontroller MCU1 and the microcontroller MCU2 both have exceptions, the watchdog chip WDT cannot detect the watchdog signal WD0 within a preset first time length, and automatically performs the reset operation; The watchdog chip WDT automatically performs the reset operation based on the trigger signal of the switch K1. The steps S32, S33, S34 and S35 are not in a specific order.

2. A watchdog-based joint reset method as claimed in claim 1, characterized in that: In the step S10, the first watchdog waveform WDI1 and the second watchdog waveform WDI2 are all high level, low level or square wave; the frequencies of the square waves of the first watchdog waveform WDI1 and the second watchdog waveform WDI2 are different.

3. A watchdog-based joint reset method as claimed in claim 1, characterized in that: In the step S20, the watchdog signal WD0 is a waveform signal obtained by performing exclusive-OR operation on the first watchdog waveform WDI1 and the second watchdog waveform WDI2.

4. The watchdog-based joint reset method of claim 1, wherein: In the step S30, when the reset operation is performed, the watchdog chip WDT detects whether the voltage value of the power-on reset signal reaches a preset voltage threshold value and lasts for a preset second time length through the pin 2, if yes, the reset state is exited; if no, the reset state is maintained.

5. A watchdog-based joint reset method as claimed in claim 1, characterized in that: In the step S10, the microcontroller MCU1 has a watchdog software, and the microcontroller MCU2 has no watchdog software.

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