Semiconductor assembly with flow controller to mitigate ingress of mold material

Abstract

The present application relates to a semiconductor assembly having a flow controller that mitigates the ingress of mold material. In some embodiments, a semiconductor device includes a packaging substrate having a first and a second surface. A first and a second die stack are formed on the first surface and are adjacent to each other. A portion of the first surface extends between the first and second die stacks. A material layer is adhered to the top surface of the first and second die stacks and extends a distance above the packaging substrate to form a tunnel between the material layer, the opposite sidewalls of the die stack, and the packaging substrate. The semiconductor device further includes a flow controller adhered to at least a portion of the first surface inside the tunnel, the flow controller reducing the cross-sectional surface area of ​​at least a portion of the tunnel.

Description

Technical Field

[0001] The present technology relates to semiconductor manufacturing. More particularly, some embodiments of the present technology relate to techniques for protecting sidewalls of a vertical stack of adjacent semiconductor dies during a molding process. Background Art

[0002] Packaged semiconductor dies, such as memory chips, microprocessor chips, and imager chips, typically include a semiconductor die mounted on a substrate and wrapped in a protective covering. The semiconductor die may include functional features such as memory cells, processor circuits, and imager devices.

[0003] Market pressures have driven semiconductor manufacturers to reduce the size of die packages to accommodate the space constraints of electronic devices, while also increasing the functional capacity of each package. One way to increase the processing power of a package without significantly increasing the surface area covered by a semiconductor package (the "footprint" of the package) is to form a die stack by vertically stacking multiple semiconductor dies on top of each other in a single package. The die stacks may be formed adjacent to each other with space between them. One or more layers may extend over the tops of adjacent die stacks, forming openings or "tunnels" between the die stacks. When a protective coating is applied to seal the semiconductor package, mold material flows into and completely fills the tunnel. Conventional techniques for applying protective coatings may cause mold material to enter between layers within the tunnel, which may cause delamination and failure of one or more functions of the die package, effectively reducing reliability and yield. Summary of the invention

[0004] On the one hand, the present application provides a semiconductor device, comprising: a packaging substrate having a first and a second surface; a first die stack formed on the first surface; a second die stack formed on the first surface adjacent to the first die stack, wherein a portion of the first surface extends between the first and second die stacks; a material layer adhered to the top surfaces of the first and second die stacks, wherein the material layer extends a certain distance above the portion of the first surface between the first and second die stacks to form a tunnel between the material layer, the relative side walls of the first and second die stacks, and the first surface of the packaging substrate; and a flow controller adhered to at least a portion of the first surface inside the tunnel, the flow controller reducing the cross-sectional surface area of ​​at least a portion of the tunnel.

[0005] On the other hand, the present application provides a method for manufacturing a semiconductor assembly, the method comprising: installing a flow controller on a first surface of a packaging substrate, the flow controller having a length, a width and at least one thickness; installing a first die stack on the first surface of the packaging substrate along the length of the flow controller, the first die stack being a first distance from the flow controller; installing a second die stack on the first surface of the packaging substrate along the length of the flow controller, the second die stack being a second distance from the flow controller, wherein the first and second die stacks are installed near opposite sides of the flow controller; and installing a second substrate to the top surfaces of the first and second die stacks, wherein the second substrate extends above the flow controller to form a tunnel, and wherein the tunnel is partially blocked by the flow controller.

[0006] On the other hand, the present application provides a semiconductor device comprising: a packaging substrate having a first and a second surface; a first die stack formed on the first surface; a second die stack formed on the first surface adjacent to the first die stack, wherein a portion of the first surface extends between the first and second die stacks; a material layer adhered to the top surfaces of the first and second die stacks, wherein the material layer extends a certain distance above the portion of the first surface between the first and second die stacks to form a tunnel between the material layer, the relative sidewalls of the first and second die stacks, and the first surface of the packaging substrate; and a flow controller adhered to at least a portion of the first surface inside the tunnel, the flow controller having a length extending in a direction along the sidewalls of the tunnel, a width extending in a direction between the sidewalls, and a varying thickness along at least one of the length or the width, and wherein the flow controller is configured to reduce a cross-sectional surface area within the tunnel near the sidewalls. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Many aspects of the present technology may be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale. Instead, emphasis is placed on clearly illustrating the principles of the present technology.

[0008] Figure 1A is a side cross-sectional view of a semiconductor package configured in accordance with an embodiment of the present technology.

[0009] Figure 1B is Figure 1A A close-up side cross-sectional view of a flow controller inside a tunnel formed between a stack of die of a semiconductor package.

[0010] Figure 2It is an illustration of Bernoulli's Principle in fluid dynamics and the relationship between cross-sectional surface area and pressure and velocity.

[0011] Figure 3A and 3B are side cross-sectional views of different configurations of a flow controller inside a tunnel formed between a stack of dies in a semiconductor package in accordance with embodiments of the present technology.

[0012] Figures 4A to 4F are top views illustrating different configurations of flow controllers inside tunnels formed between die stacks of semiconductor packages according to embodiments of the present technology. DETAILED DESCRIPTION

[0013] Specific details of several embodiments of semiconductor devices are described below. In some embodiments, the semiconductor device may include one or more flow controllers mounted or formed on a surface, such as a packaging substrate. The die stack is mounted or formed on a surface close to or near the flow controller. The material layer may be mounted to extend above at least some of the die stacks, thereby forming a tunnel between adjacent die stacks. The flow controller reduces the cross-sectional surface area within at least a portion of the tunnel. When the mold material is applied to seal the semiconductor device, the flow controller is configured to reduce the fluid pressure of the mold material and increase its fluid velocity when the mold material flows along the sidewalls of the tunnel. Compared with a device that does not include a flow controller in the tunnel between the die stacks, the device described herein can reduce the fluid pressure along the sidewalls to alleviate or eliminate the intrusion of the mold material into the layers between the die in the die stack, as well as between the die and the packaging substrate and the material layer adhered to the die stack and extending above the die stack. Therefore, the speed and pressure of the fluid flow can be maintained at a level that effectively moves the mold material through and completely fills the tunnel, and the flow controller effectively adjusts the speed and pressure across the width of the tunnel to alleviate the intrusion of the mold material between the exposed layers. Therefore, the reliability and yield of semiconductor devices are improved.

[0014] In some cases, the flow controller may be generally rectangular in shape, with a thickness, a length extending along the tunnel, and a width extending between the sidewalls but not docking with the sidewalls. The thickness may vary along portions of the length and width. For example, a groove may be formed along the length near the sidewalls. One or more additional grooves may be formed in the central region of the flow controller. The portion of the flow controller between the grooves may be thicker than the grooves. The flow controller may be formed in different shapes and sizes to change the pressure and velocity of the mold material as it flows along the sidewalls. The flow controller may be pre-fabricated and then attached to the surface, or may be formed directly on the surface.

[0015] Those skilled in the relevant art will recognize that, unless the context indicates otherwise, the structures disclosed herein can be formed using conventional semiconductor fabrication techniques. Materials can be deposited, for example, using chemical vapor deposition, physical vapor deposition, atomic layer deposition, electroplating, electroless plating, spin coating, and / or other suitable techniques. Similarly, materials can be removed, for example, using plasma etching, wet etching, chemical mechanical planarization, or other suitable techniques.

[0016] Numerous specific details are disclosed herein to provide a thorough and advantageous description of embodiments of the present technology. However, those skilled in the art will appreciate that the technology may have additional embodiments and that the technology may be used without the following references. Figures 1A to 4F The present invention is practiced without the need for several details of the embodiments described herein. For example, some details of semiconductor devices and / or packages known in the art have been omitted so as not to obscure the present technology. In general, it should be understood that various other devices and systems may also be within the scope of the present technology in addition to those specific embodiments disclosed herein.

[0017] As used herein, the terms "vertical," "lateral," "up," "down," "above," and "below" may refer to the relative direction or position of features in a semiconductor device in view of the orientation shown in the figure. For example, "upper" or "uppermost" may refer to a feature that is positioned closer to the top of the page than another feature. However, these terms should be broadly interpreted to include semiconductor devices with other orientations, such as opposite or tilted orientations where top / bottom, over / under, above / under, up / down, and left / right may be interchanged depending on the orientation.

[0018] Figure 1A illustrates a side cross-sectional view of a semiconductor package 100 configured in accordance with an embodiment of the present technology, and Figure 1B yes Figure 1A1. The package 100 includes a first die stack 102a and a second die stack 102b mounted on a package substrate 104. The first and second die stacks 102a-102b are separated by a distance D1. The first die stack 102a includes a plurality of vertically stacked semiconductor dies 108a-108b (collectively referred to as "first dies 108a and 108b"). The second die stack 102b includes a plurality of vertically stacked semiconductor dies 108c-108d (collectively referred to as "second dies 108c and 108d"). The first and second dies 108a-108d may be substantially vertically aligned within the die stacks 102a and 102b. Although the first and second die stacks 102a-102b are shown as including two first dies 108a and 108b and two second dies 108c and 108d, respectively, in other embodiments, the die stacks 102a-102b may include fewer or more dies 108a-108d (e.g., one, three, four, five, six, seven or more dies). The first and second die stacks 102a-102b may include the same number of dies 108a-108d and / or otherwise have the same or substantially similar height / thickness. In some embodiments, the die stacks 102a-102b may be formed on the package substrate 104 by mounting one die of 108a-108d at a time.

[0019] The lower surface of the second substrate 106 (e.g., a silicon spacer, an interposer, a semiconductor die such as a DRAM, an interposer, a logic die, etc.) is coupled to the uppermost dies 108a-108d of the first and second die stacks 102a-102b by a die attach film or other suitable technology. In some embodiments, a third substrate 110 may be mounted on the second substrate 106. Although not shown, additional layer(s) and / or components may be mounted on the third substrate 110, the second substrate 106, and / or an open area of ​​the package substrate 104. For clarity, electrical connections, controllers, and the like are not shown.

[0020] The open area or space (referred to herein as the tunnel 112) is formed by the package substrate 104, the first and second die stacks 102a-102b, and the second substrate 106. The first and second die stacks 102a-102b respectively form sidewalls 114a-114b (collectively referred to as "sidewalls 114") facing the tunnel 112. Figure 1A Only two die stacks (102a and 102b) and one tunnel 112 are shown in FIG. 1 , but it should be understood that additional die stacks such as 102a or 102b may be used and additional tunnels such as 112 may be formed.

[0021] The flow controller 116a is mounted or formed on the package substrate 104 within the tunnel 112 and partially blocks the tunnel 112. Figure 1B The flow controller 116a is discussed in more detail in FIG. Additional embodiments of the flow controller 116a are described below. Figures 3A to 4F 102a-102b, and are collectively referred to as flow controllers 116. In some embodiments, flow controller 116 may be pre-fabricated (e.g., by etching, machining, etc.) such that it is molded and / or formed separately from package substrate 104 and then mounted / attached to package substrate 104. For example, flow controller 116 may be formed of silicon, glass, or other suitable materials. In some cases, flow controller 116 may be etched or machined. In further embodiments, flow controller 116 may be a component or device that is inactive and / or not electrically connected to the circuitry of semiconductor package 100. In some embodiments, the same machine may attach flow controller 116 to package substrate 104 before attaching die 108a-108d in first and second die stacks 102a-102b. In other embodiments, flow controller 116 may be formed directly on package substrate 104.

[0022] In some embodiments, one or more of the die stacks 102a and 102b may be arranged in a shingled or stepped configuration, where each die in 108a-108d is horizontally offset from the die 108a-108d below. For example, the die stacks 102a-102b may be angled away from or toward each other, tilted in parallel directions, or any other suitable configuration. In this case, the sidewalls 114a-114b may not form vertically aligned surfaces, but rather, the offset dies will form sidewalls 114a-114b with surfaces extending different distances into the tunnel 112.

[0023] The first and second dies 108a to 108d and the second and third substrates 106, 110 may each include a semiconductor substrate (e.g., a silicon substrate, a gallium arsenide substrate, an organic stack substrate, etc.). In some embodiments, the dies 108a to 108d and the substrates 106, 110 may each include a front and / or active surface having various types of semiconductor components. For example, the first dies 108a and 108b and / or the second dies 108c and 108d may each have a memory circuit (e.g., a dynamic random access memory (DRAM), a static random access memory (SRAM), a flash memory (e.g., NAND, NOR) or other types of memory circuits), a controller circuit (e.g., a DRAM controller circuit), a logic circuit, a processing circuit, a circuit element (e.g., wires, traces, interconnects, transistors, etc.), an imaging component, and / or other semiconductor features. In other embodiments, the dies 108a to 108d may each be arranged in a "face-up" configuration, with their front surfaces oriented upward and away from the package substrate 104. However, in further embodiments, one or more of the dies 108a-108d may be in a "face-down" configuration, with their front surfaces oriented downward and toward the package substrate 104. Optionally, one or more of the dies 108a-108d may be a "blank" substrate that does not include semiconductor components and is formed of, for example, a crystalline, semi-crystalline, and / or ceramic substrate material, such as silicon, polycrystalline silicon, aluminum oxide (Al2O3), sapphire, and / or other suitable materials.

[0024] The package substrate 104 may be or include an interposer, a printed circuit board, a dielectric spacer, another semiconductor die (e.g., a logic die), or another suitable substrate. In some embodiments, the package substrate 104 includes additional semiconductor components (e.g., a doped silicon wafer or a gallium arsenide wafer), non-conductive components (e.g., various ceramic substrates such as aluminum oxide (Al2O3), etc.), aluminum nitride, and / or conductive portions (e.g., interconnect circuitry, TSVs, etc.). The package substrate 104 may further include an electrical connector 142 (e.g., solder balls, conductive bumps, conductive pillars, conductive epoxy, and / or other suitable conductive elements) electrically coupled to the package substrate 104 and configured to electrically couple the package 100 to an external device (not shown).

[0025] The package 100 may further include an encapsulant or mold material 140 formed over at least a portion of the package substrate 104 and / or at least partially around the second substrate 106 and the third substrate 110 (if present), the first and second die stacks 102a-102b, and within the tunnel 112. In some embodiments, the mold material 140 completely fills the open space within the tunnel 112. The mold material 140 may be a resin, epoxy, silicone-based material, polyimide, or any other material suitable for sealing at least a portion of the tunnel 112 and other surfaces of the semiconductor package 100 to protect these components from contaminants and / or physical damage. Applying a mold material within the tunnel 112 further increases the mechanical strength of the package 100 and may reduce warpage that may result from heating during manufacturing and / or operation.

[0026] Figure 1B exhibit Figure 1A FIG. 1 is an enlarged side cross-sectional view of tunnel 112 and flow controller 116 a of FIG. 1. The package substrate 104 forms a bottom surface 118 of the tunnel 112, and the second substrate 106 forms a top surface 120 of the tunnel 112. The flow controller 116 a is positioned a distance D2 from the sidewall 114 a and a distance D3 from the sidewall 114 b. The distances D2 and D3 may be the same or different and are configured to allow space for mold material 140 to flow between the flow controller 116 and the sidewall 114.

[0027] The flow controller 116a has a plurality of grooves and protrusions. Figure 1B The projections and recesses spanning the width of the flow controller 116a are shown below. Figure 4A The protrusions and grooves along the length of the flow controller 116a are shown. Figure 1B , the first and second protrusions 122a to 122b are positioned near the side walls 114a to 114b, and the third protrusion 122c is located in the central area of ​​the flow controller 116a. A groove 126a is formed between the first protrusion 122a and the third protrusion 122c, and another groove 126b is formed between the third protrusion 122c and the second protrusion 122b. Outer grooves 126c to 126d are formed on the outer edge of the flow controller 116a near the side walls 114a to 114b. As shown, the first and second protrusions 122a to 122b each have a substantially identical thickness T1, the third protrusion 122c has a thickness T2 less than the thickness T1, and the grooves 126a to 126d each have a substantially identical thickness T3 less than the thickness T2. In other embodiments, the flow controller 116a may be formed without the third protrusion 122c. Furthermore, a greater or lesser number of grooves 126a to 126d and protrusions 122a to 122c may be formed, as described below in Figures 3A to 4F126a-126d. In other embodiments, the thicknesses T1, T2, and T3 may vary so that each of the protrusions 122a-122c has a different thickness or the same thickness as another protrusion 122a, 122b, or 122c, and each of the grooves 126a-126d has a different thickness or the same thickness as another groove 126a, 126b, 126c, or 126d. Thus, the thickness of the protrusions 122a-122c and the grooves 126a-126d may vary along the width and / or length of the flow controller 116.

[0028] Flow controller 116 may change and / or affect the velocity and pressure of mold material 140 as it flows through tunnel 112. For example, protrusions 122a-122c and grooves 126a-126d change the cross-sectional surface area within tunnel 112 and thus create effective channels or zones within which mold material 140 has different velocities and pressures as it flows through tunnel 112. Figure 2 It is explained in FIG. 1 that according to the Bernoulli principle in fluid dynamics, the relationship between pressure (p), area (A) and velocity (V) can be expressed by p1A1V1=p2A2V2. According to this principle, if the area (A) decreases, then when the pressure (p) remains constant (for example, when p1=p2), the velocity (V) of the fluid increases. Figure 2 A first container 200 is shown having a first cross-sectional surface area 202. A fluid 204 flows into a second container 206 having a second cross-sectional surface area 208 that is smaller than the first cross-sectional surface area 202, while the pressure (p) for transporting the fluid 204 remains constant. Specifically, reducing or decreasing the cross-section of the surface area (A) can increase the fluid velocity (V) and decrease the fluid pressure (p) of the fluid 204 moving through the second container 206.

[0029] return Figure 1B, the different thicknesses T1-T3 across the width of the flow controller 116 can change the fluid dynamics within the tunnel 112 so that the mold material 140 (not shown) flows at a relatively slower, higher pressure flow rate in the central zone 130 (e.g., where the flow controller 116a is smaller, resulting in a relatively larger cross-sectional surface area), and flows at a relatively higher speed, lower pressure flow rate in the two side zones 132a-132b (e.g., where the flow controller 116a is larger, resulting in a relatively smaller cross-sectional surface area). In other words, the side zones 132a-132b have a smaller open area volume or a higher percentage of blockage within the tunnel 112 than the central zone 130. Having a slower, higher pressure flow rate in the central zone 130 allows additional mold material 140 to flow at a faster, lower pressure flow rate along the left and right zones 132a-132b as needed, which alleviates the higher pressures that cause ingress and delamination, as described below, while maintaining other settings and parameters for applying the mold material 140. The central area 130 and the side areas 132a to 132b are generally Figure 1B However, it should be understood that there will be variability in the velocity and pressure of the mold material 140 across the indicated zones and at the junction of the indicated zones.

[0030] As the mold material 140 flows along the sidewalls 114a-114b of the die stack 102a-102b, the reduction in its pressure can reduce and / or eliminate the entry of the mold material 140 between the bonding layers exposed along the sidewalls 114a-114b. For example, along the sidewall 114a, the mold material 140 can enter at a high speed between the second substrate 106 and the die 108b at point 134, between the dies 108a and 108b at point 136, and / or between the die 108a and the packaging substrate 104 at point 138. Thus, the size of the side regions 132a-132b can be adjusted by changing the cross-sectional surface area within the tunnel 112 to reduce or increase the flow rate along the sidewalls 114a-114b, thereby ensuring that the mold material 140 completely fills the tunnel 112 while eliminating or reducing the entry of the mold material 140 between the layers in the sidewalls 114a-114b.

[0031] Figure 3A and 3B Two different embodiments of flow controllers 116 that can be used to change the fluid dynamics within tunnel 112 are shown. Figure 1A and 1B Same item number. Figure 3A In the embodiment, the flow controller 116b has a plurality of protrusions 122d to 122j and a plurality of grooves 126e to 126l, and is a certain distance (eg, Figure 1B The distances D2 and D3 shown in Figure 1 are Figure 1ACompared to the flow controller 116a shown in FIG. 1 , the flow controller 116b has more slotted structures (e.g., protrusions 122d to 122j and grooves 126e to 126l). As shown, the thickness T4 of each of the protrusions 122d to 122j is substantially the same, and the thickness T5 of each of the grooves 126e to 126l is substantially the same and less than the thickness T4. However, the thicknesses T4 and T5 may vary. Figure 1A and 1B In contrast to the flow controller 116a shown in FIG. 1 , the protrusions 122d to 122j and the grooves 126e to 126l form a plurality of channels or zones (not shown) each having approximately the same flow pressure and velocity. The flow controller 116b evenly distributes the fluid pressure across the width of the tunnel 112 and mitigates the pressure effects of the mold material 140 along the sidewalls 114a to 114b.

[0032] In some embodiments, having Figure 3A The flow controller 116b of the structure shown in FIG. 1 may be used in the package 100, wherein at least one of the width and length of the tunnel 112 is greater than Figure 1B 1. In some cases, the number of grooves 126e to 126l in the flow controller 116 may increase as the length of the tunnel 112 increases.

[0033] Go to Figure 3B , flow controller 116c within tunnel 112 reduces the cross-sectional surface area of ​​tunnel 112 and thereby increases the velocity and reduces the pressure of mold material 140 as it flows through tunnel 112. Flow controller 116c is generally rectangular in shape and has a generally uniform thickness T6. Flow controller 116c is a distance (e.g., 1.5 m) from sidewalls 114a to 114b. Figure 1B ), thereby allowing mold material 140 to flow between flow controller 116 and sidewall 114.

[0034] Figures 4A to 4F Various embodiments of a flow controller 116 that may be used to alter fluid dynamics within the tunnel 112 are shown. Figure 4AA top-down view of the flow controller 116a of FIG. 1 is shown. Protrusions 122a-122c are indicated. The flow controller 116a is generally rectangular in shape, having a width W1 and a length L1. The flow controller 116a generally extends the length L2 of the tunnel 112 and spans a portion of the width W2 of the tunnel 112. The arrows indicate the direction of the fluid flow 400 of the mold material 140. As previously discussed, the fluid dynamics of the mold material 140 are changed by the flow controller 116a, which changes the cross-sectional surface area within different zones of the tunnel 112, thereby increasing the velocity and reducing the pressure in the area near the sidewalls 114a-114b.

[0035] In general, any size or shape of flow controller 116 may be used to reduce the cross-sectional surface area of ​​tunnel 112 as long as the cross-sectional surface area is still sufficient to allow mold material 140 to flow through tunnel 112. For example, the size and shape of flow controller 116 may be based on the length, width, and height of tunnel 112. In some embodiments, flow controller 116 may have a width W1 of approximately 750 μm, although other widths may be used. If first and second die stacks 102a-102b each include two dies (108a and 108b) or (108c and 108d), then the thickness of flow controller 116 (in W1) may be approximately 100 μm. Figure 1B 1) may be approximately 190 μm, and if the first and second die stacks 102a-102b each include three dies in 108a-108d, then the thickness T1 ( Figure 1B ) may be approximately 300 μm. The length L1 of the flow controller 116 may be based at least in part on the length L2 of the tunnel 112. In other embodiments, if the length L2 is greater than or equal to approximately 5,000 μm, the length L1 of the flow controller 116 may be at least approximately 5,000 μm, and if the length L2 is greater than or equal to approximately 7,000 μm, the length L1 of the flow controller 116 may be up to approximately 7,865 μm. For example, the flow controller 116b ( Figure 3A ) may be larger in width and length than the flow controller 116a ( Figure 1B ) in width and length. In other embodiments, the length L1 of the flow controller 116 may be greater than, the same as, approximately the same as, or less than the length L2 of the tunnel 112. It should be understood that although different lengths, widths, and thicknesses are indicated, the embodiments contemplated herein are not limited thereto.

[0036] Figure 4B and 4C A top-down view of flow controllers 116d-e is shown extending generally the length L2 of tunnel 112 and being generally rectangular in shape. Figure 4BIn FIG. 1 , the first end of the flow controller 116d has rounded corners 402a to b at the end closest to the incoming fluid flow 400 and at the Figure 4C , the flow controller 116e has notched corners 412a and 412b and a tapered point 404 at the end closest to the incoming fluid flow 400.

[0037] Figure 4D Another embodiment is described in which the flow controller 116f does not extend the entire length L2 of the tunnel 112. Although the flow controller 116f is embedded in the tunnel 112 away from the tunnel edge 406 and approximately in line with the opposing tunnel edge 410, the flow controller 116f may be positioned at other locations within the tunnel 112. For example, the flow controller 116f may be disposed approximately in line with the tunnel edge 406, centered equidistant between the tunnel edges 406 and 410, or positioned closer to one of the tunnel edges 406, 410 than the other.

[0038] Figure 4E and 4F An embodiment is described in which the flow controller 116 is segmented, comprising more than one separate material piece. Figure 4E , flow controller 116g includes three separated pieces arranged along the length L2 of tunnel 112. The pieces of flow controller 116g may be equally spaced with respect to each other, offset, equal to one or both of the tunnel edges, and / or at the same or different distances from sidewall 114. There may be more or less than three separated pieces (e.g., two, four, five, six, etc. separated pieces). Figure 4F The flow controller 116h of FIG. 1 includes two pieces extending along the length L2 of the tunnel 112. As shown, the two pieces extend substantially the entire length L2 of the tunnel 112. However, one or both of the two pieces may extend partially along the length L2 of the tunnel 112, may be positioned closer or further away, and / or may be positioned to contact each other along their lengths. Furthermore, this embodiment may include more than two pieces, such as three, four, five, etc. pieces.

[0039] Other configurations of the flow controller 116 are possible, such as blunt ends, rounded ends, slopes, etc. The flow controller 116 can be generally symmetrical along the width W1, such as Figure 1B and 4A , or asymmetrical along its width W1. In addition, the flow controller 116 can be symmetrical or asymmetrical along its length L1.

[0040] Although not shown, in other embodiments, flow controller 116 may be any piece of material or surface mount component(s), such as one or more capacitors, resistors, inductors, and / or other devices positioned within the tunnel. The surface mount component(s) may be passive and serve only as flow controller 116 and not interconnected with the circuitry within semiconductor package 100.

[0041] Reference again Figure 1A and 1B , the semiconductor package 100 may be manufactured using any suitable process known to those skilled in the art. In some embodiments, for example, the manufacturing process for the package 100 includes installing or forming the flow controller 116 on the package substrate 104 and then installing the first and second die stacks 102a-102b. Alternatively, the process may install or form the flow controller 116 on the package substrate 104 after or simultaneously with the installation of the first and second die stacks 102a-102b and / or the dies 108a, 108c. The second substrate 106 may be mounted on the first and second die stacks 102a-102b (e.g., by a die attach film or other suitable technique). After installing and / or mechanically and electrically coupling the flow controller 116, the dies 108a-108d, and / or other components, the mold material 140 may be applied. In other embodiments, the flow controller 116 may be adhered to the second substrate 106 and configured to extend into the tunnel 112 toward the package substrate 104.

[0042] With the above about Figure 1A , 1B Any of the semiconductor devices and / or packages having the features described in 3A to 4F may be incorporated into any of a myriad of larger and / or more complex systems (not shown). The system may include a processor, a memory (e.g., SRAM, DRAM, flash memory, and / or other memory devices), an input / output device, and / or other subsystems or components. Figures 1A to 4FThe flow controller 116 described herein. The resulting system may be configured to perform any of a variety of suitable computing, processing, storage, sensing, imaging, and / or other functions. Thus, representative examples of the system include, but are not limited to, computers and / or other data processors, such as desktop computers, laptop computers, Internet appliances, handheld devices (e.g., palmtop computers, wearable computers, cellular or mobile phones, personal digital assistants, music players, etc.), tablet computers, multiprocessor systems, processor-based or programmable consumer electronics, network computers, and minicomputers. Additional representative examples of the system include lights, cameras, vehicles, etc. With respect to these and other examples, the system may be housed in a single unit, or distributed over multiple interconnected units, such as via a communications network. Thus, components of the system may include local and / or remote memory storage devices and any of a variety of suitable computer-readable media.

[0043] It will be appreciated from the above that specific embodiments of the technology have been described herein for illustration, but various modifications may be made without departing from the present disclosure. Therefore, the technology is not subject to restrictions other than the appended claims. In addition, specific aspects of the new technology described in the context of specific embodiments may also be combined or eliminated in other embodiments. In addition, although the advantages associated with specific embodiments of the new technology have been described in the context of those embodiments, other embodiments may also exhibit such advantages, and it is not necessarily required that all embodiments exhibit such advantages to fall within the scope of the present technology. Therefore, the present disclosure and associated technology may cover other embodiments that are not explicitly shown or described herein.

Claims

1. A semiconductor device comprising: A packaging substrate having a first surface and a second surface; a first die stack formed on the first surface; a second die stack formed on the first surface adjacent to the first die stack, wherein a portion of the first surface extends between the first and second die stacks; a material layer adhered to top surfaces of the first and second die stacks, wherein the material layer extends a distance over the portion of the first surface between the first and second die stacks to form a tunnel between the material layer, opposing sidewalls of the first and second die stacks, and the first surface of the packaging substrate; and A flow controller is adhered to at least a portion of the first surface of the interior of the tunnel, the flow controller reducing a cross-sectional surface area of ​​at least a portion of the tunnel. 2 . The semiconductor device of claim 1 , further comprising a mold material that seals exposed surfaces of the first and second die stacks, an exposed surface of the flow controller, an exposed surface of the material layer, and an exposed surface of the package substrate. 3 . The semiconductor device according to claim 1 , wherein the flow controller has a rectangular shape with respect to the length and width of the tunnel. 4 . The semiconductor device according to claim 1 , wherein the flow controller has at least one portion that is thicker than a second portion.

5. The semiconductor device of claim 1, wherein the flow controller comprises at least three protrusions having a thickness greater than the second thickness of the at least two grooves, wherein the at least three protrusions are positioned alternately with the at least two grooves across a width of the flow controller. The semiconductor device of claim 1 , wherein the flow controller extends a length of the tunnel.

7. The semiconductor device according to claim 1, wherein the flow controller comprises: first and second recesses proximate the sidewalls of the first and second die stacks; and At least one protrusion is located between the first and second grooves, wherein the at least one protrusion has a first thickness greater than the thicknesses of the first and second grooves.

8. The semiconductor device according to claim 3, wherein the flow controller further comprises: first and second recesses extending along at least a portion of the length of the flow controller proximate the sidewalls of the first and second die stacks; first and second protrusions extending along at least a portion of the length of the flow controller adjacent to the first and second grooves, respectively, the first and second protrusions having first and second thicknesses greater than the thicknesses of the first and second grooves; a third protrusion extending along at least a portion of the length of the flow controller and positioned between the first and second protrusions, wherein the third protrusion has a third thickness that is less than the first and second thicknesses and greater than the thicknesses of the first and second recesses; a third groove extending along at least a portion of the length of the flow controller between the first and third protrusions; and A fourth groove extends along at least a portion of the length of the flow controller between the second and third protrusions, the third and fourth grooves having a thickness less than the third thickness of the third protrusion.

9. The semiconductor device of claim 1, wherein the flow controller has a width extending in a direction between the first and second sidewalls, and wherein the flow controller is symmetrical along its width.

10. The semiconductor device of claim 1, wherein the flow controller is configured to reduce a fluid pressure and increase a fluid velocity of the mold material within the tunnel along the sidewalls of the first and second die stacks when the mold material is applied to seal the device.

11. The semiconductor device of claim 1, wherein the first and second die stacks include at least one memory die. 12 . The semiconductor device according to claim 1 , wherein the flow controller is pre-fabricated or formed on the first surface of the package substrate.

13. The semiconductor device according to claim 1, wherein the flow controller comprises silicon or glass.

14. A method of manufacturing a semiconductor assembly, the method comprising: Mounting a flow controller on the first surface of the packaging substrate, the flow controller having a length, a width, and at least one thickness; mounting a first die stack on the first surface of the packaging substrate along the length of the flow controller, the first die stack being a first distance from the flow controller; mounting a second die stack on the first surface of the packaging substrate along the length of the flow controller, the second die stack being a second distance from the flow controller, wherein the first and second die stacks are mounted proximate opposite sides of the flow controller; and A second substrate is mounted to a top surface of the first and second die stacks, wherein the second substrate extends over the flow controller to form a tunnel, and wherein the tunnel is partially blocked by the flow controller.

15. The method of claim 14, wherein the first and second die stacks form sidewalls within the tunnel, the method further comprising applying a mold material to seal the flow controller, the first and second die stacks, and the package and second substrate, wherein the flow controller is configured to reduce a fluid pressure and increase a fluid velocity of the mold material flowing along the sidewalls of the tunnel.

16. The method of claim 14, wherein the flow controller comprises at least one groove located within a central region of the flow controller, the at least one groove extending along at least a portion of the length of the flow controller.

17. The method of claim 14, wherein the flow controller further comprises a groove extending along at least a portion of the length of the flow controller along an edge proximate a side wall.

18. A semiconductor device comprising: A packaging substrate having a first surface and a second surface; a first die stack formed on the first surface; a second die stack formed on the first surface adjacent to the first die stack, wherein a portion of the first surface extends between the first and second die stacks; a material layer adhered to top surfaces of the first and second die stacks, wherein the material layer extends a distance above the portion of the first surface between the first and second die stacks to form a tunnel between the material layer, opposing sidewalls of the first and second die stacks, and the first surface of the packaging substrate; and a flow controller adhered to at least a portion of the first surface of the interior of the tunnel, the flow controller having a length extending in a direction along the sidewalls of the tunnel, a width extending in a direction between the sidewalls, and a varying thickness along at least one of the length or the width, and The flow controller is configured to reduce a cross-sectional surface area within the tunnel proximate the sidewall.

19. The semiconductor device of claim 18, wherein the flow controller includes grooves extending along at least a portion of the length of the flow controller proximate the sidewall, the grooves being thinner than at least a portion of the flow controller extending between the grooves across the width.

20. The semiconductor device of claim 19, wherein the flow controller further comprises first and second protrusions that are thicker than the groove extending adjacent to the sidewall, the first and second protrusions adjacent to the groove and extending along at least a portion of the length of the flow controller.

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