Thin film transistor, manufacturing method thereof and display panel

Abstract

The application discloses a thin film transistor and a manufacturing method thereof and a display panel. The thin film transistor comprises a substrate and a first gate, a gate insulating layer, a semiconductor layer, a source-drain layer and a passivation layer which are sequentially formed on the substrate, and a light-absorbing conductive layer is formed on the passivation layer, the light-absorbing conductive layer forms a second gate, the second gate is located above the semiconductor layer, and the material of the light-absorbing conductive layer comprises cerium oxide and molybdenum oxide. The cerium oxide and the molybdenum oxide have high light-absorbing performance and can absorb high-energy short-wavelength light; in the application, the material of the second gate is the cerium oxide and the molybdenum oxide, so that the high-energy short-wavelength light can be effectively absorbed, and the influence of light on the semiconductor layer is prevented; meanwhile, the cerium oxide and the molybdenum oxide have good conductivity and transparency, and will not affect the conductivity and the transparency of the thin film transistor; therefore, the material of the second gate in the application is the cerium oxide and the molybdenum oxide, so that the semiconductor layer can be kept stable and normal.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a thin-film transistor, its fabrication method, and a display panel. Background Technology

[0002] The oxide semiconductor layer of amorphous metal oxide thin-film transistors (TFTs) is easily affected by light, which can lead to unstable TFT performance and affect the display effect of the display panel. Summary of the Invention

[0003] In view of the shortcomings of the prior art, the purpose of the present invention is to provide a thin film transistor and its manufacturing method and display panel, which can alleviate the influence of light on the thin film transistor.

[0004] To achieve the above objectives, the present invention first provides a thin-film transistor, including a substrate and a first gate, a gate insulating layer, a semiconductor layer, a source drain layer, and a passivation layer sequentially formed on the substrate. A light-absorbing conductive layer is formed on the passivation layer, and a second gate is formed on the light-absorbing conductive layer. The second gate is located above the semiconductor layer, and the material of the light-absorbing conductive layer includes cerium oxide and molybdenum oxide.

[0005] Optionally, the light-absorbing conductive layer also forms a driving electrode, which passes through a via in the passivation layer and contacts the source and drain layers.

[0006] Optionally, the ratio of cerium oxide to molybdenum oxide in the light-absorbing conductive layer material ranges from 0.8 to 0.2.

[0007] Optionally, a transparent conductive layer is formed on the passivation layer, and a transparent electrode is formed on the transparent conductive layer and the light-absorbing conductive layer by etching using the same mask. The transparent electrode includes a second gate.

[0008] Optionally, the light-absorbing conductive layer includes a protective layer and a transparent electrode layer, wherein the transparent electrode layer includes a second gate.

[0009] Optionally, the projection of the second gate onto the substrate covers at least the portion of the semiconductor layer projected onto the substrate.

[0010] Optionally, the semiconductor layer includes a source connection region, a drain connection region, and a channel region. The channel region is located between the source connection region and the drain connection region. The source and drain of the source-drain layer are connected to the source connection region and the drain connection region, respectively. The projection of the second gate on the substrate covers the projection of the channel region on the substrate.

[0011] This invention also provides a method for fabricating a thin-film transistor, comprising the following steps:

[0012] Provide a substrate;

[0013] A first gate, a gate insulating layer, a semiconductor layer, a source / drain layer, and a passivation layer are sequentially formed on the substrate.

[0014] A light-absorbing and conductive layer is formed on the passivation layer, and the materials of the light-absorbing and conductive layer include cerium oxide and molybdenum oxide;

[0015] The light-absorbing conductive layer is etched to form a second gate, which is located above the semiconductor layer.

[0016] Optionally, the step of etching the light-absorbing conductive layer to form the second gate includes:

[0017] The light-absorbing conductive layer is etched to form a second gate and a driving electrode. The driving electrode passes through a via in the passivation layer and contacts the source and drain layers.

[0018] The present invention also provides a display panel including any of the thin-film transistors described above, or a thin-film transistor obtained by the thin-film transistor manufacturing method described above.

[0019] Compared with the prior art, the beneficial effects of the present invention include: the thin-film transistor of the present invention includes a substrate and a first gate, a gate insulating layer, a semiconductor layer, a source / drain layer, and a passivation layer sequentially formed on the substrate. A light-absorbing conductive layer is formed on the passivation layer, and a second gate is formed on the light-absorbing conductive layer. The second gate is located above the semiconductor layer, and the material of the light-absorbing conductive layer includes cerium oxide and molybdenum oxide. Cerium oxide and molybdenum oxide have high light absorption performance and can absorb high-energy, short-wavelength light, such as ultraviolet light. The use of cerium oxide and molybdenum oxide as the material of the second gate in the present invention can effectively absorb high-energy, short-wavelength light and prevent the light from affecting the semiconductor layer. On the other hand, cerium oxide and molybdenum oxide have good conductivity and transparency and will not affect the conductivity and transparency of the thin-film transistor. Therefore, the use of cerium oxide and molybdenum oxide as the material of the second gate in the present invention can maintain the stable and normal operation of the semiconductor layer and improve the display effect of the display panel. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments or prior art, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of the structure of a thin-film transistor according to an embodiment of the present invention. Figure 1 ;

[0022] Figure 2 This is a schematic diagram of the structure of a thin-film transistor according to an embodiment of the present invention. Figure 2

[0023] Figure 3 This is a schematic diagram of the semiconductor layer structure according to an embodiment of the present invention;

[0024] Figure 4 This is a flowchart of a thin-film transistor fabrication method according to an embodiment of the present invention. Detailed Implementation

[0025] The following descriptions of the embodiments are with reference to the accompanying illustrations, illustrating specific embodiments in which the invention can be implemented. In the description of the invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows for communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Furthermore, the terms "first" and "second" in the invention are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of the invention, "a plurality of" means two or more, unless otherwise explicitly specified. Those skilled in the art can understand the specific meaning of the above terms in the invention according to the specific circumstances.

[0026] This invention provides a thin-film transistor, such as... Figure 1 and Figure 2 As shown, the device includes a substrate 1 and a first gate 2, a gate insulating layer 3, a semiconductor layer 4, a source drain layer 5, and a passivation layer 6 sequentially formed on the substrate 1. A light-absorbing conductive layer 7 is formed on the passivation layer 6, and a second gate 71 is formed on the light-absorbing conductive layer 7. The second gate 71 is located above the semiconductor layer 4. The material of the light-absorbing conductive layer 7 includes cerium oxide (CeO2) and molybdenum oxide (MoO2).

[0027] In this embodiment, the light-absorbing conductive layer 7 is made of CeO2-MoO2. Cerium oxide and molybdenum oxide have high light absorption properties and can absorb high-energy, short-wavelength light, such as ultraviolet light. The second gate 71 in this embodiment is also made of cerium oxide and molybdenum oxide, which effectively absorbs high-energy, short-wavelength light and prevents light from affecting the semiconductor layer 4. Furthermore, cerium oxide and molybdenum oxide have good conductivity and transparency, and will not affect the conductivity and transparency of the thin-film transistor. Therefore, the use of cerium oxide and molybdenum oxide in the second gate 71 of this invention can maintain the stable and normal operation of the semiconductor layer 4 and improve the display effect of the display panel.

[0028] In this embodiment, the thin-film transistor can specifically be an amorphous metal oxide thin-film transistor, and the semiconductor layer 4 is an active layer composed of amorphous metal oxide.

[0029] In one embodiment, the light-absorbing conductive layer 7 further forms a driving electrode 72, which passes through the via 61 of the passivation layer 6 and contacts the source / drain layer 5. The driving electrode 72 primarily serves as the lower electrode of the LED light-emitting layer or as the lower electrode of the LCD switching layer. In another embodiment, the second gate 71 and the driving electrode 72 are formed using the same material and synchronous process, i.e., sharing a single photomask. Therefore, there are no additional material electrodes or patterning processes, simplifying the process and reducing costs.

[0030] In one embodiment, the ratio of cerium oxide to molybdenum oxide in the light-absorbing conductive layer 7 ranges from 0.8 to 0.2. Using this ratio of cerium oxide to molybdenum oxide allows for high ultraviolet absorption without affecting the conductivity and transparency of the thin-film transistor, thus reducing the impact of ultraviolet light on the stability of amorphous metal oxides.

[0031] In one embodiment, a transparent conductive layer is formed on the passivation layer 6, and a transparent electrode is formed on the transparent conductive layer and the light-absorbing conductive layer 7 by etching using the same mask. The transparent electrode includes a second gate 71. Specifically, the material of the transparent conductive layer may include indium tin oxide (ITO). The CeO2-MoO2 material and the ITO material may share a single mask, and the second gate 71 formed from the CeO2-MoO2 material is part of the transparent electrode.

[0032] In one embodiment, the light-absorbing conductive layer 7 includes a protective layer and a transparent electrode layer, the transparent electrode layer including a second gate 71. Specifically, in an existing thin-film transistor structure, the original ITO material of the transparent conductive layer can be replaced with the CeO2-MoO2 material of this embodiment to form a protective layer and a transparent electrode layer of the TFT device. The transparent electrode layer includes not only the second gate 71, but may also include a driving electrode 72.

[0033] In one embodiment, the projection of the second gate 71 onto the substrate 1 at least covers the portion of the semiconductor layer 4 projected onto the substrate 1. This allows the second gate 71 to adequately block light from illuminating the semiconductor layer 4, ensuring the stability of the semiconductor.

[0034] In one embodiment, such as Figure 3As shown, semiconductor layer 4 includes a source connection region 41, a drain connection region 42, and a channel region 43. The channel region 43 is located between the source connection region 41 and the drain connection region 42. The source 51 and drain 52 of the source-drain layer 5 are connected to the source connection region 41 and the drain connection region 42, respectively. The projection of the second gate 71 on the substrate 1 covers the projection of the channel region 43 on the substrate 1. In this way, the second gate 71 can effectively block light from irradiating the channel region 43, ensuring the stable performance of the channel region 43.

[0035] In one embodiment, vias 61 that contact the source / drain layers 5 are first etched in the passivation layer 6. Then, a layer of transparent conductive oxide (including CeO2-MoO2) is deposited on the entire device surface (on the passivation layer 6 and in the vias 61), for example, by magnetron sputtering. Subsequently, a second gate 71 and a driving electrode 72 are simultaneously formed using mask photolithography / etching. The second gate 71 is made of CeO2-MoO2 material with high absorption rate for ultraviolet light, which can effectively filter the influence of ambient and active light source ultraviolet light on the conductivity of the channel region 43 of the semiconductor layer 4, thereby improving the long-term stability of the TFT device.

[0036] In one embodiment, the thin-film transistor has the following structure:

[0037] A buffer layer 8 is formed on substrate 1. Substrate 1 is an insulating substrate that provides support. Its material can be, for example, a silicon wafer with an insulating surface (preferably a silicon dioxide pad layer deposited or thermally oxidized on a bulk silicon substrate; alternatively, an insulating layer of silicon nitride or silicon oxynitride can be formed on the bulk silicon), glass (soda-lime glass, alumina-magnesium glass, potassium glass, lead glass, borosilicate glass, etc., which can be doped with commonly used borosilicate phosphophosphorus glass (BPSG) or spin-coated glass (SOG). The glass substrate preferably has a rectangular shape for easy cutting and large-area manufacturing with low impurity contamination), quartz, plastic (preferably a composition with a high melting point, hardness, and good insulation), a bulk silicon wafer substrate with a hollowed-out back, or a polymer substrate with good insulation. Substrate 1 is essentially flat, including a pair of main surfaces, namely a lower surface and an upper surface. The upper surface of substrate 1 can have a rough structure or a periodic uneven structure to enhance bonding strength, for example, through common techniques such as dilute HF acid wet etching or plasma etching. A buffer layer 8 can also be formed to reduce stress or as an adhesive layer to enhance bonding strength.

[0038] A first gate 2 is formed on the upper surface of the buffer layer 8, preferably by sputtering deposition. The material can be, for example, Mo, Pt, Al, Ti, Co, Au, Cu, etc., or other conductive materials, such as doped polycrystalline silicon, or metal nitrides like TiN and TaN. During fabrication, an electrode layer material can be uniformly sputtered and deposited first, and then unwanted portions can be removed by etching according to the electrode pattern. Next, a gate insulating layer 3 is formed on the first gate 2 and the buffer layer 8 by low-temperature deposition. The material can be, for example, conventional insulating dielectric materials such as silicon oxide, silicon nitride, and silicon oxynitride, or high-k insulating dielectric materials such as hafnium-based or rare-earth-based metal oxides, or a combination of these materials, including but not limited to stacking and hybridization.

[0039] A semiconductor layer 4 is formed on the gate insulating layer 3. In active-drive LED and LCD panel displays, compared with polycrystalline, crystalline, and microcrystalline semiconductors, amorphous oxide semiconductors exhibit short-range order, isotropy, simple fabrication processes, and are easy to fabricate into large-area conductive thin films, which is very beneficial for the fabrication of the active region of basic TFTs. Taking the typical material IGZO as an example, the ternary hybrid amorphous oxide metal semiconductor IGZO is composed of In2O3, Ga2O3, and ZnO, with a 3+ bandgap of about 3.4 eV. It is an ionic amorphous N-type semiconductor material. In In2O3, In can form 5S electron orbitals, which is beneficial for high-speed carrier transport; Ga2O3 has strong ionic bonds, which can suppress the generation of 0 vacancies; Zn2+ in ZnO can form a stable tetrahedral structure, which theoretically can enable the metal oxide IGZO to form a stable and highly conductive amorphous structure. Amorphous oxide semiconductors are ionic amorphous semiconductors. Conductivity is achieved through the overlapping of large-radius outer electron clouds of atoms, resulting in high carrier transport (10–100 cm² / V·s). Therefore, in this embodiment, amorphous oxide semiconductors are used to form semiconductor layer 4. Common fabrication methods include magnetron sputtering, chemical vapor deposition (CVD), metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), sol-gel method, and hydrothermal method. In this embodiment, magnetron sputtering is preferred.

[0040] The semiconductor layer 4 is composed of amorphous oxide semiconductors, particularly wide-bandgap (≥2.0 eV) amorphous metal oxide semiconductors. Its material composition can be In-doped ZnO-based semiconductors, specifically including InGaZnO, InZnO, HfInZnO, TaInZnO, ZrInZnO, YInZnO, AlInZnO, and SnInZnO. The atomic count ratio of [In] / ([In]+[Third Metal]) is 35%–80%, and the atomic count ratio of [Zn] / ([In]+[Zn]) is 40%–85%. Preferred atomic count ratios are [In]∶[Third Metal]∶[Zn]∶[O] = 1∶1∶1∶1 or 1∶1∶1∶2 or 2∶2∶2∶1 or 1∶1∶1∶4, etc. In addition, semiconductors can also be binary or ternary metal oxide semiconductor materials or their metal dopants, such as In2O3, ZTO (oxide of Zn and Sn), AZO (oxide of Al and Zn), ITO (oxide of In and Sn), IGO (oxide of In and Ga), ZnO, SnOx, etc., in the amorphous state.

[0041] An active / drain layer 5 and a passivation layer 6 are formed on the semiconductor layer 4. The active / drain layer 5 includes a source 51 and a drain 52. In this embodiment, a common deposition method is used to form the source 51 and drain 52 of the TFT at both ends of the semiconductor layer 4. The electrode materials include Mo, Pt, Al, Ti, Co, Au, Cu, polysilicon, TiN, TaN, and combinations thereof. Subsequently, an electrical isolation and passivation layer 6 is deposited on the TFT device at a low temperature. The material includes silicon oxide, silicon nitride, silicon oxynitride, and combinations thereof.

[0042] First, vias 61 that contact the source and drain electrodes are etched in the passivation layer 6. Then, a transparent conductive CeO2-MoO2 material is deposited on the entire device surface (in the passivation layer 6 and in the vias 61), for example by magnetron sputtering. Subsequently, a light-absorbing conductive layer 7 including the second electrode and the driving electrode 72 is formed simultaneously by mask photolithography / etching.

[0043] In this embodiment, the thin-film transistor's light-absorbing conductive layer 7 is made of CeO2-MoO2 material. Cerium oxide and molybdenum oxide have high light absorption properties and can absorb high-energy, short-wavelength light, such as ultraviolet light. The second gate 71 in this embodiment is also made of cerium oxide and molybdenum oxide, which effectively absorbs high-energy, short-wavelength light, preventing the light from affecting the semiconductor layer 4. Furthermore, cerium oxide and molybdenum oxide have good conductivity and transparency, and will not affect the conductivity and transparency of the thin-film transistor. Therefore, the use of cerium oxide and molybdenum oxide as the material for the second gate 71 in this invention can maintain the stable and normal operation of the semiconductor layer 4, improving the display effect of the display panel.

[0044] This invention provides a method for fabricating thin-film transistors, such as... Figure 1 , Figure 2 and Figure 4 As shown, it includes the following steps:

[0045] Step S1, provide a substrate 1.

[0046] In step S2, a first gate 2, a gate insulating layer 3, a semiconductor layer 4, a source / drain layer 5, and a passivation layer 6 are sequentially formed on the substrate 1.

[0047] Step S3: A light-absorbing and conductive layer 7 is formed on the passivation layer 6. The material of the light-absorbing and conductive layer 7 includes cerium oxide and molybdenum oxide.

[0048] Step S4: Etch the light-absorbing conductive layer 7 to form the second gate 71, which is located above the semiconductor layer 4.

[0049] This embodiment employs the above-described method and steps, using CeO2-MoO2 material as the light-absorbing conductive layer 7. Cerium oxide and molybdenum oxide have high light absorption properties, capable of absorbing high-energy, short-wavelength light, such as ultraviolet light. The use of cerium oxide and molybdenum oxide as the material for the second gate 71 in this embodiment effectively absorbs high-energy, short-wavelength light, preventing the influence of light on the semiconductor layer 4. Furthermore, cerium oxide and molybdenum oxide have good conductivity and transparency, and will not affect the conductivity and transparency of the thin-film transistor. Therefore, the use of cerium oxide and molybdenum oxide as the material for the second gate 71 in this invention can maintain the stable and normal operation of the semiconductor layer 4, improving the display effect of the display panel.

[0050] In one embodiment, step S4 specifically includes:

[0051] The light-absorbing conductive layer 7 is etched to form the second gate 71 and the driving electrode 72. The driving electrode 72 passes through the via 61 of the passivation layer 6 and contacts the source and drain layers 5.

[0052] In one embodiment, in step S3, a transparent conductive layer is formed on the passivation layer 6. The transparent conductive layer and the light-absorbing conductive layer 7 are etched together using the same mask to form a transparent electrode, which includes a second gate 71. Specifically, the material of the transparent conductive layer may include indium tin oxide (ITO). CeO2-MoO2 material and ITO material may share a single mask, and the second gate 71 formed from CeO2-MoO2 material is part of the transparent electrode.

[0053] In one embodiment, the light-absorbing conductive layer 7 includes a protective layer and a transparent electrode layer, the transparent electrode layer including a second gate 71. Specifically, in an existing thin-film transistor structure, the original ITO material of the transparent conductive layer can be replaced with the CeO2-MoO2 material of this embodiment to form a protective layer and a transparent electrode layer of the TFT device. The transparent electrode layer includes not only the second gate 71, but may also include a driving electrode 72.

[0054] This invention also provides a display panel, including any of the thin-film transistors provided in the above embodiments, or thin-film transistors obtained by the thin-film transistor fabrication method of the above embodiments.

[0055] In this embodiment of the display panel, the light-absorbing conductive layer 7 is made of CeO2-MoO2 material. Cerium oxide and molybdenum oxide have high light absorption properties and can absorb high-energy, short-wavelength light, such as ultraviolet light. The second gate 71 in this embodiment is also made of cerium oxide and molybdenum oxide, which can effectively absorb high-energy, short-wavelength light and prevent light from affecting the semiconductor layer 4. Furthermore, cerium oxide and molybdenum oxide have good conductivity and transparency, and will not affect the conductivity and transparency of the thin-film transistor. Therefore, the use of cerium oxide and molybdenum oxide as the material for the second gate 71 in this invention can maintain the stable and normal operation of the semiconductor layer 4 and improve the display effect of the display panel.

[0056] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A thin-film transistor, comprising a substrate and a first gate, a gate insulating layer, a semiconductor layer, a source / drain layer, and a passivation layer sequentially formed on the substrate, characterized in that, A light-absorbing conductive layer is formed on the passivation layer, and a second gate is formed on the light-absorbing conductive layer. The second gate is located above the semiconductor layer. The material of the light-absorbing conductive layer includes cerium oxide and molybdenum oxide, and the ratio of cerium oxide to molybdenum oxide in the material of the light-absorbing conductive layer ranges from 0.8 to 0.

2.

2. The thin-film transistor according to claim 1, characterized in that, The light-absorbing conductive layer also forms a driving electrode, which passes through a via in the passivation layer and contacts the source / drain layer.

3. The thin-film transistor according to claim 1, characterized in that, A transparent conductive layer is formed on the passivation layer, and a transparent electrode is formed on the transparent conductive layer and the light-absorbing conductive layer by etching using the same mask. The transparent electrode includes a second gate.

4. The thin-film transistor according to claim 1, characterized in that, The light-absorbing conductive layer includes a protective layer and a transparent electrode layer, wherein the transparent electrode layer includes a second gate.

5. The thin-film transistor according to claim 1, characterized in that, The projection of the second gate onto the substrate at least covers the portion of the semiconductor layer projected onto the substrate.

6. The thin-film transistor according to claim 5, characterized in that, The semiconductor layer includes a source connection region, a drain connection region, and a channel region. The channel region is located between the source connection region and the drain connection region. The source and drain of the source-drain layer are respectively connected to the source connection region and the drain connection region. The projection of the second gate on the substrate covers the projection of the channel region on the substrate.

7. A method for fabricating a thin-film transistor, characterized in that, include: Provide a substrate; A first gate, a gate insulating layer, a semiconductor layer, a source / drain layer, and a passivation layer are sequentially formed on the substrate. A light-absorbing conductive layer is formed on the passivation layer. The material of the light-absorbing conductive layer includes cerium oxide and molybdenum oxide, and the ratio of cerium oxide to molybdenum oxide ranges from 0.8 to 0.

2. The light-absorbing conductive layer is etched to form a second gate, which is located above the semiconductor layer.

8. The method for fabricating a thin-film transistor according to claim 7, characterized in that, The step of etching the light-absorbing conductive layer to form the second gate includes: The light-absorbing conductive layer is etched to form a second gate and a driving electrode, the driving electrode passing through a via in the passivation layer and contacting the source and drain layers.

9. A display panel, characterized in that, Includes the thin-film transistor according to any one of claims 1 to 6, or the thin-film transistor obtained by the thin-film transistor fabrication method according to claim 7 or 8.

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