A file loading method, a computing device and a storage medium
By migrating processes to load files into local memory based on file information and node memory availability in NUMA-based computing devices, the problem of low read/write speeds caused by multiprocessor access to remote memory is solved, thereby improving file read/write efficiency and computer performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-04-11
- Publication Date
- 2026-03-27
AI Technical Summary
In NUMA-based computing devices, high latency when multiple processors access remote memory results in slow file read/write speeds.
By checking the file cache page status of the node where the process is located, if no cache page is allocated, the node where the cache page is located is determined based on the file information, and the process is migrated to that node. The file cache page is allocated on that node for loading, ensuring that the file is stored and read/written in the local memory of the same node.
It improves the efficiency of multi-process file reading and writing, reduces the latency of accessing remote memory, and optimizes the computer's operating performance.
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Figure CN114706828B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of operating systems, and in particular, to a file loading method, a computing device and a storage medium. BACKGROUND
[0002] With the development of computer technology, the read and write speeds of various storage devices in computers are also getting faster and faster. However, because the read and write speeds of internal memories are still much faster than those of external memories, when a file is processed in a computer, the file is still taken out from the external memory and loaded into the corresponding file cache page of the internal memory. In order to improve the performance of the computer, the computer also develops from a single processor to multiple processors.
[0003] In the prior art, multiple processors in a computing device are deployed in a NUMA architecture. NUMA stands for Non-Uniform Memory Access, which is translated as "non-uniform memory access". Under this architecture, CPU manufacturers integrate memory controllers into CPUs. Generally, one CPU socket has an independent memory controller. Each CPU socket is independently connected to a part of memory, and this part of memory directly connected to the CPU is called "local memory". CPUs are connected through a QPI (Quick Path Interconnect) bus. CPUs can access "remote memory" that is not directly connected to themselves through the QPI bus. Under the NUMA architecture, the access of memory is differentiated into local and remote: the delay of accessing remote memory is significantly higher than that of accessing local memory.
[0004] When a computer including multiple processors has a processor storing a file to a memory closer to itself, the access time of other processors accessing the file is relatively long, and the read and write speeds are relatively low.
[0005] Therefore, a new file loading method is needed. SUMMARY
[0006] Therefore, the present application provides a file loading method to try to solve or at least alleviate the above problems.
[0007] According to a first aspect of the present application, a file loading method is provided, which is suitable for being executed in a computing device and is provided with a plurality of nodes, each of which comprises one or more processors, and the method comprises the following steps: when a process loads a file into an internal memory, it is determined whether a first memory module corresponding to a first node where the process is located is allocated with a file cache page; if not, the cache page information of the file is determined according to the file information of the file, the cache page information comprising a second node corresponding to a second memory module where a historical file cache page of the file is located; it is determined whether the second node and the first node are the same; if not, the process is migrated to the second node; a file cache page is allocated in the second memory module; and the process loads the file into the internal memory according to the file cache page allocated in the second memory module.
[0008] Optionally, in the method according to the present application, if the first memory module is allocated with the file cache page, the process loads the file into the internal memory according to the file cache page allocated in the first memory module.
[0009] Optionally, in the method according to the present application, if the cache page information of the file is not included in the file information of the file, a file cache page is allocated in the first internal module; and the process loads the file into the internal memory according to the file cache page allocated in the first memory module.
[0010] Optionally, in the method according to the present application, the cache page information is generated according to the first node corresponding to the first memory module; and the cache page information is stored into the file information of the file.
[0011] Optionally, in the method according to the present application, if the second node and the first node are the same, a file cache page is allocated in the first memory module; and the process loads the file into the internal memory according to the file cache page allocated in the first memory module.
[0012] Optionally, in the method according to the present application, the generation of the nodes comprises the following steps: the processors in the computing device are constructed in a non-uniform memory access architecture to obtain a plurality of nodes, the nodes being NUMA nodes.
[0013] Optionally, in the method according to the present application, the storage resources of the internal memory and the communication resources between the internal memory and the processors in the computing device are split into the nodes in advance, and a memory module is established in each of the nodes, the first memory module being a local memory of the processors in the first node, and the second memory module being a local memory of the processors in the second node.
[0014] According to a second aspect of the present application, there is provided a computing device comprising: one or more processors; a memory; and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs comprise instructions for performing the file loading method according to the present application.
[0015] According to a third aspect of the present application, there is provided a computer-readable storage medium storing one or more programs, the one or more programs comprising instructions which, when executed by a computing device, cause the computing device to perform the file loading method according to the present application.
[0016] According to a fourth aspect of the present application, there is provided a file loading method adapted to be executed in a server system, the system comprising an internal memory and being provided with a plurality of nodes, each node comprising one or more processors, the method comprising the steps of: when a process loads a file into the internal memory, determining whether a first memory module corresponding to a first node where the process is located is allocated with a file cache page; if not, determining cache page information of the file according to file information of the file, the cache page information comprising a second node corresponding to a second memory module where a historical file cache page of the file is located; determining whether the second node and the first node are the same; if not, migrating the process to the second node; allocating a file cache page in the second memory module; and the process loading the file into the internal memory according to the file cache page allocated in the second memory module.
[0017] The application discloses a file loading method suitable for being executed in a computing device. The computing device comprises an internal memory and is provided with a plurality of nodes, each of which comprises one or more processors. The method comprises the following steps: when a process loads a file into the internal memory, it is judged whether a first memory module corresponding to a first node where the process is located is provided with a file cache page; if not, file cache page information of the file is determined according to file information of the file, the file cache page information comprising a second node corresponding to a second memory module where a file cache page of the file is located; it is judged whether the second node and the first node are the same; if not, the process is migrated to the second node; a file cache page is allocated in the second memory module; and the process loads the file into the internal memory according to the file cache page allocated in the second memory module. When the process needs to load the file and no file cache page is applied, the file cache page information of the file is determined to judge whether a node where a historical file cache page of the file is located is consistent with the node where the process is located; if not, the file cache page is constructed in the node where the historical file cache page is located, so that all information of the file is stored in the memory module corresponding to the same node, and the integrity of the file in the internal module is ensured. The process is migrated to the node where the historical file cache page is located, so that the file is read and written according to the local memory of the node under the same node, and the read and write efficiency of the file by the multiple processes is improved. BRIEF DESCRIPTION OF DRAWINGS
[0018] To the accomplishment of the foregoing and related ends, certain illustrative aspects are described herein in connection with the following description and the annexed drawings. These aspects are indicative of various ways in which the principles disclosed herein can be practiced and all aspects and equivalents thereof are intended to be within the scope of the claimed subject matter. The above- and other advantages of the application disclosed herein will become more apparent in light of the following detailed description, when taken in conjunction with the accompanying drawings in which:
[0019] Figure 1 A schematic diagram of a computing device provided with nodes according to one exemplary embodiment of the application is shown;
[0020] Figure 2 A structural block diagram of a computing device 200 according to one exemplary embodiment of the application is shown;
[0021] Figure 3 A flowchart of a file loading method 300 according to one exemplary embodiment of the application is shown;
[0022] Figure 4 A schematic diagram of allocation of a file cache page in the prior art is shown;
[0023] Figure 5A diagram showing allocation of file cache pages is shown according to one exemplary embodiment of the present application. DETAILED DESCRIPTION
[0024] Exemplary embodiments of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it is to be understood that the present disclosure can be embodied in various forms without being limited by the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. Like reference numerals refer to like elements throughout.
[0025] Figure 1 A diagram showing a computing device provided with nodes according to one exemplary embodiment of the present application is shown. As shown in FIG. 1, a computing device 200 is provided with a plurality of processors: a first processor 111, a second processor 121, a third processor 122, a fourth processor 131, a fifth processor 132, and a sixth processor 141. Figure 1 The number of processors included in the computing device shown in FIG. 1 is merely exemplary, and the present application is not limited to the number of processors included in the computing device or the specific types of the processors. The computing device further includes an internal memory (not shown in the figure). Figure 1
[0026] In order to better manage the computing and storage resources in the computer and improve the operation of the computer, the processors included in the computing device are constructed in a non-uniform memory access architecture (NUMA). As shown in FIG. 1, the computing device 200 is constructed with a first node 110 to a fourth node 140, and each node includes one or more processors. The non-uniform memory access architecture (NUMA) is a memory design for multi-processor computers, in which the memory access time depends on the memory location of the processor. Under NUMA, the processor accesses its own local memory faster than non-local memory. Figure 1 The construction method of the processors shown in FIG. 1 is merely exemplary, and the present application is not limited to the specific way of constructing the non-uniform memory access architecture in the computing device 200.
[0027] Further, the storage resources of the internal memory and the communication resources between the internal memory and the processors are split into the nodes, and a memory module is established in each node. As shown in FIG. 1, the first node 110 is provided with a first memory module 112, the second node 120 is provided with a second memory module 122, the third node 130 is provided with a third memory module 132, and the fourth node 140 is provided with a fourth memory module 142. Figure 1 As shown: The first node 110 includes a first processor 111, a first memory module 112, and communication resources between the first processor 111 and the first memory module 112. The second node 120 includes a second processor 121, a third processor 122, a second memory module 123, and communication resources between the processors (121-122) and the second memory module 123. The third node 130 includes a fourth processor 131, a fifth processor 132, a third memory module 133, and communication resources between the third memory module 133 and the processors (131-132). The fourth node 140 includes a sixth processor 141, a fourth memory module 142, and communication resources between the fourth memory module 142 and the sixth processor 141.
[0028] According to one embodiment of the present invention, since the storage and communication resources of the internal memory are distributed among various nodes, although the processor can still access each memory module, the speed of accessing each memory module differs. The processor accesses the memory modules within its own node faster with a shorter response time, while accessing memory modules in other nodes requires inter-connection with other processors, which is slower and has a longer response time. For a processor within a node, the memory modules within that node are its local memory, while the memory modules in other nodes are its remote memory (or non-local memory).
[0029] by Figure 1 For example, in the first node, the first processor 111 accesses the first memory module 112 faster, while accessing the second memory module 123 in the second node 120 is slower. The first memory module 112 is the local memory of the first processor 111. The second memory module 123 is the remote memory of the first processor 111. In the second node, the second memory module 123 is the local memory of the second processor 121 and the third processor 122.
[0030] In computing device 200, the first node 110 to the fourth node 140 constitute the hardware layer. The hardware layer 200 of the computing device also includes external memory (not shown in the figure). Figure 1 As shown, the computing device 200 also runs an operating system 160, which serves as the system layer of the computing device 200 and provides a software runtime environment for applications running on the computing device. This invention does not limit the specific type of operating system 160. According to one embodiment of this invention, the computing device 200 may further include one or more applications; this invention does not limit the type or number of applications running on the computing device 200.
[0031] Figure 2A structural block diagram of a computing device 200 according to an exemplary embodiment of the present invention is shown. Figure 2 As shown, in basic configuration 202, computing device 200 typically includes system memory 206 and one or more processors 204. Memory bus 208 can be used for communication between processor 204 and system memory 206.
[0032] Depending on the desired configuration, processor 204 can be any type of processor, including but not limited to: microprocessors (μP), microcontrollers (μC), digital information processors (DSPs), or any combination thereof. Processor 204 may include one or more levels of cache such as L1 cache 210 and L2 cache 212, processor core 214, and registers 216. Example processor core 214 may include an arithmetic logic unit (ALU), a floating-point unit (FPU), a digital signal processing core (DSP core), or any combination thereof. Example memory controller 218 may be used with processor 204, or in some implementations, memory controller 218 may be an internal part of processor 204.
[0033] Depending on the desired configuration, system memory 206 can be any type of memory, including but not limited to volatile memory (such as RAM), non-volatile memory (such as ROM, flash memory, etc.), or any combination thereof. System memory 206 may include operating system 220, one or more programs 222, and program data 228. In some embodiments, program 222 may be arranged to execute instructions 223 of the method 300 according to the invention on the operating system using program data 228.
[0034] The computing device 200 may also include a storage interface bus 234. The storage interface bus 234 enables communication from storage devices 232 (e.g., removable storage 236 and non-removable storage 238) to the basic configuration 202 via the bus / interface controller 230. At least a portion of the operating system 220, program 222, and data 224 may be stored on the removable storage 236 and / or non-removable storage 238, and loaded into system memory 206 via the storage interface bus 234 when the computing device 200 is powered on or when program 222 is to be executed, and executed by one or more processors 204.
[0035] The computing device 200 can also include an interface bus 240 for facilitating communication from various interface devices (e.g., output devices 242, peripheral interfaces 244, and communication devices 246) to the basic configuration 202 via the bus / interface controller 230. Example output devices 242 include a graphics processing unit 248 and an audio processing unit 250, which can be configured to facilitate communication to various external devices such as a display or speakers via one or more A / V ports 252. Example peripheral interfaces 244 include a serial interface controller 254 or a parallel interface controller 256, which can be configured to facilitate communication to various external devices such as input devices (e.g., keyboard, mouse, pen, voice input device, touch input device) or other peripheral devices (e.g., printer, scanner) via one or more I / O ports 258. An example communication device 246 can include a network controller 260, which can be arranged to facilitate communications with one or more other computing devices 200 over a network communication link via one or more communication ports 264.
[0036] The network communication link can be one example of a communication media. Communication media can typically be embodied by computer readable instructions, data structures, program modules, and / or other data in a modulated data signal, such as a carrier wave or other transport mechanism, and can include any information delivery media. A "modulated data signal" can be a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. By way of example, and not limitation, communication media can include wired media such as a wired network or direct-wired connection, and wireless media such as acoustic, radio frequency (RF), microwave, infrared (IR) and other wireless media. The term computer readable media as used herein can include both storage media and communication media.
[0037] In the device 200 according to the present application, the programs 222 include a plurality of program instructions of the file loading method 300, which can instruct the processor 204 to execute part of the steps in the file loading method 300 run in the computing device 200 of the present application, so that the parts in the computing device 200 load the file into the internal memory by executing the file loading method 300 of the present application.
[0038] The computing device 200 can be implemented as a server, e.g., a file server, a database, a server, an application server, etc., which can be an electronic device such as a personal digital assistant (PDA), a wireless web appliance, an application-specific device, or a hybrid device that can include any of the above functions. It can be implemented as a personal computer including desktop and notebook configurations, and in some embodiments, the computing device 200 is configured as the file loading method 300.
[0039] Figure 3 A flowchart of a file loading method 300 according to an exemplary embodiment of the present application is shown. As shown in Figure 3 Firstly, step S310 is performed, when a process loads a file into an internal memory, it is determined whether a first memory module corresponding to a first node where the process is located is allocated with a file cache page.
[0040] The process is a user process created by an application running in the computing device, including a system application and a user-installed application, etc. The process can also be implemented as a system process created by an operating system 160 running in the computing device, and the present application does not limit the type of the process and the manner in which the process is created. The file is a file stored in an external memory, and the present application does not limit the file type of the file. The file cache page is a page structure allocated in the external memory for storing the file.
[0041] When an operation such as reading, writing or executing the file is needed, the file needs to be loaded from the external memory into the internal memory by the process. Since the speed of the processor accessing the internal memory is much faster than that of the external memory, the file to be operated is first loaded into the file cache page of the internal memory when the file is read or written for the first time. Thus, the file is obtained from the internal memory when the file is read or written next time, and the corresponding processing operation is performed, without the need to read the file from the external memory again, so as to achieve a faster reading and writing speed.
[0042] The node to which the processor based on which the process runs belongs to is a first node where the process is located. The first node includes a first memory module. According to an embodiment of the present application, a plurality of nodes are provided in the computing device, and each node includes one or more processors. When the nodes are generated, the processors in the computing device are constructed in a non-uniform memory access architecture, to obtain the plurality of nodes. According to an embodiment of the present application, the node is a NUMA node. The first memory module is a local memory of the processor in the first node. The present application does not limit the number of processors included in the first node.
[0043] When the file cache page is allocated to the process, the memory resource closest to the node where the process is located is preferentially used as the file cache page. Therefore, it is determined whether the file cache page has been allocated to the process in the first memory module. The process can load the file multiple times in the process life cycle, and thus the file cache page can have been allocated in the first memory module before, and can be continuously used this time. If the file cache page is allocated in the first memory module, the process loads the file into the internal memory according to the file cache page allocated in the first memory module.
[0044] Figure 4A schematic diagram of allocating file cache pages in the prior art is shown. As shown in Figure 4 When starting to read and write a file in the prior art, it is determined whether the cache page exists. If the cache page does not exist, a file cache page closest to the node where the current process is located is allocated, and the file is stored in the storage module closest to the processor where the process is located. The established file cache page is then returned to the process so that the process stores the file in the file cache page.
[0045] In the prior art, if multiple processes read and write a file, each process runs in a different processor, and different processes acquire different parts of the file. For example, process 1 is included in the first node, process 2 is included in the second node, process 3 is included in the third node, and process 4 is included in the fourth node. Processes 1-4 read the file at the same time, and each process has allocated a file cache page in the local memory of the node where the process is located. Process 1 reads the first 20% of the file, process 2 reads the 20%-50% part of the file, process 3 reads the 50%-75% of the file, and process 4 reads the 75%-100% of the file. In this way, the file will be stored in the storage modules in the first node to the fourth node. When a process in any subsequent node needs to acquire the file from the internal storage, it needs to acquire different parts of the file from each memory module, which results in poor reading efficiency, long response time, and affects the computer running efficiency.
[0046] In the present application, whether to allocate a file cache page in the local memory of the processor where the process is located and whether to migrate the process are determined based on the file information of the file, thereby solving the above technical problems.
[0047] Subsequently, step S320 is performed. If no file cache page has been allocated, the cache page information of the file is determined based on the file information of the file. The cache page information includes the second node corresponding to the second memory module where the historical file cache page of the file is located. The file information of the file records the basic information of the file, including the cache page information. The cache page information records the storage location of the file when the file is historically loaded into the internal storage, and the second node corresponding to the second memory module where the historically allocated file cache page is located. The historical file cache page is the file cache page allocated for the file when the file is previously stored in the internal storage. According to an embodiment of the present application, the second memory module is the local memory of the processor in the second node.
[0048] According to one embodiment of the present application, if the file has been previously assigned a file cache page in the third memory module and loaded into the third memory module of the third node, the cache page information of the file is the third node. According to the cache page information, it can be determined that the file has been previously loaded into the third memory module of the third node. When the file is last loaded into the third memory module of the third node, it is possible that the file is completely loaded into the third memory module, in which case reading or rewriting is required, or a part of the file is loaded, in which case another process loads another part of the file.
[0049] According to one embodiment of the present application, if the file information of the file does not include the cache page information of the file, a file cache page is assigned in the first internal memory module; and the process loads the file into the internal memory according to the file cache page assigned in the first memory module. If the file information of the file does not include the cache page information of the file, the file is loaded into the internal memory from the external memory for the first time, in which case a file cache page is directly assigned from the first memory module closest to the processor where the process is located, so as to load the file and improve the file reading and writing efficiency.
[0050] Further, after the file is loaded into the file cache page, the cache page information is generated according to the first node corresponding to the first memory module, and then the cache page information is stored into the file information of the file. When the cache page information is generated, the first node is taken as the cache page information, and the first node is the cache page information when the file cache page is next assigned; and the file cache page assigned in the first memory module is the historical file cache page when the file cache page is next assigned. The cache page information is stored into the file information of the file, so that the subsequent process can read or rewrite the file from the internal memory, and the file cache page can be further assigned from the first memory module to record other parts of the file.
[0051] If the file information includes the cache page information of the file, step S330 is executed to determine whether the second node is the same as the first node, i.e., whether the node where the historical file cache page is located is the same as the node where the current process is located.
[0052] According to one embodiment of the present application, if the second node is the same as the first node, a file cache page is assigned in the first memory module, and then the process loads the file into the internal memory according to the file cache page assigned in the first memory module. Since the file or a part of the file has been previously stored in the node where the process is located, the process does not need to be migrated, and the file cache page is directly assigned in the internal memory of the node where the process is located to store the file.
[0053] Subsequently, step S340 is performed, and if different, the process is migrated to the second node. If the file's history file cache page is in the second storage module, the file is stored in the local memory by the process of the processor in the second node, and in order to ensure that the file clock is read and written in one storage module, the process needs to be migrated to the second node. Further, the second memory module is the remote memory of the processor in the first node, and after the process is migrated to the second node and the file cache page is subsequently allocated in the second storage module, the process reads and writes the file from the second storage module in the processor of the second node, and high read and write speed and high file access efficiency can also be obtained.
[0054] Subsequently, step S350 is performed, and the file cache page is allocated in the second memory module. Reading and writing the file in the second memory module at all times can ensure that all of the file is stored in the second memory module.
[0055] Finally, step S360 is performed, and the process loads the file into the internal memory according to the file cache page allocated in the second memory module. Since the process has been migrated to the processor in the second node, reading and writing the file from the second memory module can have high read and write speed and low access delay.
[0056] Figure 5 A schematic diagram of allocating a file cache page according to one exemplary embodiment of the present application is shown. As shown in FIG. 1, when the process starts to read and write the file, the file cache page corresponding to the file is obtained. If the file cache page has been allocated in the node where the process is located, the file cache page is returned to the process for the process to read and write the file. Figure 5
[0057] If the file cache page has not been allocated in the node where the process is located, the file information is obtained, and it is determined whether the cache page information is in the file information. If the cache page information is not in the file information, this is the first time to load the file into the internal memory, and the file cache page is directly allocated in the node where the process is located, and the cache page information is generated for subsequent processes to read and write the file. Subsequently, the allocated file cache page is returned to the process for the process to read and write the file.
[0058] If the cache page information is in the file information, and the cache page information is the first node, and the current node where the process is located is the first node, the file has been loaded to the first storage module before, and this time the file cache page is also allocated in the first storage module of the first node, and the allocated file cache page is returned to the process for the process to read and write the file.
[0059] If the cache page information is the second node, and the current process is in the first node, and the historical file cache page is allocated in the second storage module of the second node, and part of the file is loaded, in order to ensure the integrity of the file in the second storage module, facilitate the subsequent process to read and write the file from the second storage module, the process reads and writes the file in the second storage module. And in order to ensure the speed of the process reading and writing the file from the second storage module, the process needs to be migrated to the second node, and the file cache page is allocated in the second storage module, and the allocated file cache page is returned to the process for reading and writing the file. In this way, the entire file is stored in the second storage module, and when other processes read and write the file, the subsequent process can be migrated to the processor of the second node to read and write the file from the second storage module, so that the distance of obtaining the file is reduced, and the reading and writing performance can be optimized.
[0060] According to one embodiment of the application, the application tests the prior art in which the file is distributed in multiple nodes as a comparative test, and tests the process migration when the process needs to be migrated in the application scheme in which the file is distributed in the same node.
[0061] Specifically: in the comparative test and the application, 128 processes are used to read the file, the file size is 8M, and then the file memory is written into another file B. The number of times of completing reading and writing in 30 is counted under the two schemes.
[0062] In the comparative test, the file is distributed and stored in multiple nodes, and the processes are also randomly distributed in multiple nodes. The test result is 35370 times.
[0063] When testing the application, the file is stored in one node, and the test process needs to be migrated to the processor in the node where the file is stored. The test result is 98130 times.
[0064] Through testing, it can be verified that the application scheme can improve the file reading and writing speed and the file loading efficiency, and greatly optimize the computer file reading and writing process.
[0065] According to one embodiment of the application, the file loading method in the application is also suitable for being executed in a server system. The server system includes one or more computing devices. Each computing device includes an internal memory and one or more processors. Each computing device in the server system provides the local internal memory and the processor as a common service hardware resource to the server system, and becomes the internal memory and the processor included in the server system.
[0066] The server system sets a plurality of nodes, each of which includes one or more processors. When each node includes a plurality of processors, the processors can be distributed in different computing devices in the system. The processors in different computing devices can be freely combined into a node of the server system according to requirements.
[0067] When a file loading method is executed in the server system, the file can be loaded in the internal memory by executing the foregoing steps S310-S360. The file loading method executed in the server system can improve the read-write efficiency of multiple processes on the file in the file system, and improve the service efficiency of the server system.
[0068] The present application discloses a file loading method suitable for being executed in a computing device. The computing device includes an internal memory and is provided with a plurality of nodes, each of which includes one or more processors. The method includes the following steps: when a process loads a file into the internal memory, it is determined whether a file cache page is built in a first memory module corresponding to a first node where the process is located; if not, file cache page information of the file is determined according to file information of the file, the file cache page information including a second node corresponding to a second memory module where a file cache page of the file is located; it is determined whether the second node and the first node are the same; if not, the process is migrated to the second node; a file cache page is allocated in the second memory module; and the process loads the file into the internal memory according to the file cache page allocated in the second memory module. When the process needs to load a file and no file cache page is applied, the present application determines according to the file cache page information of the file whether the node where a historical file cache page of the file is located is consistent with the node where the process is located; if not, a file cache page is built in the node where the historical file cache page is located, so that all information of the file is stored in the memory module corresponding to the same node, ensuring the integrity of the file in the internal module. The process is migrated to the node where the historical file cache page is located, so that the file is read and written according to the local memory of the node under the same node, improving the read-write efficiency of multiple processes on the file.
[0069] In the description provided herein, a large number of specific details are explained. However, it can be understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure the understanding of the present description.
[0070] Similarly, it is to be understood that, in the above description of exemplary embodiments of the application, various features of the application are sometimes grouped together in a single embodiment, figure, or description of a related art for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various aspects, features and embodiments of the application.
[0071] Those skilled in the art will understand that the modules, or units or groups among the devices in the examples disclosed herein can be arranged in the devices as described in the examples, or alternatively can be positioned in one or more devices different from the devices in the examples. The modules in the foregoing examples can be combined as a module or further can be divided into a plurality of sub-modules.
[0072] Those skilled in the art will understand that the modules in the devices in the examples can be adaptively changed and disposed in one or more devices different from the examples. The modules or units or groups among the examples can be combined as a module or unit or group, and further can be divided into a plurality of sub-modules or sub-units or sub-groups. All combinations of all features disclosed in the specification and all methods or processes or units of any of the apparatuses disclosed in the specification are made possible by any combination, unless such combinations are mutually exclusive to each other. Each feature disclosed in the specification can be replaced by an alternative feature serving the same, equivalent, or similar purpose, unless expressly stated otherwise.
[0073] Further, those skilled in the art will understand that the combination of features of different examples means to be within the scope of the present application and form different examples, although some of the examples described herein include certain features included in other examples rather than other features.
[0074] Further, some of the examples described herein are described as a combination of methods or method elements implemented by a processor of a computer system or by other means for performing the functions of the methods or method elements. Hence, a processor with the necessary instructions for performing such methods or method elements forms a means for implementing the methods or method elements. Further, elements of a device example described herein are examples of means for performing the functions performed by elements for the purpose of the present application.
[0075] The various techniques described herein can be implemented in connection with hardware or software or, where appropriate, with a combination of both. Thus, the methods and apparatus of the present application, or certain aspects or portions thereof, can take the form of program code (i.e., instructions) embodied in tangible media, such as floppy diskettes, CD-ROMs, hard drives, or any other machine-readable storage medium wherein, when the program code is loaded into and executed by a machine, such as a computer, the machine becomes an apparatus for practicing the subject application.
[0076] In the case of program code execution on programmable computers, the computing device generally includes a processor, a storage medium readable by the processor (including volatile and non-volatile memory and / or storage elements), at least one input device, and at least one output device. The storage medium is configured to store program code which implements the file loading method of the present application. The program code can be implemented in a high level procedural or object-oriented programming language. The program code can implement the file loading method of the application as a stand-alone application, or can be implemented as part of another application package. The program code can also be implemented in assembly or machine language, if desired. In general, the program code can be implemented in any form or in any manner as desired.
[0077] In example but not limited manner, computer-readable media include computer storage media and communication media. Computer storage media includes volatile and non-volatile, removable and non-removable media implemented in a method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media. Combinations of the any of the above are also included within the scope of computer-readable media.
[0078] As used herein, unless otherwise indicated, the use of the ordinal adjectives such as "first", "second", "third", etc. merely to distinguish different instances of an object and does not imply a time, spatial, ordinal, or any other relationship or order between the objects.
[0079] While the application has been described in terms of several embodiments, those skilled in the art will recognize that the application can be practiced with modifications and alterations limited only by the spirit and scope of the inventiveness. Furthermore, the purpose of the description is to enable any person skilled in the art to practice the application as described in the specification and claimed claims. The contexts herein are to be considered in all reasonable aspects as illustrative and not restrictive of the subject matter claimed by the application. Thus, numerous modifications and adaptations will be apparent to those skilled in the art. Therefore, the scope of the application is defined not by the detailed description of the application, but by the appended claims.
Claims
1. A file loading method, suitable for execution in a computing device, said computing device including internal memory and having multiple nodes, each node including one or more processors, said method comprising the steps of: When a process loads a file into the internal memory, it is determined whether the first memory module corresponding to the first node where the process is located has allocated file cache pages; If no file cache page is allocated, the cache page information of the file is determined based on the file information of the file. The cache page information includes the second node corresponding to the second memory module where the historical file cache pages of the file are located. The historical file cache pages are the file cache pages previously allocated in the internal memory of the file. Determine whether the second node is the same as the first node; If they are different, then the process is migrated to the second node; Allocate file cache pages in the second memory module; The process loads the entire file into the internal memory according to the file cache pages allocated in the second memory module, so that subsequent processes can migrate to the second node and read and write the file from the second memory module; The generation of the nodes includes the following steps: constructing the processors in the computing device with a non-uniform memory access architecture to obtain multiple nodes, wherein the nodes are NUMA nodes; In the computing device, the storage resources of the internal memory and the communication resources between the internal memory and the processor are pre-divided into each node. A memory module is established in each node. The first memory module is the local memory of the processor in the first node, and the second memory module is the local memory of the processor in the second node.
2. The method as described in claim 1, wherein, The method further includes the following steps: If a file cache page is allocated in the first memory module, the process loads the file into the internal memory according to the file cache page allocated in the first memory module.
3. The method as described in claim 1, wherein, The method further includes the following steps: If the file information does not include the file cache page information, then a file cache page is allocated in the first memory module; The process loads the file into the internal memory based on the file cache pages allocated in the first memory module.
4. The method of claim 3, wherein, The method further includes the following steps: Generate cache page information based on the first node corresponding to the first memory module; The cached page information is stored in the file information of the file.
5. The method of claim 1, wherein, The method further includes the following steps: If the second node is the same as the first node, then allocate a file cache page in the first memory module; The process loads the file into the internal memory based on the file cache pages allocated in the first memory module.
6. A computing device, comprising: One or more processors; Memory; as well as One or more means, the one or more means comprising instructions for performing the method according to any one of claims 1-5.
7. A computer-readable storage medium storing one or more programs, said one or more programs including instructions that, when executed by a computing device, cause the computing device to perform the method according to any one of claims 1-5.
8. A file loading method, suitable for execution in a server system, said system including internal memory and configured with multiple nodes, each node including one or more processors, said method comprising the steps of: When a process loads a file into the internal memory, it is determined whether the first memory module corresponding to the first node where the process is located has allocated file cache pages; If no file cache page is allocated, the cache page information of the file is determined based on the file information of the file. The cache page information includes the second node corresponding to the second memory module where the historical file cache pages of the file are located. The historical file cache pages are the file cache pages previously allocated in the internal memory of the file. Determine whether the second node is the same as the first node; If they are different, then the process is migrated to the second node; Allocate file cache pages in the second memory module; The process loads the entire file into the internal memory according to the file cache pages allocated in the second memory module, so that subsequent processes can migrate to the second node and read and write the file from the second memory module; The generation of the nodes includes the following steps: constructing the processor with a non-uniform memory access architecture to obtain multiple nodes, wherein the nodes are NUMA nodes; Specifically, the storage resources of the internal memory and the communication resources between the internal memory and the processor are pre-split into each node, and a memory module is established in each node. The first memory module is the local memory of the processor in the first node, and the second memory module is the local memory of the processor in the second node.
Citation Information
Patent Citations
Process scheduling method and device for accessing non-VMA area file cache
CN114281502A