Micro-led device and preparation method thereof

Abstract

The application discloses a Micro-LED device and a preparation method thereof. The Micro-LED device comprises a Micro-LED epitaxial wafer, a passivation layer, a current spreading layer and an electrode. The Micro-LED epitaxial wafer comprises a substrate, an N-type semiconductor layer, an active layer and a P-type semiconductor layer in sequence. A light emitting unit and a step beside the light emitting unit and etched to the N-type semiconductor layer are formed on the Micro-LED epitaxial wafer. The passivation layer is located on the step, and an isolation groove penetrating to the N-type semiconductor layer is formed in the passivation layer. The current spreading layer is located above the P-type semiconductor layer and all or part of the passivation layer. The electrode comprises a first electrode located on the current spreading layer and electrically connected with the P-type semiconductor layer, and a second electrode located in the isolation groove and electrically connected with the N-type semiconductor layer. In the application, a passivation layer stripping process is adopted, and secondary photolithography alignment is not needed for the device mesa, so that the requirements for photolithography alignment and exposure accuracy in the device preparation process are reduced, and the process complexity and process cost are reduced.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of Micro-LED and particularly relates to a Micro-LED device and a preparation method thereof. BACKGROUND

[0002] Micro-LED is a light-emitting diode device that is miniaturized and arrayed on the basis of a traditional LED. In many application scenarios, Micro-LED has excellent display effects and is an important choice for the next generation of display technology. At present, Micro-LED devices are mostly obtained by directly miniaturizing traditional vertical structure LED devices, and the device preparation is completed through steps such as etching, current spreading layer preparation, and metal preparation. However, in the field of high-resolution display, the mesa diameter of the Micro-LED device needs to be reduced to 10 μm or even below 5 μm. Using the traditional preparation method, multiple photolithography alignments need to be performed on the mesa, and high photolithography alignment and exposure precision is often required on such a small mesa to achieve photolithography alignment, which is complex and costly.

[0003] Therefore, in view of the above technical problems, it is necessary to provide a Micro-LED device and a preparation method thereof. SUMMARY

[0004] Therefore, in view of the above technical problems, it is necessary to provide a Micro-LED device and a preparation method thereof.

[0005] To achieve the above-mentioned purpose, the technical scheme provided by an embodiment of the application is as follows:

[0006] A Micro-LED device, comprising a Micro-LED epitaxial wafer, a passivation layer, a current spreading layer, and an electrode, wherein:

[0007] The Micro-LED epitaxial wafer comprises, in sequence, a substrate, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer, and the Micro-LED epitaxial wafer is formed with a light-emitting unit and a step beside the light-emitting unit and etched to the N-type semiconductor layer;

[0008] The passivation layer is located on the step, and the passivation layer is formed with an isolation groove penetrating to the N-type semiconductor layer;

[0009] The current spreading layer is located above the P-type semiconductor layer and all or part of the passivation layer;

[0010] The electrode comprises a first electrode located on the current spreading layer and electrically connected to the P-type semiconductor layer, and a second electrode located in the isolation groove and electrically connected to the N-type semiconductor layer.

[0011] In an embodiment, the top surface of the passivation layer is flush with the top surface of the P-type semiconductor layer.

[0012] In an embodiment, the substrate is a silicon substrate, a GaN template substrate on sapphire, or a GaN self-supporting substrate; and / or,

[0013] The material of the N-type semiconductor layer and / or the P-type semiconductor layer is a GaN-based material; and / or,

[0014] The material of the active layer is a GaN-based quantum well or a self-assembled quantum dot material.

[0015] In an embodiment, the material of the passivation layer is SiO2 or Si3N4; and / or,

[0016] The current spreading layer has a transmittance greater than or equal to 95% in the light-emitting wavelength band of the Micro-LED device; and / or,

[0017] The current spreading layer is an ITO thin film with a thickness of 100-300 nm; and / or,

[0018] The first electrode and / or the second electrode is an ohmic contact electrode; and / or,

[0019] The first electrode and / or the second electrode is a Ti / Al / Ti / Au composite metal electrode.

[0020] Another embodiment of the present application provides the technical solution as follows:

[0021] A preparation method of a Micro-LED device, the preparation method comprising:

[0022] S1, epitaxially growing, on a substrate, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer in sequence to obtain a Micro-LED epitaxial wafer;

[0023] S2, forming photoresist on light-emitting units on the Micro-LED epitaxial wafer by one-time photolithography alignment;

[0024] S3, etching the Micro-LED epitaxial wafer to the N-type semiconductor layer by a dry etching process to form a step on the side of the light-emitting units;

[0025] S4, depositing a passivation layer on the step and the photoresist;

[0026] S5, stripping the photoresist and the passivation layer thereon;

[0027] S6, perforating the passivation layer to form an isolation groove penetrating to the N-type semiconductor layer;

[0028] S7, preparing a current spreading layer above the P-type semiconductor layer and all or part of the passivation layer;

[0029] S8, preparing a first electrode electrically connected with the P-type semiconductor layer on the current spreading layer, and preparing a second electrode electrically connected with the N-type semiconductor layer in the isolation groove.

[0030] In an embodiment, the etching depth of the Micro-LED epitaxial wafer in the step S3, the deposition thickness of the passivation layer in the step S4, and the opening depth of the passivation layer in the step S6 are equal.

[0031] In an embodiment, the step S5 further comprises:

[0032] The passivation layer is planarized by a wet etching process.

[0033] In an embodiment, the N-type semiconductor layer, the active layer, and the P-type semiconductor layer in the step S1 are epitaxially grown by a molecular beam epitaxy process; and / or,

[0034] The dry etching process in the step S3 is an inductively coupled plasma etching process, an ion beam etching process, or a reactive ion etching process; and / or,

[0035] The passivation layer in the step S4 is obtained by an inductively coupled plasma chemical vapor deposition or a plasma-enhanced chemical vapor deposition, and the deposition temperature is not higher than 300℃; and / or,

[0036] The opening in the step S6 is performed by a reactive ion etching; and / or,

[0037] The current spreading layer in the step S7 is prepared by film plating, photolithography, and wet etching; and / or,

[0038] The first electrode and / or the second electrode in the step S8 is prepared by a metal stripping method.

[0039] In an embodiment, the substrate is a silicon substrate, a GaN template substrate on sapphire, or a GaN self-supporting substrate; and / or,

[0040] The material of the N-type semiconductor layer and / or the P-type semiconductor layer is a GaN-based material; and / or,

[0041] The material of the active layer is a GaN-based quantum well or a self-assembled quantum dot material.

[0042] In an embodiment, the material of the passivation layer is SiO2 or Si3N4; and / or,

[0043] The transmittance of the current spreading layer in the light-emitting wavelength band of the Micro-LED device is greater than or equal to 95%; and / or,

[0044] The current spreading layer is an ITO film with a thickness of 100nm-300nm; and / or,

[0045] The first electrode and / or the second electrode is an ohmic contact electrode; and / or,

[0046] The first electrode and / or the second electrode is a Ti / Al / Ti / Au composite metal electrode.

[0047] The present application has the following beneficial effects:

[0048] The Micro-LED device and the preparation method thereof adopt the passivation layer stripping process, without the secondary photolithography alignment on the device mesa, so that the requirements of photolithography alignment and exposure precision in the device preparation process are reduced, the process complexity and process cost are reduced, and the preparation of small-size Micro-LED devices can be realized. BRIEF DESCRIPTION OF DRAWINGS

[0049] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0050] Figure 1 It is a structure schematic diagram of the Micro-LED device in a specific embodiment of the present application.

[0051] Figures 2a-2f It is a process flow chart of the Micro-LED device preparation method in a specific embodiment of the present application.

[0052] Figure 3 It is a flowchart of the Micro-LED device preparation method in a specific embodiment of the present application. DETAILED DESCRIPTION

[0053] In order to make the person skilled in the art better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the scope of protection of the present application.

[0054] The present application discloses a Micro-LED device, which comprises a Micro-LED epitaxial wafer, a passivation layer, a current expansion layer and electrodes, wherein:

[0055] The Micro-LED epitaxial wafer comprises a substrate, an N-type semiconductor layer, an active layer and a P-type semiconductor layer in sequence, and a light emitting unit and a step beside the light emitting unit and etched to the N-type semiconductor layer are formed on the Micro-LED epitaxial wafer;

[0056] The passivation layer is located on the step, and an isolation groove penetrating to the N-type semiconductor layer is formed in the passivation layer;

[0057] The current spreading layer is located above the P-type semiconductor layer and all or part of the passivation layer;

[0058] The electrode comprises a first electrode located on the current spreading layer and electrically connected with the P-type semiconductor layer, and a second electrode located in the isolation groove and electrically connected with the N-type semiconductor layer.

[0059] The application further discloses a preparation method of the Micro-LED device.

[0060] S1, epitaxially growing an N-type semiconductor layer, an active layer and a P-type semiconductor layer on a substrate in sequence to obtain a Micro-LED epitaxial wafer;

[0061] S2, forming photoresist on the light emitting unit on the Micro-LED epitaxial wafer by one-time photolithography alignment;

[0062] S3, etching the Micro-LED epitaxial wafer to the N-type semiconductor layer by a dry etching process to form a step beside the light emitting unit;

[0063] S4, depositing a passivation layer on the step and the photoresist;

[0064] S5, stripping the photoresist and the passivation layer thereon;

[0065] S6, perforating the passivation layer to form an isolation groove penetrating to the N-type semiconductor layer;

[0066] S7, preparing a current spreading layer above the P-type semiconductor layer and all or part of the passivation layer;

[0067] S8, preparing a first electrode electrically connected with the P-type semiconductor layer on the current spreading layer, and preparing a second electrode electrically connected with the N-type semiconductor layer in the isolation groove.

[0068] The application will be further described below in combination with specific embodiments.

[0069] Referring to Figure 1 and combining Figures 2a-2f with the drawings, the Micro-LED device in the embodiment comprises a Micro-LED epitaxial wafer, a passivation layer, a current spreading layer and an electrode, wherein:

[0070] The Micro-LED epitaxial wafer 10 comprises a substrate 101, an N-type semiconductor layer 102, an active layer 103 and a P-type semiconductor layer 104 in sequence, and the Micro-LED epitaxial wafer 10 is formed with light-emitting units 100 and a step 111 beside the light-emitting units 100 and etched to the N-type semiconductor layer;

[0071] The passivation layer 20 is located on the step 111, and the passivation layer 20 is formed with an isolation groove 21 penetrating to the N-type semiconductor layer;

[0072] The current spreading layer 30 is located above the P-type semiconductor layer 104 and part of the passivation layer 20;

[0073] The electrode comprises a first electrode 41 located on the current spreading layer 30 and electrically connected with the P-type semiconductor layer 104, and a second electrode 42 located in the isolation groove 21 and electrically connected with the N-type semiconductor layer 102.

[0074] In the embodiment, the top surface of the passivation layer 20 is flush with the top surface of the P-type semiconductor layer 104, and the depth of the isolation groove 21 is equal to the thickness of the passivation layer 20.

[0075] Preferably, the substrate is a silicon substrate, a GaN template substrate on sapphire or a GaN self-supporting substrate; the material of the N-type semiconductor layer and / or the P-type semiconductor layer is a GaN-based material; and the material of the active layer is a GaN-based quantum well or a self-assembled quantum dot material.

[0076] Preferably, the passivation layer is prepared by inductively coupled plasma chemical vapor deposition or plasma enhanced chemical vapor deposition, the deposition temperature is not higher than 300°C, and the material of the passivation layer can be silicon oxide (SiO2) or silicon nitride (Si3N4) and the like.

[0077] Preferably, the current spreading layer is an indium tin oxide (ITO) thin film with a thickness of 100nm-300nm.

[0078] Preferably, the first electrode and / or the second electrode is an ohmic contact electrode, and the first electrode and the current spreading layer and the second electrode and the N-type semiconductor layer can form a good ohmic contact. Preferably, when the semiconductor material is a GaN-based material and the current spreading layer is an indium tin oxide (ITO) thin film, the first electrode and the second electrode are Ti / Al / Ti / Au (25nm / 200nm / 25nm / 200nm) composite metal electrodes.

[0079] Preferably, the first electrode and / or the second electrode is an ohmic contact electrode, and the first electrode and the current spreading layer and the second electrode and the N-type semiconductor layer can form a good ohmic contact. Preferably, when the semiconductor material is a GaN-based material and the current spreading layer is an indium tin oxide (ITO) thin film, the first electrode and the second electrode are Ti / Al / Ti / Au (25nm / 200nm / 25nm / 200nm) composite metal electrodes.

[0079] Preferably, the first electrode and / or the second electrode is an ohmic contact electrode, and the first electrode and the current spreading layer and the second electrode and the N-type semiconductor layer can form a good ohmic contact. Preferably, when the semiconductor material is a GaN-based material and the current spreading layer is an indium tin oxide (ITO) thin film, the first electrode and the second electrode are Ti / Al / Ti / Au (25nm / 200nm / 25nm / 200nm) composite metal electrodes.Figure 3 And in combination Figures 2a-2f As shown in the preparation method of the Micro-LED device in this embodiment, specifically includes the following steps:

[0080] S1, referring Figure 2a As shown, the N-type semiconductor layer 102, the active layer 103 and the P-type semiconductor layer 104 are epitaxially grown on the substrate 101 in sequence to obtain the Micro-LED epitaxial wafer 10.

[0081] Among them, the N-type semiconductor layer 102, the active layer 103 and the P-type semiconductor layer 104 are epitaxially grown by molecular beam epitaxy process, the N-type semiconductor layer 102 and the P-type semiconductor layer 104 are N-type GaN layer and P-type GaN layer respectively, and the active layer 103 is GaN-based quantum well active layer.

[0082] S2, referring Figure 2b As shown, the photoresist 50 is formed on the light emitting unit 100 on the Micro-LED epitaxial wafer 10 by one-time photolithography alignment.

[0083] Through one-time photolithography alignment, the pattern on the mask plate is printed on the surface of the Micro-LED epitaxial wafer by light exposure, and after the photolithography is completed, the photoresist pattern in the form of mesa is left on the surface of the Micro-LED epitaxial wafer.

[0084] S3, continue to refer to Figure 2b As shown, the Micro-LED epitaxial wafer 10 is etched to the N-type semiconductor layer 102 by dry etching process, and the step 111 is formed under the etching mesa 11 (the mesa except the light emitting unit), and the step 111 is located beside the light emitting unit 100.

[0085] Among them, the dry etching process is inductively coupled plasma (ICP) etching process, and the etching depth in this embodiment is 700nm. In other embodiments, ion beam etching (IBE) process or reactive ion (RIE) etching process can also be used.

[0086] S4, referring Figure 2c As shown, the passivation layer 20 is deposited on the step 111 and the photoresist 50.

[0087] The passivation layer 20 is obtained by inductively coupled plasma chemical vapor deposition or plasma enhanced chemical vapor deposition, and the deposition temperature is not higher than 300℃.

[0088] In this embodiment, the material of the passivation layer is silicon oxide (SiO2), and the thickness is 700nm.

[0089] S5, continue to refer to Figure 2c As shown, the photoresist 50 and the passivation layer 20 thereon are stripped.

[0090] Preferably, after stripping the photoresist and the passivation layer thereon, the passivation layer is planarized by a wet etching process.

[0091] In this embodiment, the BOE solution is used for etching, and the etching time is 6s, so as to realize the planarization of the SiO2 passivation layer at the edge position of the photoresist 50.

[0092] S6, as shown in the figure, the passivation layer 20 is opened to form an isolation groove 21 penetrating to the N-type semiconductor layer 102. Figure 2d

[0093] In this embodiment, the opening is performed by reactive ion (RIE) etching, and the opening depth is equal to the thickness of the passivation layer, which is 700nm, so as to expose the underlying N-type semiconductor layer 102.

[0094] S7, as shown in the figure, a current spreading layer 30 is prepared above the P-type semiconductor layer 104 and part of the passivation layer 20. Figure 2e

[0095] The ITO film is patterned by a photoetching and a wet etching process to form the current spreading layer 30.

[0096] The current spreading layer 30 in this embodiment is an ITO film with a thickness of 100nm, which is suitable for GaN material and the thickness matches the light-emitting wavelength of the Micro-LED device.

[0097] The current spreading layer in this embodiment is formed above the P-type semiconductor layer 104 and part of the passivation layer 20, and in other embodiments, it can also be formed above the P-type semiconductor layer 104 and all of the passivation layer 20.

[0098] S8, as shown in the figure, a first electrode 41 electrically connected to the P-type semiconductor layer 104 is prepared on the current spreading layer 30, and a second electrode 42 electrically connected to the N-type semiconductor layer 102 is prepared in the isolation groove 21. Figure 2f

[0099] In this embodiment, the first electrode and the second electrode are prepared by a metal stripping method, and both the first electrode and the second electrode are Ti / Al / Ti / Au (25nm / 200nm / 25nm / 200nm) composite metal electrodes.

[0100] Based on the existing Micro-LED process, the device mesa range needs to be repeatedly aligned and photoetched, the preparation process is complex, and high alignment accuracy is often required, for example, three times of photoetching exposure and twice of photoetching alignment are required to prepare the current spreading layer and the metal electrode on a 1pm diameter mesa, which requires photoetching exposure and alignment accuracy below 300nm, and the cost is high. ​​​

[0101] The micro-LED device and the preparation method thereof adopt the passivation layer stripping process, do not need to perform secondary photoetching alignment on the top of the mesa, and only need 1 mu photoetching alignment and exposure precision to prepare the micro-LED device with the 1 mu mesa, thereby reducing the complexity of the process and realizing low-cost preparation of the small-size micro-LED device.

[0102] From the above technical solutions, the present application has the following advantages:

[0103] The micro-LED device and the preparation method thereof adopt the passivation layer stripping process, do not need to perform secondary photoetching alignment on the top of the mesa, and only need 1 mu photoetching alignment and exposure precision to prepare the micro-LED device with the 1 mu mesa, thereby reducing the complexity of the process and realizing low-cost preparation of the small-size micro-LED device.

[0104] It will be obvious to a person skilled in the art that, as the application is not limited to the details of the foregoing exemplary embodiments but can be implemented in other concrete forms, the application encompasses any and all modifications coming within the meaning and range of equivalents of the claims. The claims are therefore to be accorded their broadest interpretation consistent with the specification. No admission is made that any of the accompanying drawings serve as a guide for the scope of the claims or that any reference numerals in the claims serve as a limitation on the scope of the claims.

[0105] Furthermore, it should be understood that, although the present specification is described in terms of embodiments, not every embodiment contains only one independent technical solution, and the present specification is described in this way only for the sake of clarity, and a person skilled in the art should consider the present specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by a person skilled in the art.

Claims

1. A method for fabricating a Micro-LED device, characterized in that, The preparation method includes: S1. An N-type semiconductor layer, an active layer, and a P-type semiconductor layer are sequentially epitaxially grown on a substrate to obtain a Micro-LED epitaxial wafer; S2. Photoresist is formed on the light-emitting unit on the Micro-LED epitaxial wafer through a single photolithography alignment; S3. The Micro-LED epitaxial wafer is etched to the N-type semiconductor layer using a dry etching process, forming steps on both sides of the light-emitting unit; S4. Deposit a passivation layer on the step and photoresist, wherein the top surface of the passivation layer is flush with the top surface of the P-type semiconductor layer; S5. Remove the photoresist and its passivation layer; S6. Make openings in the passivation layer to form an isolation trench that extends to the N-type semiconductor layer; S7. A current spreading layer is prepared above the P-type semiconductor layer and all or part of the passivation layer; S8. A first electrode electrically connected to a P-type semiconductor layer is prepared on a current spreading layer, and a second electrode electrically connected to an N-type semiconductor layer is prepared in an isolation trench.

2. The preparation method according to claim 1, characterized in that, The etching depth of the Micro-LED epitaxial wafer in step S3, the deposition thickness of the passivation layer in step S4, and the opening depth of the passivation layer in step S6 are all equal.

3. The preparation method according to claim 1 or 2, characterized in that, The step S5 is followed by: The passivation layer is planarized using a wet etching process.

4. The preparation method according to claim 1, characterized in that, The N-type semiconductor layer, active layer, and P-type semiconductor layer in step S1 are obtained by molecular beam epitaxy; and / or, The dry etching process in step S3 is inductively coupled plasma etching, ion beam etching, or reactive ion etching; and / or... The passivation layer in step S4 is obtained by inductively coupled plasma chemical vapor deposition or plasma-enhanced chemical vapor deposition, with a deposition temperature not exceeding 300℃; and / or, In step S6, the opening is performed by reactive ion etching; and / or, The current spreading layer in step S7 is prepared by coating, photolithography, and wet etching; and / or, The first electrode and / or the second electrode in step S8 are prepared by a metal stripping method.

5. The preparation method according to claim 1, characterized in that, The substrate is a silicon substrate, a GaN template substrate on sapphire, or a GaN self-supporting substrate; and / or, The material of the N-type semiconductor layer and / or the P-type semiconductor layer is GaN-based; and / or... The active layer is made of GaN-based quantum wells or self-assembled quantum dot materials.

6. The preparation method according to claim 1, characterized in that, The passivation layer is made of SiO2 or Si3N4; and / or, The current spreading layer has a transmittance of greater than or equal to 95% in the emission band of the Micro-LED device; and / or, The current spreading layer is an ITO thin film with a thickness of 100nm~300nm; and / or, The first electrode and / or the second electrode are ohmic contact electrodes; and / or, The first electrode and / or the second electrode are Ti / Al / Ti / Au composite metal electrodes.

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