Constant voltage output circuit for electronic cigarette, integrated circuit chip and electronic cigarette

Abstract

An embodiment of the present disclosure provides a constant voltage output circuit for an electronic cigarette, an integrated circuit chip, and an electronic cigarette. The circuit includes: a switch unit connected in series with a heating element; a PWM signal generating unit connected to the heating element to obtain the load voltage across the heating element. The PWM signal generating unit also receives a preset first reference voltage. The PWM signal generating unit generates a PWM signal according to the load voltage and the first reference voltage, and the duty cycle of the PWM signal is inversely proportional to the load voltage. The output end of the PWM signal generating unit is connected to the control end of the switch unit to control the conduction and cutoff of the switch unit through the PWM signal. According to this constant voltage output circuit, the load voltage can be made equivalent to a constant value in each cycle of the PWM signal, and this constant value is independent of the magnitude of the load voltage itself. Therefore, the constant voltage accuracy is improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of electronic cigarettes, and particularly relates to a constant voltage output circuit for an electronic cigarette, an integrated circuit chip, and an electronic cigarette. Background Art

[0002] Constant voltage output circuits are widely used in electronic products such as electronic cigarettes and chargers because their output voltage or output power is constant. For an electronic cigarette circuit, it is of great significance to keep the load voltage across the heating element constant. The constancy of the load voltage usually directly determines the constancy of the power of the heating element of the electronic cigarette, thereby making the atomization amount stable for each puff, which can improve the user experience and the service life of the electronic cigarette. However, the constant voltage accuracy of the constant voltage output circuit of the existing electronic cigarette is not high. Therefore, it is desirable to provide a constant voltage output circuit with higher accuracy for the load voltage. Summary of the Invention

[0003] In view of the above, to solve the problem of low accuracy of the existing constant voltage output circuit for an electronic cigarette, a first aspect of the present disclosure provides a constant voltage output circuit for an electronic cigarette, which circuit includes: a switch unit connected in series with a heating element; a PWM signal generation unit, the PWM signal generation unit is connected to the heating element to obtain the load voltage across the heating element, the PWM signal generation unit also receives a preset first reference voltage, the PWM signal generation unit generates a PWM signal according to the load voltage and the first reference voltage, and the duty cycle of the PWM signal is inversely proportional to the load voltage, and the output end of the PWM signal generation unit is connected to the control end of the switch unit to control the conduction and cut-off of the switch unit through the PWM signal.

[0004] Preferably, the constant voltage output circuit includes a ground terminal, an atomization terminal, and a power supply terminal. Two ends of the heating element are respectively connected to the ground terminal and the atomization terminal, and two ends of the switch unit are respectively connected to the power supply terminal and the atomization terminal. Among them, the input end of the PWM signal generation unit is connected to the atomization terminal and the ground terminal to obtain the load voltage across the heating element.

[0005] Preferably, the constant voltage output circuit includes a ground terminal, an atomization terminal, and a power supply terminal. One end of the heating element is connected to the power supply terminal, and the other end is connected to the atomization terminal. The first end of the switch unit is connected to the atomization terminal, and the second end of the switch unit is connected to the ground terminal. Among them, the input end of the PWM signal generation unit is connected to the power supply terminal and the atomization terminal to obtain the load voltage across the heating element.

[0006] Preferably, the PWM signal generating unit includes: a sampling unit configured to connect to a heating element to obtain a load voltage across the heating element and generate a sampling voltage according to the load voltage; a voltage-current conversion unit having one input terminal for receiving the first reference voltage and another input terminal connected to the sampling unit to receive the sampling voltage, the voltage-current conversion unit being configured to convert the first reference voltage and the sampling voltage into a reference current and a sampling current respectively; a clock generation unit connected to the voltage-current conversion unit, configured to receive the reference current and the sampling current, generate a first clock signal based on the reference current and generate a second clock signal based on the sampling current; a counting and output unit connected to the clock generation unit, configured to receive the first clock signal and the second clock signal, the counting and output unit counting the first clock signal to obtain a reset signal, counting the second clock signal to obtain a conduction time control signal, and generating the PWM signal according to the reset signal and the conduction time control signal.

[0007] Preferably, the voltage-current conversion unit includes a first voltage-current conversion unit and a second voltage-current conversion unit; the first voltage-current conversion unit includes: a first operational amplifier having one input terminal for receiving the first reference voltage; a first transistor whose gate is coupled to the output terminal of the first operational amplifier; a first resistor having one end coupled to the other input terminal of the first operational amplifier and the first end of the first transistor respectively, and the other end of the first resistor grounded; a second transistor and a third transistor whose gates are coupled, the first ends of the second transistor and the third transistor are both connected to a power supply terminal, the second end of the second transistor is coupled to the second end of the first transistor and the gate of the second transistor, and the second end of the third transistor is connected to the clock generation unit and configured to output the reference current; the second voltage-current conversion unit includes: a second operational amplifier having one input terminal connected to the sampling unit to receive the sampling voltage; a fourth transistor whose gate is coupled to the output terminal of the second operational amplifier; a second resistor having one end coupled to the other input terminal of the second operational amplifier and the first end of the fourth transistor respectively, and the other end of the second resistor grounded; a fifth transistor and a sixth transistor whose gates are coupled, the first ends of the fifth transistor and the sixth transistor are both connected to a power supply terminal, the second end of the fifth transistor is coupled to the second end of the fourth transistor and the gate of the fifth transistor, and the second end of the sixth transistor is connected to the clock generation unit and configured to output the sampling current.

[0008] Preferably, the clock generation unit includes a first clock generation unit and a second clock generation unit; the first clock generation unit includes: a first capacitor, a first end of the first capacitor is connected to the voltage-current conversion unit to receive the reference current, and a second end of the first capacitor is grounded; a first comparator, one input end of the first comparator is used to receive a preset second reference voltage, and the other input end of the first comparator is coupled to the first end of the first capacitor; a first controlled switch, the first controlled switch is connected across both ends of the first capacitor and controls the charge and discharge of the first capacitor based on the output signal of the first comparator, so as to generate a first pulse wave signal at the first end of the first capacitor, and the first comparator generates the first clock signal based on the first pulse wave signal and the second reference voltage; the second clock generation unit includes: a second capacitor, a first end of the second capacitor is connected to the voltage-current conversion unit to receive the sampling current, and a second end of the second capacitor is grounded; a second comparator, one input end of the second comparator is used to receive a preset third reference voltage, and the other input end of the second comparator is coupled to the first end of the second capacitor; a second controlled switch, the second controlled switch is connected across both ends of the second capacitor and controls the charge and discharge of the second capacitor based on the output signal of the second comparator, so as to generate a second pulse wave signal at the first end of the second capacitor, and the second comparator generates the second clock signal based on the second pulse wave signal and the third reference voltage.

[0009] Preferably, the counting and output unit includes a first counting and output unit and a second counting and output unit; the second counting and output unit is connected to the clock generation unit to count the second clock signal to generate a conduction time control signal, and the conduction time control signal includes an on signal and an off signal. Among them, when the second counting and output unit counts from the start time of counting to reaching a preset second quantity, it continuously generates an on signal and sends it to the switch unit to make the switch unit conduct. When the second counting and output unit counts from the time when the count reaches the second quantity to receiving a reset signal, it continuously generates an off signal and sends it to the switch unit to make the switch unit turn off; the first counting and output unit is connected to the clock generation unit to count the first clock signal to generate the reset signal. Among them, the start time of counting of the first counting and output unit is the same as the start time of counting of the second counting and output unit. When the count of the first counting and output unit reaches a preset first quantity, it outputs the reset signal and sends it to the second counting and output unit to make the second counting and output unit and the first counting and output unit clear the count and start counting again.

[0010] Preferably, the duty cycle is expressed by the following formula:

[0011]

[0012] Wherein, is the duty cycle, T CLK1 is the unit counting time of the first clock signal, T CLK2 is the unit counting time of the second clock signal, N1 is a preset first quantity, N2 is a preset second quantity, C2 is the capacitance value of the second capacitor, C1 is the capacitance value of the first capacitor, V REF1 is the first reference voltage, V REF2 is the second reference voltage, V REF3 is the third reference voltage, K is a sampling coefficient, K*V AT is the sampling voltage, represents the sampling current, represents the reference current, R1 and R2 are respectively the resistance values of the first resistor and the second resistor of the voltage-current conversion unit, m2 is the aspect ratio of the fifth transistor and the sixth transistor of the voltage-current conversion unit, and m1 is the aspect ratio of the second transistor and the third transistor of the voltage-current conversion unit.

[0013] Preferably, the product of the resistance value of the first resistor, the capacitance value of the first capacitor, the second reference voltage, the aspect ratio of the second transistor and the third transistor, and the first quantity is equal to the product of the resistance value of the second resistor, the capacitance value of the second capacitor, the third reference voltage, the aspect ratio of the fifth transistor and the sixth transistor, and the second quantity; the duty cycle is expressed by the following formula:

[0014]

[0015] Wherein, the first reference voltage is less than or equal to the sampling voltage.

[0016] Preferably, the resistance values of the first resistor and the second resistor are equal; the aspect ratio of the second transistor and the third transistor is equal to the aspect ratio of the fifth transistor and the sixth transistor, the capacitance values of the first capacitor and the second capacitor are equal; the second reference voltage is equal to the third reference voltage, and the first quantity is equal to the second quantity.

[0017] Preferably, the expression of the period equivalent voltage is:

[0018]

[0019] Wherein, V OUT is the period equivalent voltage, and the period equivalent voltage refers to the equivalent voltage of the load voltage within each period of the PWM signal.

[0020] The second aspect of the present disclosure also provides an integrated circuit chip, which includes any one of the above constant voltage output circuits.

[0021] The third aspect of the present disclosure also provides an electronic cigarette, which includes a heating element. The electronic cigarette also includes any one of the above constant voltage output circuits or an integrated circuit chip. The switching unit of the constant voltage output circuit is connected in series with the heating element, and the PWM signal generation unit is connected to the heating element to obtain the load voltage across the heating element.

[0022] The beneficial effect of the constant voltage output circuit for electronic cigarettes provided by the present disclosure is that by accurately collecting the load voltage and generating a PWM signal whose duty cycle is inversely proportional to the load voltage based on the load voltage. Based on this PWM signal to control the on and off of the switching unit, the load voltage can be made equivalent to a constant value in each cycle of the PWM signal, and this constant value has nothing to do with the magnitude of the load voltage itself. Therefore, the constant voltage accuracy is greatly improved. Description of the Drawings

[0023] The drawings described herein are only for illustrating the selected embodiments and not all possible embodiments, and are not used to limit the scope of the present disclosure.

[0024] Figure 1 is a circuit structure diagram of a constant voltage output circuit for an electronic cigarette provided by an embodiment of the present disclosure;

[0025] Figure 2 is a circuit structure diagram of another constant voltage output circuit for an electronic cigarette provided by an embodiment of the present disclosure;

[0026] Figure 3 is a circuit structure diagram of a PWM signal generation unit of a constant voltage output circuit for an electronic cigarette provided by an embodiment of the present disclosure;

[0027] Figure 4 is a schematic diagram of the principle of counting a clock signal provided by an embodiment of the present disclosure;

[0028] Figure 5 is a PWM signal waveform diagram of a constant voltage output circuit for an electronic cigarette provided by an embodiment of the present disclosure;

[0029] Figure 6 is a module structure diagram of an integrated circuit chip provided by an embodiment of the present disclosure;

[0030] Figure 7 is a pin schematic diagram of an integrated circuit chip provided by an embodiment of the present disclosure;

[0031] Figure 8It is a module structure diagram of an electronic cigarette provided by an embodiment of the present disclosure; Detailed implementation manners

[0032] In the following description, certain specific details are set forth in order to provide a thorough understanding of various embodiments of the present disclosure. However, those skilled in the art will understand that the present disclosure may be practiced without these specific details.

[0033] In the description of the present disclosure, the terms "above", "below", "within", "at least", etc. are understood to include the recited number. If the first and second are described only for the purpose of distinguishing technical features, they cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features or implicitly indicating the sequence of the indicated technical features. In addition, the connection referred to in the present disclosure should be interpreted in a broad sense, that is, electrical connection, which is not limited to the direct connection between devices, and also includes the direct or indirect connection between devices, between a device and a unit, and between units.

[0034] An embodiment of the present disclosure provides a constant voltage output circuit 10 for an electronic cigarette. For the sake of easy understanding, the following will be combined with Figures 1 - 5 to describe this circuit in detail.

[0035] As Figure 1 shown, the constant voltage output circuit 10 includes a switching unit 11 and a PWM (Pulse Width Modulation) signal generation unit 12. Among them, the switching unit 11 is connected in series with the heating element L. The input end of the PWM signal generation unit 12 is connected to the heating element L to obtain the load voltage V AT across the heating element L. The input end of the PWM signal generation unit is also used to receive a preset first reference voltage V REF1 . The PWM signal generation unit 12 generates a PWM signal according to the load voltage V AT and the first reference voltage V REF1 . Among them, the duty cycle D of the PWM signal is inversely proportional to the load voltage V AT . The output end of the PWM signal generation unit 12 is connected to the control end of the switching unit 11 to control the conduction and cutoff of the switching unit 11 through the PWM signal. Since the load voltage V AT is the voltage across the heating element L, the periodic equivalent voltage V OUT on the heating element L is the duty cycle D multiplied by the load voltage V AT , and the duty cycle D is inversely proportional to the load voltage V AT . Thus, the periodic equivalent voltage V OUT on the heating element L is constant and independent of the load voltage V ATis independent of its own size. Even if the battery voltage changes during charging and discharging, the periodic equivalent voltage V across the heating element L OUT can remain constant, so that the puffing amount of the electronic cigarette can be kept stable, improving the user experience.

[0036] Specifically, as an example of the constant-voltage output circuit 10 of this embodiment, as Figure 1 shown, the constant-voltage output circuit 10 includes a ground terminal GND, an atomization terminal AT, and a power terminal BAT. Two ends of the heating element L are respectively connected to the ground terminal GND and the atomization terminal AT, and two ends of the switching unit 11 are respectively connected to the power terminal BAT and the atomization terminal AT. The power terminal is used for electrically connecting to the positive electrode of the battery, and the ground terminal is used for electrically connecting to the negative electrode of the battery. The input end of the PWM signal generating unit 12 is connected to the atomization terminal AT and the ground terminal. Since the atomization terminal and the ground terminal are directly connected to two ends of the heating element, the voltage across the heating element L can be accurately obtained, and this voltage is the load voltage V AT , and the load voltage is the potential difference between the potential of the atomization terminal AT and the potential of the ground terminal.

[0037] Specifically, as another example of the constant-voltage output circuit 10 of this embodiment, as Figure 2 shown, the constant-voltage output circuit 10 includes a ground terminal GND, an atomization terminal AT, and a power terminal BAT. One end of the heating element L is connected to the power terminal BAT, and the other end is connected to the atomization terminal AT. The atomization terminal AT is also connected to the first end of the switching unit 11, and the second end of the switching unit 11 is connected to the ground terminal GND. The power terminal is used for electrically connecting to the positive electrode of the battery, and the ground terminal is used for electrically connecting to the negative electrode of the battery. The input end of the PWM signal generating unit 12 is connected to the power terminal BAT and the atomization terminal AT. Since the atomization terminal and the power terminal BAT are directly connected to two ends of the heating element, the PWM signal generating unit can accurately obtain the voltage across the heating element L, and this voltage is the load voltage V AT , and the load voltage is the potential difference between the potential of the power terminal BAT and the potential of the atomization terminal AT.

[0038] The main idea of the constant-voltage output circuit 10 provided in this embodiment is that by accurately sampling the load voltage V AT , and generating a PWM signal according to the load voltage V AT and a preset first reference voltage V REF1 , since the voltage collected at the input end is exactly the load voltage V AT , therefore, according to the constant-voltage output circuit 10 of this embodiment, the duty cycle D of the PWM signal can be made inversely proportional to the load voltage V AT . Therefore, based on this PWM signal, the conduction and cutoff of the switching unit 11 are controlled, so as to control the magnitude of the load voltage V across the heating element L AT , and the load voltage V can be madeAT In each period of the PWM signal, it is equivalent to a constant value, and this constant value has nothing to do with the magnitude of the load voltage V AT itself. The load voltage V within one period of the PWM signal AT is called the period equivalent voltage V OUT , and this period equivalent voltage V OUT is also not related to the power supply voltage.

[0039] Specifically, as shown in Figure 1 and Figure 2 , the above-mentioned switching unit 11 is, for example, the seventh transistor M7.

[0040] More specifically, as an example of the constant voltage output circuit 10, as shown in Figure 1 , the seventh transistor M7 is a PMOS transistor. Correspondingly, the output terminal of the PWM signal is connected to the gate of the seventh transistor M7. When the output PWM signal is at a low level, the seventh transistor M7 is turned on, and the value of the load voltage V AT is close to the power supply voltage. When the output PWM signal is at a high level, the seventh transistor M7 is turned off, and the load voltage V AT is 0. Within one period of the PWM signal, a period equivalent voltage V OUT is obtained. It can be understood that this embodiment is not limited thereto, and the seventh transistor M7 of the switching unit 11 can also be an NMOS transistor.

[0041] As another example of the constant voltage output circuit 10, as shown in Figure 2 , the seventh transistor M7 is an NMOS transistor. Correspondingly, the output terminal of the PWM signal is connected to the gate of the seventh transistor M7. When the output PWM signal is at a high level, the seventh transistor M7 is turned on, and the value of the load voltage V AT is close to the power supply voltage. When the output PWM signal is at a low level, the seventh transistor M7 is turned off, and the load voltage V AT is 0. Within one period of the PWM signal, a period equivalent voltage V OUT is obtained. It can be understood that this embodiment is not limited thereto, and the seventh transistor M7 of the switching unit 11 can also be a PMOS transistor. Among them, the beneficial effect of setting the seventh transistor M7 as an NMOS transistor in this embodiment is that the body bias effect can be significantly reduced, thereby reducing the on-resistance and the circuit cost. Specifically, as an example of the PWM signal generation unit 12 of this embodiment. As shown in Figure 3 , the PWM signal generation unit 12 includes a sampling unit 121, a voltage-current conversion unit, a clock generation unit, and a counting and output unit. The sampling unit 121 is connected to the heating element L to obtain the load voltage V across the heating element L AT, and generate a sampling voltage V according to the load voltage V AT Generate a sampling voltage V s . As an example, the sampling unit includes two voltage dividing resistors connected in series. The two voltage dividing resistors in series are connected in parallel with the heating element L, and the connection point where the two voltage dividing resistors are connected to each other outputs the sampling voltage V s . One input terminal of the voltage-current conversion unit is used to receive a preset first reference voltage V REF1 , and the other input terminal is connected to the sampling unit 11 for receiving the sampling voltage V s . The voltage-current conversion unit converts the first reference voltage V REF1 and the sampling voltage V s into a reference current I REF and a sampling current I s respectively. The clock generation unit is connected to the voltage-current conversion unit. Two input terminals of the clock generation unit are respectively used to receive the reference current I REF and the sampling current I s . The clock generation unit generates a first clock signal CLK1 based on the reference current I REF and generates a second clock signal CLK2 based on the sampling current I s . The counting and output unit is connected to the clock generation unit. Two input terminals of the counting and output unit are respectively used to receive the first clock signal CLK1 and the second clock signal CLK2. The counting and output unit counts the first clock signal CLK1 to generate a reset signal RST. The counting and output unit counts the second clock signal CLK2 to obtain a conduction time control signal T_CTRL. The counting and output unit generates the above-mentioned duty cycle D and the load voltage V AT in inverse proportion to the PWM signal. The output terminal of the counting and output unit is connected to the gate of the seventh transistor M7 to control the conduction or cut-off of the seventh transistor M7 through the PWM signal.

[0042] Specifically, the value of the sampling voltage V obtained by the sampling unit is as follows: s

[0043] V s = K * V AT ;

[0044] Where K is a sampling coefficient calculated according to the voltage dividing resistors.

[0045] Specifically, as an example of the voltage-current conversion unit of this embodiment. As Figure 3 ​As shown, the voltage-current conversion unit includes a first voltage-current conversion unit 122 and a second voltage-current conversion unit 123. Among them, the first voltage-current conversion unit 122 includes a first operational amplifier A1, a first transistor M1, a resistor R1, a second transistor M2, and a third transistor M3. One input terminal of the operational amplifier A1 is used to receive a preset first reference voltage V REF1 , the gate of the first transistor M1 is coupled to the output terminal of the operational amplifier A1, one end of the resistor R1 is respectively coupled to the other input terminal of the operational amplifier A1 and the first end of the first transistor M1, the other end of the resistor R1 is grounded, the gates of the second transistor M2 and the third transistor M3 are coupled, the first ends of the second transistor M2 and the third transistor M3 are both connected to the power supply terminal BAT, the second end of the second transistor M2 is coupled to the second end of the first transistor M1, and the second end of the third transistor M3 is connected to the clock generation unit and is used to output a reference current I REF . Among them, in Figure 3 , the first transistor M1 is an NMOS transistor, and the second transistor M2 and the third transistor M3 are PMOS transistors. However, this is not limited thereto. In other embodiments of the present invention, the first transistor M1 can also be a PMOS transistor, and the second transistor M2 and the third transistor M3 can also be NMOS transistors. The second voltage-current conversion unit 123 includes a second operational amplifier A2, a fourth transistor M4, a resistor R2, a fifth transistor M5, and a sixth transistor M6. One input terminal of the operational amplifier A2 is connected to the sampling unit 121 and is used to receive a preset sampling voltage V s , the gate of the fourth transistor M4 is coupled to the output terminal of the operational amplifier A2, one end of the resistor R2 is respectively coupled to the other input terminal of the operational amplifier A2 and the first end of the fourth transistor M4, the other end of the resistor R2 is grounded, the gates of the fifth transistor M5 and the sixth transistor M6 are coupled, the first ends of the fifth transistor M5 and the sixth transistor M6 are both connected to the power supply terminal BAT, the second end of the fifth transistor M5 is coupled to the second end of the fourth transistor M4, and the second end of the sixth transistor M6 is connected to the clock generation unit and is used to output a sampling current l s . Among them, in Figure 3 , the fourth transistor M4 is an NMOS transistor, and the fifth transistor M5 and the sixth transistor M6 are PMOS transistors. However, this is not limited thereto. In other embodiments of the present invention, the fourth transistor M4 can also be a PMOS transistor, and the fifth transistor M5 and the sixth transistor M6 can also be NMOS transistors.

[0046] Therefore, according to Figure 3 , for the reference current I REF and the sampling current I S , there is:

[0047]

[0048]

[0049] Among them, V REF1 is a preset first reference voltage V REF1 , R1 is the resistance value of resistor R1, R2 is the resistance value of resistor R2, m1 is the width-to-length ratio of the second transistor and the third transistor, and m2 is the width-to-length ratio of the fifth transistor and the sixth transistor.

[0050] Specifically, as an example of the clock generation unit in this embodiment, as Figure 3 shown, the clock generation unit includes a first clock generation unit 124 and a second clock generation unit 125. Among them, the first clock generation unit 124 includes a capacitor C1, a comparator Comp1, and a first controlled switch K1. The first end of the capacitor C1 is connected to the second end of the third transistor M3 and is used to receive the above-mentioned reference current I REF , the second end of the capacitor C1 is grounded, one input end of the comparator Comp1 is used to receive the second reference voltage V REF2 , the other input end of the comparator Comp1 is coupled to the first end of the capacitor C1, and the controlled switch K1 is connected across the two ends of the capacitor C1 and controls the charging and discharging of the capacitor C1 based on the output signal of the comparator Comp1. Specifically, when the first controlled switch K1 is disconnected, the capacitor C1 is charged, and when the first controlled switch K1 is closed, the capacitor C1 is discharged, so as to generate a first pulse wave signal V i1 at the first end of the capacitor C1. The comparator Comp1 generates a first clock signal CLK1 based on the comparison between the first pulse wave signal V i1 and the second reference voltage V REF2 . The second clock generation unit 125 includes a capacitor C2, a comparator Comp2, and a second controlled switch K2. The first end of the capacitor C2 is connected to the second end of the sixth transistor M6 and is used to receive the above-mentioned sampling current I s , the second end of the capacitor C2 is grounded, one input end of the comparator Comp2 is used to receive the third reference voltage V REF3 , the other input end of the comparator Comp2 is coupled to the first end of the capacitor C2, and the controlled switch K2 is connected across the two ends of the capacitor C2 and controls the charging and discharging of the capacitor C2 based on the output signal of the comparator Comp2. Specifically, when the second controlled switch K2 is disconnected, the capacitor C2 is charged, and when the second controlled switch K2 is closed, the capacitor C2 is discharged), so as to generate a second pulse wave signal V i2 at the first end of the capacitor C2. The comparator Comp2 generates a second clock signal CLK2 based on the comparison between the second pulse wave signal V i2 and the third reference voltage V REF3 .

[0051] In an ideal case of this embodiment, the first pulse wave signal V i1 and the second pulse wave signal V i2 are sawtooth wave signals, triangular wave signals, etc.

[0052] Specifically, as an example of the counting and output unit of this embodiment, as Figure 3 shown, the counting and output unit includes a first counting and output unit COUNTER1 and a second counting and output unit COUNTER2. The second counting and output unit COUNTER2 is connected to the comparator Comp2, and is used to receive the second clock signal CLK2 and count the second clock signal CLK2 to generate a conduction time control signal T_CTRL. Specifically, the conduction time control signal T_CTRL includes a start signal T_START and a cut-off signal T_END. Among them, when the second counting and output unit COUNTER2 counts from the start time of counting until the count reaches a preset second quantity N2, it continuously generates the start signal T_START and sends it to the gate of the seventh transistor M7 to make the seventh transistor M7 continuously conduct. When the second counting and output unit COUNTER2 counts from the time when the count reaches the second quantity N2 until it receives the reset signal RST, it continuously generates the cut-off signal T_END and sends it to the gate of the seventh transistor M7 to make the seventh transistor M7 continuously turn off. The first counting and output unit COUNTER1 is connected to the comparator Comp1, and is used to receive the first clock signal CLK1 and count the first clock signal CLK1 to generate a reset signal RST. Among them, the start time of counting of the first counting and output unit COUNTER1 is the same as the start time of counting of the second counting and output unit COUNTER2. When the count of the first counting and output unit COUNTER1 reaches a preset first quantity N1, it outputs the reset signal RST and sends it to the second counting and output unit COUNTER2 to clear the counts of the second counting and output unit COUNTER2 and the first counting and output unit COUNTER1 and start counting again. The following elaborates this process in detail with examples:

[0053] It should be understood that the above counting of the first clock signal CLK1 or the second clock signal CLK2 both refers to counting the rising edge or falling edge of the first clock signal CLK1 or the second clock signal CLK2. For example, both the first counting and output unit COUNTER1 and the second counting and output unit COUNTER2 include an up-counter composed of a T flip-flop. Correspondingly, as Figure 4 shown, the counting of the first clock signal CLK1 is to count the falling edge of the first clock signal CLK1, and the time interval between two adjacent falling edges of the first clock signal CLK1 is called the first unit counting time T CLK1, this counting time is one period of the first clock signal CLK1. Similarly, the time interval between two adjacent falling edges of the second clock signal CLK2 can be referred to as the second unit counting time T CLK2 , this counting time is one period of the second clock signal CLK2. Additionally, in other embodiments of the present invention, the first counting and output unit COUNTER1 and the second counting and output unit COUNTER2 may further include an adder counter composed of other edge flip-flops.

[0054] Such as Figure 1 and Figure 5 As shown, at time t0, the second counting and output unit COUNTER2 and the first counting and output unit COUNTER1 start counting the corresponding clock signals simultaneously. During the period from time t0 to time t1, the output terminal of the second counting and output unit COUNTER2 continuously generates a low-level signal to the gate of the seventh transistor M7, turning on the seventh transistor M7. Here, time t1 corresponds to the moment when the second counting and output unit COUNTER2 counts the second clock signal CLK2 to the second quantity N2. During the period from time t1 (excluding time t1) to time t2, the output terminal of the second counting and output unit COUNTER2 continuously generates a high-level signal to the gate of the seventh transistor M7, turning off the seventh transistor M7. And starting from time t2 (t0), the second counting and output unit COUNTER2 restarts counting the second clock signal CLK2, and then repeats the process from time t0 to time t2. Here, time t2 corresponds to the moment when the reset signal RST output by the first counting and output unit COUNTER1 is received. When the first counting and output unit COUNTER1 counts the first clock signal CLK1 to the first quantity N1, it issues the reset signal RST. Additionally, for the first counting and output unit COUNTER1, when sending the reset signal RST, it restarts counting the first clock signal CLK1, and then repeats the process from time t0 to time t2. The first counting and output unit COUNTER1 and the second counting and output unit COUNTER2 are both controlled by the reset signal RST to perform resynchronized counting.

[0055] It is easy to understand that the low-level signal output by the above-mentioned second counting and output unit COUNTER2 is the start signal T_START, and the high-level signal output is the cut-off signal T_END. According to the generation rule of the above-mentioned start signal T_START and cut-off signal T_END, it can be known that the second counting and output unit COUNTER2 actually outputs a PWM signal. Among them, the time corresponding to the period from time t0 to time t2 is one period T of the PWM, and the time corresponding to the period from time t0 to time t1 is called the periodic conduction time Ton of the seventh transistor M7. Then the duty cycle of the PWM

[0056] Therefore, according to Figure 3 and Figure 4 , for the first unit counting time T CLK1 and the second unit counting time T CLK2 , according to C*V = I*T0, we have:

[0057] C1*V REF2 = I REF *T CLK1 ; (3)

[0058] C2*V REF3 = IS*T CLK2 ; (4)

[0059] where C1 is the capacitance value of capacitor C1, C2 is the capacitance value of capacitor C2, V REF2 is the preset second reference voltage V REF2 , V REF3 is the preset third reference voltage V REF3 ,

[0060] Therefore, according to equations (1) and (3), we can obtain:

[0061]

[0062] Therefore, according to equations (2) and (4), we can obtain:

[0063]

[0064] Therefore, according to Figures 4 - 5 , for the period T and the period conduction time Ton, we have:

[0065] T = T CLK1 *N1;

[0066] Ton = T CLK2 *N2;

[0067] where N1 is the preset first quantity N1, and N2 is the preset second quantity N2.

[0068] Substituting (5) and (6) respectively, we get:

[0069]

[0070]

[0071] For the duty cycle D of the PWM signal, we have:

[0072]

[0073] Substituting (7) and (8) into the above equation, we obtain:

[0074]

[0075] Therefore, according to Figure 1 or Figure 2 , for the period equivalent voltage V OUT ,have:

[0076] V OUT =D*V AT ;

[0077] Substituting (9) into the equation, we get:

[0078]

[0079] Specifically, as an example of the constant voltage output circuit 10 of this embodiment, the resistance value of the resistor R1, the capacitance value of the capacitor C1, and the second reference voltage V REF2 , the product of the width and length m1 of the second transistor M2 and the third transistor M3 and the first number N1, and the resistance value of the resistor R2, the capacitance value of the capacitor C2, and the third reference voltage V REF3 , the product of the width-to-length ratio m2 of the fifth transistor M5 and the sixth transistor M6 and the second number N2 is equal, that is:

[0080] C1*R1*m1*N1*V REF2 =C2*R2*m2*N2*V REF3 ; (11)

[0081] According to (10) and (11), the period equivalent voltage can be further obtained It can be seen that the period equivalent voltage V OUT With load voltage V AT The size itself is irrelevant. Since the duty cycle D≤100%, the sampling voltage K*V AT Should be greater than or equal to the preset first reference voltage V REF1 .

[0082] Therefore, the constant voltage output circuit 10 of this embodiment has the beneficial effect of accurately collecting the load voltage V AT , and according to the load voltage V AT Generate duty cycle D and load voltage V AT Based on the PWM signal, the on and off of the switch unit 11 is controlled, so that the load voltage V AT In each cycle of the PWM signal, it is equivalent to a constant value, which is related to the load voltage V AT The size of the sensor itself has nothing to do with it, therefore, the constant pressure accuracy is greatly improved.

[0083] Specifically, as an example of the constant voltage output circuit 10 of this embodiment, the circuit can be further set as follows: the resistance values of resistor R1 and resistor R2 are equal, the capacitance values of capacitor C1 and capacitor C2 are equal, the second reference voltage V REF2 and the third reference voltage V REF3 are equal, the aspect ratio m1 of the second transistor M2 and the third transistor M3 is equal to the aspect ratio m2 of the fifth transistor M5 and the sixth transistor M6, and the first quantity N1 and the second quantity N2 are equal. Under this setting, since the specifications of the circuit components are the same, the circuit structure is further simplified.

[0084] It is worth mentioning that according to the sampling voltage V s = K * V AT , when the sampling coefficient K = 1, that is, the sampling voltage V received at the input end of the voltage-current conversion unit s is equal to the load voltage V AT . Therefore, according to the periodic equivalent voltage , without setting the sampling unit 121, the load voltage V can be directly collected through the input end of the voltage-current conversion unit AT , and a constant periodic equivalent voltage V OUT can also be obtained, that is, V OUT = V REF1 .

[0085] The embodiment of the present disclosure also provides an integrated circuit chip 20, as Figure 6 shown, the integrated circuit chip 20 includes the constant voltage output circuit 10 described in the above embodiment.

[0086] It should be noted that the constant voltage output circuit 10 in the integrated circuit chip 20 provided in this embodiment and the constant voltage output circuit 10 provided in the above embodiment belong to the same concept, and the specific circuit structure, implementation process, and technical details in the embodiment are all applicable correspondingly in the embodiment of this chip 20, and the repeated parts will not be described again.

[0087] As Figure 7 shown, the chip 20 includes a power supply pin BAT, a ground pin GND, a charging pin CHG, a load voltage output pin AT, an air flow detection pin SW, and a display pin LED. Among them, the load voltage output pin AT is the atomization end AT of the above constant voltage output circuit 10. It can be understood that the pins of the chip 20 are not limited to the above several types.

[0088] The beneficial effect of the integrated circuit chip 20 provided in this embodiment is that by accurately collecting the load voltage V AT , and generating a duty cycle D related to the load voltage V according to the load voltage V AT ​AT a PWM signal inversely proportional thereto. By controlling the on and off of the switching unit 11 based on this PWM signal, the load voltage V can be made AT equivalent to a constant value within each period of the PWM signal, and this constant value is independent of the magnitude of the load voltage V AT itself. Therefore, the constant voltage accuracy is greatly improved.

[0089] This embodiment of the present disclosure also provides an electronic cigarette 30, as Figure 8 shown. The electronic cigarette 30 includes a heating element L and the constant voltage output circuit 10 described in the above embodiment. Among them, the switching unit 11 of the constant voltage output circuit 10 is connected in series with the heating element L, and the PWM signal generation unit 12 is connected to the heating element L to obtain the load voltage V across the heating element L AT .

[0090] It should be noted that the constant voltage output circuit 10 in the electronic cigarette 30 provided in this embodiment and the constant voltage output circuit 10 provided in the above embodiment belong to the same concept. The specific circuit structure, implementation process, and technical details in the embodiment can all be correspondingly applied in the embodiment of this electronic cigarette 30, and the repeated parts will not be elaborated again.

[0091] The beneficial effect of the electronic cigarette provided in this embodiment is that by accurately collecting the load voltage V AT , and generating a PWM signal in which the duty cycle D is inversely proportional to the load voltage V AT according to the load voltage V AT . By controlling the on and off of the switching unit 11 based on this PWM signal, the load voltage V can be made AT equivalent to a constant value within each period of the PWM signal, and this constant value is independent of the magnitude of the load voltage V AT itself. Therefore, the constant voltage accuracy is greatly improved.

[0092] The various embodiments described above can be combined to provide further embodiments. If necessary, aspects of the embodiments can be modified to incorporate the concepts of various patents, applications, and publications to provide further embodiments.

[0093] In view of the above detailed description, these and other changes can be made to the embodiments. Generally speaking, in the following claims, the terms used should not be construed as limiting the claims to the specific embodiments disclosed in this specification and the claims, but should be construed to include the entire scope of all possible embodiments, together with the equivalents to which these claims are entitled. Accordingly, the claims are not limited by this disclosure.

Claims

1. A constant voltage output circuit for an electronic cigarette, characterized in that, Comprising: A switch unit connected in series with a heating element; A PWM signal generation unit, which is connected to the heating element to obtain the load voltage across the heating element. The PWM signal generation unit also receives a preset first reference voltage. The PWM signal generation unit generates a PWM signal based on the load voltage and the first reference voltage, and the duty cycle of the PWM signal is inversely proportional to the load voltage. The output end of the PWM signal generation unit is connected to the control end of the switch unit to control the conduction and cutoff of the switch unit through the PWM signal; Wherein, the PWM signal generation unit includes a voltage-current conversion unit, a clock generation unit, and a counting and output unit; the voltage-current conversion unit includes a first voltage-current conversion unit and a second voltage-current conversion unit, and the clock generation unit includes a first clock generation unit and a second clock generation unit; The first voltage-current conversion unit is used to receive the first reference voltage and output a reference current according to the first reference voltage. The first clock generation unit is connected to the first voltage-current conversion unit and is used to generate a first clock signal according to the reference current; The second voltage-current conversion unit is used to obtain a sampling voltage corresponding to the load voltage and convert the sampling voltage into a sampling current. The second clock generation unit is connected to the second voltage-current conversion unit and is used to generate a second clock signal based on the sampling current; The counting and output unit is connected to the first clock generation unit and the second clock generation unit, and is used to receive the first clock signal and the second clock signal, count the first clock signal to obtain a reset signal, count the second clock signal to obtain a conduction time control signal, and generate the PWM signal according to the reset signal and the conduction time control signal.

2. The constant voltage output circuit according to claim 1, wherein The constant voltage output circuit includes a ground terminal, an atomization terminal, and a power supply terminal. Two ends of the heating element are respectively connected to the ground terminal and the atomization terminal. Two ends of the switch unit are respectively connected to the power supply terminal and the atomization terminal. Wherein, the input end of the PWM signal generation unit is connected to the atomization terminal and the ground terminal to obtain the load voltage across the heating element.

3. The constant voltage output circuit according to claim 1, wherein The constant voltage output circuit includes a ground terminal, an atomization terminal, and a power supply terminal. One end of the heating element is connected to the power supply terminal, and the other end is connected to the atomization terminal. The first end of the switch unit is connected to the atomization terminal, and the second end of the switch unit is connected to the ground terminal. Wherein, the input end of the PWM signal generation unit is connected to the power supply terminal and the atomization terminal to obtain the load voltage across the heating element.

4. The constant voltage output circuit according to claim 1, wherein The PWM signal generation unit further includes: A sampling unit, which is used to be connected to the heating element to obtain the load voltage across the heating element and generate a sampling voltage according to the load voltage.

5. The constant voltage output circuit according to claim 4, wherein The first voltage-current conversion unit includes: A first operational amplifier, one input terminal of the first operational amplifier is used to receive the first reference voltage; A first transistor, the gate of the first transistor is coupled to the output terminal of the first operational amplifier; A first resistor, one end of the first resistor is respectively coupled to the other input terminal of the first operational amplifier and the first end of the first transistor, and the other end of the first resistor is grounded; A second transistor and a third transistor, the gates of the second transistor and the third transistor are coupled, the first ends of the second transistor and the third transistor are both connected to the power supply terminal, the second end of the second transistor is coupled to the second end of the first transistor and the gate of the second transistor, and the second end of the third transistor is connected to the clock generation unit and is used to output the reference current; The second voltage-current conversion unit includes: A second operational amplifier, one input terminal of the second operational amplifier is connected to the sampling unit to receive the sampling voltage; A fourth transistor, the gate of the fourth transistor is coupled to the output terminal of the second operational amplifier; A second resistor, one end of the second resistor is respectively coupled to the other input terminal of the second operational amplifier and the first end of the fourth transistor, and the other end of the second resistor is grounded; A fifth transistor and a sixth transistor, the gates of the fifth transistor and the sixth transistor are coupled, the first ends of the fifth transistor and the sixth transistor are both connected to the power supply terminal, the second end of the fifth transistor is coupled to the second end of the fourth transistor and the gate of the fifth transistor, and the second end of the sixth transistor is connected to the clock generation unit and is used to output the sampling current.

6. The constant voltage output circuit according to claim 1, wherein The first clock generation unit includes: a first capacitor, the first end of the first capacitor is connected to the voltage-current conversion unit to receive the reference current, and the second end of the first capacitor is grounded; a first comparator, one input terminal of the first comparator is used to receive a preset second reference voltage, and the other input terminal of the first comparator is coupled to the first end of the first capacitor; a first controlled switch, the first controlled switch is connected across the two ends of the first capacitor and controls the charging and discharging of the first capacitor based on the output signal of the first comparator to generate a first pulse wave signal at the first end of the first capacitor, and the first comparator generates the first clock signal based on the first pulse wave signal and the second reference voltage; The second clock generation unit includes: a second capacitor, a first end of the second capacitor is connected to the voltage-current conversion unit to receive the sampling current, and a second end of the second capacitor is grounded; a second comparator, one input end of the second comparator is used to receive a preset third reference voltage, and the other input end of the second comparator is coupled to the first end of the second capacitor; a second controlled switch, the second controlled switch is connected across both ends of the second capacitor and controls the charging and discharging of the second capacitor based on the output signal of the second comparator to generate a second pulse wave signal at the first end of the second capacitor, and the second comparator generates the second clock signal based on the second pulse wave signal and the third reference voltage.

7. The constant voltage output circuit according to any one of claims 1-6, wherein The counting and output unit includes a first counting and output unit and a second counting and output unit; The second counting and output unit is connected to the clock generation unit to count the second clock signal to generate a conduction time control signal, the conduction time control signal includes an on signal and an off signal, wherein, from the start time of counting until the count reaches a preset second quantity, the second counting and output unit continuously generates the on signal and sends it to the switch unit to make the switch unit conduct, and from the time when the count reaches the second quantity until the reset signal is received, the second counting and output unit continuously generates the off signal and sends it to the switch unit to make the switch unit turn off; The first counting and output unit is connected to the clock generation unit to count the first clock signal to generate the reset signal, wherein the start time of counting of the first counting and output unit is the same as the start time of counting of the second counting and output unit. When the count of the first counting and output unit reaches a preset first quantity, the reset signal is output and sent to the second counting and output unit to make the second counting and output unit and the first counting and output unit clear the count and start counting again.

8. The constant voltage output circuit according to claim 6, wherein, The duty cycle is expressed by the following formula: Among them, is the duty cycle, T CLK1 is the unit counting time for the first clock signal, T CLK2 is the unit counting time for the second clock signal, N1 is a preset first quantity, N2 is a preset second quantity, C2 is the capacitance value of the second capacitor, C1 is the capacitance value of the first capacitor, V REF1 is the first reference voltage, V REF2 is the second reference voltage, V REF3 is the third reference voltage, K is the sampling coefficient, K*V AT is the sampling voltage, represents the sampling current, represents the reference current, R1 and R2 are the resistance values of the first resistor and the second resistor of the voltage-current conversion unit respectively, m2 is the aspect ratio of the fifth transistor and the sixth transistor of the voltage-current conversion unit, and m1 is the aspect ratio of the second transistor and the third transistor of the voltage-current conversion unit.

9. The constant voltage output circuit according to claim 8, wherein, The product of the resistance value of the first resistor, the capacitance value of the first capacitor, the second reference voltage, the aspect ratios of the second transistor and the third transistor, and the first quantity is equal to the product of the resistance value of the second resistor, the capacitance value of the second capacitor, the third reference voltage, the aspect ratios of the fifth transistor and the sixth transistor, and the second quantity; the duty cycle is expressed by the following formula: Wherein, the first reference voltage is less than or equal to the sampling voltage.

10. The constant voltage output circuit according to claim 9, characterized in that, The resistance values of the first resistor and the second resistor are equal; the aspect ratios of the second transistor and the third transistor and the aspect ratios of the fifth transistor and the sixth transistor are equal, the capacitance values of the first capacitor and the second capacitor are equal; the second reference voltage and the third reference voltage are equal, and the first quantity and the second quantity are equal.

11. The constant voltage output circuit according to claim 9 or 10, characterized in that, The expression of the period equivalent voltage is: Among them, V OUT is the periodic equivalent voltage, and the periodic equivalent voltage refers to the equivalent voltage of the load voltage within each period of the PWM signal.

12. An integrated circuit chip, characterized in that, Comprising the constant voltage output circuit according to any one of claims 1-11.

13. An electronic cigarette, characterized in that, Comprising a heating element, the electronic cigarette further comprises a constant voltage output circuit as described in any one of claims 1-11 or an integrated circuit chip as described in claim 12. A switching unit of the constant voltage output circuit is connected in series with the heating element, and the PWM signal generating unit is connected to the heating element to obtain the load voltage across the heating element.

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