Switching power supply

Abstract

A switching power supply is mounted on a printed board (300). A first wiring layer (310) of the printed board (300) includes: a direct current line (LN1) for transmitting a direct current voltage; and a first ground region (GND1) and a second ground region (GND2) formed separately from the direct current line (LN1) in a manner of sandwiching the direct current line (LN1). On a second wiring layer (320), a lower ground region (GND0) is formed. On an insulating layer (330), a plurality of first through holes (332) and a plurality of second through holes (334) are provided, the plurality of first through holes (332) being provided along one side (E1) of the first ground region (GND1) and electrically connecting the first ground region (GND1) and the lower ground region (GND0), the plurality of second through holes (334) being provided along one side (E2) of the second ground region (GND2) and electrically connecting the second ground region (GND2) and the lower ground region (GND0).

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a switching power supply. BACKGROUND

[0002] In various electronic devices and vehicles, industrial machines, a DC / DC converter is used which converts a direct current voltage of a certain voltage value to a direct current voltage of another voltage value. Figure 1 is a circuit diagram of a synchronous rectification type step-down (Buck) DC / DC converter 900. The DC / DC converter 900 accepts a direct current input voltage V IN at an input terminal 902 and generates a stepped-down output voltage V OUT at an output terminal 904. In an output stage of the DC / DC converter 900, a switching transistor M1, a synchronous rectification transistor M2, an inductor (coil) L1, and an output capacitor C1 are provided.

[0003] A pulse modulator 910 generates a pulse signal S PWM whose duty ratio, frequency, or a combination thereof is varied so that a state of the DC / DC converter 900 or a state of a load (not illustrated) connected to the output terminal 904 approaches a target state. A driver 912 switches the switching transistor M1 and the synchronous rectification transistor M2 based on the pulse signal S PWM .

[0004] For example, in the DC / DC converter 900 of constant voltage output, the pulse modulator 910 generates the pulse signal S OUT in such a manner that the output voltage V OUT(REF) approaches a target voltage V PWM . Further, in the DC / DC converter 900 of constant current output, the pulse signal S PWM is generated in such a manner that a current I OUT flowing through the load approaches a target value I REF , and in the following description, the converter of constant voltage output is described.

[0005] [Related Art Documents]

[0006] [Patent Documents]

[0007] Patent Document 1: Japanese Patent Application Publication No. 2015-222918

[0008] Patent Document 2: Japanese Patent Application Publication No. 2007-49330 SUMMARY

[0009] [Problems to be Solved by the Invention]

[0010] For electronic devices, EMC (Electro-Magnetic Compatibility) is required, that is, non-interference in which no adverse effects are caused to other devices in electromagnetic aspects, and resistance in which no adverse effects are received from other devices in electromagnetic aspects. The former is evaluated as EMI (Electro Magnetic Interference), and the latter is evaluated as EMS (Electro Magnetic Susceptibility).

[0011] The switching frequency of the DC / DC converter is several MHz. Therefore, in the past, with respect to the design of the printed board, a high frequency method has not been adopted, and the wiring has basically been designed to be short and thick.

[0012] The switching frequency of the DC / DC converter is several MHz, and the switching voltage is a rectangular wave, and thus harmonic noise of 100 MHz or more is generated. Therefore, in the conventional method of designing the board, it is becoming difficult to satisfy the standards required for the vehicle-mounted components (for example, CISPR25 established by CISPR (International Special Committee on Radio Interference)).

[0013] One aspect of the present disclosure is achieved in view of the above-described problems, and one of illustrative objects of one aspect of the present disclosure is to provide a switching power supply that reduces noise.

[0014] [Technical Solution for Solving Technical Problem]

[0015] One aspect of the present disclosure relates to a switching power supply. The switching power supply includes a printed board having a layered structure including a first wiring layer as a surface layer, an insulating layer, and a second wiring layer; a control circuit mounted to the printed board; and a peripheral circuit component group mounted to the printed board. The first wiring layer includes a direct current line through which a direct current voltage is transmitted, and a first land region and a second land region formed separately from the direct current line in a manner of sandwiching the direct current line. The second wiring layer includes a lower land region formed in an area overlapping the direct current line, the first land region, and the second land region. The insulating layer includes a plurality of first through holes provided along one side of the first land region opposite to the direct current line and electrically connecting the first land region and the lower land region, and a plurality of second through holes provided along one side of the second land region opposite to the direct current line and electrically connecting the second land region and the lower land region.

[0016] Another aspect of this disclosure is a switching power supply. The switching power supply includes a printed circuit board, a first control circuit, a first peripheral circuit component group, a second control circuit, and a second peripheral circuit component group. The printed circuit board has a stacked structure including a first wiring layer, an insulating layer, and a second wiring layer as a surface layer. The first control circuit is mounted on the printed circuit board, and the first peripheral circuit component group is mounted on the printed circuit board, forming a first DC / DC converter together with the first control circuit. The second control circuit is mounted on the printed circuit board, and the second peripheral circuit component group is mounted on the printed circuit board, forming a second DC / DC converter together with the second control circuit. The first DC / DC converter's output... The output voltage is supplied to the input terminals of the second DC / DC converter. The first wiring layer includes a first DC line, a first ground region, a second ground region, a second DC line, a third ground region, and a fourth ground region. The first DC line supplies the input voltage of the first DC / DC converter. The first and second ground regions are formed separately from the first DC line by being sandwiched within it. The second DC line connects the output terminals of the first DC / DC converter to the input terminals of the second DC / DC converter. The third and fourth ground regions are formed separately from the second DC line by being sandwiched within it. The second wiring layer includes a lower ground region formed in an area overlapping the first DC line, the first ground region, the second ground region, the second DC line, the third ground region, and the fourth ground region. The insulating layer includes: a plurality of first through holes disposed along one side of a first grounding region opposite to a first DC line, electrically connecting the first grounding region to a lower grounding region; a plurality of second through holes disposed along one side of a second grounding region opposite to a first DC line, electrically connecting the second grounding region to the lower grounding region; a plurality of third through holes disposed along one side of a third grounding region opposite to a second DC line, electrically connecting the third grounding region to the lower grounding region; and a plurality of fourth through holes disposed along one side of a fourth grounding region opposite to a second DC line, electrically connecting the fourth grounding region to the lower grounding region.

[0017] Furthermore, any combination of the above-mentioned constituent elements, or the result of interchanging the constituent elements or expressions of the present invention among methods, apparatuses, systems, etc., is also an effective solution of the present invention.

[0018] Invention Effects

[0019] According to one aspect of this disclosure, noise can be reduced. Attached Figure Description

[0020] Figure 1 This is a circuit diagram of a synchronous rectification buck DC / DC converter.

[0021] Figure 2 is an equivalent circuit diagram of a switched-mode power supply of an embodiment.

[0022] Figure 3 is a simplified appearance perspective view of a printed board.

[0023] Figure 4 (a) of FIG. 1, Figure 4 (b) of FIG. 1 is a plan view and a sectional view of a printed board.

[0024] Figure 5 is a diagram showing a printed board of a comparative technique.

[0025] Figure 6 is a diagram explaining a principle of noise suppression in a printed board.

[0026] Figure 7 is an equivalent circuit diagram of a switched-mode power supply of an embodiment.

[0027] Figure 8 is a diagram showing a printed board of a switched-mode power supply of Figure 7

[0028] Figure 9 is a photograph of a switched-mode power supply made according to the structure explained in an embodiment.

[0029] Figure 10 (a) to Figure 10 (c) of FIG. 6 are diagrams showing measurement results of noise of a switched-mode power supply of Figure 9 DETAILED DESCRIPTION

[0030] (SUMMARY OF EMBODIMENTS)

[0031] A summary of several exemplary embodiments of the present disclosure is explained. The summary, as a preface to the detailed explanation described later, for the purpose of basic understanding of the embodiments, simplifies and explains several concepts in one or more embodiments, and does not limit the breadth of the invention or disclosure. In addition, the summary is not a general summary of all embodiments that can be considered, and does not limit the indispensable constituent elements of the embodiments. For convenience, "one embodiment" is sometimes used to refer to one embodiment or multiple embodiments disclosed in the specification.

[0032] ​​One embodiment of the switching power supply includes: a printed circuit board having a stacked structure including a first wiring layer, an insulating layer, and a second wiring layer as a surface layer; control circuitry mounted on the printed circuit board; and a peripheral circuit component assembly mounted on the printed circuit board. The first wiring layer includes: a DC line for transmitting DC voltage; and a first ground region and a second ground region formed separately from the DC line in a manner that sandwiches the DC line. The second wiring layer includes a lower ground region formed in a region overlapping the DC line, the first ground region, and the second ground region. The insulating layer includes: a plurality of first vias disposed along the side of the first ground region opposite to the DC line, electrically connecting the first ground region to the lower ground region; and a plurality of second vias disposed along the side of the second ground region opposite to the DC line, electrically connecting the second ground region to the lower ground region.

[0033] In this configuration, near the DC line, the first grounding region is connected to the lower grounding region with low impedance, and the second grounding region is connected to the lower grounding region with low impedance. Therefore, in the high-frequency band, the first grounding region, the second grounding region, and the lower grounding region can be made equipotential, and radiated noise and conducted noise can be suppressed.

[0034] Alternatively, in one implementation, the speed of light in a vacuum is denoted as c, and the maximum frequency specified in noise-related standards is denoted as f. MAX The relative permittivity of the insulating layer is denoted as ε. r At that time, the maximum value d of the spacing between the first through hole and the second through hole. max satisfy

[0035] d max <c / (f max ·√ε r ) / 10.

[0036] Therefore, it is possible to suppress radiated noise and transmitted noise in high-frequency regions where noise countermeasures are difficult to implement.

[0037] Alternatively, in one implementation, the minimum value of the spacing d min satisfy

[0038] c / (f max ·√ε r ) / 100<d min .

[0039] Alternatively, in one implementation, the DC line can be the input line of the switching power supply.

[0040] Also, in one embodiment, the switching power supply further includes an input filter provided on a path of the input line. The pitch of the first through holes and the pitch of the second through holes are larger at a position upstream of the input filter than at a position downstream of the input filter. The upstream position has less influence on noise than the downstream position, so the number of through holes is reduced, thereby suppressing high-frequency noise and suppressing the cost of the substrate.

[0041] Also, in one embodiment, the switching power supply is a step-down DC / DC converter.

[0042] A switching power supply of one embodiment includes a printed board having a layered structure including a first wiring layer as a surface layer, an insulating layer, and a second wiring layer, a first control circuit mounted to the printed board, a first peripheral circuit component group mounted to the printed board and forming a first DC / DC converter together with the first control circuit, a second control circuit mounted to the printed board, and a second peripheral circuit component group mounted to the printed board and forming a second DC / DC converter together with the second control circuit. An output voltage of the first DC / DC converter is supplied to an input terminal of the second DC / DC converter. The first wiring layer includes a first direct-current line through which an input voltage of the first DC / DC converter is transmitted, a first land region and a second land region formed separately from the first direct-current line with the first direct-current line interposed therebetween, a second direct-current line connecting an output terminal of the first DC / DC converter to the input terminal of the second DC / DC converter, and a third land region and a fourth land region formed separately from the second direct-current line with the second direct-current line interposed therebetween. The second wiring layer includes a lower land region formed in a region overlapping the first direct-current line, the first land region, the second land region, the second direct-current line, the third land region, and the fourth land region. The insulating layer includes a plurality of first through holes provided along one side of the first land region opposite to the first direct-current line and electrically connecting the first land region and the lower land region, a plurality of second through holes provided along one side of the second land region opposite to the first direct-current line and electrically connecting the second land region and the lower land region, a plurality of third through holes provided along one side of the third land region opposite to the second direct-current line and electrically connecting the third land region and the lower land region, and a plurality of fourth through holes provided along one side of the fourth land region opposite to the second direct-current line and electrically connecting the fourth land region and the lower land region.

[0043] (Embodiment)

[0044] Hereinafter, the present disclosure will be described based on preferred embodiments with reference to the accompanying drawings. For the same or equivalent constituent elements, members, and processes shown in each drawing, the same reference numerals are annotated, and redundant description is appropriately omitted. Furthermore, the embodiments do not limit the disclosure or the invention, and all features or combinations thereof described in the embodiments are not necessarily essential to the disclosure or the invention.

[0045] In the present specification, the so-called "state where member A is connected to member B" includes not only the case where member A and member B are directly connected physically, but also the case where member A and member B are indirectly connected via another member which does not substantially affect the electrically connected state thereof or does not impair the function or effect achieved by the combination thereof.

[0046] Similarly, the so-called "state where member C is provided between member A and member B" includes not only the case where member A and member C, or member B and member C are directly connected, but also the case where member A and member C, or member B and member C are indirectly connected via another member which does not substantially affect the electrically connected state thereof or does not impair the function or effect achieved by the combination thereof.

[0047] Furthermore, in the present specification, the reference numerals annotated to the electric signals such as voltage signals, current signals, and the like, or the circuit elements such as resistors, capacitors, and the like, also represent the respective voltage values, current values, or resistance values, capacity values, as necessary.

[0048] Figure 2 is an equivalent circuit diagram of a switched-mode power supply 100 of the embodiments. The switched-mode power supply 100 is a DC / DC converter or an inverter, or the like, and includes a control circuit 200, a peripheral circuit component group 110, and a printed board 300. Hereinafter, as the switched-mode power supply, a step-down converter will be described as an example.

[0049] The control circuit 200 and the peripheral circuit component group 110 are mounted to the printed board 300. The peripheral circuit component group 110 includes an inductor LI, an input capacitor CI, an output capacitor C2, an input filter 120, and resistors R11, R12, and the like for feedback, and constitutes a step-down converter CONV1 together with the control circuit 200.

[0050] On the printed board 300, connectors 130, 132 are provided. The input voltage V IN of the step-down converter is supplied from the outside via the connector 130. Furthermore, the output voltage V OUT of the step-down converter is supplied to a load connected to the output connector 132.

[0051] The control circuit 200 is an IC (Integrated Circuit) for stabilizing the output of the DC / DC converter, and is commercially available from many chip vendors. In the present disclosure, the circuit configuration and the package form of the control circuit 200 are not particularly limited.

[0052] The input voltage V IN The input pin VIN is supplied with the input voltage V FB The feedback pin FB is fed back with the feedback signal V OUT The output voltage V OUT The output current I FB The output current I FB The output current I

[0053] The switching transistor M1 is provided between the input pin VIN and the switch pin SW, and the synchronous rectification transistor M2 is provided between the switch pin SW and the power ground pin PGND.

[0054] The output voltage V FB The feedback pin FB is fed back with the feedback signal V OUT The output voltage V OUT The output current I FB The output current I FB The output current I

[0055] The control circuit 200 includes, in addition to the switching transistor M1 and the synchronous rectification transistor M2, a driver 202, a pulse generator 204, and a protection circuit (not shown), and the like. The pulse generator 204 generates a pulse signal Sp based on the feedback signal V FB The pulse signal Sp is subjected to feedback control of the duty ratio and the frequency so that the feedback signal V FB approaches the target value.

[0056] The configuration of the pulse generator 204 is not particularly limited. For example, the pulse generator 204 can include an error amplifier that amplifies the error of the feedback signal and a reference voltage, and a pulse modulator that generates a pulse signal having a duty ratio corresponding to the output of the error amplifier. Alternatively, the pulse generator 204 can be configured in a ripple control mode such as hysteresis control, valley detection constant on-time control, peak detection constant off-time control, or the like. Alternatively, the pulse generator 204 can be configured with a digital circuit, or can include a PI compensator.

[0057] The driver 202 drives the switching transistor M1 and the synchronous rectification transistor M2 based on the pulse signal Sp.

[0058] The above is the basic configuration of the switching power supply 100. Next, the structure of the characteristic printed board 300 of the switching power supply 100 will be described. The switching power supply 100 of the present embodiment is characterized in the structure of the wiring and ground pattern formed in the printed board 300.

[0059] Figure 3 is a simplified perspective view of the printed board 300. The printed board 300 has a laminated structure including a first wiring layer 310, an insulating layer 330, and a second wiring layer 320. The kind of the printed board 300 is not limited, but for example, FR4 (Flame Retardant Type 4) is widely used. The number of the wiring layers of the printed board 300 is two or more, and in Figure 3 , a three-layer board is shown. Figure 4 (a) of Figure 4 (b) is a plan view and a sectional view of the printed board 300.

[0060] The first wiring layer 310 is a surface layer of the wiring layer, and most or all of the control circuit 200 and the peripheral circuit component group 110 are mounted on the first wiring layer 310. In Figure 3 , the circuit components are omitted. Further, on the first wiring layer 310, a wiring (pattern) and a ground region are formed, which electrically connect between the pins and electrodes of two components.

[0061] The first wiring layer 310 includes a direct current line LN1 through which a direct current voltage is transmitted, and a first ground region GND1 and a second ground region GND2 which are formed separately from the direct current line LN1 in a manner of sandwiching the direct current line LN1. For example, the direct current line LN1 corresponds to the input line 102 or the output line 104 of Figure 2 .

[0062] The interval of the direct current line LN1 and the first ground region GND1 is several hundred μm to several mm, for example, about 0.5 mm (500 μm). The interval of the direct current line LN1 and the second ground region GND2 is also the same.

[0063] The second wiring layer 320 includes a lower ground region GND0 which is formed in a region overlapping the direct current line LN1, the first ground region GND1, and the second ground region GND2. It can also be that the lower ground region GND0 is formed over the entire surface of the second wiring layer 320.

[0064] In the insulating layer 330, a plurality of first through-holes 332 and a plurality of second through-holes 334 are formed. The thickness of the insulating layer 330 is, for example, several hundred μm, and a substrate of 0.1 mm to 0.3 mm is used. In Figure 4In (b), the thickness of the insulating layer 330 is 0.2 mm. A plurality of first through-holes (also referred to as a first through-hole group) 332 are provided along the edge E1 of the first ground region GND1 opposite the direct current line LN1, and electrically connect the first ground region GND1 and the lower ground region GND0.

[0065] Further, a plurality of second through-holes 334 (also referred to as a second through-hole group) are provided along the edge E2 of the second ground region GND2 opposite the direct current line LN1, and electrically connect the second ground region GND2 and the lower ground region GND0.

[0066] The pitch d1 of the plurality of first through-holes 332 and the pitch d2 of the plurality of second through-holes 334 can be designed as short as possible within a range permitted by the design rule of the printed board 300. The pitches d1, d2 can be uniform or non-uniform.

[0067] For example, the pitches d1, d2 of the first through-holes 332 and the second through-holes 334 can be designed based on the frequency of the noise against which measures should be taken. Generally, because the higher the frequency, the more difficult it is to take measures, the pitches can be designed based on the maximum frequency f max maximally permitted by a standard related to noise. Specifically, when the maximum value of the pitches d1, d2 is denoted as d max max, it can be set to

[0068] d max max<c / (f max ·√ε r ) / 10

[0069] This range. c is the speed of light in a vacuum, ε r is the relative permittivity of the insulating layer 330, and c / (f max ·√ε r ) is the wavelength in the interior of the insulating layer 330.

[0070] However, when the number of through-holes increases, it sometimes becomes a major cause of cost increase. Further, even if the pitches d1, d2 are excessively shortened, the effect of noise suppression saturates. Therefore, the minimum value d min minof the pitches d1, d2 can also be designed to be within the following range.

[0071] c / (f max ·√ε r ) / 100<d min

[0072] For example, in the case where the maximum frequency f max max=1 GHz and ε r =4, the pitches d1, d2 of the through-holes can be designed to be within the following range.

[0073] 1.5mm < d < 15mm

[0074] The CISPR25 standard, considering wireless devices that comply with the Bluetooth (registered trademark) standard and the IEEE 802.11 standard, specifies the limits (permissible values) for conducted noise and radiated noise in the 2.4–2.5 GHz frequency band.

[0075] When f max =2.5GHz, ε r When = 4, the spacings d1 and d2 can be designed as

[0076] 0.6mm < d < 6mm

[0077] This range.

[0078] To further enhance the noise suppression effect, the maximum value d of the spacing d1 and d2 can be increased. max Designed to meet

[0079] d max <c / (f max ·√ε r ) / 32.

[0080] In this case, when f max =2.5GHz, ε r When = 4, the spacings d1 and d2 can be designed as

[0081] 0.6mm < d < 1.87mm

[0082] This range.

[0083] The above describes the structure of the printed circuit board 300. Next, its effects will be explained. The advantages of the printed circuit board 300 will become clear through comparison with comparative techniques. Therefore, the comparative techniques will be explained first. Figure 5 This is a diagram showing a printed circuit board 300R used in a comparative technique. In the diagram, arrows represent electric field lines.

[0084] The printed circuit board 300R, like the printed circuit board 300, includes a first ground region GND1, a second ground region GND2, and a lower ground region GND0. The first ground region GND1 and the second ground region GND2 are electrically connected to the lower ground region GND0 via vias 336, and the spacing of the vias 336 is much larger than in the previous embodiment. Typically, the spacing of the vias 336 is greater than 1 cm. Furthermore, the vias 336 are not arranged along the edge opposite to the DC line LN1.

[0085] exist Figure 5In the printed board 300R, the power lines that can be generated in the printed board 300R are indicated by arrows. The 1st ground region GND1 and the 2nd ground region GND2 are not electrically connected to the lower ground region GND0 in the vicinity of the direct current line LN1, and thus the impedance between the 1st ground region GND1 and the lower ground region GND0 and the impedance between the 2nd ground region GND2 and the lower ground region GND0 are larger than the impedance of the embodiment. That is, in the printed board 300R of the embodiment, the 1st ground region GND1, the 2nd ground region GND2, and the lower ground region GND0 are not guaranteed to be at the same potential in the vicinity of the direct current line LN1. Thus, a potential distribution as in the power line 800 from the direct current line LN1 to the 1st ground region GND1 and the power line 802 from the 2nd ground region GND2 to the direct current line LN1 can be formed. In this case, even if the bypass capacitor 804 for the noise filter is disposed between the direct current line LN1 and the 2nd ground region GND2, noise can be transmitted between the direct current line LN1 and the 1st ground region GND1, and the noise cannot be removed. Figure 5

[0086] On the other hand, the noise suppression of the printed board 300 of the embodiment is described. Figure 6 is a diagram for describing the principle of the noise suppression in the printed board 300. In the diagram, arrows indicate power lines.

[0087] On both sides and the lower surface of the direct current line LN, the ground regions GND1, GND2, and GND3 as reference potentials are formed. The 1st ground region GND1 and the lower ground region GND0 and the 2nd ground region GND2 and the lower ground region GND0 are electrically connected by the vias that are closely disposed.

[0088] Each ground connected by the vias 332 and 334 is at the same potential. At a certain time point, the power line, that is, the high-frequency noise emitted from the direct current line LN1 ends with respect to the 1st ground region GND1, the 2nd ground region GND2, and the lower ground region GND0, respectively. Thus, the high-frequency noise can be enclosed in the vicinity of the direct current line LN1, and the radiation noise and the transmission noise can be suppressed.

[0089] The present disclosure relates to various devices, methods derived from the above description, and is not limited to a specific configuration. Hereinafter, more specific configuration examples and embodiments are described in order to facilitate understanding of the essence or action of the disclosure and to make them explicit, not in order to narrow the scope of the disclosure.

[0090] Figure 7 ​is an equivalent circuit diagram of the switching power supply 100A of the embodiment. The switching power supply 100A includes a 1st DC / DC converter CONV1, a 2nd DC / DC converter CONV2, and a linear regulator LDO1. The DC / DC converter CONV# (# = 1, 2) includes the control circuit 200_# and the peripheral circuit component group 110_#. Further, the linear regulator LDO1 includes the regulator IC 210 and the peripheral circuit component group.

[0091] For example, the control circuit 200_1 (U1) is a controller IC (BD9P205EFV) of a synchronous rectification step-down DC / DC converter of Rohm Co., and the control circuit 200_2 (U3) is a controller IC (BD9S201NUX) of the same company. The control circuits 200_1, 200_2 include pins not illustrated in the drawing, but since they are not directly related to the present disclosure, the explanation is omitted. When necessary, refer to the data sheet of each IC. Further, the regulator IC 210 (U4) is BD00IA5MEF of Rohm Co. Figure 2

[0092] The 1st DC / DC converter CONV1 accepts the battery voltage as an input voltage and steps it down. The 2nd DC / DC converter CONV2 accepts the output voltage of the 1st DC / DC converter CONV1 as an input voltage and further steps it down to stabilize it at 1.25 V. Further, the linear regulator LDO1 accepts the output voltage of the 1st DC / DC converter CONV1 as an input voltage and stabilizes it at 3.3 V.

[0093] In the switching power supply 100A of the embodiment, Figure 7 The 1st DC line 400 from the input connector 130 to the input pin PVIN of the control circuit 200_1, the 2nd DC line 402 from the output of the 1st DC / DC converter CONV1 to the input pin of the 2nd DC / DC converter CONV2, and the 3rd DC line 404 which is the output line of the 2nd DC / DC converter CONV2 correspond to the DC lines on which the noise countermeasures should be implemented. Further, since the output line 406 of the linear regulator LDO also supplies the DC voltage, the noise countermeasures can also be implemented.

[0094] Figure 8 is a diagram showing the printed board 300A of the switching power supply 100A on which the noise countermeasures are implemented. Figure 7 Figure 7 The DC lines 400, 402, 404 in the switching power supply 100A of the embodiment have Figure 3 ​​The wiring structure shown is indicated as LN1, LN2, LN3, respectively, and implements a noise countermeasure. Of these, the power supply at the most upstream (closest to the battery), which is the first DC line LN1 that is the input line of the first DC / DC converter CONV1, also most affects noise, and therefore the pitch of the vias can be made narrower than that of the other lines.

[0095] The first ground region GND1, the second ground region GND2 are formed in a manner sandwiching the first DC line LN1. Further, the third ground region GND3, the fourth ground region GND4 are formed in a manner sandwiching the second DC line LN2. In the second wiring layer, lower ground regions (not shown) are formed overlapping them.

[0096] Further, the fifth ground region GND5, the sixth ground region GND6 are formed in a manner sandwiching the third DC line LN3.

[0097] Further, the seventh ground region GND7, the eighth ground region GND8 are formed in a manner sandwiching the fourth DC line LN4 that corresponds to the output line 406 of the linear regulator.

[0098] Several ground regions can be formed continuously. In this example, all of the ground regions GND1 to GND8 of the first wiring layer are formed continuously.

[0099] On the path of the first DC line 400, the components CFl, LFl, and CBLLK1 that constitute an input filter are provided. Noise generated in the control circuit 200_1 is blocked by the input filter. Therefore, when the pitch of the vias of the ground regions adjacent to the first DC line 400 is considered, the pitch at the upstream of the input filter is greater than the pitch at the downstream of the input filter. By expanding the pitch, the number of vias can be reduced. This can contribute to cost reduction of the printed board 300A depending on the situation.

[0100] Next, the measurement results of noise are described.

[0101] Figure 9 A photograph of a switching power supply made according to the structure described in the embodiment. Figure 9 The paper surface upper half of Figure 8 The substrate layout of Figure 10 (a) to Figure 10 (c) of Figure 9 The measurement results of noise of the switching power supply of Figure 10 (a) of Figure 10 (b) of Figure 10(c) indicates the measurement results (peak value Hori. (PK) and average value Hori. (AV)) of the radiation noise in the horizontal direction of the antenna surface. In Figure 10 (a) to (c) of FIG. 6 Figure 10 In (c) of FIG. 6, the standard values prescribed in CISPR 25 are also shown.

[0102] As shown in (a) to (c) of FIG. 6, the measured noise satisfies the standard values prescribed by the standards for all items. Figure 10 Figure 10 As shown in (a) to (c) of FIG. 6, the measured noise satisfies the standard values prescribed by the standards for all items.

[0103] The above describes the present disclosure based on the embodiments. It should be understood by those skilled in the art that the embodiments are merely illustrative, and there can be various modifications in the combination of each constituent element or each process, and such modifications are also within the scope of the present disclosure. The following describes such modifications.

[0104] In the embodiments, the case where the switching power supply is a step-down converter is described, but is not limited thereto, and the switching power supply can be a step-up converter, a step-up / down converter, or a switching power supply using a transformer. Further, it is not limited to a DC / DC converter, but can be widely applied to a converter, an inverter, an AC / DC converter, and the like, and a general switching power supply having a switching element.

[0105] In the embodiments, the switching transistor M1 and the synchronous rectification transistor M2 are integrated in the control circuit 200, but they can be configured with discrete elements and mounted on a printed board. In this case, the switching transistor and the synchronous rectification transistor are included in the peripheral circuit component group.

[0106] The present disclosure is described using specific sentences based on the embodiments, but the embodiments merely represent the principles and applications of the present disclosure or the present invention, and many modifications or changes in the configuration can be made within the scope of the idea of the present invention prescribed by the claims in the embodiments.

[0107] [Industrial applicability]

[0108] The present invention relates to a switching power supply.

[0109] [Explanation of reference numerals]

[0110] 100 switching power supply

[0111] 102 input line

[0112] 104 output line

[0113] 110 peripheral circuit component group

[0114] ​120 input filter

[0115] 130, 132 connectors

[0116] C1 input capacitor

[0117] C2 output capacitor

[0118] L1 inductor

[0119] 200 control circuit

[0120] M1 switching transistor

[0121] M2 synchronous rectification transistor

[0122] 300 printed board

[0123] 310 first wiring layer

[0124] LN1 direct current line

[0125] LN2 direct current line

[0126] LN3 direct current line

[0127] LN4 direct current line

[0128] GND0 lower ground area

[0129] GND1 first ground area

[0130] GND2 second ground area

[0131] GND3 third ground area

[0132] GND4 fourth ground area

[0133] GND5 fifth ground area

[0134] GND6 sixth ground area

[0135] GND7 seventh ground area

[0136] GND8 eighth ground area

[0137] 320 second wiring layer

[0138] 330 insulating layer

[0139] 332 first via hole

[0140] 334 second via hole

Claims

1. A switching power supply, characterized in that, include: A printed circuit board having a stacked structure comprising a first wiring layer as a surface layer, an insulating layer, and a second wiring layer. Control circuitry, which is mounted on the aforementioned printed circuit board, and Peripheral circuit components are mounted on the aforementioned printed circuit board; The first wiring layer mentioned above includes: DC lines, which transmit DC voltage, and The first grounding region and the second grounding region are formed separately from the DC line by being sandwiched in the DC line; The second wiring layer mentioned above includes a lower grounding region, which is formed in an area that overlaps with the DC line, the first grounding region, and the second grounding region. The above insulating layer includes: A plurality of first through holes are provided along the side of the first grounding region opposite to the DC line, and the first grounding region is electrically connected to the lower grounding region. Multiple second through holes are provided along the side of the second grounding region opposite to the DC line, and the second grounding region is electrically connected to the lower grounding region. Let c denote the speed of light in a vacuum, and f denote the maximum frequency specified in noise-related standards. MAX Let the relative permittivity of the above insulating layer be denoted as ε. r At that time, the maximum value d of the spacing between the first through hole and the second through hole is... max satisfy d max <c / √ε r / 10。 2. The switching power supply as described in claim 1, characterized in that, The minimum value d of the above spacing min satisfy (c / √ε r ) / 100<d min 。 3. The switching power supply as described in claim 1 or claim 2, characterized in that, The aforementioned switching power supply is a step-down DC / DC converter.

4. The switching power supply as described in claim 1 or 2, characterized in that, The aforementioned DC line is the input line of the aforementioned switching power supply.

5. The switching power supply as described in claim 4, characterized in that, It also includes an input filter, which is set on the path of the aforementioned input line; The spacing between the first through hole upstream of the input filter and the second through hole is greater than the spacing between the first through hole downstream of the input filter and the second through hole.

6. The switching power supply as described in claim 4, characterized in that, The aforementioned switching power supply is a step-down DC / DC converter.

7. The switching power supply as described in claim 5, characterized in that, The aforementioned switching power supply is a step-down DC / DC converter.

8. A switching power supply, characterized in that, include: A printed circuit board having a stacked structure comprising a first wiring layer as a surface layer, an insulating layer, and a second wiring layer. The first control circuit is mounted on the aforementioned printed circuit board. The first peripheral circuit component group is mounted on the aforementioned printed circuit board and, together with the aforementioned first control circuit, forms the first DC / DC converter. The second control circuit is mounted on the aforementioned printed circuit board, and The second peripheral circuit component group is mounted on the printed circuit board and together with the second control circuit forms the second DC / DC converter. The output voltage of the first DC / DC converter is supplied to the input terminal of the second DC / DC converter. The first wiring layer mentioned above includes: The first DC line is used for transmitting the input voltage of the aforementioned first DC / DC converter. The first grounding region and the second grounding region are formed separately from the first DC line by being sandwiched between them. The second DC line connects the output terminal of the first DC / DC converter to the input terminal of the second DC / DC converter. The third grounding region and the fourth grounding region are formed separately from the second DC line by being sandwiched in the second DC line; The second wiring layer mentioned above includes a lower grounding area, which is formed in an area overlapping with the first DC line, the first grounding area, the second grounding area, the second DC line, the third grounding area, and the fourth grounding area. The above insulating layer includes: Multiple first through holes are provided along the side of the first grounding region opposite to the first DC line, and electrically connect the first grounding region to the lower grounding region. Multiple second through holes are provided along the side of the second grounding region opposite to the first DC line, and electrically connect the second grounding region to the lower grounding region. Multiple third through holes are provided along the side of the third grounding region opposite to the second DC line, and electrically connect the third grounding region to the lower grounding region. Multiple fourth through holes are provided along the side of the fourth grounding region opposite to the second DC line, and electrically connect the fourth grounding region to the lower grounding region.

9. The switching power supply as described in claim 8, characterized in that, Let c denote the speed of light in a vacuum, and f denote the maximum frequency specified in noise-related standards. MAX Let the relative permittivity of the above insulating layer be denoted as ε. r At that time, the maximum value d of the spacing of the first through hole, the spacing of the second through hole, the spacing of the third through hole, and the spacing of the fourth through hole. max satisfy d max <c / √ε r / 10。 10. A switching power supply, characterized in that, include: A printed circuit board having a stacked structure comprising a first wiring layer as a surface layer, an insulating layer, and a second wiring layer. Control circuitry, which is mounted on the aforementioned printed circuit board, and Peripheral circuit components are mounted on the aforementioned printed circuit board; The first wiring layer mentioned above includes: DC lines, which transmit DC voltage, and The first grounding region and the second grounding region are formed separately from the DC line by being sandwiched in the DC line; The second wiring layer mentioned above includes a lower grounding region, which is formed in an area that overlaps with the DC line, the first grounding region, and the second grounding region. The above insulating layer includes: A plurality of first through holes are provided along the side of the first grounding region opposite to the DC line, and the first grounding region is electrically connected to the lower grounding region. Multiple second through holes are provided along the side of the second grounding region opposite to the DC line, and the second grounding region is electrically connected to the lower grounding region. The aforementioned DC lines are the input lines of the aforementioned switching power supply. It also includes an input filter, which is set on the path of the aforementioned input line; The spacing between the first through hole upstream of the input filter and the second through hole is greater than the spacing between the first through hole downstream of the input filter and the second through hole.

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