Display panel, driving method thereof and display device

Abstract

This invention discloses a display panel, its driving method, and a display device. The display panel array includes sub-pixels and data lines connected to each sub-pixel. Within a display frame, the data lines are configured to transmit a first type of data voltage to each sub-pixel during an effective time period, and this first type of data voltage is written to the sub-pixel. The data lines are also configured to transmit a second type of data voltage during an ineffective time period, wherein the second type of data voltage is not written to the sub-pixel, and the first type of data voltage is different from the second type of data voltage. The technical solution provided by this invention, by configuring the data lines to transmit a different data voltage during the ineffective time period than during the effective time period, allows the data lines to transmit a fixed-level data voltage during the ineffective time period, thereby reducing the coupling effect of the voltage on the data lines on the voltage corresponding to the sub-pixel during the ineffective time period, and thus helping to improve crosstalk.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a display panel, its driving method, and a display device. Background Technology

[0002] With the continuous development of display technology, people have increasingly higher requirements for the display effect of display devices.

[0003] Currently, display panels typically include a driving circuit and light-emitting devices. The driving circuit drives the light-emitting devices to emit light in order to display images. However, when displaying a specific image, crosstalk can easily occur, affecting the display effect. Summary of the Invention

[0004] This invention provides a display panel, its driving method, and a display device to improve display crosstalk and enhance display performance.

[0005] According to one aspect of the present invention, a display panel is provided, comprising sub-pixels arranged in an array, and data lines connected to each of the sub-pixels;

[0006] Within a display frame, the data line is configured to transmit a first type of data voltage to each of the sub-pixels during an effective time period, the first type of data voltage being written to the sub-pixels; the data line is also configured to transmit a second type of data voltage during an invalid time period, wherein the second type of data voltage is not written to the sub-pixels, and the first type of data voltage is different from the second type of data voltage.

[0007] Optionally, the voltage value of the second type of data voltage is less than the voltage value of the first type of data voltage; preferably, the second type of data voltage is ground voltage.

[0008] Optionally, the display panel includes at least two display areas, wherein the data line is configured to transmit different first-type data voltages in the at least two display areas, and the larger the voltage value of the first-type data voltage, the darker the display brightness of the display area.

[0009] Optionally, the display panel includes a first display area, a second display area, and a third display area. Along the scanning direction of the sub-pixels, the second display area is located between the first display area and the third display area, and the display grayscale of the first display area and the third display area is lower than the display grayscale of the second display area.

[0010] The greater the grayscale difference between the second display area and the first or third display area, the smaller the voltage value of the second type of data voltage.

[0011] Optionally, the duration for which the data line transmits the second type of data voltage to the sub-pixel at the first refresh frequency is greater than the duration for which the data line transmits the second type of data voltage to the sub-pixel at the second refresh frequency, wherein the first refresh frequency is less than the second refresh frequency.

[0012] Optionally, the sub-pixel includes a pixel circuit, which includes a data writing module, a driving module, a storage capacitor, and a light-emitting module.

[0013] The data writing module is used to write the data voltage transmitted on the data line to the control terminal of the driving module. The storage capacitor is connected to the control terminal of the driving module and is used to store the voltage of the control terminal of the driving module. The driving module is used to drive the light-emitting module to emit light according to the voltage of the control terminal.

[0014] The storage capacitor is configured such that its potential value at the first refresh frequency is less than its potential value at the second refresh frequency.

[0015] Optionally, the display panel further includes scan lines connected to the data writing module, with each row of sub-pixels corresponding to one scan line, the scan lines arranged along the row direction of the sub-pixels, and the data lines arranged along the column direction of the sub-pixels;

[0016] Optionally, the scan line is configured to transmit a pulse signal to the sub-pixel during the effective time period to turn on the data writing module, and to transmit a fixed-level signal to the sub-pixel during the invalid time period to turn off the data writing module.

[0017] According to another aspect of the present invention, a driving method for a display panel is provided, the display panel comprising an array of sub-pixels and data lines connected to each of the sub-pixels, the driving method for the display panel comprising:

[0018] During a valid time period within a display frame, a first type of data voltage is transmitted to each of the sub-pixels via the data line to write the first type of data voltage to the sub-pixels;

[0019] During an invalid time period within the same display frame, the data line transmits a second type of data voltage; wherein the second type of data voltage is not written to the sub-pixel, and the first type of data voltage is different from the second type of data voltage.

[0020] Optionally, during the invalid time period within the same display frame, the step of transmitting the second type of data voltage via the data line includes:

[0021] At the beginning of the invalid time period, the first type of data voltage transmitted on the data line jumps to ground voltage.

[0022] According to another aspect of the present invention, a display device is provided, including the display panel provided in any embodiment of the present invention.

[0023] The technical solution provided by this invention configures the data line to transmit a first type of data voltage to each sub-pixel during the effective time period within a display frame, and writes the first type of data voltage to the sub-pixel. During the ineffective time period, it transmits a second type of data voltage to each sub-pixel, and does not write the second type of data voltage to the sub-pixel. The first type of data voltage is different from the second type of data voltage. Compared to the prior art which sets the data line to a high-impedance state during the ineffective time period, the technical solution provided by this invention configures the data line to transmit a different data voltage during the ineffective time period than during the effective time period. This allows the data line to transmit a fixed-level data voltage during the ineffective time period, thereby reducing the coupling effect of the voltage on the data line to the corresponding data voltage of the sub-pixel during the ineffective time period. This reduces the brightness difference between the theoretical and actual display, and thus helps to improve crosstalk.

[0024] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 This is a schematic diagram of a display panel displaying an image in the prior art;

[0027] Figure 2 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0028] Figure 3 A signal diagram of data voltage transmitted on a data line is provided as an embodiment of the present invention;

[0029] Figure 4 This is a schematic diagram of a display panel display screen provided in an embodiment of the present invention;

[0030] Figure 5 This is a schematic diagram of another display panel display screen provided in an embodiment of the present invention;

[0031] Figure 6Another signal diagram of data voltage transmitted on a data line provided in an embodiment of the present invention;

[0032] Figure 7 A display brightness curve of a display panel provided in an embodiment of the present invention;

[0033] Figure 8 This is a signal diagram of data voltage transmission on a data line in the prior art;

[0034] Figure 9 Another signal diagram of data voltage transmitted on a data line provided in an embodiment of the present invention;

[0035] Figure 10 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention;

[0036] Figure 11 A flowchart illustrating a driving method for a display panel provided in an embodiment of the present invention;

[0037] Figure 12 A flowchart illustrating a driving method for a display panel provided in an embodiment of the present invention;

[0038] Figure 13 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0039] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0040] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0041] As described in the background section, existing display panels are prone to display crosstalk when displaying specific images, severely affecting the display effect. Through careful research, the inventors discovered that the cause of this problem is that the gate of the driving transistor is easily subjected to data line voltage coupling, causing its potential to be pulled up, resulting in changes in the gate potential and thus affecting the display. Specifically, Figure 1 This is a schematic diagram of a display panel displaying an image in the prior art. The display panel 10 typically includes an array of sub-pixels, each driven by a corresponding pixel circuit. Each data line connects to the pixel circuit corresponding to a column of sub-pixels to drive the sub-pixels to emit light. During the display process, the grayscale levels corresponding to the same column of sub-pixels may be different to achieve the purpose of displaying a specific image. In the same column of sub-pixels where corresponding data voltages have been written, the gate potential of the driving transistor in the pixel circuit is easily affected by changes in the data voltage signal on the data line, causing changes in the gate potential, which in turn changes the driving current, thereby changing the display brightness and forming display crosstalk. Figure 1 As shown, Figure 1 The target display screen is on the left. After the data cable coupling, the actual display screen is the screen on the right, resulting in brightness crosstalk and affecting the display effect.

[0042] To address the aforementioned problems, embodiments of the present invention provide a display panel to improve crosstalk issues. Figure 2 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Figure 3 A signal diagram of data voltage transmitted on a data line is provided as an embodiment of the present invention, for reference. Figure 2 and Figure 3 The display panel includes sub-pixels PX arranged in an array, and data lines DL (DL1, DL2...DLj) connected to each sub-pixel PX. Within a display frame, the data lines DL are configured to transmit a first type of data voltage Vdata-1 to each sub-pixel during an effective time period, and the first type of data voltage Vdata-1 is written to the sub-pixel PX. The data lines DL are also configured to transmit a second type of data voltage Vdata-2 during an invalid time period, wherein the second type of data voltage Vdata-2 is not written to the sub-pixel PX, and the first type of data voltage Vdata-1 and the second type of data voltage Vdata-2 are different.

[0043] Specifically, the display panel 10 typically includes data lines DL and scan lines GL (GL1, GL2, ..., GLk). The data lines DL and scan lines DL intersect to define multiple sub-pixels PX, which are arranged in an array within the display panel 10. Each data line DL connects to a column of sub-pixels PX. As the scan lines GL scan row by row, the data lines DL write data voltages to the gates of the driving transistors (not shown in the figure) corresponding to the sub-pixels they are connected to, thereby driving the transistors to drive the light-emitting devices to emit light.

[0044] In this embodiment, within the same display frame (1 frame), the data line DL is configured to transmit different data voltages during the effective and ineffective time periods. The display frame can be defined by the vertical synchronization signal V-sync, where the time between the falling edge of the V-sync pulse and the falling edge of the next pulse is the duration of one display frame. The effective and ineffective time periods can be defined by the external interface signal TE of the display panel. The TE signal is a non-display trigger signal; a high level (Blank area) of the TE signal corresponds to the non-display phase, and a low level (Active area) corresponds to the display phase. During the effective time period, the sub-pixel PX can perform operations such as data writing and emission. During the valid time period, the data line DL is configured to transmit the first type of data voltage Vdata-1. The first type of data voltage Vdata-1 is written to the sub-pixel, and the sub-pixel emits light under the action of the first type of data voltage Vdata-1. During the invalid time period, the data line DL is configured to transmit the second type of data voltage Vdata-2. At this time, the second type of data voltage Vdata-2 is not written to the sub-pixel. That is to say, during the invalid time period, the data line DL will not float and will still transmit voltage to the sub-pixel, but the voltage will not be written to the sub-pixel.

[0045] In the prior art, during the Blank area time period (i.e., the invalid time period), the data line DL is usually set to a high impedance state. When the display panel 10 moves from the Active area to the Blank area, the initial voltage on the data line DL remains the same as the data voltage corresponding to the Active area. Subsequently, the data voltage gradually decreases. Therefore, during the Blank area time period, the voltage on the data line DL shows a gradually decreasing trend. This changing voltage will couple to the gate potential of the driving transistor in the sub-pixel connected to the data line DL, causing the gate potential of the driving transistor to change, thereby changing the magnitude of the driving current, resulting in changes in the brightness of the displayed image and crosstalk.

[0046] In this embodiment, by configuring the data line DL to transmit a second type of data voltage different from the first type of data voltage during the invalid time period, the data voltage transmitted by the data line DL during the valid and invalid time periods has a fixed voltage difference, thereby reducing the coupling effect of the data line DL on the sub-pixel PX voltage during the invalid time period. For example, in the same column of sub-pixels PX on the display panel, some sub-pixels PX display high grayscale, and others display low grayscale. During the valid time period, the data line DL sequentially writes the corresponding first type of data voltage Vdata-1 to each sub-pixel PX (the voltage value of the first type of data voltage Vdata-1 corresponding to different display grayscales is different), so that the sub-pixels display the corresponding grayscale. During the invalid time period, the data line DL transmits a second type of data voltage Vdata-2, different from the first type of data voltage Vdata-1, to each sub-pixel PX; the second type of data voltage Vdata-2 is not written into the sub-pixel PX. Compared to existing technologies that set the data line DL to a high-impedance state during invalid time periods, this method can reduce the coupling effect of the data line DL on the gate potential of the driving transistor during invalid time periods, thereby reducing the amount of gate potential change and thus helping to reduce crosstalk rate.

[0047] The technical solution provided by this invention configures the data line to transmit a first type of data voltage to each sub-pixel during the effective time period within a display frame, and writes the first type of data voltage to the sub-pixel. During the ineffective time period, it transmits a second type of data voltage to each sub-pixel, and does not write the second type of data voltage to the sub-pixel. The first type of data voltage is different from the second type of data voltage. Compared to the prior art which sets the data line to a high-impedance state during the ineffective time period, the technical solution provided by this invention configures the data line to transmit a different data voltage during the ineffective time period than during the effective time period. This allows the data line to transmit a fixed-level data voltage during the ineffective time period, thereby reducing the coupling effect of the voltage on the data line to the corresponding data voltage of the sub-pixel during the ineffective time period. This reduces the brightness difference between the theoretical and actual display, and thus helps to improve crosstalk.

[0048] Optionally, continue to refer to Figure 2 In the display panel 10, each sub-pixel PX is scanned line by line. The level signal transmitted on the scan line GL can be configured to control whether the sub-pixel PX can write data voltage to the data line DL. During the invalid period, by controlling the level signal on the scan line GL, the pixel circuit corresponding to the sub-pixel PX is prevented from writing the second type of data voltage Vdata-2 to that sub-pixel PX. However, during this invalid period, the data line DL still transmits the second type of data voltage Vdata-2 to the sub-pixel PX; at this time, the display panel 10 is in the idle scan phase.

[0049] Figure 4This is a schematic diagram of a display panel display screen provided in an embodiment of the present invention, in conjunction with... Figure 2 and Figure 4 Optionally, based on the above technical solution, the display panel 10 includes at least two display areas. Taking a column of sub-pixels PX as an example, the grayscale displayed by the same column of sub-pixels PX is different. According to the displayed grayscale, the display panel 10 is divided into at least a first display area A and a second display area B. The first display area A and the second display area B transmit different first type of data voltage Vdata-1. In this embodiment, the larger the voltage value of the first type of data voltage Vdata-1, the darker the display brightness of the display area, that is, the lower the displayed grayscale. For example, as... Figure 4 As shown, the first display area A displays a black image (corresponding to 0 grayscale), and the second display area B displays a non-black image (e.g., 127 grayscale). Therefore, the data voltage corresponding to the first display area A is higher than the data voltage corresponding to the second display area B. Consequently, the data line DL of the first display area A pulls up the data voltage of the second display area B. If the data line DL is in a high-impedance state, then during the invalid time period, the initial voltage on the data line DL is the data voltage corresponding to the first display area A (and gradually decreases). During the change in the data voltage on the data line DL, it will also couple to the data voltage corresponding to the sub-pixel PX of the second display area B, pulling up the voltage of the sub-pixel PX of the second display area B, thus dimming the display brightness of the second display area B.

[0050] In this embodiment, by configuring the data line DL to transmit a second type of data voltage Vdata-2, which is different from the first type of data voltage Vdata-1, during the invalid time period, wherein the voltage value of the second type of data voltage Vdata-2 is lower than the voltage value of the first type of data voltage Vdata-1, that is, since the voltage on the data line DL in the first display area A and during the invalid time period both affect the voltage corresponding to the sub-pixel PX in the second display area B, setting the voltage transmitted on the data line DL to a second type of data voltage Vdata-2, which is lower than the first type of data voltage Vdata-1, during the invalid time period, the second type of data voltage Vdata-2 on the data line DL will couple down the voltage corresponding to the sub-pixel PX in the second display area B. This can neutralize the pulling effect of the first display area A on the voltage of the second display area B, so that the display brightness of the second display area B will not be significantly dimmed, thereby reducing crosstalk and improving the display effect.

[0051] Preferably, the second type of data voltage Vdata-2 is set to ground voltage, that is, the second type of data voltage Vdata-2 is zero voltage, so as to effectively reduce the coupling effect of the voltage on the data line DL on the data voltage corresponding to the sub-pixel during the invalid time period.

[0052] certainly, Figure 4This is merely an example illustrating the effect of a display screen. The grayscale levels of the first display area A and the second display area B can be interchanged, and the same applies to the above technical solution, which will not be elaborated further here.

[0053] It should be understood that, in the above embodiments, the second type of data voltage Vdata-2 should be less than the data voltage corresponding to the high grayscale display area, thereby reducing the voltage coupling effect on the high grayscale display area.

[0054] It should be noted that in this embodiment, high grayscale displays have higher brightness and correspondingly higher driving current; low grayscale displays have lower brightness and correspondingly lower driving current. The display grayscale of the first display area A and the second display area B can be any two different grayscales that the display panel can display, and the first display area A is not limited to... Figure 4 The grayscale shown is 0. For example, if the grayscale range that the display panel 10 can display is 0 to 255, then the displayed grayscale can be any grayscale from 0 to 255, the low displayed grayscale can be 0 to 32, and the high displayed grayscale can be 33 to 255.

[0055] As a preferred embodiment of the present invention, when the crosstalk between the high grayscale display areas between the two black screen display areas in the display panel 10 is severe, under this specific display screen, the data line DL is configured to transmit a second type of data voltage Vdata-2, which is different from the first type of data voltage Vdata-1, during the invalid time period, and the second type of data voltage Vdata-2 is the ground voltage, which can effectively improve the crosstalk problem. Figure 5 This is a schematic diagram of another display panel display screen provided in an embodiment of the present invention, with reference to... Figure 2 and Figure 5 Optionally, the display panel 10 includes a first display area A, a second display area B, and a third display area C. Along the scanning direction of the sub-pixel PX, the second display area B is located between the first display area A and the third display area C, and the display grayscale of the first display area A and the third display area C is lower than that of the second display area B.

[0056] Specifically, the first display area A and the third display area B can both correspond to 0 grayscale, while the second display area B can correspond to a high grayscale, such as grayscale 127. The fourth area D is a blank area, corresponding to an invalid time period. Here, the fourth area D does not actually exist on the display panel 10; it only exists in the time dimension. During the display process on the display panel 10, the first display area A, the second display area B, and the third display area C correspond to the first type of data voltage Vdata-1. The data voltages corresponding to the first display area A and the third display area C are greater than the data voltage corresponding to the second display area B. Therefore, when the second display area B is emitting light normally, the data voltage corresponding to the sub-pixel PX of the second display area B is easily affected by the coupling effect of the voltage transmitted on the data lines of the first display area A and the third display area C, causing the data voltage corresponding to the sub-pixel PX of the second display area B to increase, making the second display area B darker, resulting in crosstalk.

[0057] In this embodiment, the data line DL is configured to transmit the second type of data voltage Vdata-2 during the invalid time period, that is, the voltage corresponding to the fourth region D is the second type of data voltage Vdata-2. Figure 6 This invention provides another signal diagram of data voltage transmitted on a data line, based on the above-mentioned technical solutions, and combined with... Figure 5 and Figure 6 The scanning direction of the display panel 10 is the X direction. During the display process of the display panel 10, within the effective time period, the data line DL transmits the data voltage corresponding to the 0 gray level to the first display area A, the data voltage corresponding to the 127 gray level to the second display area B, and the data voltage corresponding to the 0 gray level to the third display area C. The data voltages corresponding to the first display area A and the third display area C are greater than the data voltage corresponding to the second display area B. Since the same column of sub-pixels PX is connected to a single data line DL, when the data line DL transmits data voltage to the corresponding sub-pixel PX in the first display area A and the third display area C, it couples up the data voltage of the sub-pixel PX in the second display area B. When the data line moves from the third display area C to the fourth area D (i.e., from the effective time period to the ineffective time period), the data voltage transmitted on the data line DL changes from the first type of data voltage Vdata-1 to the second type of data voltage Vdata-2. This second type of data voltage Vdata-2 is less than the smallest data voltage in the first type of data voltage Vdata-1, meaning that the second type of data voltage Vdata-2 is less than the data voltage corresponding to the second display area B. At this time, the data line DL couples down the data voltage corresponding to the second display area B. Therefore, this compensates for the effect of the data line DL in the first display area A and the third display area C coupling up the data voltage corresponding to the sub-pixel PX in the second display area B, resulting in smaller fluctuations in the data voltage corresponding to the sub-pixel PX in the second display area B, thereby reducing crosstalk.

[0058] Figure 7 This is a display brightness curve of a display panel provided in an embodiment of the present invention, wherein the vertical axis represents brightness and the horizontal axis represents time. Figure 7 It can be seen that by setting the second type of data voltage Vdata-2 to ground voltage, the display brightness increases significantly during the invalid time period (Blank area), which can effectively neutralize the decrease in brightness during the valid time period (Active area) and improve the display crosstalk phenomenon through mutual compensation.

[0059] Figure 8 This is a signal diagram of data voltage transmission on a data line in the prior art, for reference. Figure 5 and Figure 8 If the data line DL is set to a high-impedance state during the invalid time period, then when moving from the third display area C to the fourth display area D, the initial voltage on the data line DL in the fourth display area D is the first type of data voltage Vdata-1 corresponding to the third display area C. It then gradually decreases, and before decreasing to be equal to the data voltage corresponding to the second display area B, the data line DL will continuously couple and pull up the data voltage corresponding to the sub-pixel PX of the second display area B. Therefore, under the voltage coupling effect on the data line DL in the first display area A, the third display area C, and the fourth display area D, the data voltage corresponding to the sub-pixel PX of the second display area B increases (e.g., ...). Figure 8 As indicated by the arrow in the second display area B, the voltage corresponding to the second display area B is increased, the display brightness dims, and crosstalk occurs.

[0060] Furthermore, the voltage value of the second type of data voltage Vdata-2 can be determined based on the display grayscale of the display panel 10. Optionally, the greater the grayscale difference between the second display area B and the first display area A or the third display area C, the smaller the voltage value of the second type of data voltage Vdata-2. Specifically, when the grayscale difference between the second display area B and the first display area A or the third display area C is greater, the voltage difference between the data voltage corresponding to the second display area B and the data voltage corresponding to the first display area A or the third display area C is greater. Therefore, the coupling effect of the data line DL of the first display area A or the third display area C on the data voltage corresponding to the sub-pixel PX of the second display area B is greater. To reduce the coupling effect, by configuring the data line DL to transmit a smaller second type of data voltage Vdata-2 during the invalid time period, the voltage coupling reduction on the second display area B is greater. Through mutual compensation, the data voltage corresponding to the sub-pixel PX of the second display area B can be stabilized, preventing large fluctuations in the brightness of the second display area B and improving crosstalk.

[0061] Figure 9This invention provides another signal diagram of data voltage transmitted on a data line, based on the above-described technical solutions and with reference to... Figure 9 Optionally, the duration of data line DL transmitting the second type of data voltage Vdata-2 to sub-pixel PX at the first refresh frequency is greater than the duration of transmitting the second type of data voltage Vdata-2 to sub-pixel PX at the second refresh frequency, wherein the first refresh frequency is less than the second refresh frequency.

[0062] Specifically, for display panels with refresh rate switching capabilities, the common approach is to use the same data write time for each row of sub-pixels at both high and low refresh rates to mitigate flickering during refresh rate switching. Within a display frame (1 frame), the duration of the invalid time period is related to the refresh rate; the higher the refresh rate, the shorter the invalid time period. For example, if the display frame time for the first refresh rate is T1 (corresponding to 60Hz) and the display frame time for the second refresh rate is T2 (corresponding to 120Hz), where T1 is greater than T2, scanning each row of sub-pixels PX at 120Hz achieves the effect of a 60Hz refresh rate, effectively doubling the scanning time. Since the data write time for each row of sub-pixels is the same at both 120Hz and 60Hz, and the display frame time at 60Hz is longer, the invalid time period corresponding to 60Hz is also longer. Therefore, at lower refresh rates, the voltage coupling effect of the data line DL on the second display area B is more pronounced during the invalid time period. In this embodiment, the data line DL is configured to transmit the second type of data voltage Vdata-2 for a longer duration at low refresh rates, so as to effectively reduce the more severe crosstalk caused by the long coupling time of the data line DL to the second display area B during the invalid time period at low refresh rates.

[0063] Optionally, taking a first display area A and a third display area C displaying 0 grayscale and a second display area B displaying 127 grayscale as an example, preferably, the second type of data voltage Vdata-2 is ground voltage, and the crosstalk rate of the two display panels is calculated at different refresh frequencies. Table 1 shows the crosstalk rate obtained using the existing technical solution, and Table 2 shows the crosstalk rate obtained using the technical solution provided in the embodiments of the present invention. Wherein, the crosstalk rate a = |L1-L2| / L2, L1 is the brightness value of the crosstalk area, and L2 is the brightness value of the same area under non-crosstalk conditions.

[0064] Table 1

[0065]

[0066] Table 2

[0067]

[0068] As can be seen from Tables 1 and 2, in the prior art, crosstalk in display panels is more severe at low refresh rates than at high refresh rates. The technical solution provided in this embodiment can effectively reduce crosstalk in display panels at low refresh rates, thus improving the display effect.

[0069] Optionally, the sub-pixel PX includes pixel circuitry for driving the sub-pixel PX to emit light. Figure 10 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention, with reference to... Figure 2 and Figure 10 The pixel circuit includes a data writing module 120, a driving module 110, a storage capacitor Cst, and a light-emitting module 130. The data writing module 120 is used to write the data voltage transmitted on the data line DL to the control terminal of the driving module 110. The storage capacitor Cst is connected to the control terminal of the driving module 110 and is used to store the voltage of the control terminal of the driving module 110. The driving module 110 is used to drive the light-emitting module 130 to emit light according to the voltage of the control terminal.

[0070] Specifically, the driving module 110 includes a driving transistor M1, and the data writing module 120 includes a data writing transistor M2. The data writing transistor M2, in response to the scan signal on the scan line GL, writes the first type of data voltage Vdata-1 transmitted on the data line DL to the gate of the driving transistor M1. A storage capacitor Cst is connected between the gate and the first electrode of the driving transistor M1, storing the gate voltage of the driving transistor M1. Under the action of the gate voltage, a path is formed between the first power supply voltage VDD, the driving transistor M1, the light-emitting module 130, and the second power supply voltage VSS. The driving transistor M1 generates a driving current, flowing from the first electrode to the second electrode, driving the light-emitting module 130 to emit light. The gate voltage Vg of the driving transistor M1 is Vg = Cg(V0 - V127) / (Cst + Cg), where Cg is the coupling capacitance between the data line DL and the gate of the driving transistor M1, V0 is the 0 grayscale voltage corresponding to the first display area A or the third display area C, and V127 is the 127 grayscale voltage corresponding to the second display area B.

[0071] As shown in the above equation, the gate potential of the driving transistor M1 is affected not only by the coupling effect of the voltage on the data line DL, but also by the storage capacitor Cst, which in turn is affected by the voltage transmitted on the source line. To further reduce the gate potential variation of the driving transistor M1, during the invalid time period, the voltage at the first terminal of the storage capacitor Cst (i.e., the terminal connected to the first electrode of the driving transistor M1, and the second terminal of the storage capacitor Cst connected to the gate of the driving transistor M1) can be reduced at the first refresh frequency. Through the coupling effect of the capacitor, the gate potential of the driving transistor M1 is pulled down, thereby reducing the rise in the gate potential of the driving transistor M1 caused by the coupling of the data line DL.

[0072] In this embodiment, the storage capacitor Cst is configured such that its potential value at the first refresh frequency is less than its potential value at the second refresh frequency. That is, during the invalid time period, the charging voltage of the first terminal of the storage capacitor Cst is changed, and the potential value of this charging voltage at the first refresh frequency is less than its potential value at the second refresh frequency. At low refresh rates, by reducing the charging voltage of the storage capacitor Cst, the gate voltage of the driving transistor M1 is reduced, thereby reducing the influence of the data voltage transmitted on the data lines DL of the first display area A, the third display area C, and the fourth area D of the display panel at low refresh rates on the gate potential of the driving transistor M1 in the second display area B, thereby reducing crosstalk at low refresh rates.

[0073] Continue to refer to Figure 2 and Figure 10 The scan lines GL are arranged along the row direction of the sub-pixels PX, and the data lines DL are arranged along the column direction of the sub-pixels PX. The data lines DL and scan lines DL intersect to define multiple sub-pixels PX. The multiple sub-pixels PX are arranged in an array in the display panel 10, and each data line DL connects to a column of sub-pixels PX. The scan lines GL are configured to transmit pulse signals to the sub-pixels PX during the effective time period to turn on the data writing module 120. That is, during the effective time period, as the scan lines GL scan row by row, the corresponding data writing transistor M2 is turned on to write the first type of data voltage Vdata-1 transmitted on the data lines DL into the gate of the driving transistor M1. During the invalid time period, a fixed level signal is transmitted to the sub-pixel PX to turn off the data writing module 120, so that the second type of data voltage Vdata-2 is not written to the gate of the driving transistor M1. This is done by coupling to pull the gate potential of the driving transistor M1 low, thereby compensating for the potential of the gate potential of the driving transistor M1 being pulled high by the data line coupling during the valid time period, and preventing crosstalk caused by the change of the gate potential of the driving transistor M1.

[0074] It should be noted that, Figure 10The diagram only illustrates one structure of a pixel circuit. In other embodiments, the pixel circuit may have other structures, such as a 7T1C structure, a 12T2C structure, etc.

[0075] Optionally, embodiments of the present invention also provide a method for driving a display panel, see reference. Figure 2 and Figure 10 The display panel 10 includes sub-pixels PX arranged in an array, and data lines DL and scan lines GL connected to each sub-pixel PX. Each data line DL is connected to a column of sub-pixels PX. As the scan lines GL are scanned line by line, the data lines DL write data voltage to the gate of the driving transistor M1 corresponding to the sub-pixel connected to it, and the driving transistor M1 drives the light-emitting module 130 to emit light. Figure 11 This is a flowchart of a display panel driving method provided in an embodiment of the present invention, combined with... Figure 11 The driving method for this display panel includes:

[0076] S110, During the effective time period within a display frame, a first type of data voltage is transmitted to each sub-pixel via a data line to write the first type of data voltage to the sub-pixel.

[0077] S120. During an invalid time period within the same display frame, the data line transmits a second type of data voltage; wherein, the second type of data voltage is not written to the sub-pixel, and the first type of data voltage is different from the second type of data voltage.

[0078] The technical solution provided by this invention configures the data line to transmit a first type of data voltage to each sub-pixel during the effective time period within a display frame, and writes the first type of data voltage to the sub-pixel. During the ineffective time period, it transmits a second type of data voltage to each sub-pixel, and does not write the second type of data voltage to the sub-pixel. The first type of data voltage is different from the second type of data voltage. Compared to the prior art which sets the data line to a high-impedance state during the ineffective time period, the technical solution provided by this invention configures the data line to transmit a different data voltage during the ineffective time period than during the effective time period. This allows the data line to transmit a fixed-level data voltage during the ineffective time period, thereby reducing the coupling effect of the voltage on the data line on the corresponding data voltage of the sub-pixel during the ineffective time period. This reduces the brightness difference between the theoretical and actual display, and thus helps to improve crosstalk.

[0079] Figure 12 This is a flowchart of a display panel driving method provided in an embodiment of the present invention, combined with... Figure 12 The driving method for this display panel includes:

[0080] S110, During the effective time period within a display frame, a first type of data voltage is transmitted to each sub-pixel via a data line to write the first type of data voltage to the sub-pixel.

[0081] S1201. At the beginning of the invalid time period, the first type of data voltage transmitted on the data line jumps to ground voltage.

[0082] Specifically, the working principle of the display panel driving method provided in the embodiments of the present invention can be referred to the relevant description in any of the above embodiments. The display panel driving method also has the beneficial effects described in any of the above embodiments, and will not be repeated here.

[0083] Optionally, Figure 13 This is a schematic diagram of a display device provided in an embodiment of the present invention. The present invention also provides a display device including the display panel provided in any embodiment of the present invention. Therefore, this display device also possesses the beneficial effects described in any of the above embodiments. In this embodiment, the display device may be... Figure 13 The mobile phone shown can also be any electronic product with display function, including but not limited to the following categories: television, laptop, desktop monitor, tablet computer, digital camera, smart bracelet, smart glasses, in-vehicle display, medical equipment, industrial control equipment, touch interactive terminal, etc. The embodiments of the present invention do not make any special limitations on this.

[0084] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0085] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A display panel comprising a plurality of sub-pixels arranged in an array, and a plurality of data lines connected to the sub-pixels, wherein, in a display frame, the data lines are configured to transmit a first type of data voltage to the sub-pixels in an active time period, the first type of data voltage being written to the sub-pixels; and the data lines are further configured to transmit a second type of data voltage in an inactive time period, the second type of data voltage not being written to the sub-pixels, the first type of data voltage being different from the second type of data voltage; the display panel comprises at least two display regions, wherein the first type of data voltage transmitted by the data lines in the at least two display regions is different; the display panel comprises a first display region, a second display region, and a third display region, the second display region being located between the first display region and the third display region along a scanning direction of the sub-pixels, and the first display region and the third display region have a lower display gray scale than the second display region; a voltage value of the second type of data voltage is smaller than a voltage value of the first type of data voltage; and the second type of data voltage is a ground voltage.

2. The display panel of claim 1, wherein, a time length for the data lines to transmit the second type of data voltage to the sub-pixels at a first refresh frequency is greater than a time length for the data lines to transmit the second type of data voltage to the sub-pixels at a second refresh frequency, the first refresh frequency being smaller than the second refresh frequency; the sub-pixels comprise a pixel circuit, the pixel circuit comprising a data writing module, a driving module, a storage capacitor, and a light emitting module; the data writing module is configured to write a data voltage transmitted by the data lines to a control terminal of the driving module, the storage capacitor is connected to the control terminal of the driving module and configured to store a voltage of the control terminal of the driving module, and the driving module is configured to drive the light emitting module to emit light according to the voltage of the control terminal; a potential value of the storage capacitor at the first refresh frequency is smaller than a potential value of the storage capacitor at the second refresh frequency; the display panel further comprises a plurality of scan lines connected to the data writing module, each row of the sub-pixels corresponding to one of the scan lines, the scan lines being arranged along a row direction of the sub-pixels, and the data lines being arranged along a column direction of the sub-pixels; the scan lines are configured to transmit a pulse signal to the sub-pixels in the active time period to turn on the data writing module, and transmit a fixed level signal to the sub-pixels in the inactive time period to turn off the data writing module; and a driving method of the display panel comprises: transmitting, by the data lines, a first type of data voltage to the sub-pixels in an active time period of a display frame to write the first type of data voltage to the sub-pixels; and transmitting, by the data lines, a second type of data voltage in an inactive time period of the same display frame, the second type of data voltage not being written to the sub-pixels, the first type of data voltage being different from the second type of data voltage. ​ ​ ​ ​ ​ ​ 3. The display panel of claim 2, wherein, ​ ​ ​ 4. The display panel of claim 3, wherein, ​ ​ 5. A driving method of a display panel, the display panel comprising sub-pixels arranged in an array, and data lines connected to each of the sub-pixels, characterized in that, ​ ​ ​ The display panel comprises at least two display regions, wherein the data lines are configured to transmit different first-type data voltages in the at least two display regions; The display panel comprises a first display region, a second display region and a third display region, along a scanning direction of the sub-pixels, the second display region is located between the first display region and the third display region, and the display gray scale of the first display region and the third display region is lower than the display gray scale of the second display region. The voltage value of the second-type data voltage is less than the voltage value of the first-type data voltage; and the second-type data voltage is a ground voltage.

6. The driving method of the display panel according to claim 5, wherein In the invalid time period in the same display frame, the data line transmits a second-type data voltage, and the step of transmitting the second-type data voltage comprises: At the start time of the invalid time period, the first-type data voltage transmitted on the data line jumps to a ground voltage.

7. A display device, characterized by comprising: The display panel comprises the display panel according to any one of claims 1-4.

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