Pixel driving circuit, display module, display device, and smart watch

Abstract

The present application provides a pixel driving circuit, a display module, a display device, and a smart watch, which relate to the field of display technologies and can automatically adjust the magnitude of the output current, reduce the complexity of the structure of the display module, and improve the battery life of the display device. The pixel driving circuit includes a photosensitive device and a photon modulation sub-circuit. A first end of the photosensitive device is configured to receive a control signal, and a second end of the photosensitive device is electrically connected to a first node; the photosensitive device is configured to adjust the voltage of the first node based on the control signal. The photon modulation sub-circuit is connected between a first voltage terminal and a light-emitting device and is electrically connected to the first node. The conduction state of the photon modulation sub-circuit changes with the change of the voltage of the first node, and the photon modulation sub-circuit is configured to adjust the brightness of the light-emitting device based on a first voltage signal from the first voltage terminal under the control of the voltage of the first node. The above pixel driving circuit and display module are applied to a display device capable of automatically adjusting the light.

Description

Technical Field

[0001] The present invention relates to the field of display technologies, and in particular, to a pixel driving circuit, a display module, a display device, and a smart watch. Background Art

[0002] Currently, most display devices can achieve the effect of automatically adjusting the display brightness according to the ambient brightness. Among them, the function of automatically adjusting the brightness is realized by an ambient light sensor (ALS for short). Generally, a display device includes a display panel and at least one flexible circuit board. The ALS and a plurality of peripheral devices are arranged on the flexible circuit board, and the flexible circuit board is configured to electrically connect the ALS to the display panel.

[0003] However, when the flexible circuit board is bent to the back of the display panel, there is usually a warping problem, resulting in a gap between the ALS on the flexible circuit board and the non-display side of the display panel, which is not conducive to the ALS for photosensing. Moreover, adding the ALS and peripheral devices in the display device occupies a large space, which is not conducive to the thinning and lightening of the display device. In addition, the operating power consumption of the ALS is relatively large, and the power loss is large, which is not conducive to the battery life of the display device. Summary of the Invention

[0004] To overcome the above defects in the prior art, the present application provides a novel pixel driving circuit, a display module, a display device, and a smart watch, which can automatically adjust the magnitude of the output current, reduce the complexity of the display module structure, and improve the battery life of the display device.

[0005] To achieve the above object, the present application adopts the following technical solutions:

[0006] On the one hand, a pixel driving circuit is provided. The pixel driving circuit includes a photosensitive device and a photon modulation sub-circuit. The first end of the photosensitive device is configured to receive a control signal, and the second end of the photosensitive device is electrically connected to a first node; the resistance of the photosensitive device changes with the change of the light intensity irradiated on the photosensitive device, and the photosensitive device is configured to adjust the voltage of the first node based on the control signal. The photon modulation sub-circuit is connected between a first voltage terminal and a light-emitting device and is electrically connected to the first node; the conduction state of the photon modulation sub-circuit changes with the change of the voltage of the first node, and the photon modulation sub-circuit is configured to adjust the brightness of the light-emitting device based on a first voltage signal from the first voltage terminal under the control of the voltage of the first node.

[0007] The resistance of the photosensitive device described above changes with the change in the light intensity irradiated on the photosensitive device, thereby causing changes in the voltage and current flowing through the photosensitive device, that is, the potential of the first node changes. Under the control of the potential of the first node, the conduction degree of the photon adjustment circuit changes accordingly, so that the magnitude of the first voltage signal output from the first voltage terminal to the light-emitting device changes. If the conduction degree of the photon adjustment circuit becomes larger, the voltage (and current) of the first voltage signal transmitted to the light-emitting device is larger, and the brightness of the light-emitting device is brighter; if the conduction degree of the photon adjustment circuit becomes smaller, the voltage (and current) of the first voltage signal transmitted to the light-emitting device is smaller, and the brightness of the light-emitting device is darker. In this way, the pixel driving circuit realizes automatic adjustment of the brightness of the light-emitting device through the photosensitive device and the photon adjustment circuit electrically connected thereto, without the need for information interaction with an additional dimmer element, reducing the complexity of the circuit structure.

[0008] In some embodiments, the pixel driving circuit further includes a driving transistor. The control electrode of the driving transistor is electrically connected to the second node, the first electrode of the driving transistor is electrically connected to the third node, and the second electrode of the driving transistor is electrically connected to the fourth node. The photon adjustment circuit includes a first transistor connected between the fourth node and the light-emitting device, and the control electrode of the first transistor is electrically connected to the first node.

[0009] In some embodiments, the first end of the photosensitive device is electrically connected to the enable signal terminal. The photon adjustment circuit further includes a second transistor, the control electrode of the second transistor is electrically connected to the first node or the enable signal terminal, the first electrode of the second transistor is electrically connected to the first voltage terminal, and the second electrode of the second transistor is electrically connected to the third node.

[0010] In some embodiments, the first end of the photosensitive device is electrically connected to the scan signal terminal. The photon adjustment circuit further includes a second transistor, the control electrode of the second transistor is electrically connected to the enable signal terminal, the first electrode of the second transistor is electrically connected to the first voltage terminal, and the second electrode of the second transistor is electrically connected to the third node.

[0011] In some other embodiments, the first end of the photosensitive device is electrically connected to any one of the enable signal terminal, the scan signal terminal, the reset signal terminal, the initialization signal terminal, the first voltage terminal, the second voltage terminal, the second node, the third node, or the fourth node; wherein, the light-emitting device is electrically connected to the second voltage terminal.

[0012] The dimming sub - circuit further includes a second transistor and a third transistor. The control electrode of the second transistor is electrically connected to the enable signal terminal, the first electrode of the second transistor is electrically connected to the first voltage terminal, and the second electrode of the second transistor is electrically connected to the third node. The control electrode of the third transistor is electrically connected to the enable signal terminal, the third transistor is connected between the fourth node and the light - emitting device, and the third transistor is in series with the first transistor.

[0013] In some other embodiments, the pixel driving circuit further includes a driving transistor. The control electrode of the driving transistor is electrically connected to the second node, the first electrode of the driving transistor is electrically connected to the third node, and the second electrode of the driving transistor is electrically connected to the fourth node. The dimming sub - circuit includes a first transistor. The control electrode of the first transistor is electrically connected to the first node, the first electrode of the first transistor is electrically connected to the first voltage terminal, and the second electrode of the first transistor is electrically connected to the third node.

[0014] In some embodiments, the first end of the photosensitive device is electrically connected to the enable signal terminal or the scan signal terminal. The dimming sub - circuit further includes a second transistor. The control electrode of the second transistor is electrically connected to the enable signal terminal, the first electrode of the second transistor is electrically connected to the fourth node, and the second electrode of the second transistor is electrically connected to the light - emitting device.

[0015] In some embodiments, the pixel driving circuit further includes a capacitor, a fourth transistor, a fifth transistor, a sixth transistor, and a seventh transistor. The first electrode plate of the capacitor is electrically connected to the first voltage terminal, and the second electrode plate of the capacitor is electrically connected to the second node. The control electrode of the fourth transistor is electrically connected to the scan signal terminal, the first electrode of the fourth transistor is electrically connected to the data signal terminal, and the second electrode of the fourth transistor is electrically connected to the third node. The control electrode of the fifth transistor is electrically connected to the scan signal terminal, the first electrode of the fifth transistor is electrically connected to the fourth node, and the second electrode of the fifth transistor is electrically connected to the second node. The control electrode of the sixth transistor is electrically connected to the reset signal terminal, the first electrode of the sixth transistor is electrically connected to the initialization signal terminal, and the second electrode of the sixth transistor is electrically connected to the second node. The control electrode of the seventh transistor is electrically connected to the scan signal terminal, the first electrode of the seventh transistor is electrically connected to the initialization signal terminal, and the second electrode of the seventh transistor is electrically connected to the light - emitting device.

[0016] In some embodiments, when the first end of the photosensitive device is electrically connected to any one of the first voltage terminal, the scan signal terminal, the third node, and the fourth node, the polarity of the first transistor is opposite to that of the driving transistor, the second transistor, the fourth transistor to the seventh transistor; when the photon modulation sub-circuit further includes a third transistor, the polarity of the first transistor is also opposite to that of the third transistor. When the first end of the photosensitive device is electrically connected to any one of the enable signal terminal, the reset signal terminal, the initialization signal terminal, the second voltage terminal, and the second node, the polarity of the first transistor is the same as that of the driving transistor, the second transistor, and the fourth transistor to the seventh transistor; when the photon modulation sub-circuit further includes a third transistor, the polarity of the first transistor is also the same as that of the third transistor.

[0017] On the other hand, a display module is provided. The display module includes a substrate, a plurality of pixel driving circuits as provided in any of the above embodiments, and a plurality of light-emitting devices. The plurality of pixel driving circuits are disposed on the substrate. The plurality of light-emitting devices are disposed on a side of the plurality of pixel driving circuits away from the substrate, and the light-emitting devices are electrically connected to the pixel driving circuits.

[0018] The display module adopts the pixel driving circuit provided in any of the above embodiments, without the need for information interaction with other dimming elements other than the pixel driving circuit, reducing the energy consumption generated by the information interaction between the driving pixel driving circuit and the dimming element, being beneficial to improving the battery life of the display module, and saving the occupied space of the display module, being beneficial to improving the thinness and lightness of the display module.

[0019] In some embodiments, the display module has a light-transmitting area, and at least one of the photosensitive devices is disposed in the light-transmitting area, and each of the photosensitive devices is electrically connected to a plurality of the pixel driving circuits.

[0020] In some embodiments, the display module further includes a photosensitive layer, the photosensitive layer is disposed on a side of the plurality of pixel driving circuits away from the substrate, the photosensitive layer includes a plurality of the photosensitive devices, and each of the photosensitive devices is electrically connected to one or more of the pixel driving circuits.

[0021] In some embodiments, the display module further includes a chip-on-film (COF) and a flexible printed circuit board (FPCB). The COF is electrically connected to a plurality of the pixel driving circuits. The FPCB is electrically connected to the COF; at least one photosensitive device is disposed on one side surface of the FPCB, and when the FPCB is bent to the backlight side of the substrate, the photosensitive device is closer to the substrate relative to the FPCB. Wherein, each photosensitive device is electrically connected to a plurality of the pixel driving circuits.

[0022] In another aspect, a display device is provided, which includes the display module provided in any of the above embodiments, and a housing.

[0023] The beneficial effects of the above display device are the same as those of the display module provided in the present application, and will not be elaborated herein.

[0024] In another aspect, a smart watch is provided, which includes the display module provided in any of the above embodiments, and a support member.

[0025] The beneficial effects of the above smart watch are the same as those of the display module provided in the present application, and will not be elaborated herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts. In addition, the drawings in the following description can be regarded as schematic diagrams, and are not a limitation on the actual size of the products involved in the embodiments of the present application.

[0027] Figure 1A It is a structural diagram of a display module in the prior art;

[0028] Figure 1B It is a structural diagram of another display module in the prior art;

[0029] Figure 1C For Figure 1B It is a partial cross-sectional view after the chip-on-film of the provided display module is bent;

[0030] Figure 2 It is a structural diagram of a display device provided according to some embodiments;

[0031] Figure 3A For Figure 2 It is a structural diagram of a display module in the provided display device;

[0032] Figure 3B Another structural diagram of a display module in the provided display device; Figure 2 The structure diagram of another display module in the provided display device;

[0033] Figure 4 A pixel layout diagram of a display device provided according to some embodiments;

[0034] Figure 5 A pixel architecture diagram of a display device provided according to some embodiments;

[0035] Figure 6A Another sectional view of a display panel along the section line CC in the provided display device; Figure 4 A sectional view of a display panel along the section line CC in the provided display device;

[0036] Figure 6B Another sectional view of a display panel along the section line CC in the provided display device; Figure 4 A sectional view of a display panel along the section line CC in the provided display device;

[0037] Figure 7 A schematic diagram of a pixel driving circuit provided according to some embodiments;

[0038] Figure 8A Another schematic diagram of a pixel driving circuit provided according to some embodiments;

[0039] Figure 8B Another schematic diagram of a pixel driving circuit provided according to some embodiments;

[0040] Figure 9A Another schematic diagram of a pixel driving circuit provided according to some embodiments;

[0041] Figure 9B A schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0042] Figure 10 Another schematic diagram of a pixel driving circuit provided according to some embodiments;

[0043] Figure 11 Another schematic diagram of a pixel driving circuit provided according to some embodiments;

[0044] Figure 12 Another schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0045] Figure 13 Another schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0046] Figure 14 A schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0047] Figure 15Another schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0048] Figure 16 Another schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0049] Figure 17 Another schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0050] Figure 18 Another schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0051] Figure 19 Another schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0052] Figure 20 Another schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0053] Figure 21 Another schematic diagram of a pixel driving circuit provided according to some other embodiments;

[0054] Figure 22 A timing diagram of the pixel driving circuit provided according to some embodiments. Detailed implementation manners

[0055] Next, in combination with the accompanying drawings, the technical solutions in some embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments provided by the present application, all other embodiments obtained by those of ordinary skill in the art belong to the scope of protection of the present application.

[0056] Unless otherwise required by the context, throughout the specification and claims, the term "comprising" is interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples", "specific examples" or "some examples", etc. are intended to indicate that the specific features, structures, materials or characteristics related to the embodiment or example are included in at least one embodiment or example of the present application. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. In addition, the described specific features, structures, materials or characteristics can be included in any one or more embodiments or examples in any appropriate manner.

[0057] Hereinafter, the terms "first" and "second" are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of the present application, unless otherwise specified, the meaning of "a plurality" is two or more.

[0058] When describing some embodiments, the expression "connected" and its derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components have direct physical contact or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the content herein.

[0059] "A and / or B" includes the following three combinations: only A, only B, and the combination of A and B.

[0060] "At least one of A, B, and C" has the same meaning as "at least one of A, B, or C", and both include the following combinations of A, B, and C: only A, only B, only C, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0061] The use of "suitable for" or "configured to" herein means open and inclusive language, which does not exclude a device suitable for or configured to perform additional tasks or steps.

[0062] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions is exaggerated for clarity. Thus, variations in the shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances can be envisioned. Therefore, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but include shape deviations caused by, for example, manufacturing. For example, an etched region shown as rectangular will typically have curved features. Thus, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shape of the regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0063] Currently, ALS is used for light intensity sensing, and the display brightness of the display device is adjusted according to the sensed light intensity. For example, if the light intensity sensed by ALS is strong, a signal for increasing the display brightness is output so that the user can clearly see the display screen of the display device. If the light intensity sensed by ALS is weak, a signal for reducing the display brightness is output so that, in the case where the user can clearly see the display screen of the display device, the adverse stimulation to the human eye caused by too high display brightness is reduced, and at the same time, reducing the display brightness can reduce battery power consumption.

[0064] However, during the process of applying ALS for display brightness adjustment, ALS processes information based on the sensed light intensity and interacts with the processor in the display device. Thus, the processor controls the display brightness of the display device. In this way, the operation of ALS and the processor consumes a large amount of power. Display devices such as smart watches are often powered by batteries. Due to the limited energy storage capacity of the batteries, using ALS is significantly disadvantageous for the battery life of the display device. Exemplarily, as Figures 1A - 1C shown, the display device 1000 includes at least two flexible circuit boards 1100 and a display panel 1200. When the ALS 1300 is disposed on the flexible circuit board 1100 and the flexible circuit board 1100 is bent to the non-display side of the display panel 1200, as Figure 1C shown, the flexible circuit board 1100 has a certain hardness and is prone to warping, resulting in a gap between the ALS 1300 and the display panel 1200 and being unable to be closely attached. Furthermore, the light-transmitting area H on the display panel 1200 that exposes the ALS 1300 is misaligned with the ALS 1300, and the light-transmitting area H cannot completely expose the ALS 1300, affecting the photosensitive effect of the ALS 1300. It can be understood that if the light-transmitting area H is located in the peripheral area, an opening is provided on the housing that overlaps the positive projection of the light-transmitting area H; if the light-transmitting area H is located in the display area, each film layer of the light-transmitting area H on the side of the ALS 1300 facing the display is a light-transmitting film layer to enable external ambient light to irradiate the ALS 1300. In addition, there are many peripheral devices (such as two filter capacitors, adjustable resistors, etc.) that operate together with the ALS1300, occupying a large amount of space and being disadvantageous for realizing the thin and light of the display device 1000.

[0065] To solve the above problems, some embodiments of the present application provide a display device that can automatically adjust the light according to the current ambient light intensity without adding an additional ALS, and reduce the ALS attachment process steps, improving the process efficiency and yield.

[0066] The above display device can be any device with a display function such as a tablet computer, a monitor, a mobile phone, a billboard, a digital photo frame, or a personal digital assistant (PDA). Exemplarily, as Figure 2 shown, the display device 2000 provided by some embodiments of the present application is a smart watch 2001.

[0067] The embodiments of the present application do not impose special restrictions on the specific type of the display device 2000. Exemplarily, the display device 2000 can also be an Organic Light-Emitting Diode (OLED) display device, a Quantum Dot Light Emitting Diodes (QLED) display device, or an Active-matrix organic light emitting diode (AMOLED) display device. The following embodiments will be described in detail by taking the OLED display device as an example.

[0068] In some embodiments, as Figure 2 shown, the display device 2000 includes a display module 2200 and a housing 2100. Among them, the housing 2100 includes components such as a frame 2101 and a rear case (not shown in the figure), and is configured to provide protection and support for the display module 2200. Exemplarily, as Figure 2 shown, the display device 2000 is a smart watch 2001, and the smart watch 2001 includes a display module 2200, a housing 2100, and a support component 2300. The support component 2300 is configured to be connected to the housing 2100 to facilitate wearing the display device 2000. For example, the support component 2300 includes a watch band 2301.

[0069] In some examples, as Figure 3A and Figure 3B shown, the display module 2200 includes a main board 2210, a flexible circuit board 2220, a chip-on-film 2230, and a display panel 2240.

[0070] A central processing unit (CPU) 2211 is provided on the main board 2210. The main board 2210 is electrically connected to the flexible circuit board 2220 and is configured to control the Timing Controller (TCON) 2222 to output a timing control signal.

[0071] The flexible circuit board 2220 is electrically connected to the chip-on-film 2230 through a second pin S2. Driving circuits such as a power manager 2221 and a TCON 2222 are provided on the flexible circuit board 2220. The power manager 2221 is configured to transmit the processed power voltage signal to the TCON 2222, the chip-on-film 2230, and the processor 2211 to power on the TCON 2222, the chip-on-film 2230, and the processor 2211.

[0072] The Chip On Film (COF) 2230 is electrically connected to the display panel 2240 through the first pin S1, and a driving chip 2231 is provided on the Chip On Film 2230. Exemplarily, the driving chip 2231 is a Source Driver IC. The source driver chip is electrically connected to a plurality of pixel driving circuits 100 on the display panel 2240 and is configured to transmit data signals to the pixel driving circuits 100. Among them, the TCON 2222 is electrically connected to the source driver chip and is configured to transmit a timing control signal to the source driver chip to control the source driver chip to output the required data signals.

[0073] As Figure 3A , Figure 3B and Figure 4 shown, the display panel 2240 includes an active area AA and a peripheral area BB located on at least one side of the active area AA. Figure 4 In Figure 5 , the peripheral area BB is schematically shown surrounding the active area AA in a circle, and the shapes of the peripheral area BB and the active area AA are not limited. Among them, the active area AA includes a plurality of sub-pixel units (sub pixel) P arranged in an array. Exemplarily, the sub-pixels P arranged in a row along the horizontal direction X are called the same row of sub-pixels, and the sub-pixel units P arranged in a row along the vertical direction Y are called the same column of sub-pixels. Exemplarily, as

[0074] Please continue to refer to Figure 5 , a pixel driving circuit 100 and a light emitting device 200 for controlling the sub-pixel unit P to display are provided in the sub-pixel unit P. The gate line GL connected to the sub-pixel unit P is used to transmit a gate scan signal gate to the pixel driving circuit 100 of the sub-pixel unit P. The emission control signal line EM connected to the sub-pixel unit P is used to transmit an enable signal em to the pixel driving circuit 100 of the sub-pixel unit P. The reset scan signal line RS connected to the sub-pixel unit P is used to transmit a reset signal reset to the pixel driving circuit 100 of the sub-pixel unit P (the reset scan signal line RS is another gate line, that is, the gate scan signal gate transmitted by the gate line GL of the Nth row is used as the reset signal reset of the (N + 1)th row). The data line DL connected to the sub-pixel unit P is used to transmit a data signal vdata to the pixel driving circuit 100 of the sub-pixel unit P, and the data signal Data comes from the source driver chip electrically connected to each data line DL.

[0075] It should be noted that, for the subsequent embodiments, the signal line electrically connected to the scan signal terminal Gate is the gate line GL, the signal line electrically connected to the reset signal terminal Reset is the reset signal line RS, and the signal line electrically connected to the enable signal terminal EM is the light emission control signal line EM (not distinguished here).

[0076] The following will give examples of the pixel driving circuit 100 and the light-emitting device 200 according to the specific film layer structure of the display panel 2240. As Figure 6A and Figure 6B shown, the display panel 2240 includes a substrate 2241, a driving circuit stack 2242, a plurality of light-emitting devices 200, and a packaging layer 2243 that are stacked.

[0077] The substrate 2241 can be flexible and include one or more of polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), triacetyl cellulose (TAC), and cellulose acetate propionate (CAP). By way of example, the material of the substrate 2241 includes polyimide (PI).

[0078] In some examples, as Figure 6A and Figure 6B shown, the driving circuit stack 2242 refers to the film layer where a plurality of pixel driving circuits 100 are arranged in an array, and includes a plurality of patterned conductive layers and insulating layers. The pixel driving circuit 100 is disposed on the substrate 2241. Each pixel driving circuit 100 includes a plurality of thin film transistors (Thin Film Transistor, abbreviated as TFT) and at least one capacitor Cst. In the direction perpendicular to the driving circuit stack 2242, the driving circuit stack 2242 includes a semiconductor layer 1, a gate insulating layer 2, a first gate metal layer 3, a first insulating layer 4, a second gate metal layer 5, a second insulating layer 6, a conductive layer 7, a third insulating layer 8, and a planar layer 9.

[0079] Among them, the first gate metal layer 3 includes the gates 31 of a plurality of TFTs, the first electrodes 32 of a plurality of capacitors Cst, and a plurality of first gate scan lines 33 (i.e., the gate lines GL). The second gate metal layer 5 includes the second electrodes 51 of a plurality of capacitors Cst and a plurality of second gate scan lines 52 (i.e., one gate line GL multiplexed as the reset signal line RS). The conductive layer 7 includes the sources 71 and drains 72 of a plurality of TFTs, and a plurality of signal lines 73 (such as including data signal lines DL, a first voltage signal line VDD, and a second voltage signal line VSS, etc.).

[0080] A plurality of light-emitting devices 200 are disposed on a side of the plurality of pixel driving circuits 100 away from the substrate 2241, and the light-emitting devices 200 are electrically connected to the pixel driving circuits 100. The film layer where the plurality of light-emitting devices 200 are located includes a plurality of pixel anodes 10, a pixel defining layer 11, a light-emitting functional layer 12, and a cathode layer 13. The overlapping part of the orthographic projections of one pixel anode 10 (for providing holes), one light-emitting functional layer 12, and the cathode layer 13 on the substrate 2241 can form a light-emitting device 200. The pixel anode 10 and the cathode layer 13 inject holes and electrons into the light-emitting functional layer 12 respectively. When the excitons generated by the combination of holes and electrons transition from the excited state to the ground state, light emission is formed.

[0081] The encapsulation layer 2243 is disposed on a side of the cathode layer 13 away from the substrate 2241. The encapsulation layer 2243 can be an encapsulation film. The number of encapsulation films included in the encapsulation layer 2243 is not limited. In some embodiments, the encapsulation layer 2243 can include one encapsulation film, or can include two or more encapsulation films stacked. Exemplarily, the encapsulation layer 2243 includes an inorganic / organic / inorganic three-layer material film stacked in sequence. Among them, the inorganic material can be any one or more of silicon nitride (SiNx), silicon oxynitride (SiON), or silicon oxide (SiOx).

[0082] It should be noted that the transistors used in the pixel driving circuit 100 provided in the embodiments of the present disclosure can be thin film transistors (Thin Film Transistor, abbreviated as TFT), metal oxide semiconductor field effect transistors (abbreviated as MOS), or other switching devices with the same characteristics. In the embodiments of the present disclosure, thin film transistors are taken as examples for illustration.

[0083] The control electrode of each thin film transistor used in the pixel driving circuit 100 is the gate of the transistor, the first electrode is one of the source and the drain of the thin film transistor, and the second electrode is the other of the source and the drain of the thin film transistor. Since the source and the drain of the thin film transistor can be symmetric in structure, their source and drain can be indistinguishable in structure. That is to say, the first electrode and the second electrode of the thin film transistor in the embodiments of the present disclosure can be indistinguishable in structure. Exemplarily, in the case where the thin film transistor is a P-type transistor, the first electrode of the thin film transistor is the source, and the second electrode is the drain; Exemplarily, in the case where the thin film transistor is an N-type transistor, the first electrode of the transistor is the drain, and the second electrode is the source.

[0084] Such as Figure 3A and Figure 3BAs shown, the above flip-chip thin film 2230 and the display panel 2240 are electrically connected through a plurality of first pins S1. A plurality of first pins S1 are provided on the flip-chip thin film 2230, and the plurality of first pins are electrically connected to the driving chip 2231. An extension section of each of a plurality of signal lines 73 (not shown in the figure) is provided in the peripheral area BB of the display panel 2240. In this way, the plurality of signal lines 73 are electrically connected to the plurality of pixel driving circuits 100, and the extension sections of the plurality of signal lines 73 are electrically connected to the plurality of first pins S1, so as to realize the electrical connection between the driving chip 2231 on the flip-chip thin film 2230 and the plurality of pixel driving circuits 100. And, as Figure 6A and Figure 6B shown, the encapsulation layer 2243 located in the peripheral area BB will expose the extension sections of the plurality of signal lines 73, that is, the encapsulation layer 2243 is not provided on the extension sections of the plurality of signal lines 73, so as to facilitate the electrical connection between the extension sections of the plurality of signal lines 73 and the plurality of first pins S1 on the flip-chip thin film 2230 by attaching the conductive adhesive 14 on the extension sections of the plurality of signal lines 73.

[0085] In some examples, as Figure 3A and Figure 3B shown, the display module 2200 further includes at least one photosensitive device 110, and at least one pixel driving circuit 100 in the display panel 2240 includes the photosensitive device 110.

[0086] Exemplarily, as Figure 3A shown, at least one photosensitive device 110 is provided on one side surface of the flexible circuit board 2200, and when the flexible circuit board 110 is bent to the backlight side of the substrate 2241, the photosensitive device 110 is closer to the substrate 2241 relative to the flexible circuit board 2200. Combining Figure 6A , the film layer where the photosensitive device 110 is located is not provided on the display panel 2240. For example, a surface-mounted photosensitive resistor RG is provided on the flexible circuit board 2200. At least one pixel driving circuit 100 in the display panel 2240 is electrically connected to this surface-mounted photosensitive resistor RG.

[0087] Another exemplarily, as Figure 3B shown, at least one photosensitive device 110 is provided on the display panel 2240. As Figure 6BAs shown in the figure, a film layer where the photosensitive device 110 is located (i.e., the photosensitive layer 17) is provided on the display panel 2240. The photosensitive layer 17 is provided on a side of the plurality of pixel driving circuits 100 away from the substrate 2241. The photosensitive layer 17 includes at least one photosensitive device 110 (not shown in the figure), and each photosensitive device 110 is electrically connected to the plurality of pixel driving circuits 100. Considering that the display panel 2240 may further include a touch layer 15 and a circular polarizer 16, in order to improve the light sensing sensitivity of the photosensitive device 110, the photosensitive layer 17 is provided on a side of the circular polarizer 16 away from the substrate 2241. In this way, the external ambient light passes through the glass cover plate 18 and irradiates on the photosensitive layer 17, reducing the light flux loss irradiated on the photosensitive device 110 and improving the induction efficiency and sensitivity of the photosensitive device 110.

[0088] In some examples, the display module 2200 has a light-transmitting area (not shown in the figure), and at least one photosensitive device 110 is provided in the light-transmitting area, and the light-transmitting area can transmit the external ambient light to the photosensitive device 110.

[0089] It can be understood that in the case where a pixel driving circuit 100 adjusts the brightness of the light-emitting device 200 in response to the photosensitive device 110, the processor 2211 can obtain the potential flowing through the photosensitive device 110 and perform information processing to adjust the brightness of the light-emitting device 200 in the entire display area AA. The present disclosure does not specifically limit the information interaction manner between the processor 2211 and the pixel driving circuit 100 having the photosensitive device 110.

[0090] For example, the light-transmitting area is an opening (not shown in the figure) on the border 2101, exposing the photosensitive device 110 to facilitate the photosensitive device 110 to sense light.

[0091] Or, the light-transmitting area is located in the peripheral area BB of the display panel 2240. For example, the light-transmitting area is located at a position close to the camera (not shown in the figure) of the display device 2000, avoiding the influence of the photosensitive device 110 on the aperture ratio of the display area AA.

[0092] Or, the light-transmitting area is located in the display area AA of the display panel 2240. For example, the light-transmitting area is the entire display area AA. In this way, the photosensitive layer 17 includes a plurality of photosensitive devices 110, and each pixel driving circuit 100 is electrically connected to one photosensitive device 110 to improve the light sensing efficiency.

[0093] Based on this, please refer to Figures 7 - 21 As shown in the figure, some embodiments of the present disclosure provide a pixel driving circuit 100.

[0094] As Figure 7As shown, the pixel driving circuit 100 includes a photosensitive device 110 and a dimming sub-circuit 120. The first end of the photosensitive device 110 is configured to receive a control signal Ctl, and the second end of the photosensitive device 110 is electrically connected to the first node N1. Among them, the control signal Ctl is various signals output by the control terminal OP. For example, Figures 9A - 21 As shown, the control signal Ctl can be some original signals in the multiplexed pixel driving circuit 100, such as the em signal, vinit signal, vdd signal, gate signal, reset signal; it can also be the voltage signals of some nodes in the multiplexed pixel driving circuit 100, such as the voltage signal of the second node N2, the voltage signal of the third node N3, and the voltage signal of the fourth node N4. The control signal Ctl does not affect the driving process of the pixel driving circuit 100, and it is only necessary to make the light-emitting device 200 emit light normally during the process of the pixel driving circuit 100 driving the light-emitting device 200 to emit light. Among them, the second node N2, the third node N3, and the fourth node N4 are equivalent circuit nodes in the pixel driving circuit 100.

[0095] The resistance of the photosensitive device 110 changes with the change of the light intensity irradiated on the photosensitive device 110. The photosensitive device 110 is configured to adjust the voltage of the first node N1 based on the control signal Ctl. Exemplarily, as Figure 8A shown, the resistance of the photosensitive device 110 increases with the increase of the light intensity irradiated on the photosensitive device 110, the voltage and current flowing through the photosensitive device 110 decrease, that is, the potential of the first node N1 decreases with the increase of the light intensity irradiated on the photosensitive device 110, so as to control the conduction state of the dimming sub-circuit 120. Or, as Figure 8B shown, the resistance of the photosensitive device 110 decreases with the increase of the light intensity irradiated on the photosensitive device 110, the voltage and current flowing through the photosensitive device 110 increase, that is, the potential of the first node N1 increases with the increase of the light intensity irradiated on the photosensitive device 110, so as to control the conduction state of the dimming sub-circuit 120. The characteristics of the photosensitive device 110 are related to the material of the photosensitive device 110, and the limit potential of the first node N1 (that is, the potential of the control signal Ctl transmitted to the first node N1 when the resistance value of the photosensitive device 110 is the largest and the smallest) can control the dimming sub-circuit 120 to conduct, and transmit at least part of the first voltage signal vdd of the first voltage terminal VDD to the light-emitting device 200 to make the light-emitting device 200 emit light.

[0096] Exemplarily, the photosensitive device 110 includes one or more of a photoresistor RG, a photodiode, and a phototransistor, and is selected and set according to the requirement of adjusting the voltage of the first node N1. As Figures 9A - 21 shown, taking the photosensitive device 110 as a photoresistor RG as an example for illustration.

[0097] The above-mentioned first node N1 is electrically connected to the photon dimming circuit 120, and the photon dimming circuit 120 is connected between the first voltage terminal VDD and the light-emitting device 200. In this way, under the control of the potential of the first node N1, the conduction state of the photon dimming circuit 120 changes with the change of the voltage of the first node N1, so as to adjust the brightness of the light-emitting device 200 based on the first voltage signal vdd from the first voltage terminal VDD under the control of the voltage of the first node N1.

[0098] Exemplarily, when the potential of the first node N1 increases and the conduction degree of the photon dimming circuit 120 increases, the voltage (and current) of the first voltage signal vdd transmitted to the light-emitting device 200 increases, and the brightness of the light-emitting device 200 increases.

[0099] Also exemplarily, when the potential of the first node N1 decreases and the conduction degree of the photon dimming circuit 120 decreases, the voltage (and current) of the first voltage signal vdd transmitted to the light-emitting device 200 decreases, and the brightness of the light-emitting device 200 weakens.

[0100] In this way, the pixel driving circuit 100 realizes automatic adjustment of the brightness of the light-emitting device 200 through the photosensitive device 110 and the photon dimming circuit 120 electrically connected thereto, without information interaction with an additionally provided dimming element, reducing the complexity of the circuit structure.

[0101] The above-mentioned light-emitting device 200 can be a diode with self-luminous characteristics such as OLED, QLED, and LED. Those skilled in the art can select and set according to actual needs.

[0102] As Figures 9A - 21 shown, the pixel driving circuit 100 further includes a driving transistor TD. The control electrode of the driving transistor TD is electrically connected to the second node N2, the first electrode of the driving transistor TD is electrically connected to the third node N3, and the second electrode of the driving transistor TD is electrically connected to the fourth node N4.

[0103] In some embodiments, as Figure 9A 、 Figure 10 、 Figure 11 and Figures 14 - 21 shown, the photon dimming circuit 120 includes a first transistor T1, the first transistor T1 is connected between the fourth node N4 and the light-emitting device 200, and the control electrode of the first transistor T1 is electrically connected to the first node N1.

[0104] In other embodiments, as Figure 9B 、 Figure 12 and Figure 13 shown, the photon dimming circuit 120 includes a first transistor T1, the first transistor T1 is connected between the first voltage terminal VDD and the third node N3, and the control electrode of the first transistor T1 is electrically connected to the first node N1.

[0105] In the above two embodiments, the pixel driving circuit 100 includes a driving transistor TD and a dimming sub-circuit 120 connected in series between the first voltage terminal VDD and the light-emitting device 200. The driving transistor TD and the dimming sub-circuit 120 cooperate to control the light-emitting device 200 to emit light. Among them, the relative positional relationship between the dimming sub-circuit 120 and the driving transistor TD does not affect the control of the conduction state of the dimming sub-circuit 120 by the potential of the first node N1, and can be adjusted according to the actual situation.

[0106] In some embodiments, as Figures 9A - 21 shown, the pixel driving circuit 100 further includes a capacitor Cst, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a seventh transistor T7. The first electrode plate of the capacitor Cst is electrically connected to the first voltage terminal VDD, and the second electrode plate of the capacitor Cst is electrically connected to the second node N2. The control electrode of the fourth transistor T4 is electrically connected to the scan signal terminal Gate, the first pole of the fourth transistor T4 is electrically connected to the data signal terminal, and the second pole of the fourth transistor T4 is electrically connected to the third node N3. The control electrode of the fifth transistor T5 is electrically connected to the scan signal terminal Gate, the first pole of the fifth transistor T5 is electrically connected to the fourth node N4, and the second pole of the fifth transistor T5 is electrically connected to the second node N2. The control electrode of the sixth transistor T6 is electrically connected to the reset signal terminal Reset, the first pole of the sixth transistor T6 is electrically connected to the initialization signal terminal Vinit, and the second pole of the sixth transistor T6 is connected to the second node N2. The control electrode of the seventh transistor T7 is electrically connected to the scan signal terminal Gate, the first pole of the seventh transistor T7 is electrically connected to the initialization signal terminal Vinit, and the second pole of the seventh transistor T7 is electrically connected to the light-emitting device 200.

[0107] Exemplarily, the following combines Figure 22 the timing of the output signals of the enable signal terminal EM, the scan signal terminal Gate, and the reset signal terminal Reset shown in the figure to exemplarily illustrate the working process of the pixel driving circuit 100. In the following description, the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 in the pixel driving circuit 100 are P-type transistors, and the first voltage signal vdd transmitted by the first voltage terminal VDD is a high-level signal, and the second voltage signal vss transmitted by the second voltage terminal VSS is a low-level signal as an example for description. Those skilled in the art should understand that in the above pixel driving circuit 100, when the line between the first voltage signal terminal VDD and the second voltage signal terminal VSS is conducting, the light-emitting device 200 emits light. Among them, the photosensitive device 110 only affects the conduction state of the dimming sub-circuit 120, that is, the potential value of the dimming sub-circuit 120 transmitting the first voltage signal vdd to the light-emitting device 200 changes with the change of the light intensity irradiated on the photosensitive device 110.

[0108] During one frame period, the driving process of the pixel driving circuit 100 may include a first stage P1, a second stage P2, and a third stage P3. Exemplarily, in the following description, "0" represents a low level and "1" represents a high level.

[0109] In the first stage P1, EM = 1, Reset = 0, Gate = 1.

[0110] In this case, the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are all turned off. The sixth transistor T6 is turned on, and the initialization signal vinit from the initialization signal terminal Vinit is transmitted to the second node N2 to initialize the storage capacitor Cst and the control electrode of the driving transistor TD.

[0111] Moreover, the dimming sub - circuit 120 is turned off, the line between the first voltage terminal VDD and the second voltage terminal VSS is open - circuited, and the light - emitting device 200 does not emit light.

[0112] In the second stage P2, EM = 1, Reset = 1, Gate = 0.

[0113] In this case, the fourth transistor T4 and the fifth transistor T5 are turned on, and the sixth transistor T6 is turned off. The data signal vdata from the data signal terminal Vdata is written into the capacitor Cst, and the threshold voltage of the driving transistor TD is written into the capacitor Cst. At this time, the potential of the second node N2 is vdata + Vth.

[0114] The seventh transistor T7 is turned on, and the initialization signal vinit from the initialization signal terminal Vinit is transmitted to the anode of the light - emitting device 200 to initialize the light - emitting device 200.

[0115] Moreover, the dimming sub - circuit 120 is turned off, the line between the first voltage terminal VDD and the second voltage terminal VSS is open - circuited, and the light - emitting device 200 does not emit light.

[0116] In the third stage P3, EM = 0, Reset = 1, Gate = 1.

[0117] In this case, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are all turned off, the capacitor Cst discharges, the second node N2 maintains a low potential (vdata + Vth), and the driving transistor TD is turned on.

[0118] Moreover, when the dimming sub - circuit 120 is turned on, the line between the first voltage terminal VDD and the second voltage terminal VSS is a conducting path, and the light - emitting device 200 emits light. Among them, the potential of the third node N3 is vdd. When the driving transistor TD is turned on, that is, when Vdata + Vth - Vdd>Vth, the potential of the fourth node N4 is a high potential.

[0119] It can be understood that when the driving transistor TD is a P - type transistor, Vth<0. When the driving transistor TD is an N - type transistor, Vth>0.

[0120] From the above description of the pixel driving circuit 100, in the third stage P3 within a frame period, the pixel driving circuit 100 controls the light - emitting device 200 to emit light, and potential signals are output from the enable signal terminal EM, the scan signal terminal Gate, the reset signal terminal Reset, the initialization signal terminal Vinit, the first voltage terminal VDD, the second voltage terminal VSS, the second node N2, the third node N3, and the fourth node N4 in the pixel driving circuit 100. Based on this, the number and type of transistors in the dimming sub - circuit 120 are set to realize the normal driving process of the pixel driving circuit 100 for initializing the capacitor Cst in the first stage P1, writing data into the capacitor Cst in the second stage P2, and making the light - emitting device 200 emit light in the third stage P3.

[0121] In the following embodiments, as Figures 9A - 21 shown, according to the different control signals Ctl received by the first end of the photosensitive device 110 (that is, the first end of the photosensitive device 110 is electrically connected to different signal terminals or nodes), the specific structure of the dimming sub - circuit 120 is described in detail.

[0122] Taking the dimming sub - circuit 120 including two transistors as an example for illustration. As Figures 9A - 13 shown, the dimming sub - circuit 120 includes a first transistor T1 and a second transistor T2.

[0123] In some embodiments, the connection relationship of the first transistor T1 and the second transistor T2 is as Figure 9A 、 Figure 10 、 Figure 11 shown. The control electrode of the first transistor T1 is electrically connected to the first node N1, the first pole of the first transistor T1 is electrically connected to the fourth node N4, and the second pole of the first transistor T1 is electrically connected to the light - emitting device 200. The control electrode of the second transistor T2 is electrically connected to the first node N1 or the enable signal terminal EM, the first pole of the second transistor T2 is electrically connected to the first voltage terminal VDD, and the second pole of the second transistor T2 is electrically connected to the third node N3.

[0124] In some examples, as Figure 9A and Figure 10As shown, the first end of the photosensitive device 110 is electrically connected to the enable signal terminal EM, and the control signal Ctl received by the first end of the photosensitive device 110 is the enable signal em.

[0125] Exemplarily, as Figure 9A shown, in this case, in the photon modulation circuit 120, the control electrodes of the first transistor T1 and the second transistor T2 are both electrically connected to the first node N1; the first pole of the second transistor T2 is electrically connected to the first voltage terminal VDD, and the second pole of the second transistor T2 is electrically connected to the third node N3; the first pole of the first transistor T1 is electrically connected to the fourth node N4, and the second pole of the first transistor T1 is electrically connected to the light-emitting device 200.

[0126] In this way, the enable signal em output from the enable signal terminal EM flows through the photosensitive device 110 to the first node N1. Under the control of the potential of the first node N1, the conduction degrees of both the first transistor T1 and the second transistor T2 in the photon modulation circuit 120 change. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, and the brightness of the light-emitting device 200 is adjusted.

[0127] Exemplarily, as Figure 10 shown, in this case, the control electrode of the first transistor T1 in the photon modulation circuit 120 is electrically connected to the first node N1, the first pole of the first transistor T1 is electrically connected to the fourth node N4, and the second pole of the first transistor T1 is electrically connected to the light-emitting device 200. The control electrode of the second transistor T2 is electrically connected to the enable signal terminal EM, the first pole of the second transistor T2 is electrically connected to the first voltage terminal VDD, and the second pole of the second transistor T2 is electrically connected to the third node N3.

[0128] In this way, the enable signal em output from the enable signal terminal EM flows through the photosensitive device 110 to the first node N1. Under the control of the potential of the first node N1, the conduction degree of the first transistor T1 in the photon modulation circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, that is, the magnitude of the potential of the fourth node N4 transmitted to the light-emitting device 200 is controlled to adjust the brightness of the light-emitting device 200.

[0129] In some other examples, as Figure 11 shown, the first end of the photosensitive device 110 is electrically connected to the scan signal terminal Gate, the control signal Ctl received by the first end of the photosensitive device 110 is the scan signal gate, and the second end of the photosensitive device 110 is electrically connected to the first node N1.

[0130] The control electrode of the first transistor T1 of the photon modulation circuit 120 is electrically connected to the first node N1, the first electrode of the first transistor T1 is electrically connected to the fourth node N4, and the second electrode of the first transistor T1 is electrically connected to the light-emitting device 200. The control electrode of the second transistor T2 is electrically connected to the enable signal terminal EM, the first electrode of the second transistor T2 is electrically connected to the first voltage terminal VDD, and the second electrode of the second transistor T2 is electrically connected to the third node N3.

[0131] In this way, the scan signal gate output from the scan signal terminal Gate flows through the photosensitive resistor RG to the first node N1. Under the control of the potential of the first node N1, the conduction degree of the first transistor T1 of the photon modulation circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, that is, the magnitude of the potential of the fourth node N4 transmitted to the light-emitting device 200 is controlled to adjust the brightness of the light-emitting device 200.

[0132] In some other embodiments, the photon modulation circuit 120 includes a first transistor T1 and a second transistor T2, and the connection relationship of the first transistor T1 and the second transistor T2 is as Figure 9B , Figure 12 and Figure 13 shown. The control electrode of the first transistor T1 is electrically connected to the first node N1, the first electrode of the first transistor T1 is electrically connected to the first voltage terminal VDD, and the second electrode of the first transistor T1 is electrically connected to the third node N3. The control electrode of the second transistor T2 is electrically connected to the enable signal terminal EM, the first electrode of the second transistor T2 is electrically connected to the fourth node N4, and the second electrode of the second transistor T2 is electrically connected to the light-emitting device 200.

[0133] In some examples, please continue to refer to Figure 9B , Figure 12 and Figure 13 , the first end of the photosensitive device 110 is electrically connected to the enable signal terminal EM or the scan signal terminal Gate.

[0134] Exemplarily, as Figure 12 shown, the first end of the photosensitive device 110 is electrically connected to the enable signal terminal EM, the control signal Ctl received by the first end of the photosensitive device 110 is the enable signal em, and the second end of the photosensitive device 110 is electrically connected to the first node N1.

[0135] The control electrode of the first transistor T1 of the photon modulation circuit 120 is electrically connected to the first node N1, the first electrode of the first transistor T1 is electrically connected to the first voltage terminal VDD, and the second electrode of the first transistor T1 is electrically connected to the third node N3. The control electrode of the second transistor T2 is electrically connected to the enable signal terminal EM, the first electrode of the second transistor T2 is electrically connected to the fourth node N4, and the second electrode of the second transistor T2 is electrically connected to the light-emitting device 200.

[0136] In this way, the enable signal em output from the enable signal terminal EM flows through the photosensitive device 110 to the first node N1. Under the control of the potential of the first node N1, the conduction degree of the first transistor T1 of the photon modulation circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the third node N3 is controlled to adjust the brightness of the light-emitting device 200.

[0137] Exemplarily, as Figure 13 shown, the first end of the photosensitive resistor RG is electrically connected to the scan signal terminal Gate, and the control signal Ctl received by the first end of the photosensitive resistor RG is the scan signal gate. The second end of the photosensitive resistor RG is electrically connected to the first node N1.

[0138] The control electrode of the first transistor T1 of the photon modulation circuit 120 is electrically connected to the first node N1. The first pole of the first transistor T1 is electrically connected to the first voltage terminal VDD, and the second pole of the first transistor T1 is electrically connected to the third node N3. The control electrode of the second transistor T2 is electrically connected to the enable signal terminal EM. The first pole of the second transistor T2 is electrically connected to the fourth node N4, and the second pole of the second transistor T2 is electrically connected to the light-emitting device 200.

[0139] In this way, the scan signal gate output from the scan signal terminal Gate flows through the photosensitive resistor RG to the first node N1. Under the control of the potential of the first node N1, the conduction degree of the first transistor T1 of the photon modulation circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the third node N3 is controlled to adjust the brightness of the light-emitting device 200 by adjusting the potential magnitude of the third node N3.

[0140] Taking the photon modulation circuit 120 including three transistors as an example for illustration. As Figures 14 - 21 shown, the photon modulation circuit 120 includes a first transistor T1, a second transistor T2, and a third transistor T3.

[0141] In some embodiments, the connection relationship of the first transistor T1, the second transistor T2, and the third transistor T3 is as Figures 14 - 21 shown. The control electrode of the second transistor T2 is electrically connected to the enable signal terminal EM. The first pole of the second transistor T2 is electrically connected to the first voltage terminal VDD, and the second pole of the second transistor T2 is electrically connected to the third node N3. The third transistor T3 is connected in series with the first transistor T1 between the fourth node N4 and the light-emitting device 200. The control electrode of the third transistor T3 is electrically connected to the enable signal terminal EM.

[0142] Exemplarily, as Figures 14 - 21As shown, the control electrode of the third transistor T3 is electrically connected to the enable signal terminal EM, the first electrode of the third transistor T3 is electrically connected to the fourth node N4, and the second electrode of the third transistor T3 is electrically connected to the first electrode of the first transistor T1. The control electrode of the first transistor T1 is electrically connected to the first node N1, and the second electrode of the first transistor T1 is electrically connected to the light-emitting device 200. Among them, the light-emitting device 200 is electrically connected to the second voltage terminal VSS.

[0143] Considering the connection relationship between the second transistor T2 and the third transistor T3 to realize the normal driving process of the pixel driving circuit 100, in this way, for the photosensitive resistor RG electrically connected to the control electrode of the first transistor T1, its first end can be electrically connected to any one of the enable signal terminal EM, the scan signal terminal Gate, the reset signal terminal Reset, the initialization signal terminal Vinit, the first voltage terminal VDD, the second voltage terminal VSS, the second node N2, the third node N3 or the fourth node N4.

[0144] In some examples, such as Figure 14 As shown, the first end of the photosensitive resistor RG is electrically connected to the scan signal terminal Gate, and the control signal Ctl received by the first end of the photosensitive resistor RG is the scan signal gate. As Figure 22 As shown, the scan signal gate output by the scan signal terminal Gate outputs a high-level signal during the light-emitting stage P3.

[0145] In this way, the scan signal gate output by the scan signal terminal Gate flows through the photosensitive resistor RG to the first node N1. Under the control of the potential of the first node N1, the conduction degree of the first transistor T1 of the photon modulation circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, that is, the magnitude of the potential from the second electrode of the third transistor T3 transmitted to the light-emitting device 200 is controlled to adjust the brightness of the light-emitting device 200.

[0146] In some examples, such as Figure 15 As shown, the first end of the photosensitive resistor RG is electrically connected to the reset signal terminal Reset, and the control signal Ctl received by the first end of the photosensitive resistor RG is the reset signal reset. As Figure 22 As shown, the reset signal reset output by the reset signal terminal Reset outputs a low-level signal during the light-emitting stage P3.

[0147] In this way, the reset signal reset output from the reset signal terminal Reset flows through the photosensitive resistor RG to the first node N1. Under the control of the potential of the first node N1, the conduction degree of the first transistor T1 of the photon adjustment circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, that is, the potential from the second pole of the third transistor T3 transmitted to the light-emitting device 200 is controlled to adjust the brightness of the light-emitting device 200.

[0148] In some examples, such as Figure 16 As shown, the first end of the photosensitive resistor RG is connected to the initialization signal terminal Vinit, and the control signal Ctl received by the first end of the photosensitive resistor RG is the initial signal vinit. The initial signal vinit is a constant low-level signal.

[0149] In this way, the initial signal vinit output from the initialization signal terminal Vinit flows through the photosensitive resistor RG to the first node N1. Under the control of the potential of the first node N1, the conduction degree of the first transistor T1 of the photon adjustment circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, that is, the potential from the second pole of the third transistor T3 transmitted to the light-emitting device 200 is controlled to adjust the brightness of the light-emitting device 200.

[0150] In some examples, such as Figure 17 As shown, the first end of the photosensitive resistor RG is electrically connected to the first voltage terminal VDD, and the control signal Ctl received by the first end of the photosensitive resistor RG is the first voltage signal vdd. The first voltage signal vdd is a constant high-level signal.

[0151] In this way, the first voltage signal vdd output from the first voltage terminal VDD flows through the photosensitive resistor RG to the first node N1. Under the control of the potential of the first node N1, the conduction degree of the first transistor T1 of the photon adjustment circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, that is, the potential from the second pole of the third transistor T3 transmitted to the light-emitting device 200 is controlled to adjust the brightness of the light-emitting device 200.

[0152] In some examples, such as Figure 18 As shown, the first end of the photosensitive resistor RG is electrically connected to the second voltage terminal VSS, and the control signal Ctl received by the first end of the photosensitive resistor RG is the second voltage signal vss. The second voltage signal vss is a constant low-level signal.

[0153] In this way, the second voltage signal vss output from the second voltage terminal VSS flows through the photosensitive resistor RG to the first node N1. Under the control of the potential at the first node N1, the conduction degree of the first transistor T1 of the photon modulation circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, that is, the potential at the second pole of the third transistor T3 transmitted to the light-emitting device 200 is controlled to adjust the brightness of the light-emitting device 200.

[0154] In some examples, as Figure 19 shown, the first end of the photosensitive resistor RG is electrically connected to the second node N2, and the control signal Ctl received by the first end of the photosensitive resistor RG is the potential of the second node N2, that is, vdata + Vth. The second node N2 is a low-level signal.

[0155] In this way, the potential of the second node N2 flows through the photosensitive resistor RG to the first node N1. Under the control of the potential at the first node N1, the conduction degree of the first transistor T1 of the photon modulation circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, that is, the potential at the second pole of the third transistor T3 transmitted to the light-emitting device 200 is controlled to adjust the brightness of the light-emitting device 200.

[0156] In some examples, as Figure 20 shown, the first end of the photosensitive resistor RG is electrically connected to the third node N3, and the control signal Ctl received by the first end of the photosensitive resistor RG is the potential of the third node N3, that is, in the third stage P3, the first voltage signal vdd transmitted from the first voltage terminal VDD to the third node N3. The potential of the third node N3 is a high-level signal.

[0157] In this way, the potential of the third node N3 flows through the photosensitive resistor RG to the first node N1. Under the control of the potential at the first node N1, the conduction degree of the first transistor T1 of the photon modulation circuit 120 changes. Thus, the magnitude of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, that is, the potential at the second pole of the third transistor T3 transmitted to the light-emitting device 200 is controlled to adjust the brightness of the light-emitting device 200.

[0158] In some examples, as Figure 21 shown, the first end of the photosensitive resistor RG is electrically connected to the fourth node N4, and the control signal Ctl received by the first end of the photosensitive resistor RG is the potential of the fourth node N4, that is, in the third stage P3, the potential of the fourth node N4 is a high-level signal.

[0159] In this way, the potential of the fourth node N4 flows through the photosensitive resistor RG to the first node N1. Under the control of the potential of the first node N1, the conduction degree of the first transistor T1 of the photon adjustment circuit 120 changes. Thus, the size of the first voltage signal vdd from the first voltage terminal VDD transmitted to the light-emitting device 200 is controlled, that is, the size of the potential transmitted from the second pole of the third transistor T3 to the light-emitting device 200 is controlled to adjust the brightness of the light-emitting device 200.

[0160] From the types of the first transistors T1 set by the different signal terminals or nodes connected to the first end of the photosensitive resistor RG in the above embodiments, it can be seen that in some examples, such as Figure 11 、 Figure 13 、 Figure 14 、 Figure 17 、 Figure 20 and Figure 21 shown, when the first end of the photosensitive resistor RG is electrically connected to any one of the first voltage terminal VDD, the scan signal terminal Gate, the third node N3, and the fourth node N4, the polarity of the first transistor T1 is opposite to the polarities of the driving transistor TD, the second transistor T2, and the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7. Among them, when the photon adjustment circuit 120 further includes a third transistor T3, the polarity of the first transistor T3 is also opposite to the polarity of the third transistor T3.

[0161] For example, as Figure 11 and Figure 13 shown, when the photon adjustment circuit 120 includes the first transistor T1 and the second transistor T2, and the driving transistor TD, the second transistor T2, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are all P-type transistors, then the first transistor T1 is an N-type transistor. And, as Figure 14 、 Figure 17 、 Figure 20 and Figure 21 shown, when the photon adjustment circuit 120 further includes a third transistor T3, and the driving transistor TD, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are all P-type transistors, then the first transistor T1 is an N-type transistor.

[0162] In some other examples, such as Figure 9A 、 Figure 9B 、 Figure 10 、 Figure 12 、 Figure 15 、 Figure 16 、 Figure 18 and Figure 19As shown, when the first end of the photosensitive device 120 is electrically connected to any one of the enable signal terminal EM, the reset signal terminal Reset, the initialization signal terminal Vinit, the second voltage terminal VSS, and the second node N2, the polarity of the first transistor T1 is the same as that of the driving transistor TD, the second transistor T2, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7; when the photon modulation sub-circuit 120 further includes a third transistor T3, the polarity of the first transistor T3 is also the same as that of the third transistor T3.

[0163] Exemplarily, as Figure 9A 、 Figure 9B 、 Figure 10 、 Figure 12 shown, when the photon modulation sub-circuit 120 includes the first transistor T1 and the second transistor T2, and the driving transistor TD, the second transistor T2, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are all P-type transistors, then the first transistor T1 is a P-type transistor. And, as Figure 15 、 Figure 16 、 Figure 18 and Figure 19 shown, when the photon modulation sub-circuit 120 further includes a third transistor T3, and the driving transistor TD, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are all P-type transistors, then the first transistor T1 is a P-type transistor.

[0164] In the description of this specification, specific features, structures, materials, or characteristics may be combined in a suitable manner in any one or more embodiments or examples.

[0165] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application, thinking of changes or substitutions, should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A pixel driving circuit, characterized in that Comprising: A photosensitive device, a first end of the photosensitive device being configured to receive a control signal, and a second end of the photosensitive device being electrically connected to a first node; Ambient light is transmitted to the photosensitive device, a resistance of the photosensitive device changing with a change in an illumination intensity of light irradiated on the photosensitive device, and the photosensitive device being configured to adjust a voltage of the first node based on the control signal; A photon adjustment circuit, connected between a first voltage terminal and a light emitting device and electrically connected to the first node; a conduction state of the photon adjustment circuit changing with a change in the voltage of the first node, and the photon adjustment circuit being configured to adjust a brightness of the light emitting device based on a first voltage signal from the first voltage terminal under the control of the voltage of the first node; A driving transistor, a control electrode of the driving transistor being electrically connected to a second node, a first pole of the driving transistor being electrically connected to a third node, and a second pole of the driving transistor being electrically connected to a fourth node; The photon adjustment circuit includes a first transistor, connected between the fourth node and the light emitting device, and a control electrode of the first transistor being electrically connected to the first node.

2. The pixel driving circuit according to claim 1, wherein The first end of the photosensitive device is electrically connected to an enable signal terminal; The photon adjustment circuit further includes a second transistor, a control electrode of the second transistor being electrically connected to the first node or the enable signal terminal, a first pole of the second transistor being electrically connected to the first voltage terminal, and a second pole of the second transistor being electrically connected to the third node.

3. The pixel driving circuit according to claim 1, wherein The first end of the photosensitive device is electrically connected to a scan signal terminal; The photon adjustment circuit further includes a second transistor, a control electrode of the second transistor being electrically connected to an enable signal terminal, a first pole of the second transistor being electrically connected to the first voltage terminal, and a second pole of the second transistor being electrically connected to the third node.

4. The pixel driving circuit according to claim 1, characterized in that, The first end of the photosensitive device is electrically connected to any one of an enable signal terminal, a scan signal terminal, a reset signal terminal, an initialization signal terminal, the first voltage terminal, a second voltage terminal, the second node, the third node, or the fourth node; wherein, the light emitting device is electrically connected to the second voltage terminal; The photon adjustment circuit further includes a second transistor and a third transistor; A control electrode of the second transistor is electrically connected to an enable signal terminal, a first pole of the second transistor is electrically connected to the first voltage terminal, and a second pole of the second transistor is electrically connected to the third node; A control electrode of the third transistor is electrically connected to the enable signal terminal, the third transistor is connected between the fourth node and the light emitting device, and the third transistor is connected in series with the first transistor.

5. The pixel driving circuit according to claim 1, wherein Further comprising: A driving transistor, a control electrode of the driving transistor being electrically connected to a second node, a first pole of the driving transistor being electrically connected to a third node, and a second pole of the driving transistor being electrically connected to a fourth node; The photon adjustment circuit includes a first transistor, a control electrode of the first transistor being electrically connected to the first node, a first pole of the first transistor being electrically connected to the first voltage terminal, and a second pole of the first transistor being electrically connected to the third node.

6. The pixel driving circuit according to claim 5, wherein The first end of the photosensitive device is electrically connected to the enable signal terminal or the scan signal terminal; The dimming sub-circuit further includes a second transistor, the control electrode of the second transistor is electrically connected to the enable signal terminal, the first electrode of the second transistor is electrically connected to the fourth node, and the second electrode of the second transistor is electrically connected to the light-emitting device.

7. The pixel driving circuit according to any one of claims 2, 3, 4, and 6, wherein Further included are: A capacitor, the first electrode plate of the capacitor is electrically connected to the first voltage terminal, and the second electrode plate of the capacitor is electrically connected to the second node; A fourth transistor, the control electrode of the fourth transistor is electrically connected to the scan signal terminal, the first electrode of the fourth transistor is electrically connected to the data signal terminal, and the second electrode of the fourth transistor is electrically connected to the third node; A fifth transistor, the control electrode of the fifth transistor is electrically connected to the scan signal terminal, the first electrode of the fifth transistor is electrically connected to the fourth node, and the second electrode of the fifth transistor is electrically connected to the second node; A sixth transistor, the control electrode of the sixth transistor is electrically connected to the reset signal terminal, the first electrode of the sixth transistor is electrically connected to the initialization signal terminal, and the second electrode of the sixth transistor is electrically connected to the second node; A seventh transistor, the control electrode of the seventh transistor is electrically connected to the scan signal terminal, the first electrode of the seventh transistor is electrically connected to the initialization signal terminal, and the second electrode of the seventh transistor is electrically connected to the light-emitting device.

8. The pixel driving circuit according to claim 7, wherein When the first end of the photosensitive device is electrically connected to any one of the first voltage terminal, the scan signal terminal, the third node, and the fourth node, the polarity of the first transistor is opposite to the polarities of the driving transistor, the second transistor, and the fourth transistor to the seventh transistor; when the dimming sub-circuit further includes a third transistor, the polarity of the first transistor is also opposite to the polarity of the third transistor; When the first end of the photosensitive device is electrically connected to any one of the enable signal terminal, the initialization signal terminal, the second voltage terminal, and the second node, the polarity of the first transistor is the same as the polarities of the driving transistor, the second transistor, the fourth transistor to the seventh transistor; when the dimming sub-circuit further includes a third transistor, the polarity of the first transistor is also the same as the polarity of the third transistor.

9. A display module, characterized in that, Including: A substrate; Multiple pixel driving circuits according to any one of claims 1 to 8, disposed on the substrate; Multiple light-emitting devices, disposed on a side of the multiple pixel driving circuits away from the substrate, and the light-emitting devices are electrically connected to the pixel driving circuits.

10. The display module according to claim 9, wherein The display module has a light-transmitting area, at least one of the photosensitive devices is disposed in the light-transmitting area, and each photosensitive device is electrically connected to multiple pixel driving circuits.

11. The display module according to claim 9, wherein, Further included are: A photosensitive layer, disposed on a side of the multiple pixel driving circuits away from the substrate, the photosensitive layer includes multiple photosensitive devices, and each photosensitive device is electrically connected to one or more pixel driving circuits.

12. The display module according to claim 9, wherein Further included are: A flip-chip thin film, electrically connected to a plurality of the pixel driving circuits; A flexible circuit board, electrically connected to the flip-chip thin film; at least one of the photosensitive devices is disposed on one surface of the flexible circuit board, and when the flexible circuit board is bent to the backlight side of the substrate, the photosensitive device is closer to the substrate relative to the flexible circuit board; Wherein, each of the photosensitive devices is electrically connected to a plurality of the pixel driving circuits.

13. A display device, characterized in that, It includes a display module according to any one of claims 9 to 12, and a housing.

14. An intelligent watch, characterized in that, It includes a display module according to any one of claims 9 to 12, and a support member.

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