Packaged electronic system formed from electrically connected and electrically isolated dies
By using an insulating organic substrate and a capacitive coupling structure that buries conductive areas in the electronic system package, the problems of current isolation and crosstalk in high-voltage applications are solved, achieving current transmission with high isolation and low parasitic components, thus improving system performance.
Patent Information
- Application Number
- CN202210092662.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2022-01-20
- Filing Date
- 2022-01-26
- Publication Date
- 2026-02-06
- Estimated Expiration
- 2042-01-26
AI Technical Summary
Existing electronic system packaging methods struggle to achieve flexible current isolation in high-voltage and high-power applications, suffer from crosstalk issues caused by parasitic components, and the use of high capacitance increases system power consumption and reduces communication bandwidth.
The support structure is formed from an insulating organic substrate and includes buried conductive areas. Current transfer between the dies is achieved through capacitive coupling. Electrical connections are made using a multilayer structure and contact structure. The package encapsulates the dies and interconnects to provide high isolation and low parasitic components.
It achieves high isolation levels of current transmission under high voltage, reduces the influence of parasitic components, improves system flexibility and communication bandwidth, and simplifies the manufacturing process.
Smart Images

Figure CN114823637B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present invention relates to a packaged electronic system formed by electrically connecting and electrically isolating dies. BACKGROUND
[0002] Electronic systems in which the dies are packaged in a package and in which the integrated electronic devices (components and / or circuits) are configured to work at very different voltages and exchange signals with each other. For example, the electronic system can be a power supply system, a digital isolator, a power transistor driving system, a DC-DC converter or other systems in which at least one device works at high voltage (even higher than 10 kv) and / or high power. For these systems, measures are known which maintain the appropriate isolation current between the various devices.
[0003] In particular, the packages dedicated to providing high isolation levels are mainly based on two methods:
[0004] the two-die method, in which two dies each integrate a respective "functional" device and a respective (capacitive or inductive) isolation element, and the two isolation elements are connected together; and
[0005] the three-die method, which includes an isolation device integrated in a die connected to two "functional" devices (for example, two other dies).
[0006] For example, the two-die method is shown in the present disclosure Figure 1 and Figure 2 In this case, the package 5 of resin or other insulating material encloses the system, which includes two dies 8, 9 that integrate a respective electronic circuit 10 and a respective isolation element 11. For example, the circuit 10 can be an ASIC (Application Specific Integrated Circuit); or one or both circuits 10 can integrate a single electronic component and / or be formed by different circuits.
[0007] The circuit 10 is connected to the respective isolation element 11 by buried or surface connections (not shown); the isolation elements 11 in the dies 8, 9 are connected by a connection wire 12.
[0008] The dies 8, 9 are each fixed on a respective support element 15, which is part of a lead frame for connecting the different terminals of the circuit 10 to the outside in a manner known per se. Bonding wires 16 connect the terminals of the circuit 10 to the respective lead frame 15, and the package 5 embeds the dies 8, 9, the wires 12, 16 and part of the lead frame 15, in order to electrically isolate them and protect them from the external environment.
[0009] For parasitic components, the dual-die approach is essentially robust, since the connection lines 12 are only a few, short and arranged in a less critical position (downstream of the isolation component 11), but in some applications the dual-die approach can be far less flexible. In fact, the designer has only few degrees of freedom in the design of the isolation component, limited by the circuit 10 manufacturing technology and platform. In particular, with this approach, when the circuits 10 of the dies 8, 9 are manufactured using different technologies, the designer is not always able to use the most advanced methods and knowledge, and often cannot use the same isolation component.
[0010] For example, in Figure 3 and Figure 4 The triple-die approach is shown, for example, in
[0011] The first circuit 26 is connected to the isolation component 31 through a first connection line 35, and the second circuit 27 is connected to the isolation component 31 through a second connection line 36, usually longer than the first connection line 35.
[0012] The bond wires 38 connect the terminals of the circuits 26, 27 to the respective lead frames 22, 23, the package 25 being embedded in the dies 28, 29, 32, the wires 35, 36, 38 and a portion of the lead frames 22, 23.
[0013] The triple-die approach is very flexible, regardless of the technology used for the circuits 26, 27, and is able to use isolation-optimized platforms. However, due to the first connection line 35, and especially the second connection line 36, the approach has parasitic components that can cause crosstalk problems, i.e. interference between the signal transmission channels.
[0014] Other possibilities for mutual isolation of devices arranged in a single package include the arrangement of high-value capacitors within one or both devices. However, even these approaches are not completely satisfactory and / or applicable to all systems. In fact, the provision of a shielding coating cannot be used for small-size wires and there are repeatability problems, so it is far from being effective. Furthermore, the use of high capacitors is not always possible, as they cause an increase in the power consumption of the system and reduce the bandwidth available for communication. SUMMARY
[0015] The present disclosure provides a solution that overcomes the drawbacks of the conventional packages and structures described above.
[0016] According to the present disclosure, there is provided a packaged electronic system.
[0017] For example, in at least one embodiment, a packaged electronic system comprises a support comprising an insulating organic substrate housing a buried conductive region, the buried conductive region being a floating region and having a first portion and a second portion mutually spaced apart; a connection pad on the support; a first die secured to the support, the first die having a first major surface carrying a first die contact region capacitively coupled to the first portion of the buried conductive region; a second die secured to the support, the second die having a first major surface carrying a second die contact region capacitively coupled to the second portion of the buried conductive region; a first external connection region and a second external connection region mutually spaced apart; a connection line coupled to the connection pad and to at least one of the first and second external connection regions to couple at least one of the first and second dies to at least one of the first and second external connection regions; and a package mass encapsulating the first and second dies, the first and second die contact regions, and at least partially encapsulating the support. BRIEF DESCRIPTION OF DRAWINGS
[0018] For a better understanding of the present application, some embodiments thereof will now be described, by way of non-limiting examples only, with reference to the accompanying drawings. In the drawings:
[0019] Figure 1 is a simplified top view of a known device system, the package of which is shown in phantom;
[0020] Figure 2 is a simplified top view of a known device system, the package of which is shown in phantom; Figure 1 is a cross-sectional side view of the system shown in
[0021] Figure 3 is a simplified top view of another known device system, the package of which is shown in phantom;
[0022] Figure 4 is a cross-sectional side view of the system shown in Figure 3
[0023] Figure 5A is a cross-sectional side view of a device system embodiment, the package of which is shown in phantom;
[0024] Figure 5B shows an enlarged detail of Figure 5A
[0025] Figure 6 is an enlarged cross-sectional side view of a portion of the device system;
[0026] Figure 7 is an enlarged perspective view of a portion of the device system;
[0027] Figure 8 shows an implementation layout of a portion of the device system;
[0028] Figure 9 is a cross-sectional side view of another embodiment of the device system, with the package as shown in phantom;
[0029] Figure 10 is a cross-sectional side view of a different embodiment of the device system, with the package as shown in phantom;
[0030] Figure 11 is a cross-sectional side view of another embodiment of the device system, with the package as shown in phantom; and
[0031] Figure 12 is a cross-sectional side view of a different embodiment of the device system, with the package as shown in phantom. DETAILED DESCRIPTION
[0032] In the following description, reference will be made to a system formed by two dies, each integrating an ASIC (Application-Specific Integrated Circuit), but the present application is applicable to any type of electronic device, whether a single component or a more complex circuit, operating at different voltages, even with very different voltage values in normal mode.
[0033] Figure 5A A system 50 is shown, comprising two dies 51, 52, each integrating its own device 53, 54. As mentioned above, the devices 53, 54 are here ASICs. As Figure 5A indicated, the two dies are spaced apart from each other by a distance D1. The distance D1 extends between respective side walls of the first die 51 and the second die 52.
[0034] The dies 51, 52 are both fixed on a support 55. The support 55 has for example a parallelepiped shape, with a first main face 55A and a second main face 55B (see also Figure 5BThe first and second main faces 55A, 55B can be referred to as surfaces (e.g., first surface, second surface, first main surface, second main surface, etc.). The first and second main faces 55A, 55B are opposite to each other, such that the first main face 55A faces away from the second main face 55B, and vice versa. The first and second main faces 55A, 55B extend here parallel to the plane XY of the Cartesian coordinate system XYZ; furthermore, the height (parallel to the third axis Z of the Cartesian coordinate system XYZ) of the support 55 is smaller than the width and the length (parallel to the first axis X and to the second axis Y of the Cartesian coordinate system XYZ, respectively). The support 55 can be referred to as an electrical connection element, an electrical connection structure, a capacitive electrical connection element, a capacitive electrical connection structure, or some other reference to the support 55 that is configured to provide an electrical connection such as a capacitive electrical connection within embodiments of systems, packages, or devices of the present disclosure.
[0035] The support 55 is an organic support, typically made of an insulating material. The support can internally house a buried conductive region 56, as easily seen in Figure 5A and 5B The buried conductive region 56 is entirely surrounded by the insulating material of the support 55, such that there is no physical conductive connection path with other parts of the system 50 (in other words, the buried conductive region 56 is floating).
[0036] For example, the support 55 can be formed by a printed circuit board (PCB). According to one embodiment, the support 55 is formed by a multilayer structure comprising a series of conductive layers (typically metal) and insulating layers (e.g., organic plastic), wherein one of the conductive layers forms the buried conductive region 56, as more fully described below with reference to Figure 6
[0037] The buried conductive region 56 extends for most of the length (parallel to the first axis X) of the support 55; in particular, in the embodiment shown, it extends all the way under the dies 51, 52. In other words, based on the orientation as shown in Figure 5A
[0038] The contact structures 57A-57D on the first face 55A of the support 55 extend from the support 55 to the dies 51, 52 to form electrical connections with the dies 51, 52. For example, conductive components within the dies 51, 52 are coupled to conductive components in the support 55 through the contact structures 57A-57D, respectively.
[0039] The contact structures 57A-57D are here formed by a bottom portion 65, for example formed by a support pad area, arranged on the first face 55A of the support 55, by an intermediate portion 66, forming a bump area, here arranged on the bottom portion 65, and by a top portion 67, for example formed by a die pad area, here arranged on the intermediate portion 66, and formed in a per se known manner by a respective top metal layer of the dies 51, 52. The bottom portion 65 can be referred to as lower portion, or some other reference at the first face 55A of the support 55. The intermediate portion 66 can be referred to as central portion, intermediate portion or some other reference of the intermediate portion 66 between the bottom portion 65 and the top portion 67, respectively. The top portion 67 can be referred to as upper portion or some other reference to the top portion 67 at the respective surface of one of the dies 51, 52 facing the first face 55A of the support 55. The bottom portion 65, the intermediate portion 66 and the top portion 67 can be referred to together as support.
[0040] The top portion 67 of the contact structures 57A-57D is electrically connected to electrical components of the device 53, 54 in a known manner.
[0041] Two contact structures, hereinafter referred to as first contact structure 57A and second contact structure 57B, connect the first die 51 to the support 55, and two other contact structures, hereinafter referred to as third contact structure 57C and fourth contact structure 57D, connect the second die 52 to the support 55.
[0042] In particular, here the bottom portions 65 of the second contact structure 57B and the third contact structure 57C extend vertically on respective longitudinal end portions of the buried conductive area 56 and are thus capacitively coupled thereto. Thus, in the present embodiment, the bottom portions 65 of the second contact structure 57B and the third contact structure 57C form a first plate of a capacitive element having a common counter plate formed by the buried conductive area 56. Thus, in the present embodiment, the bottom portions 65 are also referred to as first plate 65 and the buried conductive area 56 is also referred to as common floating plate 56.
[0043] In other words, a first capacitor 70 is formed between the second contact structure 57B and the buried conductive area 56, and a second capacitor 71 is formed between the third contact structure 57C and the buried conductive area 56. The first capacitor 70 and the second capacitor 71 are arranged in series with each other through the buried conductive area 56, thereby providing a current coupling structure 73 between the first die 51 and the second die 52, as discussed in detail below.
[0044] The first contact structure 57A and the fourth contact structure 57D (and other possible contact structures, not shown) electrically connect the respective die 51, 52 to additional support pad areas on the support 55 in a manner not shown but known to the skilled person.
[0045] In Figure 5A , the first and second external connection areas 60, 61 are fixed on the second main face 55B of the support 55. The first and second external connection areas 60, 61 can be referred to as external contact areas.
[0046] The external connection areas 60, 61 here implement an LGA (Land Grid Array) connection scheme and form, in a known manner, part of a leadframe formed of different external connection areas electrically isolated from each other, which are able to electrically connect the system 50 to the outside (for example, outside the system 50). In particular, the illustrated external connection areas 60, 61 are configured to be able to operate at very different voltages from each other and / or even up to 10 kV compared to the operating voltage of one or both of the devices 53, 54. To this end, the external connection areas 60, 61 are spaced apart by a distance D2 extending between the respective side walls of the external connection areas 60, 61, and in the present embodiment, the external connection areas 60, 61 are fixed to the support 55 so as not to vertically overlap the buried conductive area 56.
[0047] In Figure 5A , another pad area 75 extends on the first face 55A of the support 55. The other pad area 75 can be provided in the same layer as the first plate 65 in a manner known to those skilled in the art and is connected to the second external connection area 61 by an electrical connection line 76. The first plate 65 can be coupled to the pad area 75.
[0048] A package mass 77 of resin or other insulating material encapsulates the dies 51, 52, the support 55, the electrical connection line 76 and most of the external connection areas 60, 61. The package mass 77 can be an encapsulant, a molding compound, an epoxy, a resin or some other type of material used to encapsulate the various components of the system, package or device of the invention.
[0049] Indeed, in the system 50 of Figure 5A , the capacitors 70, 71 provide a current transmission path between the devices 53, 54, enabling the transmission of a common mode signal between the devices 53, 54 (for example, with the apparatus 53, 54).
[0050] Depending on the devices 53, 54, the particular exchange signal and the design choices, this channel can be used as a single transmission channel. Alternatively, the system 50 can comprise a plurality of such channels, each for a respective signal to be exchanged and / or transmission direction, as discussed in detail below.
[0051] In Figure 5AIn system 50, in order to achieve isolation and to operate at a much higher voltage than the first external connection region 60 based on the first die 51, some distance ratios are important depending on the specific operating voltage, as described below.
[0052] Specifically, refer to Figure 5A and 5B The distance D2 between the external connection regions 60 and 61 is selected to be greater than the distance D1 between the bare dies 51 and 52.
[0053] In addition, the distance T1 between the second contact structure 57B and the buried conductive region 56 is selected. Figure 5B The distance T1 and T2 between the buried conductive region 56 and the first external connection region 60 are taken into account to consider the insulation properties of the support member 55 material and other possible criteria known to the designer. For example, if the insulating layer forming the support member 55 is made of the same material and has the same dielectric strength, then the distances T1 and T2 can be equal (T1 = T2). Conversely, if the bottom of the support member 55 ( Figure 5B If the material in the middle can withstand a higher electric field than the material inserted between the buried conductive region 56 and the first plate 65 (the bottom of the second contact structure 57B), then T1 may be higher than T2 (T1>T2).
[0054] When the voltage difference is large, similar considerations can be applied to the distance between the third contact structure 57C and the buried conductive region 56, as well as the distance between the buried conductive region 56 and the second external connection region 61.
[0055] Figure 6 The possible implementation of support member 55 is shown.
[0056] Specifically, Figure 6 The support member 55 is manufactured from a commercially available type of board, which is formed of a multi-layer structure. Specifically, the support member 55 includes a bottom insulating layer 80; a bottom conductive layer 81 covering the bottom insulating layer 80; an intermediate insulating layer 82, the so-called core, covering the bottom insulating layer 80 and the bottom conductive layer 81; a top conductive layer 83 covering the intermediate insulating layer 82; a top insulating layer 84 covering the intermediate insulating layer 82 and the top conductive layer 83; and a top conductive layer 85 covering the top insulating layer 84. These different layers of the support member 55 may be referred to as the first layer, the second layer, the third layer, the fourth layer, the fifth layer, etc.
[0057] Insulating layers 80, 82, and 84 can be organic materials, such as plastics, like so-called insulating prepregs; conductive layers 81, 83, and 85 can be metals, such as copper. If possible, the top conductive layer 83 may also include a layer with very low contact resistance, such as a gold substrate, covering the copper layer.
[0058] Conductive layers 81, 83 and 85 are shaped to form, respectively, the buried conductive region 56, the top plate region 88 of capacitors 70 and 71, and the bottom 65 of the second contact structure 57B and the third contact structure 57C.
[0059] In a manner not shown, the support 55 may include a bottom conductive layer disposed beneath the bottom insulating layer 80, and may also be made of metal (e.g., copper) and possibly coated with a gold base (see also...). Figure 12 (Explanation).
[0060] In practice, capacitors 70 and 71 are formed by a bottom conductive layer 81 (buried conductive region 56), an intermediate insulating layer 82, and a top conductive layer 83 (top plate region 88). Therefore, in this embodiment, the bottom 65 of the contact structures 57A-57D no longer forms the plate of capacitors 70 and 71, but is connected to the top plate region 88 through corresponding through holes 90 extending through the top insulating layer 84.
[0061] In this embodiment, the critical distance T1 is the distance between the bottom 65 of the second contact structure 57B and the top plate region 88 facing it, compared to the distance T2 between the buried conductive region 56 and the first external connection region 60.
[0062] Figure 7 A possible embodiment of the current coupling structure 73 is shown.
[0063] Specifically, here, the first disc-shaped plate 92 and the second disc-shaped plate 93 respectively form Figure 5A The bottom 65 or the first capacitor 70 and the second capacitor 71 Figure 6 The top plate area 88. The third disc plate 94 and the fourth disc plate 95 form the ends of the buried conductive areas 56 of the first capacitor 70 and the second capacitor 71.
[0064] The third disc-shaped plate 94 and the fourth disc-shaped plate 95 are vertically aligned with the first disc-shaped plate 92 and the second disc-shaped plate 93, respectively. In other words, as Figure 7 As shown, the first disc-shaped plate 92 and the third disc-shaped plate 94 are aligned and overlapped, and as... Figure 7 As shown, the second disc plate 93 and the fourth disc plate 95 are aligned and overlap.
[0065] Conductor 96 forms a buried conductive region 56 and directly connects or couples the third disc plate 94 and the fourth disc plate 95 together. Conductor 96 electrically couples the third and fourth disc plates 95 and 96 together. Conductor 96 may be referred to as a connecting wire, an electrical connecting wire, or some other type of wire that electrically couples the third and fourth disc plates 95 and 96 together. Conductor 96 is integrated with the first disc plate 95 and the second disc plate 96.
[0066] The dimensions and shape of the discs 92-95 and the conductors 96 can be determined by the designer based on the isolation voltage and the materials used to prevent electric field accumulation areas (spiking effects), as well as generally minimizing the maximum electric field at a given operating voltage. Specifically, in a manner known to those skilled in the art, geometric features are studied to provide values for the active capacitance and the active capacitance / parasitic capacitance ratio, and to minimize the risk of peeling or failure during thermal cycling that the device may suffer during manufacturing or normal use.
[0067] For example, system 50 can be configured to allow devices 53, 54, or one of them (but not simultaneously) to operate at high voltage (e.g., 10 kV or higher). In this case, the diameter of the discs 92-95 can be between 100 μm and 1 mm, particularly 400 μm, the length of the conductors 96 can be between 500 μm and 3 mm, particularly 1 mm, and the width can be between 5 and 100 μm, particularly 30 μm. The diameter can be equal to the upper and lower limits directly specified above.
[0068] As needed, system 50 may include multiple electrically coupled structures 73.
[0069] For example, Figure 8 System 100 is shown, comprising four current-coupled structures 73 forming two transmission channels 101 and 102, each channel having a pair of capacitors for differential signal transmission. In each transmission channel, for example, in the case of transmission from a first die 51 to a second die 52, the signal is transmitted by the first die 51 as a potential difference between two first disk plates 92 and received by the second die 52 as a potential difference between two second disk plates 93, and vice versa in signal transmission from the second die 52 to the first die 51.
[0070] Figure 9 It shows the relationship with Figure 5A System 50 is similar to System 150. Therefore, System 150 will be described with reference only to the differences, and the same reference numerals will be used for the same parts.
[0071] Figure 9 System 150 also includes two bare dies 51, 52, which are fixed to a support 55. The support 55 accommodates a buried conductive region 56, but the latter partially covers the external connection regions 60, 61. Therefore, capacitors 70, 71 are arranged vertically aligned above the external connection regions 60, 61. In this case, for example, the distance between the external connection regions 60, 61 can be 500 μm, but the thickness of the support 55 must be chosen to be sufficiently high. Figure 5A System 50.
[0072] exist Figure 10In system 200, support member 55 is arranged on bare plates 51 and 52.
[0073] Specifically, the bare sheets 51 and 52 are directly fixed to the corresponding external connection areas 60 and 61. The first contact structure 257A extends between the first bare sheet 51 and the support member 55, and the second contact structure 257B extends between the first bare sheet 51 and the support member 55. In fact, the bare sheets 51 and 52 are fixed to the corresponding external connection areas 60 and 61 on the first main surface of the bare sheet, and to the support member 55 on the second main surface of the bare sheet opposite to the first main surface.
[0074] Contact structures 257A and 257B can be formed in a similar manner to contact structures 57A-57D described above, and therefore each includes: a bottom 267, for example formed by a bare die pad or a metal area; a middle portion 266, forming a bump area, which is arranged on the bottom portion 267; and a top 265, for example formed by a metal support pad area, which is arranged on the middle portion 266.
[0075] The top 265 of contact structures 257A and 257B faces the corresponding ends of the buried conductive region 56; the ends can be disc-shaped (e.g., Figure 7 (As shown). Here, the top 265 of the contact structures 257A, 257B then forms a plate region, which is capacitively coupled to the buried conductive region 56 to form capacitors 70, 71.
[0076] Or, in a similar way Figure 6 In the manner shown in system 50, contact structures 257A and 257B can be connected to corresponding conductive areas (not shown) formed in support member 55 through through holes and face the ends of buried conductive areas 56.
[0077] exist Figure 10 In system 200, if the distance between the external connection areas 60 and 61 is 0.5 mm, the length of the buried conductive area 56 can be between 0.5 and 3 mm.
[0078] Figure 10 The advantage of system 200 is that, in order to achieve isolation, the sealing constraint of distance T1 between the second contact structure 57B and the buried conductive region 56 (and / or the third contact structure 57C and the buried conductive region 56) is sufficient, because the condition regarding distance T2 is automatically met (i.e., floating relative to the external connection regions 60, 61).
[0079] according to Figure 11 In the different embodiments shown, the substrate 58 of the semiconductor material extends to Figure 10on the support 55 of the system 200 and form a die 59 with the support 55. In this case, the support 55 can be formed by an insulating layer of polyimide and / or oxide passivation metal to form the top 265 of the buried conductive area 56 and of the contact structures 257A, 257B.
[0080] In this way, the system 200 can be obtained using technologies of the semiconductor industry, with consequent advantages in terms of resolution, spatial size control and alignment.
[0081] Figure 12 A system 250 similar to the system 50 of Figure 5A is shown.
[0082] In the system 250, the external connection areas 60, 61 are missing and the bottom metal layer 86 of the support 55 extends under the bottom insulating layer 80. The bottom metal layer 86 is shaped here to form leads for the external connection of the devices 53, 54 (two leads 260, 261 are shown, similar to the external connection areas 60, 61).
[0083] Figure 12 The system 250 can have a surface treatment of the BGA (Ball Grid Array) type, in which solder balls 262 (shown in dashed line) are reflowed on the leads 260, 261.
[0084] The systems 50, 100, 150, 200 and 250 described herein have a high level of isolation between the devices, even operating at very different high voltages. Moreover, these systems generate very low values of parasitic elements.
[0085] They can be manufactured in a simple way with machines and steps common in the production of electrical devices.
[0086] Finally, it is clear that modifications and changes can be made to the systems described and shown herein without departing from the scope of the present disclosure, as defined in the appended claims. For example, different embodiments described can be combined to provide further solutions.
[0087] Moreover, even if the systems shown comprise only two devices, the same solutions can be applied in the case of a plurality of devices, possibly with sufficient spacing of the buried conductive areas 56.
[0088] A packaged electronic system can be summarized as comprising a support (55) comprising an insulating organic substrate housing a buried conductive region (56), the buried conductive region being a floating region and having first and second portions (94; 95) mutually spaced apart; a first die (51) fixed to the support, the first die having a first main surface carrying a first die contact region (67; 267) capacitively coupled to the first portion of the buried conductive region; a second die (52) fixed to the support, the second die having a first main surface carrying a second die contact region (67; 267) capacitively coupled to the second portion of the buried conductive region; and a package mass (77) encapsulating the first die (51), the second die (52), the first die contact region, the second die contact region and at least partially encapsulating the support (55).
[0089] The buried conductive region (56) can have an elongated shape having a first end and a second end, wherein the first portion (94) of the buried conductive region is arranged at the first end and the second portion (95) of the buried conductive region is arranged at the second end of the buried conductive region.
[0090] The first and second ends (94; 95) of the buried conductive region (56) can be disc-shaped.
[0091] The first and second die contact regions (67; 267) can face the first and second portions (94; 95) of the buried conductive region (56), respectively.
[0092] The support (55) can have a first and a second face (55A, 55B), the first and second dies (51, 52) being fixed at the first face (55A) of the support.
[0093] The system can comprise first and second external connection regions (60, 61) of metallic material extending on the second face (55B) of the support (55) at a first mutual distance (D2), the external connection regions being electrically connected to the first and second dies (51, 52) by connection lines (76).
[0094] The first and second dies (51, 52) can be arranged at a second mutual distance (D1), wherein the first distance (D2) is greater than the second distance.
[0095] The first and second dies (51, 52) can be arranged at a second mutual distance (D1), wherein the first distance (D2) is smaller than the second distance.
[0096] The system can also comprise first and second contact structures (57B, 57C), wherein: the first contact structure (57B, 57C) comprises a first plate region (65) capacitively coupled to a first portion (94) of the buried conductive region (56) and arranged on the first face (55A) of the support (55), and a first bump region (66) adjacent to the first plate region and to the first die contact region, and the second contact structure comprises a second plate region (65) capacitively coupled to a second portion (95) of the buried conductive region (56) and arranged on the first face (55A) of the support (55), and a second bump region (66) adjacent to the second plate region and to the second die contact region.
[0097] The distance (T1) between the buried conductive region (56) and the first face (55A) of the support (55) can be equal to or less than the distance (T2) between the buried conductive region (56) and the first external connection region (57B).
[0098] The first and second dies can have respective second main surfaces, the first and second dies (51, 52) being fixed to the support (55) on the respective first main surface and to the metal external connection regions (60, 61) on the respective second main surfaces.
[0099] The support (55) can be a multilayer film formed by a plurality of conductive layers including at least a first, a second and a third conductive layer (81, 83, 85) separated by respective insulating layers (82, 84), the buried conductive region (56) can be formed in the first conductive layer (81) of the plurality of conductive layers, the first and second capacitive plate regions (88) can be formed in the second conductive layer (83) and directly facing the first and second portions (94, 95) of the buried conductive region (56), the first and second support contact regions (65; 265) can be formed in the third conductive layer (85) and can be electrically connected to the first and second capacitive plate regions (88), respectively, through vias (90) extending through the respective insulating layers (84).
[0100] The first and second support contact regions (65; 265) can be part of first and second contact structures (57B, 57C; 257A, 257B), respectively, the first contact structure (57B; 257A) can further include a first bump region (66; 266) adjacent to the first support contact region (65; 265) and the first die contact region (67; 267), and the second contact structure (57C; 257B) can further include a second bump region (66; 266) adjacent to the second support contact region (65; 265) and the second die contact region (67; 267).
[0101] A distance (T2) between the buried conductive region (56) and the first external connection region (57B) can be substantially equal to a distance (T1) between the buried conductive region (56) and the first capacitive plate region (88).
[0102] The various embodiments described above can be combined to provide further embodiments. Aspects of an embodiment can be modified, if necessary to employ concepts of various patents, applications, and publications to provide yet further embodiments.
[0103] These and other changes can be made to the embodiments in light of the above- detailed description. In general, in the following claims, the used terminology can not be interpreted as limiting the claims to the specific embodiments disclosed in the specification and the claims and specification both may- include all embodiments falling within the scope of the claims and their equivalents. Accordingly, the claims are not limited to the disclosure.
Claims
1. An electronic device comprising: a support comprising an insulating substrate having: a first face and a second face opposite the first face; a first insulating layer comprising the second face; a second insulating layer on the first insulating layer; a third insulating layer on the second insulating layer and comprising the first face; a buried conductive region within the second insulating layer and comprising a first disc-shaped portion and a second disc-shaped portion spaced apart from one another and coupled together by a wire extending from the first disc-shaped portion to the second disc-shaped portion; a third disc-shaped portion and a fourth disc-shaped portion in the third insulating layer and on the second insulating layer, the third disc-shaped portion and the fourth disc-shaped portion being electrically conductive, the third disc-shaped portion overlapping the first disc-shaped portion, the fourth disc-shaped portion overlapping the second disc-shaped portion, the third disc-shaped portion being capacitively coupled to the first disc-shaped portion without physical contact with the first disc-shaped portion, and the fourth disc-shaped portion being capacitively coupled to the second disc-shaped portion without physical contact with the second disc-shaped portion; a first conductive via extending to the third disc-shaped portion in the third insulating layer; and a second conductive via extending to the fourth disc-shaped portion in the third insulating layer; a first die secured to the first face of the support, a first surface of the first die having a first die contact area; a first contact area disposed on the first face of the support and coupled to the first conductive via; a first bump area coupling the first contact area to the first die contact area; a second die secured to the first face of the support, a first surface of the second die having a second die contact area; a second contact area disposed on the first face of the support and coupled to the second conductive via; a second bump area coupling the second contact area to the second die contact area; a first external connection area and a second external connection area spaced apart from one another in a first direction, the buried conductive region being between the first external connection area and the second external connection area; and an insulating material encapsulating the first die, the second die, the first die contact area, the second die contact area, the first bump area, the second bump area, the first contact area, and the second contact area, and at least partially encapsulating the support.
2. The device of claim 1, wherein the wire is integrally formed with the first disc-shaped portion and the second disc-shaped portion.
3. The device of claim 1, wherein the first disc-shaped portion and the third disc-shaped portion have a first diameter, and the second disc-shaped portion and the fourth disc-shaped portion have a second diameter. 4. The apparatus of claim 1, wherein the first die contact region overlaps the first and third disc-shaped portions, and the second die contact region overlaps the second and fourth disc-shaped portions.
5. The apparatus of claim 1, wherein the first and second external connection regions are located on the second face of the support, and wherein a distance between the buried conductive region and the first face of the support is equal to or less than a distance between the buried conductive region and at least one of the first and second external connection regions.
6. The apparatus of claim 1, wherein the first and second external connection regions are separated by a first distance extending on the second face of the support.
7. The apparatus of claim 6, wherein the first and second dies are arranged to be separated by a second distance, wherein the first distance is greater than the second distance.
8. The apparatus of claim 6, wherein the first and second dies are arranged to be separated by a second distance, wherein the first distance is less than the second distance.
9. The apparatus of claim 6, wherein: the first bump region is adjacent to the first contact region and adjacent to the first die contact region; the second bump region is adjacent to the second contact region and adjacent to the second die contact region.
10. The apparatus of claim 9, wherein a second distance between the buried conductive region and the first face of the support is equal to or less than a third distance between the buried conductive region and the first external connection region.
11. The apparatus of claim 1, further comprising: a connection pad on the support; and a connection line coupled to the connection pad and at least one of the first and second external connection regions, the connection line coupling at least one of the first and second dies to at least one of the first and second external connection regions.
12. The apparatus of claim 1, further comprising: a third contact region disposed on the first face of the third insulating layer of the support; a third bump region coupling the third contact region to a third die contact region of the first die, the third die contact region being spaced apart from the first die contact region of the first die; a fourth contact region disposed on the first face of the third insulating layer of the support; and a fourth bump region coupling the fourth contact region to a fourth die contact region of the second die, the fourth die contact region being spaced apart from the second die contact region of the second die.
13. The apparatus of claim 12, wherein: the third contact region is coupled to the first external connection region; and the fourth contact region is coupled to the second external connection region. 14. The apparatus of claim 13, further comprising: a third via coupling a third contact region to the first external connection region by extending from the first external connection region through the first insulating layer, the second insulating layer, and the third insulating layer to the third contact region; a fourth via coupling a fourth contact region to the second external connection region by extending from the second external connection region through the first insulating layer, the second insulating layer, and the third insulating layer to the fourth contact region.
15. An electronic apparatus comprising: an electrical connection structure comprising: a first insulating layer; a second insulating layer on the first insulating layer; a third insulating layer on the second insulating layer and spaced apart from the first insulating layer by the second insulating layer; a first surface of the first insulating layer, and a second surface of the third insulating layer opposite and facing away from the first surface; and a buried conductive region on the first insulating layer and within the second insulating layer, the buried conductive region comprising: a first end and a second end opposite the first end; a first disc-shaped portion at the first end; a second disc-shaped portion at the second end; and a connection line directly coupling the first disc-shaped portion to the second disc-shaped portion by extending from the first disc-shaped portion to the second disc-shaped portion; a third disc-shaped portion of conductive material in the third insulating layer and on the second insulating layer, the third disc-shaped portion aligned with and overlapping the first disc-shaped portion, the third disc-shaped portion capacitively coupled to the first disc-shaped portion without physical contact with the first disc-shaped portion, and the third disc-shaped portion spaced apart from the first disc-shaped portion by the second insulating layer; a fourth disc-shaped portion of conductive material in the third insulating layer and on the second insulating layer, the fourth disc-shaped portion aligned with and overlapping the second disc-shaped portion, the fourth disc-shaped portion capacitively coupled to the second disc-shaped portion without physical contact with the second disc-shaped portion, and the fourth disc-shaped portion spaced apart from the second disc-shaped portion by the second insulating layer; a first contact region at the second surface of the third insulating layer; a second contact region at the second surface of the third insulating layer and spaced apart from the first contact region; a first via coupled to the first contact region, the first via extending to the third disc-shaped portion in the third insulating layer to electrically couple the first contact region to the third disc-shaped portion; a second via coupled to the second contact region, the second via extending to the fourth disc-shaped portion in the third insulating layer to electrically couple the second contact region to the fourth disc-shaped portion; a first die stacked on the electrical connection structure and coupled to the first contact region by a first bump region, and the first die spaced apart from the second surface of the third insulating layer by the first bump region; and a second die stacked on the electrical connection structure and coupled to the second contact region by a second bump region, and the second die is spaced apart from the second surface of the third insulating layer by the second bump region, and the second die is spaced apart from the first die.
16. The apparatus of claim 15, further comprising: a first external connection region on the first surface of the first insulating layer; a second external connection region on the first surface of the first insulating layer and spaced apart from the first external connection region; a third contact region at the second surface of the third insulating layer and spaced apart from the first contact region and the second contact region; a fourth contact region at the second surface of the third insulating layer and spaced apart from the first contact region, the second contact region, and the third contact region; a third via coupled to the third contact region, the third via extending from the third contact region to the first external connection region; a fourth via coupled to the fourth contact region, the fourth via extending from the fourth contact region to the second external connection region; a third bump region coupled to the third contact region and the first die; a fourth bump region coupled to the fourth contact region and the second die.
17. The apparatus of claim 15, further comprising a package mass, the package mass encapsulating the first die, the second die, the first bump region, the second bump region, and at least partially encapsulating the electrical connection structure.
Citation Information
Patent Citations
Semiconductor device
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