Display substrate, display panel and display device

Abstract

The application provides a display substrate, a display panel and a display device. The display substrate comprises a substrate, a shielding layer arranged on one side of the substrate, the shielding layer comprising a plurality of spaced shielding portions, a plurality of first connecting lines and an edge line, the first connecting lines connecting the shielding portions, and the edge line arranged on the outer periphery of the shielding portions and connected with the end portions of the first connecting lines; and a driving thin film transistor comprising an active layer arranged on the side of the shielding layer away from the substrate, and the orthographic projection of each shielding portion on the substrate covering at least part of the orthographic projection of the active layer on the substrate. Thus, in the display substrate, the shielding portions, the first connecting lines and other structures in the shielding layer are integrated by the edge line, thereby avoiding the electrostatic accumulation of the end portions of the first connecting lines in the process of excimer laser annealing, and further avoiding the peeling of the shielding layer possibly caused by the electrostatic accumulation.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more specifically, to display substrates, display panels, and display devices. Background Technology

[0002] With the rapid development and application of OLED display technologies (such as AMOLED (Active-matrix organic light emitting diode), users have raised more diverse demands for OLED products. OLED products with lower power consumption and higher image quality have attracted much attention. Currently, in order to reduce the power consumption of display panels and improve the image quality, a masking layer can be placed under the driving thin-film transistors. However, in the ELA (Excimer Laser Annealing) process, the weak points of the masking layer have relatively poor resistance to ESD (Electro-Static Discharge), and are prone to peeling during the excimer laser annealing process, leading to a decrease in product yield.

[0003] Therefore, current display substrates, display panels, and display devices still need improvement. Summary of the Invention

[0004] This invention aims to at least partially solve one of the technical problems in related technologies. In view of this, in one aspect of the invention, a display substrate is provided, comprising: a substrate; a shielding layer disposed on one side of the substrate, the shielding layer including a plurality of spaced-apart shielding portions, a plurality of first connecting lines, and an edge line, the first connecting lines connecting the plurality of shielding portions, the edge line disposed on the outer periphery of the plurality of shielding portions and connected to the end of the first connecting lines; and a driving thin-film transistor, the driving thin-film transistor including an active layer disposed on the side of the shielding layer away from the substrate, wherein the orthographic projection of each shielding portion on the substrate covers at least a portion of the orthographic projection of the active layer on the substrate. Thus, in this display substrate, the shielding portions, first connecting lines, and other structures in the shielding layer are integrated by the edge lines, avoiding electrostatic accumulation at the ends of the first connecting lines during excimer laser annealing, thereby preventing shielding layer peeling that may be caused by electrostatic accumulation.

[0005] According to an embodiment of the present invention, the width of the edge line is 3 to 5 times the width of the first connecting line. Therefore, the wider edge line allows for better integration of the first connecting line, the shielding portion, etc., and further improves the resistance to electrostatic discharge at the edge of the shielding layer.

[0006] According to an embodiment of the present invention, a plurality of the shielding portions are arranged in an array in a first direction and a second direction. The first connecting line further includes: a plurality of first connecting segments, the first connecting segments extending along the first direction and extending to the edge line, and connecting the shielding portions arranged along the first direction; and a plurality of second connecting segments, the second connecting segments extending along the second direction and extending to the edge line, and connecting the shielding portions arranged along the second direction; wherein the first direction and the second direction intersect. This achieves a better integration effect, thereby further improving the resistance to electrostatic discharge at the edge of the shielding layer.

[0007] According to an embodiment of the present invention, the shielding layer further includes a second connecting line, the end of which is not connected to the edge line. The second connecting line includes a third connecting segment extending along a first direction and a fourth connecting segment extending along a second direction. The third connecting segment is located between the first connecting segment and the edge line and connects the shielding portions arranged along the first direction. The fourth connecting segment is located between the second connecting segment and the edge line and connects the shielding portions arranged along the second direction. This reduces the number of connecting lines near the corners of the edge line, thus facilitating the integration and wiring of the shielding layer.

[0008] According to an embodiment of the present invention, the edge line is a smooth curve. This further avoids static electricity buildup and its potential adverse effects.

[0009] According to an embodiment of the present invention, the angle between the edge line and the first connecting line at their intersection is less than or equal to 90 degrees. This is more conducive to avoiding static electricity buildup and the potential adverse effects of static electricity buildup.

[0010] According to an embodiment of the present invention, the driving thin-film transistor further includes a source and a drain, both of which are electrically connected to the active layer through vias. The orthographic projection of the via on the substrate does not overlap with the orthographic projection of the edge line on the substrate. Therefore, the edge line can be positioned to avoid the location of the via, thereby enabling the shielding layer to better resist electrostatic discharge.

[0011] According to an embodiment of the present invention, the minimum distance between the edge line and the through-hole is greater than or equal to 2.5 micrometers. Therefore, the larger distance between the edge line and the through-hole allows for better avoidance of the through-hole, thereby giving the shielding layer better resistance to electrostatic discharge.

[0012] In another aspect, the present invention provides a display panel comprising the aforementioned display substrate. Thus, this display panel possesses all the features and advantages of the aforementioned display substrate, which will not be repeated here. In general, the shielding layer of this display panel has good resistance to electrostatic discharge, and the display panel exhibits good image quality and low power consumption.

[0013] In another aspect, the present invention provides a display device comprising the aforementioned display substrate. Thus, the display device possesses all the features and advantages of the aforementioned display substrate, which will not be repeated here. In summary, the display device offers good image quality, low power consumption, and a superior user experience. Attached Figure Description

[0014] Figure 1 A schematic diagram of the structure of a shielding layer according to an embodiment of the present invention is shown;

[0015] Figure 2 A partial structural schematic diagram of a display substrate according to an embodiment of the present invention is shown;

[0016] Figure 3 A partial structural schematic diagram of a shielding layer according to an embodiment of the present invention is shown;

[0017] Figure 4 A partial structural schematic diagram of the shielding layer according to another embodiment of the present invention is shown;

[0018] Figure 5 A partial structural schematic diagram of a display substrate according to another embodiment of the present invention is shown;

[0019] Figure 6 A partial structural schematic diagram of a display substrate according to yet another embodiment of the present invention is shown;

[0020] Figure 7 A partial structural schematic diagram of the shielding layer according to yet another embodiment of the present invention is shown;

[0021] Figure 8 This shows a partial structural diagram of a proportional shielding layer;

[0022] Figure 9 A partial structural schematic diagram of a display substrate according to yet another embodiment of the present invention is shown;

[0023] Figure 10 A partial structural schematic diagram of a display substrate according to yet another embodiment of the present invention is shown;

[0024] Figure 11 A partial structural schematic diagram of a display substrate according to yet another embodiment of the present invention is shown.

[0025] Explanation of reference numerals in the attached figures:

[0026] 100: Substrate; 200: Masking layer; 210: Masking portion; 220: First connecting line; 221: First connecting segment; 222: Second connecting segment; 230: Edge line; 240: Second connecting line; 241: Third connecting segment; 242: Fourth connecting segment; 260: Protrusion structure; 300: Driving thin-film transistor; 310: Active layer; 320: Source; 330: Drain; 340: Through-hole. Detailed Implementation

[0027] The embodiments of the present invention are described in detail below. The embodiments described below are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention. Where specific techniques or conditions are not specified in the embodiments, they shall be performed in accordance with the techniques or conditions described in the literature in the art or in accordance with the product manual.

[0028] In one aspect of the invention, a display substrate is provided, with reference to... Figure 1 and Figure 2 The display substrate includes a substrate 100, a shielding layer 200, and a driving thin-film transistor 300. The shielding layer 200 is disposed on one side of the substrate 100 and includes a plurality of spaced shielding portions 210, a plurality of first connecting lines 220, and an edge line 230. The first connecting lines 220 connect the plurality of shielding portions 210 together, and the edge line 230 is disposed on the outer periphery of the plurality of shielding portions 210 and connected to the end of the first connecting lines 220. The driving thin-film transistor 300 includes an active layer 310, which is disposed on the side of the shielding layer 200 away from the substrate 100. The orthographic projection of each shielding portion 210 on the substrate 100 covers at least a portion of the orthographic projection of the active layer 310 on the substrate 100. Therefore, the shielding layer integrates the first connecting line, shielding part and other structures through the edge line, so that the shielding layer has better overall resistance to electrostatic discharge. In addition, it can avoid electrostatic accumulation caused by electrostatic discharge during excimer laser annealing, thereby avoiding the problem of shielding layer peeling. Furthermore, when the display substrate is used as a display panel, the setting of this shielding layer can also reduce power consumption and make the display panel have good image quality, which is conducive to improving the user experience.

[0029] It should be noted that the shielding layer 200 is a single-layer structure disposed on one side of the substrate 100, but in order to more clearly illustrate the technical solution of the present invention, Figure 2 Only the shielding portion 210 of the shielding layer 200 is shown, while the edge line 230, the first connecting line 220, and other structures of the shielding layer 200 are all disposed on the same layer as the shielding portion 210, but... Figure 2 It is not shown in the image. It should also be noted that... Figure 2 The illustration only shows a display substrate comprising two driving thin-film transistors 300. However, those skilled in the art should understand that the display substrate may include multiple driving thin-film transistors 300, each of which may include an active layer 310. In some embodiments of the present invention, the orthographic projection of each blocking portion 210 onto the substrate 100 may respectively cover at least a portion of the orthographic projection of an active layer 310 onto the substrate 100. Figure 2 Taking the example where the orthographic projection of each shielding portion 210 on the substrate 100 completely covers the orthographic projection of an active layer 310 on the substrate 100.

[0030] According to an embodiment of the present invention, the shielding layer 200 can be made of metal, such as copper, aluminum, titanium, etc., so as to avoid defects caused by laser irradiation on the substrate 100 during the excimer laser annealing process; and the shielding layer made of metal can better reduce power consumption.

[0031] According to some embodiments of the present invention, reference Figure 1 and Figure 3 (in, Figure 3 Only a partial structure of the shielding layer 200 is shown), and multiple shielding portions 210 in the first direction ( Figure 1 and Figure 3 The X direction shown) and the second direction ( Figure 1 and Figure 3The first connecting line 220 is arranged in an array along the Y direction shown in the diagram. It further includes multiple first connecting segments 221 and multiple second connecting segments 222. The first connecting segments 221 extend along the first direction (X direction) to the edge line 230 and connect the blocking portions 210 arranged along the first direction (X direction). The second connecting segments 222 extend along the second direction (Y direction) to the edge line 230 and connect the blocking portions 210 arranged along the second direction (Y direction). The first direction (X direction) and the second direction (Y direction) intersect. Taking the X direction as the row direction and the Y direction as the column direction as an example, the first connecting line 210 includes multiple first connecting segments 221 extending along the first direction (X direction) and multiple second connecting segments 222 extending along the second direction (Y direction). Each row of shielding portions 210 is connected by one first connecting segment 221, meaning each of the multiple first connecting segments 221 connects to one row of shielding portions 210. Each column of shielding portions 210 is connected by one second connecting segment 222, meaning each of the multiple second connecting segments 222 connects to one column of shielding portions 210. This helps to further improve the integration effect of the shielding layer, thereby helping to avoid the shielding layer peeling during excimer laser annealing.

[0032] It should be noted that the first connecting segment 221 extends along the first direction (X direction), and the second connecting segment 222 extends along the second direction (Y direction). This means that the overall extension direction of the first connecting segment 221 is along the X direction, and the overall extension direction of the second connecting segment 222 is along the Y direction. However, the first connecting segment 221 and the second connecting segment 222 can be straight or curved. That is, in order to make the overall structure of the display substrate more stable during the manufacturing process, the first connecting segment 221 and the second connecting segment 222 can be curved in some areas, as long as the first connecting segment 221 extends along the X direction and connects a row of blocking parts 210 arranged along the X direction, and the second connecting segment 222 extends along the Y direction and connects a column of blocking parts 210 arranged along the Y direction.

[0033] Depend on Figure 1 and Figure 3As can be seen, a shielding portion 210 can contact both the first connecting segment 221 and the second connecting segment 222. In the first direction (X direction), two adjacent shielding portions 210 can be connected by a portion of the first connecting segment 221, and in the second direction (Y direction), two adjacent shielding portions 210 can be connected by a portion of the second connecting segment 222. The first direction (X direction) and the second direction (Y direction) intersect, which can be understood as the first direction (X direction) and the second direction (Y direction) not being parallel on the plane where the shielding layer 200 is located. According to some specific embodiments of the present invention, the included angle between the first direction (X direction) and the second direction (Y direction) can be 90 degrees, which is beneficial for the wiring and fabrication of the shielding layer.

[0034] According to other embodiments of the present invention, reference is made to Figure 4 and Figure 5 The shielding layer 200 may further include a second connecting line 240, the end of which is not connected to the edge line 230. The second connecting line 240 may include a third connecting segment 241 extending along a first direction (X direction) and a fourth connecting segment 242 extending along a second direction (Y direction). The third connecting segment 241 is located between the first connecting segment 221 and the edge line 230, and the third connecting segment 241 connects the shielding portions 210 arranged along the first direction (X direction). The fourth connecting segment 242 is located between the second connecting segment 222 and the edge line 230, and the second connecting segment 242 connects the shielding portions 210 arranged along the second direction (Y direction).

[0035] It should be noted that the end of the second connecting line 240 is not connected to the edge line 230, meaning that the end of the second connecting line 240 does not extend to the edge line 230. At the bend (turn) position of the shielding layer 200, the edge line 200 has a certain curvature, and the wiring space is relatively small. To facilitate wiring, while ensuring the display quality, the number of shielding parts 210 at the bend position of the edge of the shielding layer 200 can be reduced accordingly. Near the edge of the shielding layer 200, the shielding parts 210 can be connected by the second connecting line 240. The end of the second connecting line 240 only needs to extend to one of the first connecting lines 220 near the bend position, and does not need to extend to the edge line 230. This achieves a good integration effect and facilitates the overall wiring of the shielding layer. It should also be noted that... Figure 4 and Figure 5 The image only shows the structure at one bend of the shielding layer 200. When the shielding layer 200 is set to... Figure 1 In the structure shown, the four bends of the shielding layer 200 can each have a similar structure. Figure 4 and Figure 5The structure shown is as follows; of course, the second connecting line 240 may include one or more third connecting segments 241 extending along the first direction (X direction), and may also include one or more fourth connecting segments 242 extending along the second direction (Y direction). Taking the X direction as the row direction and the Y direction as the column direction as an example, one third connecting segment 241 is used to connect the blocking part 210 of a row, and one fourth connecting segment 242 is used to connect the blocking part 210 of a column. When multiple (two or more) third connecting segments 241 and / or multiple (two or more) fourth connecting segments 242 are provided, each of the multiple third connecting segments 241 connects to a row of blocking parts 210, and each of the multiple fourth connecting segments 242 connects to a column of blocking parts 210.

[0036] It should also be noted that the third connecting segment 241 and the fourth connecting segment 242 can be straight or curved in some areas, as long as the third connecting segment 241 extends along the X direction and connects to the shielding part 210 arranged along the X direction, and the fourth connecting segment 242 extends along the Y direction and connects to the shielding part 210 arranged along the Y direction.

[0037] According to an embodiment of the present invention, reference Figure 3 The width W of the edge line 230 is 3 to 5 times the width d of the first connecting line 220. For example, the width W of the edge line 230 can be 3 times, 3.5 times, 4 times, 4.5 times, 5 times, etc. of the width d of the first connecting line 220. Thus, the edge line is wider, which can better integrate the first connecting line, the shielding part and other structures, and further improve the shielding layer's resistance to electrostatic discharge.

[0038] According to an embodiment of the present invention, reference Figures 3 to 5 The width W of the edge line 230 can be 18 to 22 micrometers, for example, it can be 18 micrometers, 18.5 micrometers, 19 micrometers, 19.3 micrometers, 19.5 micrometers, 19.7 micrometers, 20 micrometers, 20.2 micrometers, 20.5 micrometers, 20.8 micrometers, 21 micrometers, 21.5 micrometers, 22 micrometers, etc. Therefore, the edge line width is relatively large, which can further improve the performance of the shielding layer in resisting electrostatic discharge; and the width of the edge line is set within the above range, which can also better meet the arrangement requirements of the first connecting line, the shielding part (and the second connecting line) and other structures in the shielding layer.

[0039] According to an embodiment of the present invention, reference Figure 1 , Figures 3 to 5 , Figure 7 , Figures 9 to 11 The edge line 230 has no bends. In this invention, a bend refers to a sharp angle (see reference). Figure 8If the edge line has a bend angle (B and C), the edge of the shielding layer will have a sharp area. During the excimer laser annealing process, the sharp area is prone to electrostatic accumulation, which can lead to peeling problems at the edge of the shielding layer. In this invention, if the edge line does not have a bend angle, the edge of the shielding layer will not have a sharp area, thus avoiding the adverse effects that sharp areas may cause.

[0040] According to some embodiments of the present invention, reference Figure 1 , Figures 3 to 5 , Figure 7 , Figures 9 to 11 The edge line 230 can be a smooth curve, that is, the curve does not exist as... Figure 8 The bending angles shown (angles B and C, where the bending angles here refer to angles less than 160 degrees) can better avoid the peeling problem of the shielding layer, thereby further improving the overall performance of the display substrate. In some embodiments of the present invention, the smooth curve can be located as follows: Figure 1 , Figures 3 to 5 , Figure 7 , Figure 9 and Figure 10 The bending position of the shielding layer shown can also be located at the non-bending position of the shielding layer. The edge line 230 in this invention can be set to various different shapes, as long as the edge line does not have sharp bending angles. According to some specific embodiments of the present invention, see... Figures 3 to 5 and Figure 7 At a bend in the shielding layer, the edge line can be formed by only an arc; according to other specific embodiments of the invention, see reference to Figure 9 and Figure 10 The edge line at a bend in the shielding layer can also be formed by connecting multiple arc segments, with adjacent arc segments smoothly connected, and similarly, there is no... Figure 8 The bending angle shown, where, reference Figure 10 The edge line at a bend in the shielding layer can be stepped; according to some other specific embodiments of the present invention, refer to Figure 11 At a bend in the shielding layer, the edge line can also be formed by connecting multiple straight line segments, with adjacent straight line segments smoothly connected, and there is no... Figure 8 The bending angle shown Figure 11The diagram shows the included angle E (less than 180 degrees) between two adjacent straight line segments. An included angle E greater than 160 degrees can also achieve a smooth connection between straight line segments, thereby effectively avoiding static electricity accumulation. According to some specific embodiments of the present invention, the edge line at a bend in the shielding layer can also be formed by connecting multiple straight line segments and / or multiple arcs, as long as the edge line does not have a bend angle. For example, two straight line segments can be smoothly connected by an arc. Of course, those skilled in the art should understand that the edge line can also be presented at other bends in the shielding layer. Figure 5 , Figure 9 , Figure 10 or Figure 11 The curve shape in the text can also present other smooth curve shapes.

[0041] According to some embodiments of the present invention, reference Figure 11 The shielding layer 200 may further include a raised structure 260, which may be disposed at at least a portion of the intersection of the first connecting line 220 and the edge line 230. Therefore, the raised structure facilitates the release of static electricity near the intersection of the edge line and the first connecting line, thereby further preventing static electricity buildup and subsequent electrostatic stripping. Those skilled in the art will understand that the raised structure 260, the first connecting line 220, the shielding portion 210, and the edge line 230 are an integral structure, fabricated using the same process and steps.

[0042] According to some specific embodiments of the present invention, reference is made to Figure 4 and Figure 5 The edge line 230 has no bends, and the angle A between the edge line 230 and the first connecting line 220 at the intersection is less than or equal to 90 degrees. This can further improve the overall performance of the display substrate and facilitate the reasonable layout of the first connecting line and the edge line.

[0043] According to other specific embodiments of the present invention, reference is made to Figure 5 , Figure 6 , Figure 9 and Figure 10 The driving thin-film transistor 300 further includes a source 320 and a drain 330. Both the source 320 and the drain 330 are electrically connected to the active layer 310 through vias 340. The orthographic projection of the via 340 on the substrate 100 does not overlap with the orthographic projection of the edge line 230 on the substrate 100. That is, the edge line 230 avoids the presence of the via 340. Therefore, the step of forming vias during the fabrication of the display substrate can be prevented from adversely affecting the edge line, thus avoiding the formation of weak areas at the edge line that are difficult to resist electrostatic discharge, and also preventing the generation of static electricity. Figure 5 , Figure 9 and Figure 10It can be seen that through holes 340 can also be provided in the outer area of ​​the edge line 230 (the side of the edge line 230 away from the shielding part 210). It should be noted that the edge line 230 also needs to avoid the through holes 340 provided in its outer area.

[0044] According to some embodiments of the present invention, reference Figure 5 The minimum distance D between the edge line 230 and the via 340 is greater than or equal to 2.5 micrometers. Therefore, having a certain distance between the edge line and the via better avoids the impact of drilling on the edge line, thus giving the edge line good resistance to electrostatic discharge and improving the overall stability of the display substrate. In some specific embodiments of the present invention, the minimum distance D between the edge line 230 and the via 340 can be 2.5 micrometers. It should be noted that... Figure 5 The diagram also shows a portion of the structure of the shielding layer 200 and a portion of the vias 340 in the thin-film transistor 300, only for the purpose of explaining the technical solution of the present invention. There is a certain distance between the vias 340 and the edge line 230, but those skilled in the art should understand that the vias 340 and the shielding layer 200 are not disposed on the same layer.

[0045] In summary, by integrating the first connecting line and the shielding portion of the shielding layer with an edge line, this invention improves the shielding layer's resistance to electrostatic discharge and maintains its stability during excimer laser annealing. When the display substrate is applied to a display panel, the shielding layer enables the display panel to have good image quality while reducing power consumption. Furthermore, a wider edge line can be provided to further improve the shielding layer's resistance to electrostatic discharge. Additionally, the edge line can be designed without bends to avoid the adverse effects that sharp areas on the edge line might cause.

[0046] In another aspect, the present invention provides a display panel comprising the aforementioned display substrate. Thus, the display panel possesses all the features and advantages of the aforementioned display substrate, which will not be repeated here. In general, the display panel exhibits good display performance, excellent image quality, and low power consumption. It should be noted that the shielding layer 200 is disposed in the display area of ​​the display panel, wherein the edge line 230 is disposed around the periphery of the display area.

[0047] According to one embodiment of the present invention, the display panel can be a display panel for LTPO (Low Temperature Polycrystalline Oxide, which is to replace part of the low temperature polycrystalline silicon in the circuit with oxide to improve leakage current) products.

[0048] In another aspect, the present invention provides a display device comprising the aforementioned display substrate. Therefore, the display device possesses all the features and advantages of the aforementioned display substrate, which will not be repeated here. In general, the display device offers good image quality and low power consumption, thus enhancing the user experience.

[0049] According to embodiments of the present invention, there are no special requirements for the specific type of the display device described above. Those skilled in the art can flexibly select according to actual needs, such as display devices such as mobile phones, iPads, and laptops.

[0050] Those skilled in the art will understand that, in addition to the display substrate described above, the display device also has the necessary structures and components of a conventional display device. Taking a mobile phone as an example, in addition to the display substrate described above, it also includes the necessary structures and components such as a battery back cover, a mid-frame, a touch panel, an audio module, and a motherboard.

[0051] The terms "first," "second," "third," and "fourth" used in this document are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," "third," or "fourth" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0052] In the description of this specification, the references to terms such as "one embodiment," "another embodiment," "some embodiments," "some specific embodiments," or "a specific embodiment," etc., refer to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0053] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A display substrate, characterized in that, include: Substrate; A shielding layer is disposed on one side of the substrate. The shielding layer includes a plurality of spaced-apart shielding portions, a plurality of first connecting lines and an edge line. The first connecting lines connect the plurality of shielding portions together. The edge line is disposed on the outer periphery of the plurality of shielding portions and is connected to the end of the first connecting line. The edge line is a smooth curve and the width of the edge line is 3 to 5 times the width of the first connecting line. A driving thin-film transistor includes an active layer disposed on the side of the shielding layer away from the substrate, and the orthographic projection of each shielding portion on the substrate covers at least a portion of the orthographic projection of the active layer on the substrate. The driving thin-film transistor further includes a source and a drain, both of which are electrically connected to the active layer through vias. The vias are also provided in the peripheral region of the edge line. The orthographic projection of the vias on the substrate and the orthographic projection of the edge line on the substrate do not overlap. The minimum distance between the edge line and the vias is greater than or equal to 2.5 micrometers.

2. The display substrate according to claim 1, characterized in that, The plurality of said shielding portions are arranged in an array in a first direction and a second direction, and the first connecting line further includes: Multiple first connecting segments extend along a first direction to the edge line and connect the blocking portions arranged along the first direction; Multiple second connecting segments extend along a second direction to the edge line and connect the shielding portions arranged along the second direction; The first direction and the second direction intersect.

3. The display substrate according to claim 2, characterized in that, The shielding layer further includes a second connecting line, the end of which is not connected to the edge line. The second connecting line includes a third connecting segment extending along a first direction and a fourth connecting segment extending along a second direction. The third connecting segment is located between the first connecting segment and the edge line, and connects the blocking portions arranged along the first direction; the fourth connecting segment is located between the second connecting segment and the edge line, and connects the blocking portions arranged along the second direction.

4. The display substrate according to claim 1, characterized in that, The angle between the edge line and the first connecting line at the intersection is less than or equal to 90 degrees.

5. A display panel, characterized in that, Includes the display substrate as described in any one of claims 1 to 4.

6. A display device, characterized in that, Includes the display substrate as described in any one of claims 1 to 4.

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