A method for calibrating common-mode voltage

Abstract

The present invention discloses a method for calibrating a common-mode voltage. The circuit for executing the method includes a voltage sampling circuit, which is used to sample N sets of series-connected voltages to be sampled and includes N + 1 sampling channels, where N is a positive integer greater than or equal to 2. The method includes: sampling a set of voltages to be sampled by using every two adjacent sampling channels; sequentially measuring each set of voltages to be sampled obtained by sampling through each sampling channel to obtain measured values of the voltages to be sampled; using the measured values of each set of voltages to be sampled distributed from the low-voltage side to the high-voltage side to perform step-by-step calibration on the measured values of the voltages to be sampled at a higher level to eliminate the voltage measurement error caused by the change of the common-mode voltage. By using the sampling channel group with the smallest gain error, the measured voltage of the sampling channel group closest to the positive electrode of the battery pack is calibrated step by step upward to eliminate the influence caused by the gain error, thereby reliably reducing the measurement error and generally improving the judgment accuracy of the state of each single-cell battery in the battery pack.

Description

Technical Field

[0001] The present invention relates to a calibration method for a measurement circuit, and in particular to a calibration method for common-mode voltage sampling of a chip-level measurement circuit for a battery pack. Background Art

[0002] With the continuous development of electronic technology, most types of micro electrical appliances use battery packs for power supply during application. Therefore, for micro power supplies composed of as few as a few or as many as dozens of single cells connected in series, such as micro battery packs and small power banks, when a single cell fails, to a certain extent, it affects the health and preset functions of the entire micro power supply. Traditionally, by disassembling the micro power supply and using an electronic multimeter to measure each single cell one by one, record the voltage and current, and calculate the internal resistance, etc., are all completed by manual operations. Obviously, detecting the quality of a single cell cannot meet the above requirements. Thus, designers have proposed a chip-level test circuit to sample the voltage of the battery pack using a VADC.

[0003] Usually, the connection between the battery pack and the measurement circuit often forms a common-mode voltage, and the common-mode voltage of the sampling channel near the positive pole of the battery pack will experience a large change. As shown in Figure 1 where the sampling channel C16 is the highest level in the battery pack, and the change in its operating voltage is large. For example, the highest operating voltage can reach 60V, and the lowest operating voltage can reach 15V. At different common-mode voltages, the capacitance value of the sampling capacitor corresponding to this sampling channel C16 will change, resulting in a gain error in the sampling value of the subsequent ADC, and further increasing the error of the entire measurement chip circuit. Summary of the Invention

[0004] In view of the defects existing in the above-mentioned prior art, the purpose of the present invention is to propose a calibration method for common-mode voltage to improve the measurement accuracy.

[0005] To achieve the above purpose, the technical solution adopted by the present invention is a calibration method for common-mode voltage. The circuit for executing the calibration method includes a voltage sampling circuit. The voltage sampling circuit is used to sample N groups of series-connected voltages to be sampled and includes N + 1 sampling channels, where N is a positive integer greater than or equal to 2. The method includes: S1. Sampling a group of voltages to be sampled by using every two adjacent sampling channels, and every two adjacent sampling channels form a sampling channel pair; S2. Measuring in sequence the groups of voltages to be sampled obtained by sampling through each sampling channel pair to obtain voltage measurement values of the voltages to be sampled; S3. Using the voltage measurement values of the groups of voltages to be sampled distributed from the low-voltage side to the high-voltage side to perform step-by-step calibration on the voltage measurement values of the higher-level voltages to be sampled to eliminate the voltage measurement error caused by the change in the common-mode voltage.

[0006] Applying the calibration method of the present invention has significant progressiveness: by using the sampling channel group with the smallest gain error, and calibrating the measured voltage of the sampling channel group closest to the positive electrode of the battery pack step by step upward to eliminate the influence brought by the gain error, thereby reliably reducing the measurement error and generally improving the judgment accuracy of the state of each single junction cell in the battery pack. Brief Description of the Drawings

[0007] Figure 1 It is a schematic connection diagram of the voltage sampling circuit according to an embodiment of the present invention.

[0008] Figure 2 It is a schematic structural diagram of the modulator circuit used in the calibration method of the present invention. Detailed Description of the Invention

[0009] The following will further detail the specific implementation manners of the present invention in conjunction with the accompanying drawings of the embodiments, so that the technical solutions of the present invention are easier to understand and master, thereby making the protection scope of the present invention more clearly defined.

[0010] The designer of the present invention aimed at the problem that the large gain error of the sampling value caused by the change of the common-mode voltage in a large range will inevitably affect the increase of the final measurement result error. Combining his own experience and creative labor, he innovatively proposed a calibration method for the common-mode voltage, aiming to eliminate the influence of the gain error.

[0011] Figure 1 A schematic connection diagram of the voltage sampling circuit according to an embodiment of the present invention is given. The voltage sampling circuit is used to sample N groups of voltages to be sampled. In one embodiment, the N groups of voltages to be sampled are the positive and negative voltages of each battery in N series-connected batteries. Wherein, N is a positive integer greater than or equal to 2.

[0012] As Figure 1 shown, the voltage sampling circuit includes N + 1 sampling channels CN2, CN1, C0 to C16. Each two adjacent sampling channels realize the sampling of the positive and negative voltages of a battery, and each adjacent two sampling channels form a sampling channel pair. The sampling values INP and INN of each group of voltages to be sampled are input to the modulation circuit through a data selector. In one embodiment, the modulation circuit includes an ADC circuit, and the measurement of the voltage to be sampled is realized by analog-to-digital conversion of the sampling voltage.

[0013] In one embodiment, the voltage sampling circuit further includes sampling capacitors, and each sampling channel is correspondingly connected to a sampling capacitor.

[0014] In one embodiment, the present application uses a switched-capacitor Σ-Δ ADC to implement analog-to-digital conversion of the sampled voltage. Correspondingly, when each sampling channel pair samples a group of voltages to be sampled, each sampling channel in the sampling channel pair is respectively switched and connected to different sampling capacitors to achieve switched sampling.

[0015] Figure 2 FIG. shows a schematic diagram of a sampling channel pair connected to a modulation circuit according to an embodiment of the present invention. CxP and CxN represent two sampling channels in the sampling channel pair that access the modulation circuit to perform the function of sampling a group of voltages to be sampled. CsP and CsN represent the sampling capacitors corresponding to the sampling channels CxP and CxN. When using a switched-capacitor Σ-Δ ADC to implement analog-to-digital conversion of the sampled voltage, CxP and CxN are alternately connected to the sampling capacitors CsP and CsN by means of a selection switch. In one embodiment, at the first moment, the sampling channel CxP is connected to the sampling capacitor CsP, and the sampling channel CxN is connected to the sampling capacitor CsN; at the second moment, the sampling channel CxP is connected to the sampling channel CsN, and the sampling channel CxN is connected to the sampling channel CsP.

[0016] Figure 2 CfP and CfN shown in the modulation circuit represent the feedback capacitors of the switched-capacitor Σ-Δ ADC, and the ratio of the feedback capacitor to the sampling capacitor is the gain of the ADC. As described in the background art of the present application, as Figure 1 shown, when the voltage to be sampled is a series of multiple batteries, the sampling channel C16 is at the highest level, and the change in its operating voltage is relatively large. At different common-mode voltages, the capacitance value of the sampling capacitor corresponding to the sampling channel C16 will change. At this time, the ratio of the feedback capacitor to the sampling capacitor, that is, the gain of the ADC will change, resulting in a gain error in the sampled value of the ADC, and thus it is impossible to accurately measure the voltage to be measured.

[0017] The present invention provides a method for calibrating the common-mode voltage to solve the above problems.

[0018] Since the change in the common-mode voltage is smaller closer to the low-voltage side (such as the grounded GND side), the voltage measurement error caused by the common-mode voltage is also smaller. The calibration method disclosed in the present invention makes full use of the above objective conditions. Generally speaking: by sequentially measuring each group of voltages to be sampled by switching the sampling channels, and according to the preset calibration coefficient, the voltages measured by the sampling channel pairs distributed from the low-voltage side to the high-voltage side are used to calibrate the voltages measured by the higher-level sampling channel pairs step by step to eliminate the voltage measurement error caused by the change in the common-mode voltage.

[0019] Specifically, the calibration method includes the following steps:

[0020] S1. Sample a group of voltages to be sampled using every two adjacent sampling channels, where every two adjacent sampling channels form a sampling channel pair;

[0021] S2. Measure successively the groups of voltages to be sampled obtained by sampling through each sampling channel pair to obtain measured values of the voltages to be sampled;

[0022] In one embodiment, through a data selector, each sampling channel pair is successively connected to a modulation circuit to implement measurement of the voltage to be sampled corresponding to this sampling channel pair.

[0023] In Figure 1 the shown embodiment, measure the voltage to be sampled Vm_cn1_cn2 = V_cn1 - V_cn2 corresponding to sampling channels CN1 and CN2, where Vm_cn1_cn2 is the measured value of the positive and negative electrode voltage of the battery between sampling channels CN1 and CN2, V_cn1 is the voltage value of the sampling point corresponding to sampling channel CN1, and V_cn2 is the voltage value of the sampling point corresponding to sampling channel CN2. Similarly, measure the voltage to be sampled Vm_c0_cn1 = V_c0 - V_cn1 corresponding to sampling channels C0 and CN1,..., and measure the voltage to be sampled Vm_c16_c15 = V_c16 - V_c15 corresponding to sampling channels C16 and C15.

[0024] S3. Use the measured values of the groups of voltages to be sampled distributed from the low voltage side to the high voltage side to perform step - by - step calibration on the measured values of the higher - level voltages to be sampled, so as to eliminate the voltage measurement error caused by the change of the common - mode voltage.

[0025] In one embodiment, use the calibration value Vc_ i of the voltage to be sampled corresponding to the low - voltage - side sampling channel pair, the measured value Vm_ i+1 of the voltage to be sampled corresponding to the higher - level sampling channel pair, and the calibration coefficient K_ i+1 corresponding to the higher - level sampling channel pair to obtain the calibration value Vc_ i+1 of the voltage to be sampled corresponding to the higher - level sampling channel pair, where Vc_ i+1 = Vm_ i+1 × Vc_ i × K_ i+1 , and i is used to identify the sampling channel pair.

[0026] Specifically, in Figure 1In the illustrated embodiment, the measured value Vm_cn1_cn2 of the voltage to be sampled corresponding to the sampling channels CN1 and CN2 is used to calibrate the measured value Vm_c0_cn1 of the voltage to be sampled corresponding to the sampling channels C0 and CN1, so as to obtain the calibrated value Vc_c0_cn1 of the voltage to be sampled corresponding to the sampling channels C0 and CN1; the calibrated value Vc_c0_cn1 of the voltage to be sampled corresponding to the sampling channels C0 and CN1 is used to calibrate the measured value Vm_c1_c0 of the voltage to be sampled corresponding to the sampling channels C1 and C0, so as to obtain the calibrated value Vc_c1_c0 of the voltage to be sampled corresponding to the sampling channels C1 and C0; the calibration is performed step by step in the same way. Finally, the calibrated value Vc_c15_c14 of the voltage to be sampled corresponding to the sampling channels C15 and C14 is used to calibrate the measured value Vm_c16_c15 of the voltage to be sampled corresponding to the sampling channels C16 and C15, so as to obtain the calibrated value Vc_c16_c15 of the voltage to be sampled corresponding to the sampling channels C16 and C15. Finally, the calibration of each group of voltages to be sampled is realized to eliminate the voltage measurement error caused by the change of the common-mode voltage.

[0027] In one embodiment, the calibrated value of the voltage to be sampled corresponding to the lowest-side sampling channel pair is equal to the measured value of the voltage to be sampled corresponding to the lowest-side sampling channel pair, that is, the calibration coefficient corresponding to the lowest-side sampling channel pair is 1.

[0028] In another embodiment, the measured values Vm_ 1 …Vm_ i of the voltages to be sampled corresponding to each stage of the low-voltage side sampling channel pairs, the measured values Vm_ i+1 of the voltages to be sampled corresponding to the higher-level sampling channel pairs, and the calibration coefficients K_ 1 …K_ i 、K_ i+1 corresponding to each stage of the low-voltage side sampling channel pairs and the higher-level sampling channel pairs are used to obtain the calibrated value Vc_ i+1 of the voltage to be sampled corresponding to the higher-level sampling channel pairs, where Vc_ i+1 = Vm_ i+1 × Vm_ i × … × Vm_ 1 × K_ i+1 × K_ i × … × K_ 1 , and i is used to identify the sampling channel pair.

[0029] In one embodiment, during the process of calibrating a higher-level measured voltage using the voltage on the low-voltage side, a pre-configured calibration coefficient needs to be used. For example, when calibrating the measured value Vm_c0_cn1 of the voltage to be sampled corresponding to sampling channels C0 and CN1 using the measured values Vm_cn1_cn2 of the voltages to be sampled corresponding to sampling channels CN1 and CN2, the calibrated value Vc_c0_cn1 of the voltage to be sampled corresponding to sampling channels C0 and CN1 is Vc_c0_cn1 = Vm_c0_cn1 × Vm_cn1_cn2 × K_c0_cn1, where K_c0_cn1 is the calibration coefficient corresponding to sampling channels C0 and CN1.

[0030] When calibrating the measured value Vm_c1_c0 of the voltage to be sampled corresponding to sampling channels C1 and C0 using the calibrated value Vc_c0_cn1 of the voltage to be sampled corresponding to sampling channels C0 and CN1, the calibrated value Vc_c1_c0 of the voltage to be sampled corresponding to sampling channels C1 and C0 is Vc_c1_c0 = Vm_c1_c0 × Vc_c0_cn1 × K_c1_c0, where K_c1_c0 is the calibration coefficient corresponding to sampling channels C1 and C0.

[0031] In one embodiment, the calibration method further includes pre-configuring the calibration coefficients corresponding to each group of sampling channels. In one embodiment, a known voltage is used as the voltage to be measured for each group of sampling channels, and the calibration coefficients for each group of sampling channels are calculated based on the known voltage and the measured voltages of each group of sampling channels. As shown in Table 1:

[0032] Table 1:

[0033]

[0034] Continued Table 1:

[0035]

[0036] In one embodiment, the calibrated value of the voltage on the low-voltage side is multiplied by the calibration coefficient to calibrate the measured value of the higher-level voltage to be measured to a known true value, thereby solving the calibration coefficient. In another embodiment, by setting multiple groups of known voltages, multiple groups of calibration coefficients are obtained, and the final calibration coefficient is obtained by weighted averaging.

[0037] In summary, as detailed in the illustrated embodiments, applying the calibration method of the present invention has significant progressiveness: by using the sampling channel group with the smallest gain error and calibrating the measured voltages of the sampling channel group closest to the positive electrode of the battery pack step by step upward, the influence brought by the gain error is eliminated, thereby reliably reducing the measurement error and generally improving the judgment accuracy of the states of each single-junction cell of the battery pack.

[0038] The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the above specific embodiments, and those skilled in the art can make modifications or equivalent transformations within the scope of the claims, which should all be included in the protection scope of the present invention.

Claims

1. A method for calibrating a common-mode voltage, the circuit for performing the calibration method includes a voltage sampling circuit, the voltage sampling circuit is used to sample N sets of series-connected voltages to be sampled and includes N + 1 sampling channels, N is a positive integer greater than or equal to 2, and calibration coefficients corresponding to each sampling channel are pre-configured, the method includes: S1. Use every two adjacent sampling channels to sample a set of voltages to be sampled, and every two adjacent sampling channels form a sampling channel pair; S2. Measure the voltages to be sampled obtained by sampling through each sampling channel pair in sequence to obtain measured values of the voltages to be sampled; S3. Obtain the calibration value Vc_ of the corresponding voltage to be sampled using the low-voltage side sampling channel i , the measured value Vm_ of the corresponding voltage to be sampled using the higher-level sampling channel i+1 , and the calibration coefficient K_ of the corresponding higher-level sampling channel i+1 , and obtain the calibration value Vc_ of the corresponding voltage to be sampled using the higher-level sampling channel i+1 , where Vc_ i+1 = Vm_ i+1 × V c_i × K_ i+1 , where i is used to identify the sampling channel pair; or, Using the measurement values Vm_ of the corresponding voltages to be sampled by each level of low-voltage side sampling channels 1 …Vm_ i , the measurement values Vm_ of the corresponding voltages to be sampled by the higher-level sampling channel i+1 , and the calibration coefficients K_ of the corresponding low-voltage side sampling channels and higher-level sampling channels 1 …K_ i , K_ i+1 , to obtain the calibration value Vc_ of the corresponding voltage to be sampled by the higher-level sampling channel i+1 , where Vc_ i+1 = Vm_ i+1 ×Vm_ i ×…×Vm_ 1 ×K_ i+1 ×K_ i ×…×K_ 1 , and i is used to identify the sampling channel pair.

2. The method for calibrating a common-mode voltage according to claim 1, wherein: The N sets of voltages to be sampled are the positive and negative voltages of each battery in N series-connected batteries, and each sampling channel pair realizes sampling of the positive and negative voltages of one battery.

3. The method for calibrating a common-mode voltage according to claim 1, wherein: The voltage sampling circuit further includes sampling capacitors, and each sampling channel is correspondingly connected to a sampling capacitor.

4. The method for calibrating a common-mode voltage according to claim 1, wherein: Use a known voltage as the voltage to be sampled for each group of sampling channels, and calculate the calibration coefficients of each group of sampling channels according to the known voltage and the measured voltages corresponding to each group of sampling channels.

5. The method for calibrating a common-mode voltage according to claim 1, wherein: When measuring the voltages to be sampled obtained by sampling through the sampling channels in sequence, the sampling values of each group of voltages to be sampled are input into a modulation circuit through a data selector to realize analog-to-digital conversion of the sampling voltage.

6. The method for calibrating a common-mode voltage according to claim 5, wherein: Use a switched capacitor Σ-Δ ADC to realize analog-to-digital conversion of the sampling voltage.

7. A chip that performs the method for calibrating a common-mode voltage according to any one of claims 1-6.

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