Power receiving device and wireless power supply system

Abstract

A power receiving device (10) of a wireless power supply system (1) receives power from a power transmission circuit (11) connected to a power source (5) and having a power transmission coil (111). The power receiving device (10) includes a power receiving circuit (12), a power converter (13a), an LC filter (14), and switches (135a, 136b). The switches (135a, 136b) are controlled by a control device (17) based on a voltage (V2) detected by a voltage detection unit (16) for detecting the output voltage of the power receiving circuit (12). When no power is supplied, the switches (135a, 136b) disconnect the power receiving circuit (12) from the power converter (13a).

Description

Technical Field

[0001] The present application relates to a powered device and a wireless power supply system. Background Art

[0002] There is a wireless power supply technology that transmits power through magnetic field coupling between two coils separated by a space. There are various methods for adjusting the supplied power in wireless power supply technology, most of which are performed by controlling the power converter on the power transmission side. However, the loads in the application objects of wireless power supply technology are mostly storage elements such as batteries. Therefore, in order to adjust the supplied power according to the charging status of the storage element, it is desired to control the power through the power converter on the load side (receiving side). Due to the above reasons, various methods have been reported for controlling the transmitted power only through the power converter on the receiving side (for example, see Patent Document 1).

[0003] The power receiving device disclosed in Patent Document 1 has two power converters connected to a coil that receives AC power from a power transmitter. The first power converter on the coil side rectifies the AC voltage into a DC voltage, while the second power converter connected to the first power converter converts the rectified DC voltage into either a DC voltage or an AC voltage. One power converter controls the transmission efficiency with the transmitting side, while the other controls the received power. This allows both transmission efficiency control and power control of the supplied power to be achieved using only the power converter on the receiving side.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2017-93094 Summary of the Invention

[0007] Problems to be solved by the invention

[0008] The control method disclosed in Patent Document 1 includes a short-circuit mode in which the first power converter short-circuits the power receiving coil, preventing power from being supplied after the first power converter. Therefore, the method is applicable to resonator configurations in which the output from the coil acts as a current source. However, when the resonator is configured to act as a voltage source, overcurrent may occur, potentially causing heating and damage to the switching element. Therefore, the method described in Patent Document 1 requires a specific resonator configuration.

[0009] The present application discloses a technology for solving the above-mentioned problem, and aims to provide a power receiving device capable of shutting off the power from the power receiving coil by opening the circuit and realizing power control by a power converter on the power receiving side.

[0010] Means used to solve problems

[0011] The power receiving device disclosed in the present application is a power receiving device of a wireless power supply system, comprising: a power receiving circuit having a power receiving coil that receives AC power transmitted from a power transmitting circuit; a power converter that converts the AC power received by the power receiving circuit into DC power; a voltage detection unit that detects the output voltage of the power receiving circuit; at least one switch that switches between conducting and disconnecting the circuit between the power receiving circuit and the power converter; and a control device that controls the switch based on the voltage detected by the voltage detection unit.

[0012] Effects of the Invention

[0013] According to the power receiving device disclosed in the present application, since the power from the power receiving coil can be cut off by opening the circuit, power control can be performed using a power converter on the power receiving side for the resonator structure operating as a voltage source. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a schematic configuration diagram showing an example of a wireless power supply system according to the first embodiment.

[0015] Figure 2 This is a schematic circuit diagram showing the configuration of the power receiving device according to the first embodiment.

[0016] Figure 3A Yes Figure 2 The diagram explains the operation of the power receiving device shown.

[0017] Figure 3B Yes Figure 2 The diagram explains the operation of the power receiving device shown.

[0018] Figure 4A Yes Figure 2 The diagram explains the operation of the power receiving device shown.

[0019] Figure 4B Yes Figure 2 The diagram explains the operation of the power receiving device shown.

[0020] Figure 5A This is a schematic diagram of the waveforms of various signals in the power receiving device according to the first embodiment, and is a diagram for explaining a basic control method of power control.

[0021] Figure 5B This is a schematic diagram of the waveforms of various signals in the power receiving device according to the first embodiment, and is a diagram for explaining a basic control method of power control.

[0022] Figure 5CThis is a schematic diagram of the waveforms of various signals in the power receiving device according to the first embodiment, and is a diagram for explaining a basic control method of power control.

[0023] Figure 6A This is a schematic diagram of the waveforms of various signals in the power receiving device according to the first embodiment, and is a diagram for explaining an example of a power control method.

[0024] Figure 6B This is a schematic diagram of the waveforms of various signals in the power receiving device according to the first embodiment, and is a diagram for explaining another example of the power control method.

[0025] Figure 6C This is a schematic diagram of the waveforms of each signal in the power receiving device according to the first embodiment, and is a diagram for explaining another example of the power control method.

[0026] Figure 7 This is a schematic circuit diagram showing the configuration of a power receiving device according to the second embodiment.

[0027] Figure 8 It shows Figure 7 A diagram showing the current path during the non-power supply period in the structure.

[0028] Figure 9A This is a schematic diagram of the waveforms of various signals in the power receiving device according to the second embodiment, and is a diagram for explaining an example of a power control method.

[0029] Figure 9B This is a schematic diagram of the waveforms of various signals in the power receiving device according to the second embodiment, and is a diagram for explaining an example of a power control method.

[0030] Figure 9C This is a schematic diagram of the waveforms of various signals in the power receiving device according to the second embodiment, and is a diagram for explaining an example of a power control method.

[0031] Figure 10 This is a schematic circuit diagram showing the configuration of a power receiving device according to a third embodiment.

[0032] Figure 11A This is a schematic diagram of waveforms of various signals in the power receiving device according to the third embodiment, and is a diagram for explaining a drive signal pattern I used for reactor current control.

[0033] Figure 11B This is a schematic diagram of waveforms of various signals in the power receiving device according to the third embodiment, and is a diagram for explaining drive signal pattern II used for reactor current control.

[0034] Figure 11CThis is a schematic diagram of waveforms of various signals in the power receiving device according to the third embodiment, and is a diagram for explaining drive signal pattern III used for reactor current control.

[0035] Figure 11D This is a schematic diagram of waveforms of various signals in the power receiving device according to the third embodiment, and is a diagram for explaining drive signal pattern IV used for reactor current control.

[0036] Figure 12A This is a flowchart for performing power control based on reactor current control in the power receiving device according to the third embodiment.

[0037] Figure 12B This is a flowchart for performing power control based on reactor current control in the power receiving device according to the third embodiment.

[0038] Figure 12C This is a flowchart for performing power control based on reactor current control in the power receiving device according to the third embodiment.

[0039] Figure 12D This is a flowchart for performing power control based on reactor current control in the power receiving device according to the third embodiment.

[0040] Figure 12E This is a flowchart for performing power control based on reactor current control in the power receiving device according to the third embodiment.

[0041] Figure 13 This is a schematic circuit diagram showing the configuration of a power receiving device according to a fourth embodiment.

[0042] Figure 14A This is a schematic diagram of waveforms of various signals in the power receiving device according to the fourth embodiment, and is a diagram for explaining an example of a power control method.

[0043] Figure 14B This is a schematic diagram of another waveform of each signal in the power receiving device according to the fourth embodiment, and is a diagram for explaining an example of a control method for power control.

[0044] Figure 14C This is a schematic diagram of still another waveform of each signal in the power receiving device according to the fourth embodiment, and is a diagram for explaining an example of a power control method.

[0045] Figure 15 It is the hardware structure diagram of the control device. DETAILED DESCRIPTION

[0046] Hereinafter, this embodiment will be described with reference to the accompanying drawings. In the drawings, the same reference numerals denote the same or corresponding parts.

[0047] Implementation method 1.

[0048] Hereinafter, the wireless power supply system according to the first embodiment will be described.

[0049] Figure 1 : is a diagram showing the schematic configuration of the wireless power supply system according to the first embodiment. Figure 1 In the embodiment, wireless power supply system 1 includes a power transmission circuit 11 that transmits power supplied from an AC power source 5 as a main power source, and a power receiving device 10 that receives power from power transmission circuit 11 and outputs the power to a load 15. Power receiving device 10 includes a power receiving circuit 12, a power converter 13, and an LC filter 14.

[0050] Power supplied from the AC power source 5 is transmitted contactlessly between the power transmission circuit 11 and the power receiving circuit 12. The power converter 13 converts the AC power received by the power receiving circuit 12 into DC power and adjusts the received power to a predetermined level. The LC filter 14 attenuates the AC component contained in the power output from the power converter 13. The power output from the LC filter 14 is consumed or stored by the load 15.

[0051] The power transmission circuit 11 is a circuit including at least one coil. Figure 1 In the example, the transmission coil 111 and the transmission-side capacitor 112 are connected in series. While the transmission-side capacitor 112 is not essential for wireless power transmission, its absence significantly reduces the efficiency of power transfer between the transmitting and receiving coils. Therefore, it is desirable to use the transmission-side capacitor 112 for power factor correction.

[0052] The power receiving circuit 12 is a circuit including at least one coil. Figure 1 In the example, the receiving coil 121 and the receiving-side capacitor 122 are connected in parallel. While receiving-side capacitor 122 is not essential for wireless power transmission, its absence significantly reduces the efficiency of power transmission between the transmitting and receiving coils. Therefore, it is desirable to use receiving-side capacitor 122 for power factor correction.

[0053] Depending on the configuration of the power transmission circuit 11 and the power reception circuit 12, the output of the power reception circuit 12 may be a voltage source or a current source. Figure 1 In the configuration of the power transmission circuit 11 and the power reception circuit 12 shown, the power source is a voltage source and the resonator does not have an impedance conversion characteristic. Therefore, the output of the power reception circuit 12 operates as a voltage source. Figure 1 The configurations of the power transmission circuit 11 and the power reception circuit 12 shown are examples, and are not limited to their respective configurations. However, in this embodiment, a configuration in which the output of the power reception circuit 12 operates as a voltage source is targeted.

[0054] Figure 2 This is a schematic circuit diagram illustrating the configuration of the power receiving device 10 according to Embodiment 1. In this embodiment, an example using a rectifier circuit 13a as the power converter 13 is described. Rectifier circuit 13a includes four diodes 131, 132, 133, and 134, and two semiconductor switches 135a and 136a. Diode 132 is connected in series with semiconductor switch 135a, and diode 134 is connected in series with semiconductor switch 136a. Semiconductor switches 135a and 136a are electronic components with characteristics obtained by connecting a switch, such as a MOS-FET (Metal-Oxide-Semiconductor Field-Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor), in antiparallel with a diode. Semiconductor switch 135a is connected in series with diode 132 in a direction that prevents current from flowing through diode 132 when the switch is off. Similarly, the semiconductor switch 136a is connected in series with the diode 134 in a direction in which no current flows to the diode 134 when the switch is in an OFF state. Figure 2 In the embodiment, semiconductor switches 135a and 136a are connected in series to diodes 132 and 134, which are the lower arms on the negative side of the rectifier circuit 13a, respectively. However, it is also possible to configure semiconductor switches 135a and 136a to be connected in series to diodes 131 and 133, which are the upper arms on the positive side, respectively.

[0055] The LC filter 14 is composed of a DC reactor 141 and a DC capacitor 142 , and has a function of attenuating AC components of the output voltage and current of the rectifier circuit 13 a .

[0056] The load 15 is a motor that consumes electric power, a battery for storing electric power, or the like.

[0057] The voltage detection unit 16 detects the output voltage V2 of the power receiving circuit 12 (the input voltage of the rectifier circuit 13 a ).

[0058] The control device 17 generates a drive signal for controlling the on and off of the semiconductor switches 135 a and 136 a of the rectifier circuit 13 a based on information on the voltage V2 detected by the voltage detection unit 16 .

[0059] The power receiving device 10 of this embodiment opens the output of the power receiving circuit 12, depending on the on / off state of the semiconductor switches 135a and 136a, thereby shutting off the power supply from the power receiving circuit 12 to the load 15. As described above, in the configuration of the power transmitting circuit 11 and the power receiving circuit 12 of this embodiment, the output of the power receiving circuit 12 operates as a voltage source. Therefore, when the output of the power receiving circuit 12 is open, the impedance seen by the AC power source 5 becomes very large. As a result, the output power of the AC power source 5 decreases.

[0060] Hereinafter, the on and off states of the semiconductor switches 135 a and 136 a and the circuit operation will be described.

[0061] Figure 3A 、 3B This is a diagram for explaining the circuit operation of the power receiving device 10 in a steady state when the semiconductor switch 135a is off and the semiconductor switch 136a is on. The arrows in the diagram indicate current paths.

[0062] Figure 3A The diagram illustrates the circuit operation when the output voltage V2 of the power receiving circuit 12 is positive, representing the operation during the power supply period when power is supplied from the power receiving circuit 12 to the load. When the output voltage V2 of the power receiving circuit 12 is positive, diodes 131, 134, and semiconductor switch 136a conduct, and power is supplied from the power receiving circuit 12 to the load 15. At this point, the output voltage of the rectifier circuit 13a equals the input voltage V2. The potential difference between the load voltage Vout and the output voltage of the rectifier circuit 13a is applied to the DC reactor 141 of the LC filter 14. The load current increases or decreases based on this potential difference and the inductance of the DC reactor 141.

[0063] Figure 3B The diagram illustrates the circuit operation when the output voltage V2 of the power receiving circuit 12 is negative, representing the operation during the non-power supply period when the power supply from the power receiving circuit 12 is cut off. When the output voltage V2 of the power receiving circuit 12 is negative, diodes 133, 134, and semiconductor switch 136a conduct, stopping the power supply from the power receiving circuit 12 to the load 15. At this time, the output voltage of the rectifier circuit 13a reaches zero. The current supplied to the load 15 is the energy stored in the DC reactor 141, and the load current decreases according to the gradient determined by the load voltage Vout and the inductance of the DC reactor 141.

[0064] Figure 4A 、 4B This is a diagram for explaining the circuit operation of the power receiving device 10 in a stable state when the semiconductor switch 135a is on and the semiconductor switch 136a is off. The arrows in the diagram indicate current paths.

[0065] Figure 4A The diagram illustrates the circuit operation when the output voltage V2 of the power receiving circuit 12 is positive, showing the operation during the non-power supply period when the power supply from the power receiving circuit 12 is cut off. When the output voltage V2 of the power receiving circuit 12 is positive, diodes 131, 132, and semiconductor switch 135a conduct, stopping the power supply from the power receiving circuit 12 to the load 15. At this time, the output voltage of the rectifier circuit 13a reaches zero. The current supplied to the load 15 is the energy stored in the DC reactor 141, and the load current decreases according to the slope determined by the load voltage Vout and the inductance of the DC reactor 141.

[0066] Figure 4B The diagram illustrates the circuit operation when the output voltage V2 of the power receiving circuit 12 is negative, representing the operation during the power supply period when power is supplied from the power receiving circuit 12 to the load. When the output voltage V2 of the power receiving circuit 12 is negative, diodes 133, 132, and semiconductor switch 135a conduct, allowing power to be supplied from the power receiving circuit 12 to the load 15. Consequently, the output voltage of the rectifier circuit 13a becomes equal to the input voltage V2. At this point, the potential difference between the load voltage Vout and the output voltage of the rectifier circuit 13a is applied to the DC reactor 141, causing the load current to increase or decrease based on this potential difference and the inductance of the DC reactor 141.

[0067] When both semiconductor switches 135a and 136a are turned on, the rectifier circuit 13a operates as a full-bridge diode rectifier circuit. That is, when the output voltage V2 of the power receiving circuit 12 is positive, Figure 3A When the output voltage V2 of the power receiving circuit 12 is negative, Figure 4B The circuit operation in this embodiment supplies power from the power receiving circuit 12 to the load 15 regardless of the polarity of the output voltage V2 of the power receiving circuit 12. Therefore, the power supply period is always maintained.

[0068] On the other hand, when both semiconductor switches 135a and 136a are off, the path for power supply from power receiving circuit 12 to load 15 is lost. Furthermore, the path for the energy stored in DC reactor 141 to circulate is lost, causing an overvoltage to occur in semiconductor switch 135a or 136a. This overvoltage can damage the semiconductor switch, so it is necessary to generate a drive signal that prevents either semiconductor switch 135a or 136a from turning off. Therefore, when switching semiconductor switches 135a and 136a on and off in a complementary manner, it is desirable to provide an overlap period during which both switches remain on.

[0069] Figure 5A 、 5B5C is a diagram illustrating the basic power control method in power receiving device 10 according to Embodiment 1, and is a schematic diagram of the waveforms of various signals. The schematic waveforms of the output voltage V2 of power receiving circuit 12, the input current of rectifier circuit 13a, and the drive signals for semiconductor switches 135a and 136a are shown, from top to bottom. A waveform of 1 indicates an on state for the drive signal, and a waveform of 0 indicates an off state.

[0070] Figure 5A The output voltage V2 and input current of the power receiving circuit 12 are in the shape of a sine wave and a rectangular wave respectively, and the two semiconductor switches 135a and 136a are always in the on state. Figure 5A Indicates the status of continuous power supply.

[0071] Figure 5B Shown with Figure 5A Compared to the signal waveform when the output power from the power receiving device 10 is set to be smaller. Figure 5B As shown by the position of the dotted line in , the semiconductor switches 135a, 136a are switched on and off at the zero crossing point or near the zero crossing point of the output voltage V2 of the power receiving circuit 12 detected by the voltage detection unit 16. That is, the switching between the power supply period PS and the non-power supply period NPS is performed at the zero crossing point or near the zero crossing point of the output voltage V2 of the power receiving circuit 12. In addition, the power control is performed by controlling the time ratio of the total power supply period and the total non-power supply period within a prescribed period. The prescribed period is pre-set to a time that is an integer multiple of half a cycle of the output voltage V2 of the power receiving circuit 12, and can be changed according to the required power. Figure 5B In the embodiment, the repetition period of the drive signal of the semiconductor switches 135a and 136a is set to be the same as the three cycles of the output voltage V2 of the power receiving circuit 12, the time of two cycles of the output voltage V2 of the power receiving circuit 12 is set as the power supply period PS, and the time of the remaining one cycle is set as the non-power supply period NPS. Figure 5B The average output voltage of the rectifier circuit 13a becomes Figure 5A Therefore, when the load 15 is a resistance load, Figure 5B The output power becomes Figure 5A The signal waveform shown is 4 / 9 of the output power.

[0072] Here, the zero crossing point or the vicinity of the zero crossing point of the output voltage V2 indicates a time when the voltage value is sufficiently smaller than the maximum value of the output voltage V2 of the power receiving circuit 12 detected by the voltage detection unit 16 , and is a time when the absolute value of the output voltage V2 is approximately 20% or less of the maximum value.

[0073] Figure 5C Shown with Figure 5A and Figure 5B Compared to the signal waveform when the output power from the power receiving device 10 is set to be smaller. Figure 5C In the embodiment, the repetition period of the drive signal of the semiconductor switches 135a and 136a is set to be the same as the time of two cycles of the output voltage V2 of the power receiving circuit 12, the time of one cycle of the output voltage V2 of the power receiving circuit 12 is set as the power supply period PS, and the remaining one cycle is set as the non-power supply period NPS. Figure 5C The average output voltage of the rectifier circuit 13a becomes Figure 5A Therefore, when the load 15 is a resistance load, Figure 5C The output power becomes Figure 5A The signal waveform shown is 1 / 4 of the output power.

[0074] As described above, by adjusting the ratio of the power supply period to the non-power supply period within a predetermined predetermined period, the output voltage of the rectifier circuit 13a can be controlled, and as a result, the output power can be controlled. Furthermore, by performing the on / off switching operation of all semiconductor switches at or near the zero-crossing point of the output voltage V2 of the power receiving circuit 12, the switching loss represented by the product of the voltage and current of the semiconductor switches can be minimized.

[0075] In addition, Figure 5A 、 5B 5C shows an example in which the semiconductor switches 135a and 136a are driven in a complementary manner by switching on and off. However, even if both semiconductor switches are turned on during the power supply period, the circuit operation is the same.

[0076] Next, a method of obtaining the same output power from the power receiving device 10 by using different power control methods will be described.

[0077] Figure 6A 、 6B 6C are diagrams for explaining a control method based on a different power control of the power receiving device 10 according to the first embodiment. Figure 6A 、 6B , 6C and Figure 5A 、 5B 5C, respectively, show the schematic waveforms of the input voltage V2 of the rectifier circuit 13a, the input current of the rectifier circuit 13a, and the drive signals of the semiconductor switches 135a and 136a from top to bottom. Figure 6A 、 6BIn the three examples shown in 6C, when the repetition period of the driving signal is set to the same time as the three cycles of the output voltage V2 of the power receiving circuit 12, only one cycle out of the three cycles of the output voltage V2 of the power receiving circuit 12 is set as the power supply period, and the driving signals of the semiconductor switches 135a and 136a are set so that the average value of the output voltage is 1 / 3 of the maximum state (both switches are always on).

[0078] exist Figure 6A In the signal waveform, Figure 5A 、 5B Similarly, example 5C shows a signal waveform when the power supply period PS is set to one cycle of the frequency of the output voltage V2 of the power receiving circuit 12. When the average output power is set to M / N (the maximum value), the repetition period of the drive signal is N (here, N=3) and the power supply period PS is M cycles (here, M=1). This results in a pattern of M cycles of power supply period PS and (NM) cycles of non-power supply period NPS (here, NM=2).

[0079] exist Figure 6B In the signal waveform, Figure 6A Unlike the signal waveform shown, the power supply period PS is set with half a cycle of the frequency of the output voltage V2 of the power receiving circuit 12 as one unit. This power supply period PS is intermittently provided, and the time corresponding to one cycle of the output voltage V2 of the power receiving circuit 12 within the repetition period of the driving signal is set as the total power supply period.

[0080] exist Figure 6C The signal waveform of shows an example of a method for setting the power supply period and the non-power supply period according to the polarity of the output voltage V2 of the power receiving circuit 12. Figure 6C In the example, the first two positive periods of the output voltage V2 of the power receiving circuit 12 are set as the power supply period PS, and the negative period is always set as the non-power supply period NPS. Figure 6B Similarly, the power supply period PS is set with half a cycle of the frequency of the output voltage V2 of the power receiving circuit 12 as one unit. This power supply period PS is provided intermittently, and the time corresponding to one cycle of the output voltage V2 of the power receiving circuit 12 within the repetition cycle of the driving signal is set as the total power supply period.

[0081] about Figure 6A 、 6B, 6C, both are states where the average value of the output voltage is 1 / 3 of the maximum state (state where both switches are always on), but different waveforms are used as drive signals for the semiconductor switches 135a and 136a. Due to the difference in the waveform of the drive signal, the magnitude of the ripple current included in the output current of the rectifier circuit is different. For example, in Figure 6A In the waveform of the driving signal, the non-power supply period is the time of two cycles of the output voltage V2 of the power receiving circuit 12, but Figure 6B In the waveform of the driving signal, there are two non-power supply periods within the repetition cycle of the driving signal, and each non-power supply period corresponds to one cycle of the output voltage V2 of the power receiving circuit 12. When the non-power supply period is shortened, the ripple current of the input current of the rectifier circuit 13a is reduced, and therefore, Figure 6B and Figure 6A Compared with the case of the waveform of the driving signal, the ripple current becomes smaller. Since the ripple current as an AC component must be attenuated by the LC filter 14 in the end, if the ripple current is small, the LC filter 14 can be miniaturized.

[0082] Likewise, in Figure 6C In the waveform of the driving signal, there are two non-power supply periods within the repetition period of the driving signal. Figure 6A The non-power supply period is short, so Figure 6A Compared with the case of the waveform of the driving signal, the ripple current can be reduced.

[0083] according to Figure 5A 、 5B , 5C and Figure 6A 、 6B As can be seen from the waveforms of the drive signals shown in 6C, power control can be performed by changing the waveforms of the drive signals of the semiconductor switches 135a and 136a. Furthermore, switching losses can be suppressed by performing the switching operations of turning on and off the semiconductor switches 135a and 136a at or near the zero crossing point of the output voltage V2 of the power receiving circuit 12.

[0084] As described above, the power receiving device 10 of the wireless power supply system according to the first embodiment includes at least: the power receiving circuit 12 that receives power from the power transmitting circuit 11; the voltage detecting unit 16 that detects the output voltage V2 of the power receiving circuit 12; the power converter 13 (rectifier circuit 13a) having semiconductor switches 135a and 136a that converts AC power received by the power receiving circuit 12 into DC power; and a control unit that controls the semiconductor switches 135a and 136a based on the output voltage V2 of the power receiving circuit 12 detected by the voltage detecting unit 16. The semiconductor switches 135a and 136a are operated to switch between a conductive state and a disconnected state with respect to the power receiving circuit 12. Therefore, in a configuration in which the resonator operates as a voltage source, the disconnected state can be achieved by opening the circuit between the power receiving circuit and the power converter, rather than by short-circuiting the circuit. This eliminates the possibility of overcurrent damaging the components constituting the power converter.

[0085] Furthermore, by adjusting the ratio between the power supply period (when power converter 13 and power receiving circuit 12 are in a conductive state) and the non-power supply period (when power converter 13 and power receiving circuit 12 are disconnected) within a predetermined, predefined period, the output voltage of power converter 13 can be controlled, thereby controlling the output power. Furthermore, by performing the on / off switching operation of all semiconductor switches at or near the zero-crossing point of output voltage V2 of power receiving circuit 12, switching losses can be suppressed, enabling efficient power control.

[0086] Implementation method 2.

[0087] Hereinafter, a power receiving device of a wireless power supply system according to Embodiment 2 will be described. The power receiving device of this Embodiment 2 is also applicable to the wireless power supply system according to Embodiment 1. Figure 1 The wireless power supply system shown.

[0088] Figure 7 This is a schematic circuit diagram showing the configuration of the power receiving device according to the second embodiment. Figure 2 The same or corresponding parts are marked with the same reference numerals and their description is omitted. In the second embodiment, the configuration of the two semiconductor switches 135b and 136b in the rectifier circuit 13b is different from that in the first embodiment, and they are connected in series with the diode 133 and the diode 134 respectively. Figure 7 In the figure, the arrangement of semiconductor switches 135b and 136b is an example, and they may be connected in series with diodes 131 and 132. That is, they may be connected in series with a diode on either side of the left and right branches constituting the rectifier circuit 13b.

[0089] The difference from the operation of the first embodiment is that, during the non-power supply period, the circulation path of the energy stored in the DC reactor 141 is not affected by the states of the semiconductor switches 135 b and 136 b . Figure 8 Show Figure 7 The energy stored in the DC reactor 141 can circulate through the load 15, the diode 132, and the diode 131, and the semiconductor switch is not included in the circulation path. However, the non-power supply period in the embodiment 1 is Figure 3B 、 Figure 4A , but the energy circulating path of DC reactor 141 includes a semiconductor switch. If the semiconductor switch is damaged or malfunctions while the energy accumulated in DC reactor 141 is circulating, the circulating path may be disconnected. The energy accumulated in DC reactor 141 may cause an overvoltage in the circuit, potentially leading to overall device failure. However, in the configuration of this second embodiment, no semiconductor switch is included in the circulating path of the energy accumulated in DC reactor 141, and the circuit is not affected by the state of semiconductor switches 135b and 136b.

[0090] Figure 9A 、 9B 9C is a diagram illustrating an example of a method for controlling power control in a power receiving device according to Embodiment 2, and is a schematic diagram showing waveforms of various signals in the power receiving device. The schematic waveforms are shown, from top to bottom, for the output voltage V2 of the power receiving circuit 12, the input current of the rectifier circuit 13b, and the drive signals of the semiconductor switches 135b and 136b. Figure 9A 、 9B In the three examples shown in 9C, the drive signals of the semiconductor switches 135b and 136b are set so that the average value of the output voltage from the power receiving device becomes 1 / 3 of the maximum state (state where both switches are always on).

[0091] exist Figure 9A The signal waveform of shows a power control method for driving a semiconductor switch with one cycle of the output voltage V2 of the power receiving circuit 12 as one unit. Figure 9B The signal waveform of shows a power control method for driving a semiconductor switch with half a cycle of the output voltage V2 of the power receiving circuit 12 as one unit. Figure 9C The signal waveform of shows a power control method for setting the power supply period PS and the non-power supply period NPS according to the polarity of the output voltage V2 of the power receiving circuit 12.

[0092] according to Figure 9A 、 9BAs can be seen from Figure 9C, in Embodiment 2, turning on both semiconductor switches 135b and 136b creates a power supply period PS, while turning off both semiconductor switches 135b and 136b creates a non-power supply period NPS. Therefore, both semiconductor switches 135b and 136b can be operated using a common drive signal.

[0093] exist Figure 9B In the signal waveform, half a cycle of the output voltage V2 of the power receiving circuit 12 is set as one unit of the power supply period PS, and the repetition period of the driving signal becomes the time of 1.5 cycles of the output voltage V2 of the power receiving circuit 12, which becomes Figure 9A and Figure 9C half the time.

[0094] In addition, during the power supply period PS, only one of the two semiconductor switches becomes a current path, so the state of the other semiconductor switch can also be either on or off. Figure 7 Even when both semiconductor switches 135b and 136b are on, when the output voltage V2 of the power receiving circuit 12 is positive, the semiconductor switch 136b side becomes the current path, and when the output voltage V2 of the power receiving circuit 12 is negative, the semiconductor switch 135b side becomes the current path. Figure 9A 、 9B In the driving signals of the semiconductor switches 135b and 136b of 9C, the time indicated by ON (signal is 1), that is, the time indicated by the diagonal lines, is a period during which the switches can be either ON or OFF.

[0095] In addition, Figure 9C In the embodiment, the driving signal of the semiconductor switch 135b is switched on and off, but even in the always off state, the circuit operation is the same.

[0096] As described above, the power receiving device of Embodiment 2 achieves the same effects as Embodiment 1. Furthermore, according to Embodiment 2, semiconductor switches 135b and 136b are connected in series with the diodes on either of the left and right branches of rectifier circuit 13b, which constitutes power converter 13. This allows both semiconductor switches 135b and 136b to be simultaneously turned off to provide a non-power supply period. This prevents the generation of excessive voltages caused by the semiconductor switch states in the circulation path of energy accumulated in DC reactor 141 during the non-power supply period. Furthermore, since both semiconductor switches 135b and 136b can be controlled by a single drive signal, the control device can be simplified compared to Embodiment 1.

[0097] Implementation method 3.

[0098] Hereinafter, a power receiving device of a wireless power supply system according to Embodiment 3 will be described. The power receiving device of this Embodiment 3 is also applicable to the wireless power supply system according to Embodiment 1. Figure 1 The wireless power supply system shown.

[0099] Figure 10 This is a schematic circuit diagram showing the configuration of the power receiving device according to the third embodiment. Figure 7 Identical or corresponding parts are denoted by the same reference numerals, and their description will be omitted. The power receiving device of Embodiment 3 further includes a current detection unit 18 for detecting current ILdc flowing through DC reactor 141, and a voltage detection unit 19 for detecting voltage Vout of load 15. Current and voltage information detected by current detection unit 18 and voltage detection unit 19 is input to control device 17. In Embodiments 1 and 2, control device 17 performs power control by setting an output power command value Pout* so that the output from the power receiving device reaches a predetermined output power, generating drive signals for semiconductor switches, and controlling the semiconductor switches. In Embodiment 3, control device 17 controls output power using current control. The output power is calculated by dividing output power command value Pout* by load voltage Vout detected by voltage detection unit 19, calculating current command value ILdc* for DC reactor 141, and controlling the semiconductor switches so that current ILdc of DC reactor 141 detected by current detection unit 18 reaches current command value ILdc*.

[0100] Hereinafter, a method of controlling the output power by controlling the current of the DC reactor 141 using the semiconductor switches 135 b and 136 b will be described.

[0101] Figure 11A 、 11B 11C, and 11D are schematic diagrams of the waveforms of various signals in the power receiving device of Embodiment 3, illustrating the drive signal patterns used for reactor current control. In this embodiment, in addition to the drive signal patterns for controlling semiconductor switches 135b and 136b so that the maximum voltage relative to the average value of the output voltage of rectifier circuit 13b is the following four voltages, a drive signal pattern for the non-power supply state is added, resulting in five drive signal patterns.

[0102] Drive signal mode I: The mode in which the average output voltage becomes the maximum voltage.

[0103] Drive signal mode II: The mode in which the average output voltage becomes 3 / 4 of the maximum voltage.

[0104] Drive signal mode III: The mode in which the average output voltage becomes 1 / 2 of the maximum voltage.

[0105] Drive signal mode IV: The mode in which the average output voltage becomes 1 / 4 of the maximum voltage.

[0106] Drive signal mode V: a mode serving as a non-powered state.

[0107] The control device 17 maintains and executes these drive signal patterns.

[0108] Figure 11A 1 is a diagram showing a driving signal pattern I, indicating that the power supply state is continuing. Figure 11B This diagram shows a drive signal pattern II. Focusing on two cycles of the output voltage V2 of the power receiving circuit 12, a period of 1.5 cycles is a power supply period PS, and a period of half a cycle is a non-power supply period NPS. This is a pattern in which the average output voltage of the rectifier circuit 13b is 3 / 4 of the maximum voltage. Figure 11C This diagram shows a drive signal pattern III. Focusing on two cycles of the output voltage V2 of the power receiving circuit 12, a power supply period PS of half a cycle and a non-power supply period NPS of half a cycle are repeated, resulting in a pattern in which the average output voltage of the rectifier circuit 13b becomes 1 / 2 of the maximum voltage. Figure 11D This diagram shows drive signal pattern IV. Focusing on two cycles of the output voltage V2 of the power receiving circuit 12, half a cycle is the power supply period PS, and 1.5 cycles is the non-power supply period NPS. This is a pattern in which the average output voltage of the rectifier circuit 13b is 1 / 4 of the maximum voltage. Drive signal pattern V, not shown, represents a non-power supply state in which both semiconductor switches 135b and 136b are off (drive signal is 0).

[0109] Then, follow 12A to 12E A method for controlling output power by controlling the current of the DC reactor 141 using five drive signal patterns will be described with reference to a flowchart of FIG.

[0110] exist Figure 12A In the initial state of step S101, the non-power supply state corresponds to the execution of drive signal pattern V. When power supply is started, control device 17 divides the set output power command value Pout* by the load voltage Vout detected by voltage detection unit 19 to calculate current command value ILdc* for DC reactor 141. Furthermore, current ILdc of DC reactor 141 detected by current detection unit 18 is input to control device 17.

[0111] When the drive signal pattern IV is executed in step S102 at the start of power supply, the current ILdc of the DC reactor 141 increases. In step S103, it is determined whether the detected current ILdc of the DC reactor 141 is equal to or greater than the current command value ILdc*. If it is equal to or greater than the current command value ILdc* (yes), the process proceeds to step S104. Figure 12B In step S103, if the detected current ILdc of the DC reactor 141 does not reach the current command value ILdc* (No), in step S104, the drive signal mode III is executed.

[0112] When the drive signal mode III is executed in step S104, the current ILdc of the DC reactor 141 further increases. In step S105, it is determined whether the detected current ILdc of the DC reactor 141 becomes equal to or greater than the current command value ILdc*. If it becomes equal to or greater than the current command value ILdc* (yes), the process proceeds to step S106. Figure 12C In step S105, if the detected current ILdc of the DC reactor 141 does not reach the current command value ILdc* (No), in step S106, the drive signal mode II is executed.

[0113] When the drive signal mode II is executed in step S106, the current ILdc of the DC reactor 141 further increases. In step S107, it is determined whether the detected current ILdc of the DC reactor 141 becomes equal to or greater than the current command value ILdc*. If it becomes equal to or greater than the current command value ILdc* (yes), the process proceeds to step S108. Figure 12D In step S107, if the detected current ILdc of the DC reactor 141 does not reach the current command value ILdc* (No), in step S108, the drive signal mode I is executed.

[0114] When the drive signal pattern I is executed in step S108, the current ILdc of the DC reactor 141 further increases. In step S109, it is determined whether the detected current ILdc of the DC reactor 141 becomes equal to or greater than the current command value ILdc*. If it becomes equal to or greater than the current command value ILdc* (yes), the process proceeds to step S109. Figure 12E In step S109, if the detected current ILdc of the DC reactor 141 does not reach the current command value ILdc* (No), there is a concern that there is a problem in the setting of the current command value ILdc*, so in step S110, the power supply is stopped as being uncontrollable.

[0115] Furthermore, in steps S103, S105, S107, and S109, a determination is made as follows as to whether the detected current ILdc of DC reactor 141 has not reached the current command value ILdc* or has exceeded the current command value ILdc*. For example, if the detected current ILdc of DC reactor 141 does not fluctuate within a certain period and has not reached the current command value ILdc*, the determination is made that the current command value ILdc* has not been reached. Alternatively, if the current command value ILdc* has not been reached even after a time period three times the repetition period of the drive signal has elapsed, the determination is made that the current command value ILdc* has not been reached. The elapsed time can be set arbitrarily. Thus, the determination is made based on the saturation state or transition of the detected current ILdc of DC reactor 141.

[0116] In step S103, when the detected current ILdc of the DC reactor 141 becomes equal to or greater than the current command value ILdc*, the process proceeds to step S104. Figure 12B In step S201, drive signal mode V is executed. That is, the power supply is set to a non-powered state. This decreases the current ILdc of DC reactor 141. Therefore, the process proceeds to step S202, where it is determined whether the current ILdc of DC reactor 141 is equal to or greater than the current command value ILdc*. If the current ILdc of DC reactor 141 remains equal to or greater than the current command value ILdc* (YES), the non-powered state of step S201 is continued. If the current ILdc of DC reactor 141 is lower than the current command value ILdc* in step S202, drive signal mode IV is executed in step S203, increasing the current ILdc of DC reactor 141.

[0117] Thereafter, the drive signal pattern V and the drive signal pattern IV are executed, and the current ILdc of the DC reactor 141 is controlled so as to approach the current command value ILdc* until a power supply stop instruction is issued.

[0118] Similarly, in step S105, when the detected current ILdc of the DC reactor 141 becomes equal to or greater than the current command value ILdc*, the process proceeds to step S106. Figure 12C In step S301, drive signal mode IV is executed. This decreases current ILdc of DC reactor 141. Therefore, the process proceeds to step S302, where it is determined whether current ILdc of DC reactor 141 is equal to or greater than command current value ILdc*. If current ILdc of DC reactor 141 remains equal to or greater than command current value ILdc* (YES), execution of drive signal mode IV in step S301 continues. If current ILdc of DC reactor 141 is lower than command current value ILdc* in step S302, drive signal mode III is executed in step S303, increasing current ILdc of DC reactor 141.

[0119] Thereafter, drive signal pattern IV and drive signal pattern III are executed, and control is performed so that current ILdc of DC reactor 141 approaches current command value ILdc* until a power supply stop instruction is issued.

[0120] Similarly, in step S107, when the detected current ILdc of the DC reactor 141 becomes equal to or greater than the current command value ILdc*, the process proceeds to step S108. Figure 12D In step S401, drive signal mode III is executed. This reduces the current ILdc of DC reactor 141. Therefore, the process proceeds to step S402, where it is determined whether the current ILdc of DC reactor 141 is equal to or greater than the current command value ILdc*. If the current ILdc of DC reactor 141 remains equal to or greater than the current command value ILdc* (YES), execution of drive signal mode III in step S401 continues. If the current ILdc of DC reactor 141 is lower than the current command value ILdc* in step S402, drive signal mode II is executed in step S403, increasing the current ILdc of DC reactor 141.

[0121] Thereafter, drive signal pattern III and drive signal pattern II are executed, and control is performed so that current ILdc of DC reactor 141 approaches current command value ILdc* until a power supply stop instruction is issued.

[0122] Similarly, in step S109, when the detected current ILdc of the DC reactor 141 becomes equal to or greater than the current command value ILdc*, the process proceeds to step S109. Figure 12E In step S501, drive signal mode II is executed. This reduces current ILdc of DC reactor 141. Therefore, the process proceeds to step S502, where it is determined whether current ILdc of DC reactor 141 is equal to or greater than command current value ILdc*. If current ILdc of DC reactor 141 remains equal to or greater than command current value ILdc* (YES), execution of drive signal mode II in step S501 continues. If current ILdc of DC reactor 141 is lower than command current value ILdc* in step S502, drive signal mode I is executed in step S503, increasing current ILdc of DC reactor 141.

[0123] Thereafter, the drive signal pattern II and the drive signal pattern I are executed, and the current ILdc of the DC reactor 141 is controlled so as to approach the current command value ILdc* until a power supply stop instruction is issued.

[0124] As described above, by gradually increasing the average value of the output voltage of the rectifier circuit 13 b and selecting two drive signal patterns that can be controlled to the current command value ILdc*, current control can be performed at a voltage close to the load voltage Vout.

[0125] Furthermore, as described above, if the current ILdc of the DC reactor 141 cannot reach or exceed the current command value ILdc* even when the drive signal pattern I is executed in step S109, the current is deemed uncontrollable and power supply is stopped in step S110. However, in addition to problems with the setting of the current command value ILdc*, there is also the possibility that the current control is not possible in principle. Therefore, it is necessary to change the test conditions or circuit constants.

[0126] Furthermore, by applying this current control, the applied voltage to DC reactor 141 and the fluctuation in the applied voltage can be minimized, thereby reducing the output current ripple of rectifier circuit 13b. Furthermore, when the current ripple is set to a fixed value, compared to operating the power receiving device using only drive signal pattern I, which achieves the maximum voltage, and drive signal pattern V, which is in a non-powered state, applying the current control method of this third embodiment allows the required inductance value of DC reactor 141 to be designed to be smaller, thereby achieving miniaturization.

[0127] The drive signal patterns and control methods described above are examples of Embodiment 3. For example, the number of drive signal patterns can be increased or decreased, or the type of drive method can be changed to a different type. Control device 17 has at least three drive signal patterns and, based on current ILdc detected by current detection unit 18, controls the semiconductor switch using two drive signal patterns with similar ratios of power supply period to non-power supply period among the multiple drive signal patterns to gradually achieve a predetermined output power command value Pout*.

[0128] As described above, the power receiving device of Embodiment 3 achieves the same effects as those of Embodiment 2. Furthermore, the device includes current detection means 18 for detecting current ILdc flowing through DC reactor 141 and voltage detection means 19 for detecting voltage Vout of load 15. Output power is controlled using current control in which the semiconductor switches are controlled so that current ILdc flowing through DC reactor 141 detected by current detection means 18 equals current command value ILdc*. Consequently, by gradually increasing the average output voltage of rectifier circuit 13b and performing current control at a voltage close to load voltage Vout, the applied voltage to DC reactor 141 and the amount of fluctuation in the applied voltage can be suppressed, thereby reducing output current ripple in rectifier circuit 13b.

[0129] In addition, in the above-mentioned embodiment 3, the Figure 7 In the embodiment 1, the current detecting unit 18 for detecting the current ILdc flowing through the DC reactor 141 and the voltage detecting unit 19 for detecting the voltage Vout of the load 15 are provided. Figure 2 In the embodiment, a current detection unit 18 for detecting the current ILdc flowing through the DC reactor 141 and a voltage detection unit 19 for detecting the voltage Vout of the load 15 may also be provided. In the first embodiment, a drive signal pattern can also be generated that gradually increases the average value of the output voltage of the rectifier circuit 13a. By gradually increasing the average value of the output voltage of the rectifier circuit 13a and performing current control at a voltage close to the load voltage Vout, the voltage applied to the DC reactor 141 and the fluctuation amount of the applied voltage can be suppressed, thereby reducing the output current ripple of the rectifier circuit 13a.

[0130] Implementation method 4.

[0131] Hereinafter, a power receiving device of a wireless power supply system according to a fourth embodiment will be described. The power receiving device of the fourth embodiment is also applicable to the wireless power supply system according to the first embodiment. Figure 1 The wireless power supply system shown.

[0132] Figure 13 This is a schematic circuit diagram showing the configuration of a power receiving device according to the fourth embodiment. Figure 1 、 7 10 are denoted by the same reference numerals, and their descriptions are omitted. In the power receiving device of Embodiment 4, a bidirectional switch 20 is connected between the power receiving circuit 12 and the rectifier circuit 13c. The rectifier circuit 13c, which serves as a power converter, is composed of only four diodes.

[0133] The power receiving device in this fourth embodiment controls output power using a bidirectional switch 20. When the bidirectional switch 20 is on, the power supply period begins, and when it is off, the power supply period begins. In the resonator configuration of the wireless power supply system, which operates as a voltage source, when the bidirectional switch 20 is off, the circuit between the power receiving circuit and the power converter becomes open, rather than short-circuited. This eliminates the possibility of overcurrent damaging components such as diodes that constitute the power converter. The timing of switching the bidirectional switch 20 on and off occurs at or near the zero-crossing point of the input voltage V2 of the rectifier circuit 13c. This reduces switching losses in the bidirectional switch 20, similar to the aforementioned first to third embodiments.

[0134] Furthermore, the output power can be controlled by the time the bidirectional switch is on, and the output power can be controlled regardless of the polarity of the input voltage V2 of the rectifier circuit 13c. This simplifies the control program and reduces the computational load of the control device. Furthermore, since the rectifier circuit 13c is a full-bridge diode rectifier circuit, modular components can be used, simplifying circuit assembly.

[0135] Figure 14A 、 14B 14C is a diagram for explaining a control method based on power control of the power receiving device according to the fourth embodiment. Figure 14A 、 14B 14C respectively show the outline waveforms of the input voltage V2 of the rectifier circuit 13c, the input current of the rectifier circuit 13c, and the driving signal of the bidirectional switch 20 from top to bottom. Figure 14A and Figure 14C In the embodiment, when the repetition period of the driving signal is set to the same time as the three cycles of the output voltage V2 of the power receiving circuit 12, only one cycle of power supply period is provided in the three cycles of the output voltage V2 of the power receiving circuit 12, and the driving signal of the bidirectional switch 20 is set so that the average value of the output voltage becomes 1 / 3 of the maximum state (the bidirectional switch is always in the on state). Figure 14A and Figure 14C Equivalent to the embodiment 1 Figure 6A and Figure 6C Thus, in the fourth embodiment using the bidirectional switch 20, the same output power control as in the first embodiment can be performed.

[0136] In addition, Figure 14B In the example in which half a cycle of the output voltage V2 of the power receiving circuit 12 is set as one unit of the power supply period PS and the repetition period of the drive signal is 1.5 cycles of the output voltage V2 of the power receiving circuit 12, the drive signal of the bidirectional switch 20 is set so that the average value of the output voltage becomes 1 / 3 of the maximum state (the bidirectional switch is always in the on state). Figure 14B Equivalent to Implementation 2 Figure 9B Thus, even in the fourth embodiment using the bidirectional switch 20, the same output power control as in the first embodiment can be performed.

[0137] In addition, Figure 13, a configuration is shown in which only the voltage detection means 16 for detecting the output voltage V2 of the power receiving circuit 12 is provided as a means for detecting current or voltage. However, it is also possible to implement power control based on reactor current control as shown in the third embodiment by adding a voltage detection means for the load 15 and a current detection means for the DC reactor 141 included in the LC filter 14.

[0138] As described above, according to the power receiving device of the fourth embodiment, a bidirectional switch 20 is provided between the power receiving circuit 12 and the rectifier circuit 13 c serving as a power converter to switch between the power supply period and the non-power supply period. Therefore, in addition to achieving the effects of the first to third embodiments, the device structure can be simplified, resulting in a reduction in size and cost.

[0139] In addition, if Figure 15 As shown, as an example of hardware, the control device 17 is composed of a processor 170 and a storage device 171. The storage device includes a volatile storage device such as a random access memory and a non-volatile auxiliary storage device such as a flash memory, which are not shown. Furthermore, an auxiliary storage device such as a hard disk may be used instead of a flash memory. The processor 170 executes a program input from the storage device 171. In this case, the program is input from the auxiliary storage device to the processor 170 via the volatile storage device. The processor 170 may also output data such as calculation results to the volatile storage device of the storage device 171, and may also store data in the auxiliary storage device via the volatile storage device.

[0140] This disclosure describes various exemplary embodiments and examples, but various features, aspects, and functions described in one or more embodiments are not limited to application to specific embodiments and can be applied to the embodiments individually or in various combinations.

[0141] Therefore, numerous variations not shown in the examples are contemplated within the technical scope disclosed in this specification, including, for example, variations, additions, or omissions of at least one structural element, and extraction of at least one structural element and combination with structural elements of other embodiments.

[0142] Description of Reference Numerals

[0143] 1: Wireless power supply system, 5: AC power supply, 10: Power receiving device, 11: Power transmitting circuit, 12: Power receiving circuit, 13: Power converter, 13a, 13b, 13c: Rectifier circuit, 14: LC filter, 15: Load, 16: Voltage detection unit, 17: Control device, 18: Current detection unit, 19: Voltage detection unit, 20: Bidirectional switch, 111: Power transmitting coil, 112: Power transmitting capacitor, 121: Power receiving coil, 122: Power receiving capacitor, 131, 132, 133, 134: Diode, 135a, 135b, 136a, 136b: Semiconductor switch, 141: DC reactor, 142: DC capacitor, 170: Processor, 171: Storage device.

Claims

1. A power receiving device, which is a power receiving device of a wireless power supply system, wherein: The power receiving device comprises: a power receiving circuit having a power receiving coil for receiving the AC power transmitted from the power transmitting circuit; a power converter that converts the AC power received by the power receiving circuit into DC power; a voltage detection unit configured to detect an output voltage of the power receiving circuit; at least one switch for switching the circuit between the power receiving circuit and the power converter between on and off; as well as a control device that controls the switch based on the voltage detected by the voltage detection unit, The control device controls the on and off of the switch to switch between a power supply period in which the power receiving circuit and the power converter are electrically connected and a non-power supply period in which the circuit between the power receiving circuit and the power converter is disconnected, and controls the power to be output based on the ratio of the power supply period to the non-power supply period in each repeated cycle of switching the switch on and off.

2. The power receiving device according to claim 1, wherein The time for switching the switch on and off is set to a time when the absolute value of the voltage detected by the voltage detection unit is 20% or less of the maximum value.

3. The power receiving device according to claim 1, wherein The switch is a semiconductor switch included in the power converter.

4. The power receiving device according to claim 2, wherein The switch is a semiconductor switch included in the power converter. The power receiving device according to claim 3 , wherein: The power converter is a full-bridge circuit including four diodes, and the semiconductor switch is connected in series to each of the diodes on either an upper arm or a lower arm constituting the full-bridge circuit. The power receiving device according to claim 4 , wherein: The power converter is a full-bridge circuit including four diodes, and the semiconductor switch is connected in series to each of the diodes on either an upper arm or a lower arm constituting the full-bridge circuit.

7. The power receiving device according to claim 3, wherein The power converter is a full-bridge circuit including four diodes, and the semiconductor switch is connected in series to each of the diodes on either branch side of two branches constituting the full-bridge circuit.

8. The power receiving device according to claim 4, wherein The power converter is a full-bridge circuit including four diodes, and the semiconductor switch is connected in series to each of the diodes on either branch side of two branches constituting the full-bridge circuit.

9. The power receiving device according to claim 1, wherein The switch is a bidirectional switch provided between the power receiving circuit and the power converter.

10. The power receiving device according to claim 2, wherein The switch is a bidirectional switch provided between the power receiving circuit and the power converter.

11. The power receiving device according to any one of claims 1 to 10, wherein: The control device controls the on and off of the switch in units of half a cycle of the voltage detected by the voltage detection unit.

12. The power receiving device according to any one of claims 1 to 10, wherein: The power receiving device is further provided with: an LC filter having a reactor and connected to the power converter; and a current detection unit for detecting the current flowing through the reactor, The control device controls the switch so as to achieve a preset output power command value based on the detected current.

13. The power receiving device according to claim 11, wherein The power receiving device is further provided with: an LC filter having a reactor and connected to the power converter; and a current detection unit for detecting the current flowing through the reactor, The control device controls the switch so as to achieve a preset output power command value based on the detected current.

14. The power receiving device according to claim 12, wherein The control device has at least three drive signal patterns for controlling the switch, and in the at least three drive signal patterns, the ratio of the power supply period in each repetitive cycle of switching the switch on and off is different. Based on the current value detected by the current detection unit, the switch is controlled so as to gradually reach the preset output power command value using two of the plurality of drive signal patterns having a similar ratio between the power supply period and the non-power supply period.

15. The power receiving device according to claim 13, wherein The control device has at least three drive signal patterns for controlling the switch, and in the at least three drive signal patterns, the ratio of the power supply period in each repetitive cycle of switching the switch on and off is different. Based on the current value detected by the current detection unit, the switch is controlled so as to gradually reach the preset output power command value using two of the plurality of drive signal patterns having a similar ratio between the power supply period and the non-power supply period.

16. The power receiving device according to any one of claims 1 to 10, wherein: The power receiving device further includes a current detection unit that detects an output current from the power converter. The control device controls the switch so as to achieve a preset output power command value based on the detected current.

17. The power receiving device according to claim 11, wherein The power receiving device further includes a current detection unit that detects an output current from the power converter. The control device controls the switch so as to achieve a preset output power command value based on the detected current.

18. A wireless power supply system, wherein: The wireless power supply system comprises: a power transmission circuit connected to a power source and having a power transmission coil; and The power receiving device according to any one of claims 1 to 17, Electric power is transmitted from the power transmission circuit to the power receiving device in a contactless manner.

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