Magnetic random access memory structure

Abstract

A magnetic random access memory (MRAM) structure includes a transistor including a gate, a source and a drain, a magnetic tunnel junction (MTJ) element including at least a free layer, an insulating layer and a fixed layer, wherein the insulating layer is between the free layer and the fixed layer, and the free layer is on the insulating layer, wherein the free layer of the MTJ element is electrically connected to a bit line (BL), the fixed layer of the MTJ element is electrically connected to the source of the transistor, the drain of the transistor is electrically connected to a sense line (SL), and a first conductive via directly contacts the MTJ element, wherein the first conductive via includes tungsten.

Description

[0001] This application is a divisional application of Chinese invention patent application (application number: 201810794914.8, application date: July 19, 2018, invention title: magnetic random access memory structure). Technical Field

[0002] This invention relates to the field of semiconductor technology, and in particular to a magnetic tunnel junction (MTJ) structure for a magnetic random access memory (MRAM). Background Technology

[0003] Magnetic random access memory (MRAM) is a non-volatile memory technology that uses magnetization states to represent stored data. Generally, MRAM comprises multiple magnetic memory cells arranged in an array. Each memory cell essentially represents a bit value of data. Each memory cell contains at least one magnetic element, which may include two magnetic plates (or material layers on a semiconductor substrate), each having an associated magnetic force direction (or magnetic moment orientation), and a thin non-magnetic layer between the two magnetic plates.

[0004] More specifically, an MRAM element is typically based on a magnetic tunnel junction (MTJ) element. An MTJ element comprises at least three basic layers: a free layer, an insulating layer, and a fixed layer. The free and fixed layers are magnetic layers, and the insulating layer is located between the free and fixed layers. Furthermore, the magnetization direction of the free layer can rotate freely, but is constrained by the physical dimensions of the layer, pointing only in one of two directions (parallel or antiparallel to the magnetic direction of the fixed layer); the magnetization direction of the fixed layer is fixed in a specific direction. A bit is written by positioning the magnetization direction of the free layer, in one of these two directions. The resistance of the MTJ element changes depending on whether the magnetic moments of the free and fixed layers are aligned or opposite. Therefore, the bit value can be read by determining the resistance of the MTJ element. To further clarify, when the magnetization directions of the free and fixed layers are parallel and the magnetic moments have the same polarity, the resistance of the MTJ element is in a low-resistance state. Essentially, the value stored in this state is represented as "0". When the magnetization directions of the free layer and the fixed layer are antiparallel and the magnetic moments have opposite polarities, the resistance of the MTJ element is in a high-resistance state. Basically, the value stored in this state is represented as "1". Summary of the Invention

[0005] This invention provides a magnetic random access memory (MRAM) structure, comprising a transistor including a gate, a source, and a drain, a magnetic tunnel junction (MTJ) element, and at least a free layer, an insulating layer, and a fixed layer, wherein the insulating layer is located between the free layer and the fixed layer, and the free layer is located on the insulating layer, wherein the free layer of the MTJ element is electrically connected to a bit line (BL), the fixed layer of the MTJ element is electrically connected to the source of the transistor, the drain of the transistor is electrically connected to a sense line (SL), and a first conductive via directly contacting the MTJ element, wherein the material of the first conductive via includes tungsten.

[0006] The invention also provides a magnetic random access memory (MRAM) structure, comprising a transistor including a gate, a source, and a drain, a magnetic tunnel junction (MTJ) element, and at least a free layer, an insulating layer, and a fixed layer, wherein the insulating layer is located between the free layer and the fixed layer, and the free layer is located on the insulating layer, wherein the free layer of the MTJ element is electrically connected to the drain of the transistor, the fixed layer of the MTJ element is electrically connected to a bit line (BL), the source of the transistor is electrically connected to a sense line (SL), and a first conductive via directly contacting the MTJ element, wherein the material of the first conductive via includes tungsten.

[0007] The present invention is characterized by the special cross-sectional profile of the MTJ element and the conductive via that directly contacts the MTJ element. The conductive via has a profile that is wider at the top and narrower at the bottom, and is made of tungsten, thus effectively supporting the MTJ element and avoiding the problem of copper atom diffusion during the writing of the value 1 to the MTJ element. Furthermore, the MTJ element has a trapezoidal and parabolic profile, thus offering advantages in actual manufacturing processes and structural stability. Attached Figure Description

[0008] Figure 1 A circuit diagram of a storage cell in a magnetic random access memory (MRAM).

[0009] Figure 2A circuit diagram of a storage cell for another magnetic random access memory;

[0010] Figure 3 This is a cross-sectional structural diagram of a storage cell of a magnetic random access memory according to a preferred embodiment of the present invention.

[0011] Figure 4 for Figure 3 A partial enlarged view of the MTJ component 310 and some surrounding components;

[0012] Figure 5 This is a cross-sectional structural diagram of a storage cell of a magnetic random access memory according to another preferred embodiment of the present invention.

[0013] Explanation of main component symbols

[0014] 100 magnetic tunneling interface element

[0015] 102 fixed layers

[0016] 104 insulation layer

[0017] 106 free layers

[0018] 110 switching element

[0019] 301 substrate

[0020] 302 transistor

[0021] 303 dielectric layer

[0022] 304 gate insulating layer

[0023] 305 dielectric layer

[0024] 306 dielectric layer

[0025] 307 dielectric layer

[0026] 308 dielectric layer

[0027] 310 Magnetic Tunneling Interface Element

[0028] 311 lower electrode

[0029] 312 fixed layer

[0030] 314 insulation layer

[0031] 316 free layers

[0032] 317 upper electrode

[0033] 320 gap wall

[0034] G gate

[0035] S source

[0036] D drain

[0037] CT contact structure

[0038] BL bit line

[0039] WL character line

[0040] SL sensing line

[0041] Metal layers M1, M2, M2-1, M2-2, M3, M4

[0042] Via1, Via2, Via2-1, Via2-2, Via3, Via3-1, Via3-2 conductive vias

[0043] Current direction

[0044] Part 1 of P1

[0045] Part 2, Page 2

[0046] W1 width

[0047] W2 width

[0048] H horizontal plane Detailed Implementation

[0049] To enable those skilled in the art to further understand the present invention, preferred embodiments of the present invention are described below, and the composition and desired effects of the present invention are explained in detail with reference to the accompanying drawings.

[0050] For ease of explanation, the accompanying drawings are merely illustrative to facilitate understanding of the invention, and their detailed proportions can be adjusted according to design requirements. The vertical relationships between relative elements in the drawings described herein should be understood by those skilled in the art to refer to the relative positions of objects; therefore, all can be flipped to present the same components, and this should all fall within the scope of this specification, as stated herein.

[0051] Please refer to Figure 1 The diagram illustrates a circuit diagram of a memory cell in a magnetic random access memory (MRAM). The memory cell includes a magnetic storage element, such as a magnetic tunnel junction (MTJ) element 100, and a switching element 110. The switching element 110 includes, for example, a metal-oxide-semiconductor (MOS) transistor, a MOS diode, and / or a bipolar transistor, comprising a gate (G), a drain (D), and a source (S). The switching element 110 is adapted to read from or write to the MTJ element 100.

[0052] The MTJ element 100 includes at least a pin layer 102, an insulating layer 104, and a free layer 106. The magnetization direction of the free layer 106 can be freely rotated to point in one or two directions and can be switched using spin-torque transfer (STT). For the pin layer 102, an antiferromagnetic layer can be used to fix the magnetization direction in a specific direction. The insulating layer 104 is disposed between the free layer 106 and the pin layer 102.

[0053] In this embodiment, the free layer 106 is connected to a bit line (BL), providing a voltage to the free layer during writing or reading. The gate of the switching element 110 is connected to a word line (WL), activating the memory cell during writing or reading. The source S of the switching element 110 is connected to the fixed layer 102, and the drain D of the switching element 110 is connected to a sense line (SL). During writing or reading, when the memory cell is activated by the word line WL, a voltage drives the fixed layer 102.

[0054] The data within the MTJ element 100 can be represented by the magnetization direction of the free layer 106 relative to the fixed layer 102. When the magnetization directions of the free and fixed layers are parallel and the magnetic moments have the same polarity, the resistance of the MTJ element is in a low-resistance state. Essentially, this state indicates that the value stored in the MTJ element is "0". When the magnetization directions of the free and fixed layers are antiparallel and the magnetic moments have opposite polarities, the resistance of the MTJ element is in a high-resistance state. Essentially, this state indicates that the value stored in the MTJ element is "1".

[0055] In another embodiment of the present invention, the connection method between the MTJ element 100 and the switching element 110 is slightly different. Please refer to... Figure 2 The diagram illustrates a circuit diagram of a memory cell of another magnetic random access memory. In this embodiment, the MTJ element 100 also includes a fixed layer 102, an insulating layer 104, and a free layer 106. The switching element 110 also includes a gate G, a drain D, and a source S. However, in this embodiment, the source S of the switching element 110 is connected to the sensing line SL, the drain D of the switching element 110 is connected to the free layer 106, the gate G of the switching element 110 is connected to the character line WL, and the fixed layer 102 of the MTJ element 100 is connected to the bit line BL.

[0056] Regardless of the above Figure 1 Or Figure 2The illustrated connection methods all ensure the normal operation of the MRAM. However, according to some existing technologies, such as US Patent Publication No. US2011 / 0122674, different connection methods between the MTJ element and the switching element will affect the write / read speed of the MTJ element itself. One phenomenon with the MTJ element is that writing the value "1" to the MTJ element (i.e., converting the internally stored value from 0 to 1) requires more current than writing the value "0" to the MTJ element (i.e., converting the internally stored value from 1 to 0). This phenomenon occurs due to the high magnetic moment conversion efficiency and internal configuration of the MTJ. A detailed description of this phenomenon has been disclosed in prior art (e.g., the aforementioned US Patent Publication No. US2011 / 0122674), so it will not be elaborated further here. Additionally, when writing the value "1" to the MTJ element, the current direction will flow from the fixed layer of the MTJ element to the free layer, such as... Figure 1 Or Figure 2 The current direction I is shown in the figure (the reason why the current flows from the fixed layer to the free layer of the MTJ element is related to the spin-torque transfer (STT), which is a known technique and will not be elaborated on here).

[0057] The applicant discovered that operating at higher current levels could cause some problems for MTJ components. For example, if the vias connecting the MTJ components are made of copper (Cu), copper atoms may diffuse into the MTJ components under high current conditions, thereby affecting the quality of the MTJ components.

[0058] Please refer to Figure 3 The diagram illustrates a cross-sectional view of a storage cell in a magnetic random access memory according to a preferred embodiment of the present invention. Figure 3 The cross-sectional structure shown corresponds to Figure 1The circuit diagram is shown. In this embodiment, the memory cell includes a substrate 301, on which a transistor 302 is formed in a dielectric layer 303. The transistor 302 is located in an active region of the substrate 301, and includes a gate G, a gate insulating layer 304, a source S, and a drain D. Other dielectric layers 305, 306, 307, and 308 are stacked on the dielectric layer 303. In addition, the drain D is electrically connected to a sensing line SL through a contact structure CT, the character line WL is electrically connected to the gate G, and the source S is electrically connected to a magnetic tunneling interface (MTJ) element 310. Between the source S and the MTJ element 310, another contact structure CT, a metal layer M1, a conductive via Via1, a metal layer M2, and a conductive via Via2 are sequentially included. The MTJ element 310 includes at least a fixed layer 312, an insulating layer 314, and a free layer 316. In addition, in this embodiment, the MTJ element 310 also includes a lower electrode 311 and an upper electrode 317. The lower electrode 311 is located below the fixed layer 312 and directly contacts the fixed layer 312, while the upper electrode 317 is located above the free layer 316 and directly contacts the free layer 316. The material of the lower electrode 311 or the upper electrode 317 is, for example, tantalum (Ta), but is not limited thereto. The upper electrode 317 of the MTJ element 310 is electrically connected to the upper metal layer M4 through a conductive via Via3. The metal layer M4 is electrically connected to the bit line BL, while the lower electrode 311 of the MTJ element 310 is electrically connected to the lower metal layer M2 through a conductive via Via2. The metal layers M1, M2, etc. mentioned here refer to metal conductive layers located in different dielectric layers. For example, metal layer M1 and conductive via Via1 are located in the same dielectric layer 305, while metal layer M2 is located in the dielectric layer 306 above it.

[0059] Figure 4 Draw Figure 3 A magnified view of the MTJ component 310 and surrounding components. (See attached image.) Figure 4 As shown, from bottom to top, the structure includes a conductive via Via2, a lower electrode 311, a fixed layer 312, an insulating layer 314, a free layer 316, an upper electrode 317, and a conductive via Via3. One feature of this invention is the MTJ structure and the shape of the adjacent conductive vias. As described above, when a value of 1 is written to the MTJ element, a large current intensity is generated, and the current direction is from the fixed layer 312 to the free layer 316 (from bottom to top, as shown). Figure 3 and Figure 4As shown in the diagram, a large current I may cause copper atoms in the copper conductive via Via to diffuse into the MTJ element 310, thereby affecting the quality of the MTJ element 310. Therefore, to avoid the above situation, in this invention, the conductive via Via2 located below and in direct contact with the MTJ element is not made of copper, but is made of tungsten (W). Tungsten can avoid the problem of copper atoms diffusing into the MTJ element. It is worth noting that, except for the conductive via Via2 located below and in direct contact with the MTJ element, all other conductive vias (e.g., Via1, Via3) can still be made of copper to reduce material costs and enhance conductivity. Preferably, in this embodiment, the metal layers M1, M2 and the conductive vias Via1 and Via3 are all made of copper, so the tungsten conductive via Via2 is located between the two copper conductive vias Via1 and Via3, and the conductive via Via1 is located above the contact structure CT.

[0060] From the cross-sectional view, the conductive via Via2 of the present invention is not simply cylindrical, but has a profile that is wider at the top and narrower at the bottom. More specifically, the conductive via Via2 of the present invention can be divided into two parts: a first part P1 located at the top and a second part P2 located at the bottom. The first part P1 preferably has an inverted trapezoidal cross-sectional profile, while the second part P2 has a cylindrical or rectangular profile. In this way, the first part P1 is wider, which can completely support the MTJ element above, while the second part P2 is narrower, which is beneficial for aligning the lower metal layer (e.g., M2). In this embodiment, the width W1 of the first part P1 of the conductive via Via2 is preferably equal to the bottom surface width of the lower electrode 311, and preferably the width W1 is the widest part of the entire MTJ element. In the actual manufacturing process, the above-mentioned conductive via Via2 can be formed by etching the dielectric layer multiple times and then filling it with conductive material.

[0061] Furthermore, the MTJ element 310 of the present invention (including a lower electrode 311, a fixed layer 312, an insulating layer 314, a free layer 316, and an upper electrode 317) also has a special shaped cross-sectional profile and is not a stacked structure with the same area size. For example... Figure 4As shown, the areas of the lower electrode 311, fixed layer 312, insulating layer 314, and free layer 316 decrease sequentially from bottom to top. Each of these four layers has a trapezoidal cross-sectional profile, and when stacked, they can form a structure with a trapezoidal profile. The upper electrode 317 has a bullet-shaped, parabolic, or semi-elliptical profile, located above the free layer 316, and the bottom width W2 of the upper electrode 317 is preferably equal to the top width of the free layer 316. Furthermore, a spacer wall 320 covers the outside of the MTJ element 310, and a conductive via Via3 passes through the spacer wall 320 and directly contacts the upper electrode 317. The material of the spacer wall 320 is, for example, silicon nitride, but is not limited to this. The above structure has the advantages of being easy to manufacture and having a robust structure. It can also avoid the problem of copper atoms diffusing into the MTJ element when writing the value 1 to the MTJ element, thereby improving the overall yield of MRAM.

[0062] The above Figure 3 Based on Figure 1 The circuit diagram shown is a cross-sectional view of the storage cell of a magnetic random access memory. In another embodiment of the invention, such as... Figure 5 As shown, its drawing is based on Figure 2 The circuit diagram shown is a cross-sectional view of the memory cell of the magnetic random access memory. This embodiment also includes transistors and MTJ components, but the connection method of the transistors and MTJ components is the same as described above. Figure 3The illustrated embodiment differs slightly. Notably, the transistor and MTJ element in this embodiment are reverse-connected. Specifically, transistor 302 in this embodiment includes a gate G, a gate insulating layer 304, a source S, and a drain D. The source S is electrically connected to a sensing line SL via a contact structure CT, the gate G is electrically connected to a character line WL, and the drain D is electrically connected to the MTJ element 310. From the cross-sectional view, the MTJ element 310 is not located directly above the drain D. Instead, the MTJ element 310 is electrically connected to the upper metal layer M4 via a conductive via Via3-2, and the metal layer M4 is further electrically connected to the drain D via conductive vias Via3-1, M3, Via2-1, M2-1, Via1, M1, and the contact structure CT. MTJ element 310 is electrically connected to the underlying metal layer M2-2 via conductive via Via2-2, and metal layer M2-2 is in turn electrically connected to bit line BL. Metal layers M2-1 and M2-2, conductive via Via2-1 and via Via2-2 are located in the same dielectric layer 306, while metal layer M3 is located in the same dielectric layer 307 as MTJ element 310. In other words, in this embodiment, one bottom surface of MTJ element 310 and one bottom surface of metal layer M3 are aligned on the same horizontal plane (e.g., ...). Figure 5 (The top surface of dielectric layer 306 shown). Apart from the features described above, the features, material properties, and reference numerals of the other components are similar to those of the first preferred embodiment described above, and therefore will not be repeated here.

[0063] Similar to the above embodiments, the MTJ element 310 in this embodiment includes, from bottom to top, a lower electrode 311, a fixed layer 312, an insulating layer 314, a free layer 316, and an upper electrode 317. The conductive via 3-2 directly contacts the lower electrode 311, and the conductive via 3-2 directly contacts the upper electrode 317. In this embodiment, when the value 1 is written to the MTJ element 310, the current flows from the bit line BL through the MTJ element and finally to the sensing line SL. That is, it flows from the fixed layer 312 of the MTJ element 310 to the free layer 316. Therefore, to avoid the problem of copper atoms diffusing into the MTJ element, the conductive via 3-2 in this embodiment is also made of tungsten and does not contain copper. Furthermore, the detailed features of the MTJ element, such as the conductive via Via2-2 with a wider upper profile and a narrower lower profile, the lower electrode 311 with a trapezoidal profile, the fixing layer 312, the insulating layer 314 and the free layer 316, and the upper electrode 317 with a parabolic profile, are all consistent with the above. Figure 4 The same applies as shown, so I won't go into details here.

[0064] It is worth noting that the circuit connection or component stacking structure of the present invention is... Figure 1 , Figure 2 , Figure 3 and Figure 5 For example, however, the invention is not limited thereto. If it includes... Figure 4 MRAM structures that are identical or similar to MTJ structures but combined in other circuit connection ways should also fall within the scope of this invention.

[0065] In summary, the key feature of this invention is that the MTJ element and the conductive via in direct contact with the MTJ element have a special cross-sectional profile. The conductive via has a profile that is wider at the top and narrower at the bottom, and is made of tungsten, thus effectively supporting the MTJ element and avoiding the problem of copper atom diffusion during the writing of the value 1 to the MTJ element. Furthermore, the MTJ element has a trapezoidal and parabolic profile, thus offering advantages in actual manufacturing such as ease of fabrication and structural stability.

[0066] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.

Claims

1. A magnetic random access memory (MRAM) structure, characterized in that, Include: A transistor consists of a gate, a source, and a drain. A magnetic tunnel junction (MTJ) element includes at least a free layer, an insulating layer, and a fixed layer, wherein the insulating layer is located between the free layer and the fixed layer, and the free layer is located on top of the insulating layer. The free layer of the MTJ element is electrically connected to a bit line (BL), the fixed layer of the MTJ element is electrically connected to the source of a transistor, and the drain of the transistor is electrically connected to a sense line (SL). The first conductive via directly contacts the magnetic tunneling interface element, and the material of the first conductive via is tungsten. The magnetic tunneling interface element also includes an upper electrode located at the top layer of the magnetic tunneling interface element, and the upper electrode has a bullet-shaped or parabolic profile.

2. The magnetic random access memory structure as claimed in claim 1, wherein the magnetic tunneling interface element has a trapezoidal profile.

3. The magnetic random access memory structure as claimed in claim 1, wherein the magnetic tunneling interface element further includes a lower electrode located at the bottom layer of the magnetic tunneling interface element, wherein the lower electrode has a trapezoidal profile.

4. The magnetic random access memory structure as described in claim 3, wherein the first conductive via directly contacts the lower electrode.

5. The magnetic random access memory structure as described in claim 3, further comprising a second conducting element that directly contacts the upper electrode.

6. The magnetic random access memory structure as described in claim 5, wherein the material of the second conducting element comprises copper.

7. The magnetic random access memory structure of claim 5, further comprising a spacer wall covering the upper electrode, the magnetic tunneling interface element, and the lower electrode, wherein the second conducting element passes through a portion of the spacer wall.

8. The magnetic random access memory structure as claimed in claim 1, wherein the first conductive via includes a first portion and a second portion, wherein the first portion has an inverted trapezoidal profile and is located on the second portion, and the second portion has a rectangular profile.

9. A magnetic random access memory (MRAM) structure, characterized in that, Include: A transistor consists of a gate, a source, and a drain. A magnetic tunnel junction (MTJ) element includes at least a free layer, an insulating layer, and a fixed layer, wherein the insulating layer is located between the free layer and the fixed layer, and the free layer is located on top of the insulating layer. The free layer of the MTJ element is electrically connected to the drain of a transistor, the fixed layer of the MTJ element is electrically connected to a bitline (BL), and the source of the transistor is electrically connected to a sense line (SL). The first conductive via directly contacts the magnetic tunneling interface element, and the material of the first conductive via is tungsten. The magnetic tunneling interface element also includes an upper electrode located at the top layer of the magnetic tunneling interface element, and the upper electrode has a bullet-shaped or parabolic profile.

10. The magnetic random access memory structure of claim 9, wherein the magnetic tunneling interface element further includes a lower electrode located at the bottom layer of the magnetic tunneling interface element, wherein the lower electrode has a trapezoidal profile.

11. The magnetic random access memory structure of claim 10, wherein the first conductive via directly contacts the lower electrode.

12. The magnetic random access memory structure of claim 10, further comprising a second conducting element that directly contacts the upper electrode.

13. The magnetic random access memory structure of claim 12, wherein the material of the second conducting element comprises copper.

14. The magnetic random access memory structure of claim 12, further comprising a spacer wall covering the upper electrode, the magnetic tunneling interface element, and the lower electrode, wherein the second conducting element passes through a portion of the spacer wall.

15. The magnetic random access memory structure of claim 9, wherein the first conductive via includes a first portion and a second portion, wherein the first portion has an inverted trapezoidal profile and is located on the second portion, and the second portion has a rectangular profile.

16. The magnetic random access memory structure of claim 9 further includes a second metal layer, wherein the bottom surface of the magnetic tunneling interface element is flush with the bottom surface of the second metal layer on a horizontal plane.

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