Processing Method and Apparatus for Candidate Synchronization Signal Block

Abstract

An embodiment of the present invention discloses a method and apparatus for processing candidate synchronization signal blocks. The method includes: determining a candidate synchronization signal block index, where the candidate synchronization signal block index ranges from 0 to N-1, and N is 4, 8, 10, 16, 20, 32, or 40. By implementing the embodiments of the present invention, it is beneficial to improve the coverage performance of candidate synchronization signal blocks.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and in particular, to a method and apparatus for processing candidate synchronization signal blocks. Background Art

[0002] In a wireless communication system, a user equipment (UE) can achieve time-frequency synchronization with a base station (BS) through candidate synchronization signal blocks. A synchronization signal / PBCH block (SS / PBCH Block) or a candidate SS / PBCH Block may include a primary synchronization signal (PSS), a secondary synchronization signal (SSS), and a physical broadcast channel (PBCH).

[0003] In a scenario supporting the access of low-complexity terminals, such as NR-Light (NR light access), the terminal may have only one receiving antenna. At this time, the receiving performance of the terminal will be reduced, resulting in a low coverage performance of the candidate synchronization signal block. Summary of the Invention

[0004] Embodiments of the present invention disclose a method and apparatus for processing candidate synchronization signal blocks, which are beneficial to improving the coverage performance of candidate synchronization signal blocks.

[0005] In a first aspect, embodiments of the present invention disclose a method for processing candidate synchronization signal blocks, the method may include: determining a candidate synchronization signal block index, the candidate synchronization signal block index ranging from 0 to N-1, where N is 4, 8, 10, 16, 20, 32, or 40.

[0006] In one implementation, the specific implementation of determining the candidate synchronization signal block index may be: determining the candidate synchronization signal block index according to the PBCH-DMRS sequence and / or the load of the PBCH.

[0007] In one implementation, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, the aforementioned N may be 4, 8, 10, 16, or 20.

[0008] In one implementation, the specific implementation of determining the candidate synchronization signal block index may be: determining 2 or 3 least significant bit (LSB) bits of the candidate synchronization signal block index according to the PBCH-DMRS sequence.

[0009] In one implementation, the specific implementation of determining the candidate synchronization signal block index may be: determining one, two, or three MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0010] In one implementation, the specific implementation of determining one, two, or three MSB bits of the candidate synchronization signal block index according to the load of the PBCH may be: if N is 10, determining one MSB bit of the candidate synchronization signal block index according to the load of the PBCH; if N is 16, determining one MSB bit of the candidate synchronization signal block index according to the load of the PBCH; if N is 20, determining two MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0011] In one implementation, when the subcarrier spacing of the candidate synchronization signal block is 30 kHz, N may be 4, 8, 10, 16, 20, 32, or 40.

[0012] In one implementation, the specific implementation of determining the candidate synchronization signal block index may be: determining two or three LSB bits of the candidate synchronization signal block index according to the PBCH-DMRS sequence.

[0013] In one implementation, the specific implementation of determining the candidate synchronization signal block index may be: determining one, two, or three MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0014] In one implementation, the specific implementation of determining one, two, or three MSB bits of the candidate synchronization signal block index according to the load of the PBCH may be: if N is 10 or 16, determining one MSB bit of the candidate synchronization signal block index according to the load of the PBCH; if N is 20, determining two MSB bits of the candidate synchronization signal block index according to the load of the PBCH; if N is 32, determining two MSB bits of the candidate synchronization signal block index according to the load of the PBCH; if N is 40, determining three MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0015] In one implementation, the method may further include: determining the repetition times of the candidate synchronization signal block group within the transmission window, and the candidate synchronization signal block group may include multiple candidate synchronization signal blocks.

[0016] In one implementation, the specific implementation of determining the repetition times of the candidate synchronization signal block group within the transmission window may be: determining the repetition times of the candidate synchronization signal block group within the transmission window according to the duration of the transmission window.

[0017] In one implementation, the specific implementation of determining the repetition times of the candidate synchronization signal block group within the transmission window according to the duration of the transmission window may be: determining the number of candidate synchronization signal blocks transmitted within the transmission window according to the duration of the transmission window; and determining the repetition times of the candidate synchronization signal block group within the transmission window according to the number of candidate synchronization signal blocks included in the candidate synchronization signal block group and the number of candidate synchronization signal blocks transmitted within the transmission window.

[0018] In one implementation, the method may further include: receiving a first signaling sent by a network device, where the first signaling may be used to indicate the repetition times of the candidate synchronization signal block group within the transmission window.

[0019] In one implementation, the method may further include: determining the repetition times of a set composed of multiple candidate synchronization signal block groups within the transmission window, where the candidate synchronization signal block group may include multiple candidate synchronization signal blocks.

[0020] In one implementation, the specific implementation of determining the repetition times of a set composed of multiple candidate synchronization signal block groups within the transmission window may be: determining the number of candidate synchronization signal blocks transmitted within the transmission window according to the duration of the transmission window; and determining the repetition times of the set within the transmission window according to the number of candidate synchronization signal blocks included in the set composed of multiple candidate synchronization signal block groups and the number of candidate synchronization signal blocks transmitted within the transmission window.

[0021] In one implementation, determine the extended index of the candidate synchronization signal block, and determine the quasi co-location relationship or synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block.

[0022] In one implementation, the specific implementation of determining the extended index of the candidate synchronization signal block may be: determining that the extended index of the candidate synchronization signal block is i = X1 * i1 + i2 according to the duration of the extended transmission window, the duration of the transmission window, and the period of the transmission window, where X1 is the number of candidate synchronization signal blocks within the transmission window, i1 is the index of the transmission window within the duration of the extended transmission window, and i2 is the index of the candidate synchronization signal block within the transmission window or the aforementioned candidate synchronization signal block index.

[0023] In one implementation, the specific implementation of determining the extended index of a candidate synchronization signal block may be: according to the duration of the extended transmission window and the period of the half-frame or frame in which the candidate synchronization signal block is received, determining that the extended index of the candidate synchronization signal block is i = X2 * i3 + i4, where X2 is the number or maximum number of candidate synchronization signal blocks within a half-frame or a frame, i3 is the index of the period of the half-frame or frame in which the candidate synchronization signal block is received within the duration of the extended transmission window, and i4 is the aforementioned candidate synchronization signal block index.

[0024] In one implementation, the specific implementation of determining the quasi-co-location relationship of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block may be: if multiple candidate synchronization signal blocks have the same (A mod Q) value, then the multiple candidate synchronization signal blocks have a quasi-co-location relationship, where A is the extended index of the candidate synchronization signal block, Q is a high-layer parameter, and mod represents the modulo or remainder operation (modulo).

[0025] In one implementation, the specific implementation of determining the synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block may be: determining that the synchronization signal block index of the candidate synchronization signal block is (A mod Q), where A is the extended index of the candidate synchronization signal block, Q is a high-layer parameter, and mod represents the modulo or remainder operation (modulo).

[0026] In a second aspect, an embodiment of the present invention discloses a processing apparatus for candidate synchronization signal blocks, and the apparatus includes a unit for executing the method described in the first aspect above.

[0027] In a third aspect, an embodiment of the present invention discloses a terminal, and the terminal includes a memory and a processor. The memory is used to store a computer program, the computer program includes program instructions, and the processor is configured to call the program instructions to execute the method described in the first aspect above.

[0028] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium for storing computer program instructions used by the processing apparatus for candidate synchronization signal blocks described in the third aspect above, and the computer program instructions include programs for executing the method described in the first aspect above. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0030] Figure 1 is a schematic flow chart of a method for processing candidate synchronization signal blocks provided by an embodiment of the present invention;

[0031] Figure 2 is a schematic flow chart of another method for processing candidate synchronization signal blocks provided by an embodiment of the present invention;

[0032] Figure 3 is a schematic structural diagram of a device for processing candidate synchronization signal blocks provided by an embodiment of the present invention;

[0033] Figure 4 is a schematic structural diagram of a terminal provided by an embodiment of the present invention. Detailed implementation manners

[0034] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0035] Please refer to Figure 1 , Figure 1 is a schematic flow chart of a method for processing candidate synchronization signal blocks provided by an embodiment of the present invention. This method is applied to a terminal. Specifically, as Figure 1 shown, the method for processing candidate synchronization signal blocks in the embodiment of the present invention may include but is not limited to the following steps:

[0036] S101. A terminal (also referred to as a user equipment, UE) determines a candidate synchronization signal block index. The candidate synchronization signal block index ranges from 0 to N - 1, where N is 4, 8, 10, 16, 20, 32, or 40. The candidate synchronization signal block index may refer to the index (or number) of the candidate synchronization signal block within a half frame (or half radio frame) or a frame (or radio frame). That is to say, there are N candidate synchronization signal blocks within a half frame or a frame. Generally, a frame is also referred to as a "radio frame" with a duration of 10 milliseconds, and a half frame is also referred to as a "half radio frame" with a duration of 5 milliseconds.

[0037] In the embodiment of the present invention, each candidate synchronization signal block has a predetermined or candidate time domain position, which can also be referred to as the time domain position of the candidate synchronization signal block. The terminal detects the candidate synchronization signal block and determines the candidate synchronization signal block index.

[0038] In an embodiment of the present invention, a half-frame or a frame may include N candidate synchronization signal blocks, and the N candidate synchronization signal blocks may be consecutively numbered in the order from 0 to N-1, or the candidate synchronization signal block index ranges from 0 to N-1. That is to say, the base station can send at most N candidate synchronization signal blocks in a half-frame or a frame. Wherein, N may be 4, 8, 10, 16, 20, 32, 40 or other values.

[0039] In a scenario that supports the access of low-complexity terminals, such as the new radio (NR)-light access in the 5th-generation (5G) mobile communication technology, the terminal may have only one receiving antenna. At this time, the receiving performance of the terminal will be reduced, resulting in a lower coverage performance of the candidate synchronization signal blocks. Compared with the prior art that can send at most 4 or 8 candidate synchronization signal blocks in a half-frame or a frame, the embodiment of the present invention enables more candidate synchronization signal blocks to be sent in a half-frame or a frame. Therefore, by implementing the embodiment of the present invention, it is beneficial for the terminal to receive more candidate synchronization signal blocks, thereby improving the coverage performance of the candidate synchronization signal blocks.

[0040] In an embodiment of the present invention, the terminal may refer to various forms of user equipment, access terminals, user units, user stations, mobile stations, mobile stations (abbreviated as MS), remote stations, remote terminals, mobile devices, user terminals, terminal equipment, wireless communication devices, user agents or user devices. The terminal device may also be a cellular phone, cordless phone, session initiation protocol (SIP) phone, wireless local loop (WLL) station, personal digital assistant (PDA), handheld device with wireless communication function, computing device or other processing devices connected to a wireless modem, vehicle-mounted device, wearable device, terminal device in a 5G network or terminal device in a future evolved public land mobile network (PLMN), etc. The embodiment of the present invention is not limited thereto.

[0041] A network device can be an entity on the network side for transmitting or receiving signals. For example, a network device can be an access network device (such as a base station). Devices providing base station functions in a 2G network include a Base Transceiver Station (BTS) and a Base Station Controller (BSC). Devices providing base station functions in a 3G network include a Node B and a Radio Network Controller (RNC). Devices providing base station functions in a 4G network include an Evolved Node B (eNB). In a Wireless Local Area Network (WLAN), the device providing base station functions is an Access Point (AP). Devices providing base station functions in 5G NR include a further evolved Node B (gNB). The base station in the embodiments of the present invention may also refer to devices providing base station functions in future new communication systems, etc.

[0042] It should be noted that the technical solutions provided in the embodiments of the present invention are applicable to 3G, 4G, or 5G communication systems, and are also applicable to various subsequent evolved communication systems. It should be understood that the term "and / or" in this article is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in this article indicates that the associated objects before and after are in an "or" relationship. The term "a plurality of" appearing in the embodiments of the present invention refers to two or more.

[0043] In one implementation, the terminal can also determine the repetition times of a candidate synchronization signal block group within a transmission window, where the candidate synchronization signal block group includes a plurality of candidate synchronization signal blocks. The number of candidate synchronization signal blocks included in each candidate synchronization signal block may be the same. In this way, the terminal can determine the repetition times of the candidate synchronization signal block group, and then perform a receiver combining algorithm to enhance the receiving performance of the terminal. The receiver combining algorithm includes the receiver accumulating or soft combining the detection values of signals or channels within a plurality of candidate synchronization signal blocks, and detecting, demodulating, or decoding the combined values to improve the receiving performance. Generally, a candidate synchronization signal block group is composed of non-Quasi Co-Located (non-QCL) or synchronization signal blocks using different beams. For example, in some scenarios, if a plurality of synchronization signal blocks have the same average gain, QCL-TypeA property, and QCL-TypeD property, then the plurality of synchronization signal blocks are quasi co-located; otherwise, the plurality of synchronization signal blocks are non-quasi co-located. It should be noted that the above definition of quasi co-location is only for illustration and does not constitute a limitation on the embodiments of the present invention. In other feasible implementations, other methods may be used to define quasi co-location.

[0044] Generally speaking, the transmission window can be a time window. The transmission window can be a Discovery Burst Transmission Window, a Discovery Signal Transmission Window, an SS / PBCH Block Transmission Window, or other windows, which are not limited in the embodiments of the present invention. Generally speaking, the transmission window has a property of duration, indicating the time length of the window. The duration of the transmission window can be provided by the high-layer parameter DiscoveryBurst-WindowLength-r16. When the subcarrier spacing of the candidate SS / PBCH block is 15 kHz and N is 8 or 10, the maximum duration of the transmission window can be 5 milliseconds. When the subcarrier spacing of the candidate SS / PBCH block is 15 kHz and N is 16 or 20, the maximum duration of the transmission window can be 10 milliseconds. When the subcarrier spacing of the candidate SS / PBCH block is 30 kHz and N is 8 or 10, the maximum duration of the transmission window can be 2.5 milliseconds. When the subcarrier spacing of the candidate SS / PBCH block is 30 kHz and N is 16 or 20, the maximum duration of the transmission window can be 5 milliseconds. When the subcarrier spacing of the candidate SS / PBCH block is 30 kHz and N is 32 or 40, the maximum duration of the transmission window can be 10 milliseconds. Generally speaking, given the subcarrier spacing of the candidate SS / PBCH block, the duration of the transmission window determines the number or maximum number of candidate SS / PBCH blocks within the transmission window. Generally speaking, the transmission window also has a property of period, indicating that the window appears at a certain period. The period of the transmission window can be provided by the high-layer parameter ssb-periodicityServingCell. The period of the transmission window can be the period of the half frames for reception of the SS / PBCH blocks (provided by the high-layer parameter ssb-periodicityServingCell), or a period configured by the high layer that is independent of the period of the half frames or frames for reception of the SS / PBCH blocks.

[0045] The terminal can determine the number of candidate synchronization signal blocks within the transmission window according to the duration (or called the period) of the transmission window. That is to say, there is a corresponding relationship between the duration of the transmission window and the number of candidate synchronization signal blocks transmitted within this transmission window. For example, when the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if the duration of the transmission window is 5 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 20; if the duration of the transmission window is 4 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 16; if the duration of the transmission window is 3 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 12; if the duration of the transmission window is 2 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 8; if the duration of the transmission window is 1 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 4; if the duration of the transmission window is 0.5 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 2. Another example, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, if the duration of the transmission window is 5 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 10; if the duration of the transmission window is 4 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 8; if the duration of the transmission window is 3 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 6; if the duration of the transmission window is 2 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 4; if the duration of the transmission window is 1 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 2; if the duration of the transmission window is 0.5 ms, then the number of candidate synchronization signal blocks determined within this transmission window is 1.

[0046] In one implementation, the specific implementation manner for the terminal to determine the repetition times of the candidate synchronization signal block group within the transmission window can be: determine the repetition times of the candidate synchronization signal block group within this transmission window according to the duration of the transmission window. Among them, the duration of this transmission window can be provided by a higher-layer parameter. For example, the higher-layer parameter can inform the terminal that the duration of the transmission window is 1 ms, and the terminal can determine that the duration of this transmission window is 1 ms.

[0047] Specifically, the terminal can determine the number of candidate synchronization signal blocks transmitted within the transmission window according to the duration of the transmission window; and determine the repetition times of the candidate synchronization signal block group within this transmission window according to the number of candidate synchronization signal blocks included in the candidate synchronization signal block group and the number of candidate synchronization signal blocks transmitted within this transmission window. Generally speaking, the number of candidate synchronization signal blocks (M) transmitted within this transmission window can refer to the maximum number of candidate synchronization signal blocks that the terminal can receive within this transmission window.

[0048] In one implementation, the protocol may specify the number (Q1) of candidate synchronization signal blocks included in a candidate synchronization signal block group. Generally, the number of candidate synchronization signal blocks included in each candidate synchronization signal block may be the same. The terminal may use the result obtained by dividing the number (M) of candidate synchronization signal blocks transmitted within the transmission window by the number (Q1) of candidate synchronization signal blocks included in the candidate synchronization signal block group (i.e., M / Q1) as the repetition number of the candidate synchronization signal block group within the transmission window. Optionally, Q1 may be 1, 2, 4, or 8. Optionally, the terminal may obtain a third signaling sent by the network device, and this third signaling may be used to indicate Q1. Among them, the third signaling may be an existing signaling in the protocol, such as a signaling indicating the Quasi Co-Located (QCL) relationship of the candidate synchronization signal blocks. Optionally, the third signaling may be an existing signaling in the protocol, such as a signaling indicating the quasi co-located relationship of the candidate synchronization signal blocks, but this signaling may be redefined to be used to indicate Q1. Optionally, the third signaling may also be a newly defined signaling. For example, when the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if the duration of the transmission window is 5 ms (M = 20) and Q1 = 2, the terminal may determine that the repetition number of the candidate synchronization signal block group within the transmission window is 10; if the duration of the transmission window is 4 ms (M = 16) and Q1 = 2, the terminal may determine that the repetition number of the candidate synchronization signal block group within the transmission window is 8; if the duration of the transmission window is 3 ms (M = 12) and Q1 = 2, the terminal may determine that the repetition number of the candidate synchronization signal block group within the transmission window is 6; if the duration of the transmission window is 2 ms (M = 8) and Q1 = 2, the terminal may determine that the repetition number of the candidate synchronization signal block group within the transmission window is 4; if the duration of the transmission window is 1 ms (M = 4) and Q1 = 2, the terminal may determine that the repetition number of the candidate synchronization signal block group within the transmission window is 2; if the duration of the transmission window is 0.5 ms (M = 2) and Q1 = 2, the terminal may determine that the repetition number of the candidate synchronization signal block group within the transmission window is 1.For another example, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, if the duration of the transmission window is 5 ms (M = 10) and Q1 = 2, the terminal can determine that the repetition number of the candidate synchronization signal block group within this transmission window is 5; if the duration of the transmission window is 4 ms (M = 8) and Q1 = 2, the terminal can determine that the repetition number of the candidate synchronization signal block group within this transmission window is 4; if the duration of the transmission window is 3 ms (M = 6) and Q1 = 2, the terminal can determine that the repetition number of the candidate synchronization signal block group within this transmission window is 3; if the duration of the transmission window is 2 ms (M = 4) and Q1 = 2, the terminal can determine that the repetition number of the candidate synchronization signal block group within this transmission window is 2; if the duration of the transmission window is 1 ms (M = 2) and Q1 = 2, the terminal can determine that the repetition number of the candidate synchronization signal block group within this transmission window is 1. Alternatively, the terminal can round up (i.e., ceil(M / Q1)) or round down (i.e., floor(M / Q1)) or round (i.e., round(M / Q1)) the result obtained by dividing the number (M) of candidate synchronization signal blocks transmitted within this transmission window by the number (Q1) of candidate synchronization signal blocks included in the candidate synchronization signal block group as the repetition number of the candidate synchronization signal block group within this transmission window.

[0049] In one implementation, the terminal receives a first signaling sent by the network device, and this first signaling can be used to indicate the repetition number of the candidate synchronization signal block group within this transmission window. That is, the terminal can determine the repetition number of the candidate synchronization signal block group within this transmission window according to the indication of this first signaling. In this way, based on the indication content of the first signaling, the terminal can quickly determine the repetition number of the candidate synchronization signal block group within this transmission window. Among them, the first signaling can be a signaling newly defined by the protocol.

[0050] In one implementation, the terminal can also determine the repetition number of a set composed of multiple candidate synchronization signal blocks groups within the transmission window, and this candidate synchronization signal block group includes multiple candidate synchronization signal blocks. Generally speaking, the number of candidate synchronization signal block groups included in each set can be the same. Therefore, by determining the repetition number of this set within the transmission window, the terminal can further determine the repetition number of the candidate synchronization signal block group within the transmission window. In this way, it is possible to avoid using an additional signaling to indicate the repetition number of the candidate synchronization signal block group within the transmission window, which is beneficial to saving signaling.

[0051] In one implementation, the specific implementation of determining the repetition count of the set composed of multiple candidate synchronization signal block groups within the transmission window by the terminal may be as follows: Determine the number of candidate synchronization signal blocks transmitted within the transmission window according to the duration of the transmission window; and determine the repetition count of the set within the transmission window according to the number of candidate synchronization signal blocks included in the set composed of multiple candidate synchronization signal block groups and the number of candidate synchronization signal blocks transmitted within the transmission window. Generally speaking, the number of candidate synchronization signal blocks (M) transmitted within the transmission window may refer to the maximum number of candidate synchronization signal blocks that the terminal can receive within the transmission window.

[0052] In one implementation, the protocol may specify the number (Q2) of candidate synchronization signal blocks included in a set composed of multiple candidate synchronization signal block groups. Generally, the number of candidate synchronization signal blocks included in each set may be the same. The terminal may use the result obtained by dividing the number (M) of candidate synchronization signal blocks transmitted within the transmission window by the number (Q2) of candidate synchronization signal blocks included in the set composed of multiple candidate synchronization signal block groups (i.e., M / Q2) as the repetition number of the set composed of candidate synchronization signal block groups within the transmission window. Generally, Q2 is an integer multiple of Q1. For example, when the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if the duration of the transmission window is 5 ms (M = 20), Q1 = 2, and Q2 = 4, the terminal may determine that the repetition number of the set composed of candidate synchronization signal block groups within the transmission window is 5; if the duration of the transmission window is 4 ms (M = 16), Q1 = 2, and Q2 = 4, the terminal may determine that the repetition number of the set composed of candidate synchronization signal block groups within the transmission window is 4; if the duration of the transmission window is 3 ms (M = 12), Q1 = 2, and Q2 = 4, the terminal may determine that the repetition number of the set composed of candidate synchronization signal block groups within the transmission window is 3; if the duration of the transmission window is 2 ms (M = 8), Q1 = 2, and Q2 = 4, the terminal may determine that the repetition number of the set composed of candidate synchronization signal block groups within the transmission window is 2; if the duration of the transmission window is 1 ms (M = 4), Q1 = 2, and Q2 = 4, the terminal may determine that the repetition number of the set composed of candidate synchronization signal block groups within the transmission window is 1. Another example, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, if the duration of the transmission window is 4 ms (M = 8), Q1 = 2, and Q2 = 4, the terminal may determine that the repetition number of the candidate synchronization signal block groups within the transmission window is 2; if the duration of the transmission window is 2 ms (M = 4), Q1 = 2, and Q2 = 4, the terminal may determine that the repetition number of the candidate synchronization signal block groups within the transmission window is 1. Alternatively, the terminal may use the ceiling (i.e., ceil(M / Q2)) or floor (i.e., floor(M / Q2)) or rounding (i.e., round(M / Q2)) of the result obtained by dividing the number (M) of candidate synchronization signal blocks transmitted within the transmission window by the number (Q2) of candidate synchronization signal blocks included in the set composed of multiple candidate synchronization signal block groups as the repetition number of the set composed of candidate synchronization signal block groups within the transmission window.

[0053] In one implementation, the terminal can also receive a second signaling from the network device, and this second signaling can be used to indicate the position of the truly transmitted candidate synchronization signal block within the candidate synchronization signal block group. That is, the second signaling can be used to indicate the time-frequency position of the truly transmitted candidate synchronization signal block. In this way, the terminal can perform rate configuration (such as Physical Downlink Shared Channel (PDSCH) resource mapping), collision handling (such as collision handling between the Physical Downlink Control Channel (PDCCH) and the candidate synchronization signal block), or other corresponding processing on the position of the truly transmitted candidate synchronization signal block, which is beneficial to improving the probability of successfully receiving the candidate synchronization signal block at the position of the truly transmitted candidate synchronization signal block. Among them, the second signaling can be an existing signaling in the protocol, and this signaling can be redefined to be used to indicate the position of the truly transmitted candidate synchronization signal block. Optionally, the second signaling can also be a newly defined signaling.

[0054] Furthermore, the terminal can determine the extended index of the candidate synchronization signal block, and determine the quasi co-location relationship or the synchronization signal block index (SS / PBCH block index) of the candidate synchronization signal block. Generally speaking, if multiple candidate synchronization signal blocks are quasi co-located (QCL), then the multiple candidate synchronization signal blocks are sent by the same beam. Generally speaking, if multiple candidate synchronization signal blocks are quasi co-located, then they have the same synchronization signal block index. The synchronization signal block index can be regarded as the beam index. The synchronization signal block index can be given by where is the PBCH-DMRS sequence index, is the number of candidate synchronization signal blocks within the candidate synchronization signal block group, and mod represents the modulo or remainder operation (modulo); or the synchronization signal block index can be given by where is the candidate synchronization signal block index, is the number of synchronization signal blocks within the candidate synchronization signal block group, and mod represents the modulo or remainder operation (modulo). Generally, It can be given by the high-layer parameter ssbPositionQCL-Relationship-r16. After obtaining the synchronization signal block index or beam index, the terminal can further obtain other channels / signals corresponding to the synchronization signal block index or beam index, such as the corresponding PDCCH monitoring time, the transmission opportunity of the Physical Random Access Channel (PRACH), etc., to improve system coverage and flexibility; the terminal can also merge the measurement results of the same synchronization signal block or beam to improve the measurement performance.

[0055] In one implementation, the extended index (or number) of the candidate synchronization signal block is determined, and the quasi co-location relationship or synchronization signal block index of the candidate synchronization signal block is determined according to the extended index of the candidate synchronization signal block. Generally speaking, if multiple candidate synchronization signal blocks are quasi co-located, then the multiple candidate synchronization signal blocks are sent by the same beam.

[0056] In one implementation, the specific implementation of determining the extended index of the candidate synchronization signal block can be: according to the duration (or duration) of the extended transmission window, the duration of the transmission window, and the period of the transmission window, it is determined that the extended index of the candidate synchronization signal block is i = X1 * i1 + i2, where X1 is the number of candidate synchronization signal blocks within the transmission window, i1 is the index of the transmission window within the duration of the extended transmission window, and i2 is the index of the candidate synchronization signal block within the transmission window or the aforementioned candidate synchronization signal block index. The duration of the extended transmission window can be a high-layer configured duration or period or duration. Generally speaking, the duration of the extended transmission window can be a positive integer multiple of the period of the transmission window, or a positive integer multiple of the period of the half frames for reception of the SS / PBCH blocks. Since the duration of the extended transmission window can be a positive integer multiple of the period of the transmission window, there can be multiple transmission windows within the extended transmission window, and the index of the transmission window within the duration of the extended transmission window (i.e., i1) can be jointly obtained from the duration of the extended transmission window and the period of the transmission window.

[0057] In one implementation, the specific implementation of determining the extended index of a candidate synchronization signal block may be: according to the duration of the extended transmission window and the period of the half-frame or frame in which the candidate synchronization signal block is received, determine that the extended index of the candidate synchronization signal block is i = X2 * i3 + i4, where X2 is the number or maximum number of candidate synchronization signal blocks within a half-frame or a frame, i3 is the index of the period of the half-frame or frame in which the candidate synchronization signal block is received within the duration of the extended transmission window, and i4 is the aforementioned candidate synchronization signal block index. The duration of the extended transmission window may be a duration, period, or time duration configured by a higher layer. Generally, the duration of the extended transmission window may be a positive integer multiple of the period of the transmission window, or a positive integer multiple of the period of the half-frames for reception of the SS / PBCH blocks.

[0058] In one implementation, the specific implementation of determining the quasi co-location relationship of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block may be: if multiple candidate synchronization signal blocks have the same (A mod Q) value, then the multiple candidate synchronization signal blocks have a quasi co-location relationship, where A is the extended index of the candidate synchronization signal block, Q is a higher layer parameter, and mod represents the modulo or remainder operation. Generally, Q may be the number of candidate synchronization signal blocks within the candidate synchronization signal block group. Q may be given by the higher layer parameter ssbPositionQCL-Relationship-r16, that is, Q is

[0059] In one implementation, the specific implementation of determining the synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block may be: determine that the synchronization signal block index of the candidate synchronization signal block is (A mod Q), where A is the extended index of the candidate synchronization signal block, Q is a higher layer parameter, and mod represents the modulo or remainder operation. Generally, Q may be the number of candidate synchronization signal blocks within the candidate synchronization signal block group. Q may be given by the higher layer parameter ssbPositionQCL-Relationship-r16, that is, Q is

[0060] By expanding the transmission window, the candidate synchronization signal block index can be expanded, that is, the expanded index of the candidate synchronization signal block can be obtained. That is to say, by expanding the transmission window, the candidate synchronization signal block index can be expanded in the time domain, which is equivalent to expanding the time required for a round of multi-beam transmission of the candidate synchronization signal block. For example, the time required for a round of multi-beam transmission of the candidate synchronization signal block is expanded from 5 milliseconds to 20 milliseconds. This is beneficial to dispersing the downlink transmission over a longer time period and is beneficial to optimizing the uplink-downlink ratio of the system. For example, when the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if the duration of the transmission window is 5 ms, the period of the transmission window is 10 ms, and the duration of the expanded transmission window is 20 ms, then the expanded index of the candidate synchronization signal block is determined as i = 20 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 19; if the duration of the transmission window is 4 ms, the period of the transmission window is 10 ms, and the duration of the expanded transmission window is 20 ms, then the expanded index of the candidate synchronization signal block is determined as i = 16 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 15; if the duration of the transmission window is 3 ms, the period of the transmission window is 10 ms, and the duration of the expanded transmission window is 20 ms, then the expanded index of the candidate synchronization signal block is determined as i = 12 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 11; if the duration of the transmission window is 2 ms, the period of the transmission window is 10 ms, and the duration of the expanded transmission window is 20 ms, then the expanded index of the candidate synchronization signal block is determined as i = 8 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 7; if the duration of the transmission window is 1 ms, the period of the transmission window is 10 ms, and the duration of the expanded transmission window is 20 ms, then the expanded index of the candidate synchronization signal block is determined as i = 4 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 3; if the duration of the transmission window is 0.5 ms, the period of the transmission window is 10 ms, and the duration of the expanded transmission window is 20 ms, then the expanded index of the candidate synchronization signal block is determined as i = 2 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 1.

[0061] For another example, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, if the duration of the transmission window is 5 ms, the period of the transmission window is 10 ms, and the duration of the extended transmission window is 20 ms, then the extended index of the candidate synchronization signal block is determined as i = 10 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 9; if the duration of the transmission window is 4 ms, the period of the transmission window is 10 ms, and the duration of the extended transmission window is 20 ms, then the extended index of the candidate synchronization signal block is determined as i = 8 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 7; if the duration of the transmission window is 3 ms, the period of the transmission window is 10 ms, and the duration of the extended transmission window is 20 ms, then the extended index of the candidate synchronization signal block is determined as i = 6 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 5; if the duration of the transmission window is 2 ms, the period of the transmission window is 10 ms, and the duration of the extended transmission window is 20 ms, then the extended index of the candidate synchronization signal block is determined as i = 4 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 3; if the duration of the transmission window is 1 ms, the period of the transmission window is 10 ms, and the duration of the extended transmission window is 20 ms, then the extended index of the candidate synchronization signal block is determined as i = 2 * i1 + i2, where i1 can be 0 or 1, and i2 can be an integer from 0 to 1; if the duration of the transmission window is 0.5 ms, the period of the transmission window is 10 ms, and the duration of the extended transmission window is 20 ms, then the extended index of the candidate synchronization signal block is determined as i = i1 + i2, where i1 can be 0 or 1, and i2 is 0.

[0062] By implementing the embodiments of the present invention, it is beneficial for the terminal to receive more candidate synchronization signal blocks, thereby facilitating the improvement of the coverage performance of the candidate synchronization signal blocks.

[0063] Please refer to Figure 2 , Figure 2 which is a schematic flowchart of another method for processing candidate synchronization signal blocks provided by the embodiments of the present invention. This method is applied to a terminal. Specifically, as Figure 2 shown, the method for processing candidate synchronization signal blocks according to the embodiments of the present invention may include but is not limited to the following steps:

[0064] S201. The terminal determines a candidate synchronization signal block index (or number) according to the PBCH-DMRS sequence and / or the load of the PBCH. The candidate synchronization signal block index ranges from 0 to N - 1, and N is 4, 8, 10, 16, 20, 32, or 40. The candidate synchronization signal block index may refer to the index of the candidate synchronization signal block within a half-frame or a frame.

[0065] Specifically, when the terminal makes an initial access, the terminal can determine one or more candidate synchronization signal block indices among N candidate synchronization signal blocks within a half-frame or a frame according to the Physical Broadcast Channel (PBCH)-Demodulation Reference Signal (DMRS) sequence and the load of the PBCH.

[0066] In one implementation, the candidate synchronization signal block index can have 2 (when N equals 4) or 3 (when N is greater than 4) Least Significant Bit (LSB) bits, and / or 1, 2, or 3 Most Significant Bit (MSB) bits.

[0067] In one implementation, the specific implementation of the terminal to determine the candidate synchronization signal block index according to the PBCH-DMRS sequence and / or the load of the PBCH includes: determining 2 (when N equals 4) or 3 (when N is greater than 4) LSB bits of the candidate synchronization signal block index according to the PBCH-DMRS sequence.

[0068] In one implementation, the specific implementation of the terminal to determine the candidate synchronization signal block index according to the PBCH-DMRS sequence and / or the load of the PBCH includes: determining 1, 2, or 3 MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0069] In one implementation, the value of N can be related to the subcarrier spacing of the candidate synchronization signal block. The subcarrier spacing of the candidate synchronization signal block can be 15 kHz, 30 kHz, or other values, which are not limited in the embodiments of the present invention. Specifically, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, N can be 4, 8, 10, 16, or 20. When the subcarrier spacing of the candidate synchronization signal block is 30 kHz, N can be 4, 8, 10, 16, 20, 32, or 40.

[0070] It should be noted that N can refer to the maximum number of candidate synchronization signal blocks that can be sent in a radio frame, or N can refer to the maximum number of candidate synchronization signal blocks that can be sent in a half radio frame. Specifically, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, at most 4, 8, or 10 candidate synchronization signal blocks can be sent in a half radio frame, and at most 16 or 20 candidate synchronization signal blocks can be sent in 1 radio frame. When the subcarrier spacing of the candidate synchronization signal block is 30 kHz, at most 4, 8, 10, 16, or 20 candidate synchronization signal blocks can be sent in a half radio frame, and at most 32 or 40 candidate synchronization signal blocks can be sent in 1 radio frame.

[0071] In one implementation, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, if N = 4, that is, the candidate synchronization signal block index in a half radio frame can be represented by the value of 2 bits. Therefore, according to the PBCH-DMRS sequence, 2 LSB bits are determined.

[0072] In one implementation, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, if N = 8, that is, the candidate synchronization signal block index in a half radio frame can be represented by the value of 3 bits. Therefore, according to the PBCH-DMRS sequence, 3 LSB bits are determined.

[0073] In one implementation, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, if N = 10, that is, the candidate synchronization signal block index in a half radio frame can be represented by the value of 4 bits. Therefore, according to the PBCH-DMRS sequence, 3 LSB bits are determined, and according to the load of the PBCH, 1 MSB bit is determined. In this case, the terminal can use the PBCH load bit as 1 MSB bit of the candidate synchronization signal block index in a half radio frame.

[0074] When the subcarrier spacing of the candidate synchronization signal block is 15 kHz, if N = 16, that is, the candidate synchronization signal block index in a 1 radio frame can be represented by the value of 4 bits. Therefore, according to the PBCH-DMRS sequence, 3 LSB bits are determined, and according to the load of the PBCH, 1 MSB bit is determined. In this case, the terminal can use the PBCH load bit as 1 MSB bit of the candidate synchronization signal block index in a 1 radio frame.

[0075] When the subcarrier spacing of the candidate synchronization signal block is 15 kHz, if N = 20, that is, the candidate synchronization signal block index in a 1 radio frame can be represented by the value of 5 bits. Therefore, according to the PBCH-DMRS sequence, 3 LSB bits are determined, and according to the load of the PBCH, 2 MSB bits are determined. In this case, the terminal can use the PBCH load bit as 2 MSB bits of the candidate synchronization signal block index in a 1 radio frame.

[0076] Through the above method, 1 or 2 bits in the PBCH load can be used to carry the MSB bit of the candidate synchronization signal block index.

[0077] When the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if N = 4, that is, the candidate synchronization signal block index in a half radio frame can be represented by the value of 2 bits. Therefore, according to the PBCH-DMRS sequence, 2 LSB bits are determined.

[0078] When the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if N = 8, that is, the candidate synchronization signal block index in a half radio frame can be represented by the value of 3 bits. Therefore, according to the PBCH-DMRS sequence, 3 LSB bits are determined.

[0079] When the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if N = 10, that is, the candidate synchronization signal block index in a half radio frame can be represented by the value of 4 bits. Therefore, according to the PBCH-DMRS sequence, 3 LSB bits are determined, and according to the load of the PBCH, 1 MSB bit is determined. In this case, the terminal can use the PBCH load bit as 1 MSB bit of the candidate synchronization signal block index in a half radio frame.

[0080] When the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if N = 16, that is, the candidate synchronization signal block index in a half radio frame can be represented by the value of 4 bits. Therefore, according to the PBCH-DMRS sequence, 3 LSB bits are determined, and according to the load of the PBCH, 1 MSB bit is determined. In this case, the terminal can use the PBCH load bit as 1 MSB bit of the candidate synchronization signal block index in a half radio frame.

[0081] When the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if N = 20, that is, the candidate synchronization signal block index in a half radio frame can be represented by the value of 5 bits. Therefore, according to the PBCH-DMRS sequence, 3 LSB bits are determined, and according to the load of the PBCH, 2 MSB bits are determined. In this case, the terminal can use the PBCH load bit as 2 MSB bits of the candidate synchronization signal block index in a half radio frame.

[0082] When the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if N = 32, that is, the candidate synchronization signal block index in a radio frame can be represented by the value of 5 bits. Therefore, according to the PBCH-DMRS sequence, 3 LSB bits are determined, and according to the load of the PBCH, 2 MSB bits are determined. In this case, the terminal can use the PBCH load bit as 2 MSB bits of the candidate synchronization signal block index in a radio frame.

[0083] When the subcarrier spacing of the candidate synchronization signal block is 30 kHz, if N = 40, that is, the candidate synchronization signal block index in one radio frame can be represented by the value of 6 bits. Therefore, according to the PBCH-DMRS sequence, 3 LSB bits are determined, and according to the load of the PBCH, 3 MSB bits are determined. In this case, the terminal can use the PBCH load bits as the 3 MSB bits of the candidate synchronization signal block index in one radio frame, or the terminal can use the PBCH load bits as the 3 MSB bits of the candidate synchronization signal block index in one radio frame, where is the bit for half-frame indication.

[0084] In the above manner, the MSB bits of the candidate synchronization signal block index can be carried by 1, 2, or 3 bits in the PBCH load.

[0085] By implementing the embodiments of the present invention, the candidate synchronization signal block index can be determined through the PBCH-DMRS sequence and / or the load of the PBCH, that is, the network device does not need to use an additional message or signaling to indicate the candidate synchronization signal block index to the terminal, thereby facilitating the reduction of the data volume transmitted in the network.

[0086] Furthermore, the terminal can determine the extended index of the candidate synchronization signal block, and determine the quasi co-location relationship or synchronization signal block index (SS / PBCH block index) of the candidate synchronization signal block. Generally speaking, if multiple candidate synchronization signal blocks are quasi co-located, then the multiple candidate synchronization signal blocks are sent by the same beam. Generally speaking, if multiple candidate synchronization signal blocks are quasi co-located, then the multiple candidate synchronization signal blocks have the same synchronization signal block index. The synchronization signal block index can be regarded as the beam index.

[0087] In one implementation, the terminal can determine the extended index (or number) of the candidate synchronization signal block, and determine the quasi co-location relationship or synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block. Generally speaking, if multiple candidate synchronization signal blocks are quasi co-located, then the multiple candidate synchronization signal blocks are sent by the same beam.

[0088] In one implementation, the specific implementation of determining the extended index of the candidate synchronization signal block may be: according to the duration (or called the period) of the extended transmission window, the duration of the transmission window, and the period of the transmission window, determine that the extended index of the candidate synchronization signal block is i = X1 * i1 + i2, where X1 is the number of candidate synchronization signal blocks within the transmission window, i1 is the index of the transmission window within the duration of the extended transmission window, and i2 is the index of the candidate synchronization signal block within the transmission window or the aforementioned candidate synchronization signal block index. The duration of the extended transmission window may be a duration or period or duration configured by a higher layer. Generally speaking, the duration of the extended transmission window may be a positive integer multiple of the period of the transmission window, or a positive integer multiple of the period of the half frames for reception of the SS / PBCH blocks. Since the duration of the extended transmission window may be a positive integer multiple of the period of the transmission window, there may be multiple transmission windows within the extended transmission window, and the index of the transmission window within the duration of the extended transmission window (i.e., i1) can be obtained jointly by the duration of the extended transmission window and the period of the transmission window.

[0089] In one implementation, the specific implementation of determining the extended index of the candidate synchronization signal block may be: according to the duration of the extended transmission window and the period of the half frame or frame for reception of the candidate synchronization signal block, determine that the extended index of the candidate synchronization signal block is i = X2 * i3 + i4, where X2 is the number or maximum number of candidate synchronization signal blocks within a half frame or a frame, i3 is the index of the period of the half frame or frame for reception of the candidate synchronization signal block within the duration of the extended transmission window, and i4 is the aforementioned candidate synchronization signal block index. The duration of the extended transmission window may be a duration or period or duration configured by a higher layer. Generally speaking, the duration of the extended transmission window may be a positive integer multiple of the period of the transmission window, or a positive integer multiple of the period of the half frames for reception of the SS / PBCH blocks.

[0090] In one implementation, the specific implementation of determining the quasi co-location relationship of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block may be: if multiple candidate synchronization signal blocks have the same (A mod Q) value, then the multiple candidate synchronization signal blocks have a quasi co-location relationship, where A is the extended index of the candidate synchronization signal block and Q is a high-layer parameter. Generally speaking, Q may be the number of candidate synchronization signal blocks within the candidate synchronization signal block group. Q may be given by the high-layer parameter ssbPositionQCL-Relationship-r16, that is, Q is

[0091] In one implementation, the specific implementation of determining the synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block may be: the synchronization signal block index of the candidate synchronization signal block is (A mod Q), where A is the extended index of the candidate synchronization signal block and Q is a high-layer parameter, and mod represents the modulo or remainder operation (modulo). Generally speaking, Q may be the number of candidate synchronization signal blocks within the candidate synchronization signal block group. Q may be given by the high-layer parameter ssbPositionQCL-Relationship-r16, that is, Q is

[0092] Please refer to Figure 3 , Figure 3 which is a schematic structural diagram of a processing device for candidate synchronization signal blocks provided by an embodiment of the present invention. The processing device for candidate synchronization signal blocks may be a terminal or a device with terminal functions (such as a chip). Specifically, as Figure 3 shown, the processing device 30 for candidate synchronization signal blocks may include:

[0093] A processing module 301, configured to determine a candidate synchronization signal block index, where the candidate synchronization signal block index ranges from 0 to N - 1, and N is 4, 8, 10, 16, 20, 32, or 40.

[0094] In one implementation, when the processing module 301 is configured to determine the candidate synchronization signal block index, it may specifically be configured to: determine the candidate synchronization signal block index according to the PBCH-DMRS sequence and / or the load of the PBCH.

[0095] In one implementation, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, N may be 4, 8, 10, 16, or 20.

[0096] In one implementation, when the processing module 301 is configured to determine the candidate synchronization signal block index, it may specifically be configured to: determine 2 or 3 LSB bits of the candidate synchronization signal block index according to the PBCH-DMRS sequence.

[0097] In one implementation, when the processing module 301 is used to determine the candidate synchronization signal block index, it can specifically be used to: determine one, two, or three MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0098] In one implementation, when the processing module 301 is used to determine one, two, or three MSB bits of the candidate synchronization signal block index according to the load of the PBCH, it can specifically be used to: if N is 10, determine one MSB bit of the candidate synchronization signal block index according to the load of the PBCH; if N is 16, determine one MSB bit of the candidate synchronization signal block index according to the load of the PBCH; if N is 20, determine two MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0099] In one implementation, when the subcarrier spacing of the candidate synchronization signal block is 30 kHz, N can be 4, 8, 10, 16, 20, 32, or 40.

[0100] In one implementation, when the processing module 301 is used to determine the candidate synchronization signal block index, it can specifically be used to: determine two (when N is equal to 4) or three (when N is greater than 4) LSB bits of the candidate synchronization signal block index according to the PBCH-DMRS sequence.

[0101] In one implementation, when the processing module 301 is used to determine the candidate synchronization signal block index, it can specifically be used to: determine one, two, or three MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0102] In one implementation, when the processing module 301 is used to determine one, two, or three MSB bits of the candidate synchronization signal block index according to the load of the PBCH, it can specifically be used to: if N is 10 or 16, determine one MSB bit of the candidate synchronization signal block index according to the load of the PBCH; if N is 20, determine two MSB bits of the candidate synchronization signal block index according to the load of the PBCH; if N is 32, determine two MSB bits of the candidate synchronization signal block index according to the load of the PBCH; if N is 40, determine three MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0103] In one implementation, the processing module 301 can also be used to determine the repetition times of the candidate synchronization signal block group within the transmission window, and the candidate synchronization signal block group can include multiple candidate synchronization signal blocks.

[0104] In one implementation, when the processing module 301 is used to determine the repetition number of a candidate synchronization signal block group within a transmission window, it can specifically be used to: determine the repetition number of the candidate synchronization signal block group within the transmission window according to the duration of the transmission window.

[0105] In one implementation, when the processing module 301 is used to determine the repetition number of a candidate synchronization signal block group within a transmission window according to the duration of the transmission window, it can specifically be used to: determine the number of candidate synchronization signal blocks transmitted within the transmission window according to the duration of the transmission window; determine the repetition number of the candidate synchronization signal block group within the transmission window according to the number of candidate synchronization signal blocks included in the candidate synchronization signal block group and the number of candidate synchronization signal blocks transmitted within the transmission window.

[0106] In one implementation, the processing device 30 for the candidate synchronization signal block may further include a communication module 302. The communication module 302 can be used to receive a first signaling sent by a network device, and the first signaling can be used to indicate the repetition number of the candidate synchronization signal block group within the transmission window.

[0107] In one implementation, the processing module 301 can also be used to determine the repetition number of a set composed of multiple candidate synchronization signal block groups within a transmission window, and the candidate synchronization signal block group may include multiple candidate synchronization signal blocks.

[0108] In one implementation, when the processing module 301 is used to determine the repetition number of a set composed of multiple candidate synchronization signal block groups within a transmission window, it can specifically be used to: determine the number of candidate synchronization signal blocks transmitted within the transmission window according to the duration of the transmission window; determine the repetition number of the set within the transmission window according to the number of candidate synchronization signal blocks included in the set composed of multiple candidate synchronization signal block groups and the number of candidate synchronization signal blocks transmitted within the transmission window.

[0109] In one implementation, the processing module 301 can also be used to determine the extended index of a candidate synchronization signal block, and determine the quasi-co-site relationship or synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block.

[0110] In one implementation, when the processing module 301 is used to determine the extended index of a candidate synchronization signal block, it can specifically be used to: determine that the extended index of the candidate synchronization signal block is i = X1 * i1 + i2 according to the duration of the extended transmission window, the duration of the transmission window, and the period of the transmission window, where X1 is the number of candidate synchronization signal blocks within the transmission window, i1 is the index of the transmission window within the duration of the extended transmission window, and i2 is the index of the candidate synchronization signal block within the transmission window or the aforementioned candidate synchronization signal block index.

[0111] In one implementation, when the processing module 301 is used to determine the extended index of a candidate synchronization signal block, it can specifically be used to: determine the extended index of the candidate synchronization signal block as i = X2 * i3 + i4 according to the duration of the extended transmission window and the period of the half-frame or frame in which the candidate synchronization signal block is received, where X2 is the number or maximum number of candidate synchronization signal blocks within a half-frame or a frame, i3 is the index of the period of the half-frame or frame in which the candidate synchronization signal block is received within the duration of the extended transmission window, and i4 is the index of the aforementioned candidate synchronization signal block.

[0112] In one implementation, when the processing module 301 is used to determine the quasi-co-location relationship of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block, it can specifically be used to: if multiple candidate synchronization signal blocks have the same (A mod Q) value, then the multiple candidate synchronization signal blocks have a quasi-co-location relationship, where A is the extended index of the candidate synchronization signal block, Q is a high-layer parameter, and mod represents a modulo or remainder operation (modulo).

[0113] In one implementation, when the processing module 301 is used to determine the synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block, it can specifically be used to: determine the synchronization signal block index of the candidate synchronization signal block as (A mod Q), where A is the extended index of the candidate synchronization signal block, Q is a high-layer parameter, and mod represents a modulo or remainder operation (modulo).

[0114] The embodiments of the present invention and Figures 1 - 2 the method embodiments shown are based on the same concept, and the technical effects brought by them are also the same. For the specific principle, please refer to Figures 1 - 2 the description of the embodiments shown, and details are not described herein again.

[0115] Please refer to Figure 4 , Figure 4 which is a schematic structural diagram of a terminal provided by an embodiment of the present invention. The terminal 40 may include a memory 401, a processor 402, and a communication interface 403. The memory 401, the processor 402, and the communication interface 403 are connected through one or more communication buses. Among them, the communication interface 403 is controlled by the processor 402 to transmit and receive information.

[0116] The memory 401 may include a read-only memory and a random access memory, and provide instructions and data to the processor 402. A part of the memory 401 may also include a non-volatile random access memory.

[0117] The processor 402 may be a Central Processing Unit (CPU), and the processor 402 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field-Programmable Gate Arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor. Optionally, the processor 402 may also be any conventional processor, etc. Among them:

[0118] A memory 401 for storing program instructions.

[0119] A processor 402 for calling the program instructions stored in the memory 401 to cause the terminal 40 to perform the following operations:

[0120] Determine a candidate synchronization signal block index, where the candidate synchronization signal block index ranges from 0 to N - 1, and N is 4, 8, 10, 16, 20, 32, or 40.

[0121] In one implementation, when the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to determine the candidate synchronization signal block index, specifically, the terminal 40 may be caused to perform the following operations: Determine the candidate synchronization signal block index according to the PBCH-DMRS sequence and / or the load of the PBCH.

[0122] In one implementation, when the subcarrier spacing of the candidate synchronization signal block is 15 kHz, the aforementioned N may be 4, 8, 10, 16, or 20.

[0123] In one implementation, when the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to determine the candidate synchronization signal block index, specifically, the terminal 40 may be caused to perform the following operations: Determine 2 (when N is equal to 4) or 3 (when N is greater than 4) LSB bits of the candidate synchronization signal block index according to the PBCH-DMRS sequence.

[0124] In one implementation, when the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to determine the candidate synchronization signal block index, specifically, the terminal 40 may be caused to perform the following operations: Determine 1, 2, or 3 MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0125] In one implementation, the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to determine 1, 2, or 3 MSB bits of the candidate synchronization signal block index according to the load of the PBCH. Specifically, the terminal 40 can be caused to perform the following operations: If N is 10, determine 1 MSB bit of the candidate synchronization signal block index according to the load of the PBCH; if N is 16, determine 1 MSB bit of the candidate synchronization signal block index according to the load of the PBCH; if N is 20, determine 2 MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0126] In one implementation, when the subcarrier spacing of the candidate synchronization signal block is 30 kHz, N can be 4, 8, 10, 16, 20, 32, or 40.

[0127] In one implementation, the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to determine the candidate synchronization signal block index. Specifically, the terminal 40 can be caused to perform the following operations: Determine 2 or 3 LSB bits of the candidate synchronization signal block index according to the PBCH-DMRS sequence.

[0128] In one implementation, the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to determine the candidate synchronization signal block index. Specifically, the terminal 40 can be caused to perform the following operations: Determine 1, 2, or 3 MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0129] In one implementation, the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to determine 1, 2, or 3 MSB bits of the candidate synchronization signal block index according to the load of the PBCH. Specifically, the terminal 40 can be caused to perform the following operations: If N is 10 or 16, determine 1 MSB bit of the candidate synchronization signal block index according to the load of the PBCH; if N is 20, determine 2 MSB bits of the candidate synchronization signal block index according to the load of the PBCH; if N is 32, determine 2 MSB bits of the candidate synchronization signal block index according to the load of the PBCH; if N is 40, determine 3 MSB bits of the candidate synchronization signal block index according to the load of the PBCH.

[0130] In one implementation, the processor 402 can also be used to call the program instructions stored in the memory 401 to cause the terminal 40 to perform the following operations: Determine the repetition times of the candidate synchronization signal block group within the transmission window, where the candidate synchronization signal block group can include multiple candidate synchronization signal blocks.

[0131] In one implementation, the processor 402 is used to call program instructions stored in the memory 401 to cause the terminal 40 to determine the number of repetitions of a candidate synchronization signal block group within a transmission window. Specifically, the terminal 40 may perform the following operations: determine the number of repetitions of the candidate synchronization signal block group within the transmission window according to the duration of the transmission window.

[0132] In one implementation, when the processor 402 is used to call program instructions stored in the memory 401 to cause the terminal 40 to determine the number of repetitions of a candidate synchronization signal block group within a transmission window according to the duration of the transmission window, the terminal 40 may specifically perform the following operations: determine the number of candidate synchronization signal blocks transmitted within the transmission window according to the duration of the transmission window; determine the number of repetitions of the candidate synchronization signal block group within the transmission window according to the number of candidate synchronization signal blocks included in the candidate synchronization signal block group and the number of candidate synchronization signal blocks transmitted within the transmission window.

[0133] In one implementation, the processor 402 may also be used to call program instructions stored in the memory 401 to cause the terminal 40 to perform the following operations: receive a first signaling sent by a network device, where the first signaling may be used to indicate the number of repetitions of a candidate synchronization signal block group within a transmission window.

[0134] In one implementation, the processor 402 may also be used to call program instructions stored in the memory 401 to cause the terminal 40 to perform the following operations: determine the number of repetitions of a set composed of multiple candidate synchronization signal block groups within a transmission window, where the candidate synchronization signal block group may include multiple candidate synchronization signal blocks.

[0135] In one implementation, when the processor 402 is used to call program instructions stored in the memory 401 to cause the terminal 40 to determine the number of repetitions of a set composed of multiple candidate synchronization signal block groups within a transmission window, the terminal 40 may specifically perform the following operations: determine the number of candidate synchronization signal blocks transmitted within the transmission window according to the duration of the transmission window; determine the number of repetitions of the set within the transmission window according to the number of candidate synchronization signal blocks included in the set composed of multiple candidate synchronization signal block groups and the number of candidate synchronization signal blocks transmitted within the transmission window.

[0136] In one implementation, the processor 402 may also be used to call program instructions stored in the memory 401 to cause the terminal 40 to perform the following operations: determine an extended index of a candidate synchronization signal block, and determine a quasi-co-location relationship or a synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block.

[0137] In one implementation, when the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to execute determining the extended index of the candidate synchronization signal block, specifically, the terminal 40 may be caused to perform the following operations: Determine the extended index of the candidate synchronization signal block as i = X1 * i1 + i2 according to the duration of the extended transmission window, the duration of the transmission window, and the period of the transmission window, where X1 is the number of candidate synchronization signal blocks within the transmission window, i1 is the index of the transmission window within the duration of the extended transmission window, and i2 is the index of the candidate synchronization signal block within the transmission window or the aforementioned candidate synchronization signal block index.

[0138] In one implementation, when the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to execute determining the extended index of the candidate synchronization signal block, specifically, the terminal 40 may be caused to perform the following operations: Determine the extended index of the candidate synchronization signal block as i = X2 * i3 + i4 according to the duration of the extended transmission window and the period of the half-frame or frame in which the candidate synchronization signal block is received, where X2 is the number or maximum number of candidate synchronization signal blocks within one half-frame or one frame, i3 is the index of the period of the half-frame or frame in which the candidate synchronization signal block is received within the duration of the extended transmission window, and i4 is the aforementioned candidate synchronization signal block index.

[0139] In one implementation, when the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to execute determining the quasi-co-location relationship of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block, specifically, the terminal 40 may be caused to perform the following operations: If multiple candidate synchronization signal blocks have the same (A mod Q) value, then the multiple candidate synchronization signal blocks have a quasi-co-location relationship, where A is the extended index of the candidate synchronization signal block, Q is a high-layer parameter, and mod represents the modulo or remainder operation (modulo).

[0140] In one implementation, when the processor 402 is used to call the program instructions stored in the memory 401 to cause the terminal 40 to execute determining the synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block, specifically, the terminal 40 may be caused to perform the following operations: Determine the synchronization signal block index of the candidate synchronization signal block as (A mod Q), where A is the extended index of the candidate synchronization signal block, Q is a high-layer parameter, and mod represents the modulo or remainder operation (modulo).

[0141] It should be noted that Figure 4 For the content not mentioned in the corresponding embodiments and the specific implementation manners of each step, reference can be made to Figures 1 - 2 the embodiments shown and the foregoing content, which will not be elaborated here.

[0142] An embodiment of the present invention further provides a computer-readable storage medium. The computer-readable storage medium stores a computer program, and the computer program includes program instructions. When the program instructions are executed by a processor, the processor is caused to execute the steps performed in the method embodiment as Figures 1 - 2 shown in the method embodiment.

[0143] The foregoing disclosure only shows some embodiments of the present invention. Of course, the scope of rights of the present invention cannot be limited thereby. Those of ordinary skill in the art can understand all or part of the processes of implementing the above embodiments, and equivalent changes made in accordance with the claims of the present invention still fall within the scope covered by the invention.

Claims

1. A method for processing candidate synchronization signal blocks, characterized in that, the method includes: determining an extended index of a candidate synchronization signal block, and determining a quasi - co - site relationship of the candidate synchronization signal block or a synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block; the candidate synchronization signal block index ranges from 0 to N - 1, and N is 4, 8, 10, 16, 20, 32 or 40; wherein, the determining the quasi - co - site relationship of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block includes: if multiple candidate synchronization signal blocks have the same (A mod Q) value, then the multiple candidate synchronization signal blocks have a quasi - co - site relationship; the determining the synchronization signal block index of the candidate synchronization signal block according to the extended index of the candidate synchronization signal block includes: determining the synchronization signal block index of the candidate synchronization signal block as (A mod Q); wherein, A is the extended index of the candidate synchronization signal block, Q is a high - layer parameter, and mod represents a modulo or remainder operation.

2. The method according to claim 1, characterized in that, the method further includes: determining a candidate synchronization signal block index according to a PBCH - DMRS sequence and / or the load of PBCH.

3. The method according to claim 1, characterized in that, the method further includes: determining 2 or 3 LSB bits of a candidate synchronization signal block index according to a PBCH - DMRS sequence.

4. The method according to claim 1, characterized in that, the method further includes: determining 1, 2 or 3 MSB bits of a candidate synchronization signal block index according to the load of PBCH.

5. The method according to claim 4, characterized in that, the sub - carrier spacing of the candidate synchronization signal block is 15 kHz; the determining 1, 2 or 3 MSB bits of a candidate synchronization signal block index according to the load of PBCH includes: if N is 10, then determining 1 MSB bit of a candidate synchronization signal block index according to the load of PBCH; if N is 16, then determining 1 MSB bit of a candidate synchronization signal block index according to the load of PBCH; if N is 20, then determining 2 MSB bits of a candidate synchronization signal block index according to the load of PBCH.

6. The method according to claim 4, characterized in that, the sub - carrier spacing of the candidate synchronization signal block is 30 kHz; the determining 1, 2 or 3 MSB bits of a candidate synchronization signal block index according to the load of PBCH includes: if N is 10 or 16, then determining 1 MSB bit of a candidate synchronization signal block index according to the load of PBCH; if N is 20, then determining 2 MSB bits of a candidate synchronization signal block index according to the load of PBCH; if N is 32, then determining 2 MSB bits of a candidate synchronization signal block index according to the load of PBCH; if N is 40, then determining 3 MSB bits of a candidate synchronization signal block index according to the load of PBCH.

7. The method according to claim 1, characterized in that, the method further includes: Determine the repetition times of a candidate synchronization signal block group within a transmission window, where the candidate synchronization signal block group includes a plurality of candidate synchronization signal blocks.

8. The method according to claim 7, wherein, the determining the repetition times of the candidate synchronization signal block group within the transmission window includes: determining the repetition times of the candidate synchronization signal block group within the transmission window according to the duration of the transmission window.

9. The method according to claim 8, wherein, the determining the repetition times of the candidate synchronization signal block group within the transmission window according to the duration of the transmission window includes: determining the number of candidate synchronization signal blocks transmitted within the transmission window according to the duration of the transmission window; determining the repetition times of the candidate synchronization signal block group within the transmission window according to the number of candidate synchronization signal blocks included in the candidate synchronization signal block group and the number of candidate synchronization signal blocks transmitted within the transmission window.

10. The method according to claim 7, wherein, the method further includes: receiving a first signaling sent by a network device, where the first signaling is used to indicate the repetition times of the candidate synchronization signal block group within the transmission window.

11. The method according to claim 1, wherein, the method further includes: determining the repetition times of a set composed of a plurality of candidate synchronization signal block groups within a transmission window, where the candidate synchronization signal block group includes a plurality of candidate synchronization signal blocks.

12. The method according to claim 11, wherein, the determining the repetition times of the set composed of a plurality of candidate synchronization signal block groups within the transmission window includes: determining the number of candidate synchronization signal blocks transmitted within the transmission window according to the duration of the transmission window; determining the repetition times of the set within the transmission window according to the number of candidate synchronization signal blocks included in the set composed of a plurality of candidate synchronization signal block groups and the number of candidate synchronization signal blocks transmitted within the transmission window.

13. The method according to claim 1, wherein, the determining the extended index of a candidate synchronization signal block includes: Determine the extended index of the candidate synchronization signal block according to the duration of the extended transmission window, the duration of the transmission window, and the period of the transmission window as , where X1 is the number of candidate synchronization signal blocks within the transmission window, i1 is the index of the transmission window within the duration of the extended transmission window, and i2 is the index of the candidate synchronization signal block within the transmission window or the candidate synchronization signal block index.

14. The method according to claim 1, wherein, the determining the extended index of a candidate synchronization signal block includes: Determine the extended index of the candidate synchronization signal block according to the duration of the extended transmission window and the period of the half-frame or frame in which the candidate synchronization signal block is received as , where X2 is the number or maximum number of candidate synchronization signal blocks within a half-frame or a frame, i3 is the index of the period of the half-frame or frame in which the candidate synchronization signal block is received within the duration of the extended transmission window, and i4 is the candidate synchronization signal block index.

15. A processing apparatus for candidate synchronization signal blocks, wherein, the apparatus includes units for performing the method according to any one of claims 1 to 14.

16. A computer-readable storage medium, wherein, the computer-readable storage medium stores a computer program, the computer program includes program instructions, and when the program instructions are executed by a processor, the processor is caused to execute the method according to any one of claims 1 to 14.

17. A terminal, wherein, including a memory and a processor, the memory is used to store a computer program, the computer program includes program instructions, and the processor is configured to call the program instructions to execute the method according to any one of claims 1 to 14.

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