Current sampling device

Abstract

The present disclosure relates to a current sampling device, which includes a control module, a phase-shifting module, a driving module, a three-phase full-bridge inverter, a three-phase motor, and a current sampling module. The control module is configured to output a voltage signal according to a preset current and a sampled current; the phase-shifting module is configured to generate a pulse width modulation (PWM) signal according to the voltage signal; the driving module is configured to generate a switching control signal according to the PWM signal; the three-phase full-bridge inverter is configured to receive the switching control signal and change the switching states of the respective transistors according to the switching control signal; the three-phase motor is connected to the three-phase full-bridge inverter; the current sampling module is connected to the bus of the three-phase motor and the control module to sample the bus current to obtain the sampled current. Through the above device, the embodiments of the present disclosure can solve the problem of sampling blind spots, can perform comprehensive current sampling, improve the real-time performance and comprehensiveness of current sampling, and improve the accuracy of motor control.

Description

Technical Field

[0001] The present disclosure relates to the technical field of motor control, and particularly to a current sampling device. Background Art

[0002] Due to its good speed regulation performance, wide speed regulation range and simple speed regulation method, the DC motor is widely used in high-performance speed regulation systems. However, the commutator of the brushed motor inevitably has disadvantages such as commutation sparks, mechanical noise, and poor maintainability. To make up for these deficiencies of the brushed DC motor, the brushless DC motor (BrushLess DC Motor, abbreviated as BLDC) came into being. The brushless DC motor not only makes up for the deficiencies of the brushed DC motor well, but also can be comparable to the brushed DC motor in performance, so it is more and more widely used in high-performance servo and household appliances and other fields.

[0003] When controlling a brushless DC motor, it is necessary to sample the currents of each phase of the electrodes for feedback control. However, in the related art, when performing current sampling, the problem of sampling blind spots cannot be solved. Summary of the Invention

[0004] In view of this, the present disclosure proposes a current sampling device to achieve current sampling during motor driving.

[0005] According to one aspect of the present disclosure, a current sampling device is proposed. The device includes:

[0006] A control module, a phase-shifting module, a driving module, a three-phase full-bridge inverter, a three-phase motor, and a current sampling module, wherein,

[0007] The control module is configured to output a voltage signal according to a preset current and a sampled current;

[0008] The phase-shifting module is connected to the control module and is configured to generate a Pulse Width Modulation (PWM) signal according to the voltage signal;

[0009] The driving module is connected to the phase-shifting module and is configured to generate a switching control signal according to the PWM signal;

[0010] The three-phase full-bridge inverter includes three bridge arms, each bridge arm includes an upper half-bridge and a lower half-bridge, and transistors are provided on the upper half-bridge and the lower half-bridge of each bridge arm. The three-phase full-bridge inverter is configured to receive the switching control signal and change the switching states of the respective transistors according to the switching control signal;

[0011] The three-phase motor is connected to the three-phase full-bridge inverter;

[0012] The current sampling module is connected to the bus of the three-phase motor and the control module to sample the bus current and obtain the sampled current.

[0013] Wherein, the phase-shifting module is further configured to: determine the control parameters of the PWM signal according to the voltage signal, and perform phase-shifting on the PWM signal according to the control parameters in each control stage when any one of the transistors in the lower half-bridges of the three arms is turned on, and output the phase-shifted PWM signal.

[0014] In a possible implementation manner, the control parameters include a control period, a maximum modulation phase duty ratio of the control period, a middle-value modulation phase duty ratio, and a minimum modulation phase duty ratio. Wherein, the phase-shifting module includes a duration determination unit, and the duration determination unit is configured to:

[0015] Determine a first duration according to the control period and the maximum modulation phase duty ratio;

[0016] Determine a second duration according to the maximum modulation phase duty ratio and the middle-value modulation phase duty ratio;

[0017] Determine a third duration according to the middle-value modulation phase duty ratio and the minimum modulation phase duty ratio.

[0018] In a possible implementation manner, the phase-shifting module further includes:

[0019] A first comparison unit, configured to output a first control signal when the second duration is less than a first preset duration, the first duration is greater than the first preset duration, the middle-value modulation phase duty ratio is greater than the first preset duration, and the first duration is greater than a first phase-shifting duration;

[0020] A first phase-shifting unit, connected to the first comparison unit, and configured to:

[0021] When receiving the first control signal, shift the maximum modulation phase duty ratio to the left by the first phase-shifting duration, set the reference value of the rising-edge comparator corresponding to the maximum modulation phase duty ratio to the difference between the maximum modulation phase duty ratio and the first phase-shifting duration, and set the reference value of the falling-edge comparator corresponding to the maximum modulation phase duty ratio to the sum of the maximum modulation phase duty ratio and the first phase-shifting duration;

[0022] Shift the minimum modulation phase duty ratio to the right by the first phase-shifting duration, and set the reference value of the rising-edge comparator corresponding to the minimum modulation phase duty ratio to the sum of the minimum modulation phase duty ratio and the first phase-shifting duration, and set the reference value of the falling-edge comparator corresponding to the minimum modulation phase duty ratio to the difference between the minimum modulation phase duty ratio and the first phase-shifting duration.

[0023] In a possible implementation, the phase shift module further includes:

[0024] A second comparison unit, configured to output a second control signal when the second duration is less than a first preset duration, the first duration is greater than the first preset duration, the intermediate value modulation phase duty cycle is greater than the first preset duration, the first duration is less than a first phase shift duration, and the first phase shift duration is less than the third duration;

[0025] A second phase shift unit, connected to the second comparison unit, and configured to:

[0026] When receiving the second control signal, shift the intermediate value modulation phase duty cycle to the right by the first phase shift duration, set the reference value of the rising edge comparator corresponding to the intermediate value modulation phase duty cycle to the sum of the intermediate value modulation phase duty cycle and the first phase shift duration, and set the reference value of the falling edge comparator corresponding to the intermediate value modulation phase duty cycle to the difference between the intermediate value modulation phase duty cycle and the first phase shift duration.

[0027] In a possible implementation, the first phase shift duration is the difference between the first preset duration and the third duration.

[0028] In a possible implementation, the phase shift module further includes:

[0029] A third comparison unit, configured to output a third control signal when the first duration is less than a first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the intermediate value modulation phase duty cycle is less than the difference between the control period and the first preset duration, and the minimum modulation phase duty cycle is greater than a second phase shift duration;

[0030] A third phase shift unit, connected to the third comparison unit, and configured to:

[0031] When receiving the third control signal, shift the maximum modulation phase duty cycle to the left by the second phase shift duration, set the reference value of the rising edge comparator corresponding to the maximum modulation phase duty cycle to the difference between the maximum modulation phase duty cycle and the second phase shift duration, and set the reference value of the falling edge comparator corresponding to the maximum modulation phase duty cycle to the sum of the maximum modulation phase duty cycle and the second phase shift duration;

[0032] Shift the minimum modulation phase duty cycle to the right by the second phase shift duration, and set the reference value of the rising edge comparator corresponding to the minimum modulation phase duty cycle to the sum of the minimum modulation phase duty cycle and the second phase shift duration, and set the reference value of the falling edge comparator corresponding to the minimum modulation phase duty cycle to the difference between the minimum modulation phase duty cycle and the second phase shift duration.

[0033] In a possible implementation, the phase shift module further includes:

[0034] A fourth comparison unit, configured to output a fourth control signal when the first duration is less than a first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the intermediate value modulation phase duty cycle is less than the difference between the control period and the first preset duration, the minimum modulation phase duty cycle is less than a second phase shift duration, and the second phase shift duration is less than the second duration;

[0035] A fourth phase shift unit, connected to the fourth comparison unit, configured to, when receiving the fourth control signal, shift the intermediate value modulation phase duty cycle to the right by the second phase shift duration, set the reference value of the rising edge comparator corresponding to the intermediate value modulation phase duty cycle to the sum of the intermediate value modulation phase duty cycle and the second phase shift duration, and set the reference value of the falling edge comparator corresponding to the intermediate value modulation phase duty cycle to the difference between the intermediate value modulation phase duty cycle and the second phase shift duration.

[0036] In a possible implementation, the second phase shift duration is the difference between the first preset duration and the second duration.

[0037] In a possible implementation, the phase shift module further includes:

[0038] A fifth comparison unit, configured to output a fifth control signal when the first duration is less than a first preset duration, the second duration is greater than the first preset duration, the third duration is less than the first preset duration, and the sum of the second duration and the third duration is greater than the first preset duration;

[0039] A fifth phase shift unit, connected to the fifth comparison unit, configured to, when receiving the fifth control signal, shift the intermediate value modulation phase duty cycle to the right by a third phase shift duration, set the reference value of the rising edge comparator corresponding to the intermediate value modulation phase duty cycle to the sum of the intermediate value modulation phase duty cycle and the third phase shift duration, and set the reference value of the falling edge comparator corresponding to the intermediate value modulation phase duty cycle to the difference between the intermediate value modulation phase duty cycle and the third phase shift duration.

[0040] In a possible implementation, the third phase shift duration is the difference between the first preset duration and the third duration.

[0041] In a possible implementation, the phase shift module further includes:

[0042] A sixth comparison unit, configured to output a sixth control signal when the second duration is less than a first preset duration, the first duration is greater than the first preset duration, and the duty cycle of the intermediate value modulation phase is less than the first preset duration; or when the second duration is less than the first preset duration, the first duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is greater than the first preset duration, the first duration is less than a first phase shift duration, and the first phase shift duration is less than the third duration; or when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, and the duty cycle of the intermediate value modulation phase is greater than the difference between the control period and the first preset duration; or when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is less than the difference between the control period and the first preset duration, the minimum modulation phase duty cycle is less than a second phase shift duration, and the second phase shift duration is greater than the second duration.

[0043] A sixth phase shift unit, connected to the sixth comparison unit, configured to phase shift the control signal in the current control period when receiving the sixth control signal, so that the current sampling module samples the phase current of one phase.

[0044] The control module further includes:

[0045] An acquisition unit, configured to acquire the phase currents of other phases sampled in the previous control period.

[0046] An operation unit, connected to the acquisition unit, configured to obtain the voltage signal by using the phase current of one phase sampled in the current control period and the phase currents of other phases sampled in the previous control period.

[0047] In a possible implementation manner, the phase shift module further includes:

[0048] A sampling time determination unit, configured to determine the sampling time according to the phase-shifted PWM signal and transmit the sampling time to the control module.

[0049] The control module further includes:

[0050] A sampling control unit, configured to control the current sampling module to perform current sampling according to the sampling time.

[0051] In a possible implementation manner, the phase shift module further includes:

[0052] A relationship determination unit is configured to determine the correspondence between the sampled current obtained by the current sampling module in the next control cycle and the three-phase currents of the three-phase motor, and transmit the correspondence to the control module.

[0053] In a possible implementation, the three-phase full-bridge inverter includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor. The first transistor and the fourth transistor form a first bridge arm, and the fourth transistor is the lower bridge arm. The second transistor and the fifth transistor form a second bridge arm, and the fifth transistor is the lower bridge arm. The third transistor and the sixth transistor form a third bridge arm, and the sixth transistor is the lower bridge arm. Wherein, the first ends of the windings of the three-phase motor are connected, and the second ends of the respective windings are respectively connected between the first transistor and the fourth transistor, between the second transistor and the fifth transistor, and between the third transistor and the sixth transistor.

[0054] According to an aspect of the present disclosure, a drive assembly is provided, and the drive assembly includes the current sampling device described above.

[0055] According to an aspect of the present disclosure, a power tool is provided, and the power tool includes the drive assembly described above.

[0056] Through the above device, the embodiment of the present disclosure can determine the control parameters of the PWM signal according to the voltage signal, and in each control stage when any one of the transistors in the lower half-bridges of the three bridge arms is turned on, phase-shift the PWM signal according to the control parameters, compare and output the phase-shifted PWM signal, and perform current sampling using the current sampling module after phase-shifting. The current sampling device of the embodiment of the present disclosure can solve the problem of sampling blind spots, can perform comprehensive current sampling, improve the real-time performance and comprehensiveness of current sampling, and improve the accuracy of motor control.

[0057] According to the following detailed description of the exemplary embodiments with reference to the accompanying drawings, other features and aspects of the present disclosure will become clear. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] The drawings included in the specification and constituting a part of the specification, together with the specification, illustrate the exemplary embodiments, features, and aspects of the present disclosure and are used to explain the principles of the present disclosure.

[0059] Figure 1 Shows a block diagram of a current sampling device according to an embodiment of the present disclosure.

[0060] Figure 2 Shows a schematic diagram of a current sampling device according to an embodiment of the present disclosure.

[0061] Figure 3 Shows a schematic diagram of motor control according to an embodiment of the present disclosure.

[0062] Figure 4 Shows a schematic diagram of control signal generation according to an embodiment of the present disclosure. Detailed implementation manners

[0063] Various exemplary embodiments, features, and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the drawings denote elements having the same or similar functions. Although various aspects of the embodiments are shown in the drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0064] In the description of the present disclosure, it should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present disclosure.

[0065] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present disclosure, "a plurality of" means two or more unless otherwise specifically defined.

[0066] In the present disclosure, unless otherwise clearly specified and defined, the terms "mounted", "connected", "connected to", "fixed", etc. should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present disclosure can be understood according to specific circumstances.

[0067] The special term "exemplary" here means "serving as an example, an embodiment, or illustrative". Any embodiment described as "exemplary" here does not have to be construed as superior to or better than other embodiments.

[0068] In addition, for a better illustration of the present disclosure, numerous specific details are given in the following detailed description. Those skilled in the art should understand that the present disclosure can also be implemented without some of these specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art are not described in detail so as to highlight the gist of the present disclosure.

[0069] Please refer to Figure 1 , Figure 1 which shows a block diagram of a current sampling device according to an embodiment of the present disclosure.

[0070] As Figure 1 shown, the device includes:

[0071] a control module 10, a phase-shifting module 20, a driving module 30, a three-phase full-bridge inverter 40, a three-phase motor 50, and a current sampling module 60, wherein,

[0072] the control module 10 is configured to output a voltage signal according to a preset current and a sampled current;

[0073] the phase-shifting module 20 is connected to the control module 10 and is configured to generate a pulse width modulation (PWM) signal according to the voltage signal;

[0074] the driving module 30 is connected to the phase-shifting module 20 and is configured to generate a switching control signal according to the PWM signal;

[0075] the three-phase full-bridge inverter 40 includes three bridge arms, each bridge arm includes an upper half-bridge and a lower half-bridge, and transistors are provided on both the upper half-bridge and the lower half-bridge of each bridge arm. The three-phase full-bridge inverter 40 is configured to receive the switching control signal and change the switching states of the respective transistors according to the switching control signal;

[0076] the three-phase motor 50 is connected to the three-phase full-bridge inverter 40;

[0077] the current sampling module 60 is connected to the bus of the three-phase motor 50 and the control module 10 to sample the bus current to obtain the sampled current,

[0078] wherein, the phase-shifting module 20 is further configured to: determine control parameters of the PWM signal according to the voltage signal, and perform phase-shifting on the PWM signal according to the control parameters at each control stage when any one of the transistors in the lower half-bridges of the three bridge arms is turned on, and then output the phase-shifted PWM signal.

[0079] With the above device, embodiments of the present disclosure can determine the control parameters of the PWM signal according to the voltage signal, and perform phase shift on the PWM signal according to the control parameters at each control stage when any one of the transistors in the lower half-bridges of the three legs is turned on, and then output the phase-shifted PWM signal. After phase shift, a current sampling module is used to perform current sampling. The current sampling device of embodiments of the present disclosure can solve the problem of sampling blind spots, can perform comprehensive current sampling, improve the real-time performance and comprehensiveness of current sampling, and improve the accuracy of motor control.

[0080] It should be noted that each module and unit of embodiments of the present disclosure can be implemented by a hardware circuit, or by combining a general hardware circuit with related existing logics.

[0081] Embodiments of the present disclosure do not limit the specific implementation manner of the current sampling module 60. The current sampling module 60 may include a bus resistance unit provided on the bus. The bus resistance unit may be a single resistor or multiple resistors connected in parallel. The specific implementation manner of the bus resistance unit can be determined according to parameters such as power. Embodiments of the present disclosure can obtain the bus voltage across the bus resistance unit and determine the bus current in combination with the resistance value of the bus resistance unit.

[0082] In one example, the bus mentioned in embodiments of the present disclosure may be the bus of the controller of the motor.

[0083] First, an exemplary introduction to the possible implementation manners of the three-phase full-bridge inverter 40 is given. It should be noted that embodiments of the present disclosure do not limit the possible implementation manners of the three-phase full-bridge inverter 40. In other embodiments, the three-phase full-bridge inverter 40 may also have other implementation manners.

[0084] Next, an exemplary introduction to the possible implementation manners of each module is given.

[0085] Please refer to Figure 2 , Figure 2 which shows a schematic diagram of a current sampling device according to an embodiment of the present disclosure.

[0086] As Figure 2As shown, the three-phase full-bridge inverter 40 may include a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a fifth transistor Q5, and a sixth transistor Q6. The first transistor Q1 and the fourth transistor Q4 form a first bridge arm, and the fourth transistor Q4 is the lower half-bridge. The second transistor Q2 and the fifth transistor Q5 form a second bridge arm, and the fifth transistor Q5 is the lower half-bridge. The third transistor Q3 and the sixth transistor Q6 form a third bridge arm, and the sixth transistor Q6 is the lower half-bridge. Among them, one end of each winding of the three-phase motor 50 is electrically connected, and the other end of each winding is electrically connected between the first transistor Q1 and the fourth transistor Q4, between the second transistor Q2 and the fifth transistor Q5, and between the third transistor Q3 and the sixth transistor Q6 respectively.

[0087] In a possible implementation manner, the first transistor Q1, the second transistor Q2, the third transistor Q3, the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6 may be Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) or Insulated Gate Bipolar Transistors (IGBTs). Among them, the transistors may be implemented based on silicon carbide (SiC) or gallium nitride (GaN) to improve performance.

[0088] In a possible implementation manner, as Figure 2 shown, the three-phase full-bridge inverter 40 may further include a plurality of first input resistors, a plurality of second input resistors, and a plurality of input capacitors to filter the input signals. The windings of the stator include a first winding A, a second winding B, and a third winding C. Among them, the gates of the transistors of the three-phase full-bridge inverter 40 are electrically connected to the second ends of the first input resistors, the first ends of the second input resistors, and the first ends of the input capacitors. The sources of the transistors of the three-phase full-bridge inverter 40 are electrically connected to the second ends of the input capacitors and the second ends of the second input resistors. The first ends of the first input resistors are used to input control signals.

[0089] Among them, the drains of the first transistor Q1, the second transistor Q2, and the third transistor Q3 are electrically connected, and the sources of the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6 are electrically connected.

[0090] The source electrode of the first transistor Q1 is electrically connected to the drain electrode of the fourth transistor Q4 and the first end of the first winding. The source electrode of the second transistor Q2 is electrically connected to the drain electrode of the fifth transistor Q5 and the first end of the second winding. The source electrode of the third transistor Q3 is electrically connected to the drain electrode of the sixth transistor Q6 and the first end of the third winding.

[0091] The second ends of the first winding A, the second winding B, and the third winding C are grounded.

[0092] In one example, as Figure 2 shown, the first input resistance may include a first resistor R1, a third resistor R3, a fifth resistor R5, a seventh resistor R7, a ninth resistor R9, and an eleventh resistor R11. The second input resistance may include a second resistor R2, a fourth resistor R4, a sixth resistor R6, an eighth resistor R8, a tenth resistor R10, and a twelfth resistor R12. The input capacitance may include a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6.

[0093] In one example, the three-phase full-bridge inverter 40 may further include a plurality of freewheeling diodes, which are arranged between the source electrode and the drain electrode of each transistor and are used to provide a freewheeling path when the transistor is turned off to prevent the transistor from being damaged.

[0094] In a possible implementation manner, the three-phase motor 50 may be a three-phase brushless DC motor.

[0095] In one example, in the embodiment of the present disclosure, by electrically connecting one ends of the windings of the stator and respectively connecting the other ends of the windings between the first transistor Q1 and the fourth transistor Q4, between the second transistor Q2 and the fifth transistor Q5, and between the third transistor Q3 and the sixth transistor Q6, the Y connection (or it can be called the star connection) of the three-phase motor 50 is achieved.

[0096] In one example, as Figure 2 shown, the three-phase motor 50 may include a first winding A, a second winding B, and a third winding C. One end of the first winding A is electrically connected between the first transistor Q1 and the fourth transistor Q4. One end of the second winding B is electrically connected between the second transistor Q2 and the fifth transistor Q5. One end of the third winding C is electrically connected between the third transistor Q3 and the sixth transistor Q6.

[0097] Next, an exemplary introduction to the motor control in the embodiment of the present disclosure will be given.

[0098] In a possible implementation, the control parameters may include a control period (PERIOD), the maximum modulation phase duty cycle of the control period (PWM max ), the intermediate value modulation phase duty cycle (PWM me d), the minimum modulation phase duty cycle (PWM min ), etc.

[0099] Please refer to Figure 3 , Figure 3 , which shows a schematic diagram of motor control according to an embodiment of the present disclosure.

[0100] In a possible implementation, as Figure 3 shown, the embodiments of the present disclosure use SVPWM (Space Vector Pulse Width Modulation) to control the rotation of the motor.

[0101] In an example, when the six switching devices of the first transistor Q1 to the sixth transistor Q6 as Figure 2 shown are combined (the signals of the upper and lower half-bridges of the same bridge arm are opposite), there are a total of 8 safe switching states. Among them, the two switching states U0(000) and U7(111) do not generate effective current in motor drive, so they can be called zero vectors. The other 6 switching states are six effective vectors respectively. They divide the 360-degree voltage space into six sectors of 60 degrees each. Using these six basic effective vectors and two zero vectors, any vector within 360 degrees can be synthesized.

[0102] In an example, SVPWM adopts the volt-second balance principle. First, it determines the sector where the modulation vector voltage is located, and then uses the two adjacent vectors in the sector where the vector voltage is located to synthesize the required vector voltage, so that the stator magnetic flux is in a circular rotation modulation mode (as Figure 3 shown, the vector voltage U out is in the first sector, and the adjacent vectors are U1 and U2). As Figure 3 shown, the circled numbers represent the sectors where the synthesized vector voltage is located. The six modulation vectors are (100, 110, 010, 011, 001, 101) respectively. For example, the lower bridge modulation is adopted (when the modulation signal A is at a high level, the lower half-bridge transistor of the A phase conducts; when the modulation signal A is at a low level, the upper half-bridge transistor of the A phase conducts; the same principle applies to B and C).

[0103] In an example, when the drive module generates a control signal, it usually adopts the timer operation mode of triangular counting.

[0104] Please refer to Figure 4 , Figure 4 , which shows a schematic diagram of the generation of the control signal according to an embodiment of the present disclosure.

[0105] As shown Figure 4 in the figure, taking the case where the required vector voltage falls in the first sector as an example for current sampling analysis, at this time, the vector voltage needs to be synthesized by vectors U1(100) and U2(110), and the ABC three-phase modulation signals are as Figure 4 shown. The modulation time of vector U1 is T1, the modulation time of vector U2 is T2, T0 is the zero vector when all upper switches of the three phases are turned off, and T7 is the zero vector when all lower switches of the three phases are turned off.

[0106] In one example, the related art generally adopts a current sampling method of collecting the internal resistance of the transistor. Therefore, only within the T7 time, since the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6 are all in the off state within the T7 time, the sampling is accurate at this time. However, sampling requires a certain amount of time. When the T7 time is insufficient, the voltage of the internal resistance of the transistor cannot be collected, resulting in a sampling blind area. The embodiment of the present disclosure uses the bus resistance for current sampling, making up for the defect of the sampling blind area existing in sampling through the internal resistance of the transistor.

[0107] In one example, as shown in Table 1, in different switching states, the embodiment of the present disclosure can sample the bus current through the current sampling module to obtain the phase current of each phase.

[0108] Table 1 shows the mode of current sampling through the states of each transistor switch.

[0109] Switch state AH BH CH Measurement 0 0 0 0 NA 1 1 0 0 Ia 2 1 1 0 -Ic 3 0 1 0 Ib 4 0 1 1 -Ia 5 0 0 1 Ic 6 1 0 1 -Ib 7 1 1 1 NA

[0110] Among them, AH represents the upper bridge of phase A, AH = 1 means the upper bridge is turned on and the lower bridge is turned off, and AH = 0 means the upper bridge is turned off.

[0111] Among them, Ia represents the current of phase A (corresponding to the first winding A), Ib represents the current of phase B (corresponding to the first winding B), and Ic represents the current of phase C (corresponding to the first winding C).

[0112] In the embodiment of the present disclosure, when in any state of switching states 1-6, if the bus current cannot be directly sampled, when the control parameters meet the conditions, the control signal is phase-shifted so that the duration when each control signal acts meets the duration required for current sampling, further solving the problem of the sampling blind area existing due to insufficient sampling time.

[0113] In one example, as Figure 2 shown, the phase-shifting module 20 may include a duration determination unit 201, and the duration determination unit 201 may be used to:

[0114] Determine the first duration T according to the control period and the maximum modulation phase duty cycle Δ0 ;

[0115] Determine a second duration T based on the maximum modulation phase duty cycle and the intermediate value modulation phase duty cycle Δ1 ;

[0116] Determine a third duration T based on the intermediate value modulation phase duty cycle and the minimum modulation phase duty cycle Δ2 .

[0117] The phase shift module 20 of the embodiments of the present disclosure can be implemented by a hardware circuit. The specific implementation manner of the phase shift module 20 is not limited in the embodiments of the present disclosure.

[0118] In one example, the determining the first duration according to the control period and the maximum modulation phase duty cycle may include:

[0119] Perform a subtraction operation on the control period and the maximum modulation phase duty cycle to obtain the first duration.

[0120] In one example, the determining the second duration according to the maximum modulation phase duty cycle and the intermediate value modulation phase duty cycle may include:

[0121] Perform a subtraction operation on the maximum modulation phase duty cycle and the intermediate value modulation phase duty cycle to obtain the second duration.

[0122] In one example, the determining the third duration according to the intermediate value modulation phase duty cycle and the minimum modulation phase duty cycle may include:

[0123] Perform a subtraction operation on the intermediate value modulation phase duty cycle and the minimum modulation phase duty cycle to obtain the third duration.

[0124] In one example, the duration determination unit 201 can be implemented by a hardware circuit.

[0125] In one example, the duration determination unit 201 may include a plurality of subtractors to implement performing a subtraction operation on the control period and the maximum modulation phase duty cycle (T Δ0 = PERIOD - PWM max ), performing a subtraction operation on the maximum modulation phase duty cycle and the intermediate value modulation phase duty cycle (T Δ1 = PWM max - PWM med ), and performing a subtraction operation on the intermediate value modulation phase duty cycle and the minimum modulation phase duty cycle (PWM med - PWM min ).

[0126] In a possible implementation manner, as Figure 2 shown, the phase shift module 20 may further include:

[0127] A first comparison unit 210, configured to output a first control signal when the second duration is less than a first preset duration, the first duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is greater than the first preset duration, and the first duration is greater than a first phase shift duration;

[0128] A first phase shift unit 211, connected to the first comparison unit 210, for:

[0129] When receiving the first control signal, shifting the maximum modulation phase duty cycle to the left by the first phase shift duration, setting the reference value of the rising edge comparator corresponding to the maximum modulation phase duty cycle to the difference between the maximum modulation phase duty cycle and the first phase shift duration, and setting the reference value of the falling edge comparator corresponding to the maximum modulation phase duty cycle to the sum of the maximum modulation phase duty cycle and the first phase shift duration;

[0130] Shifting the minimum modulation phase duty cycle to the right by the first phase shift duration, and setting the reference value of the rising edge comparator corresponding to the minimum modulation phase duty cycle to the sum of the minimum modulation phase duty cycle and the first phase shift duration, and setting the reference value of the falling edge comparator corresponding to the minimum modulation phase duty cycle to the difference between the minimum modulation phase duty cycle and the first phase shift duration.

[0131] Through the above device, the embodiment of the present disclosure can compare the second duration with the first preset duration, the first duration with the first preset duration, the duty cycle of the intermediate value modulation phase with the first preset duration, and the first duration with the first phase shift duration by the first comparison unit 210, and output a first control signal when the second duration is less than the first preset duration, the first duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is greater than the first preset duration, and the first duration is greater than the first phase shift duration, so as to control the phase shift of the first phase shift unit 211.

[0132] In one example, the first comparison unit 210 may include multiple comparators, and each comparator is respectively used for comparing each parameter.

[0133] In one example, the first phase shift unit 211 may include a phase shifter. The embodiment of the present disclosure does not limit the circuit implementation manner of the phase shifter, and those skilled in the art can refer to related technologies to implement it.

[0134] In one example, the first preset duration may be the time T required from triggering sampling to completing sampling total , where T total may be the dead time for transistor switching in the inverter as T d, the noise time for the switch to switch up or down is T n , the ADC sampling time is T samp Determine, for example, T total The dead time for transistor switching can be T d , the noise time for the switch to switch up or down is T n , the ADC sampling time is T samp The sum of the three (T d +T n +T samp ).

[0135] It should be noted that the dead time for transistor switching is T d , the noise time for the switch to switch up or down is T n , the ADC sampling time is T samp can be set according to the actual situation. In the embodiments of the present disclosure, the dead time for transistor switching is T d , the noise time for the switch to switch up or down is T n , the ADC sampling time is T samp The specific sizes are not limited.

[0136] In one example, when both the first duration and the second duration are greater than the first preset duration, the embodiments of the present disclosure can collect two-phase currents in one control period through the current sampling module without phase-shifting the control signal, so as to realize the synthesis of the vector voltage.

[0137] When any one of the first duration or the second duration is less than the first preset duration, the embodiments of the present disclosure can perform phase-shifting processing on the control signal so that the phase-shifted control signal meets the conditions for current sampling. Therefore, two-phase currents can be collected in one control period after phase-shifting.

[0138] In a possible implementation manner, the first phase-shifting duration is the difference between the first preset duration and the third duration.

[0139] In a possible implementation manner, as Figure 2 shown, the phase-shifting module 20 may further include:[[]]

[0140] A second comparison unit 220, configured to output a second control signal when the second duration is less than the first preset duration, the first duration is greater than the first preset duration, the intermediate value modulation duty ratio is greater than the first preset duration, the first duration is less than the first phase-shifting duration, and the first phase-shifting duration is less than the third duration;

[0141] A second phase-shifting unit 221, connected to the second comparison unit 220, for:[[]]

[0142] When receiving the second control signal, shift the duty cycle of the intermediate value modulation phase to the right by the first phase shift duration, set the reference value of the rising edge comparator corresponding to the duty cycle of the intermediate value modulation phase to the sum of the duty cycle of the intermediate value modulation phase and the first phase shift duration, and set the reference value of the falling edge comparator corresponding to the duty cycle of the intermediate value modulation phase to the difference between the duty cycle of the intermediate value modulation phase and the first phase shift duration.

[0143] Through the above device, in the embodiment of the present disclosure, the second comparison unit 220 can compare the second duration with the first preset duration, the first duration with the first preset duration, the duty cycle of the intermediate value modulation phase with the first preset duration, the first duration with the first phase shift duration, and the first phase shift duration with the third duration, and when the second duration is less than the first preset duration, the first duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is greater than the first preset duration, the first duration is less than the first phase shift duration, and the first phase shift duration is less than the third duration, output the second control signal to control the phase shift of the second phase shift unit 221.

[0144] In one example, the second comparison unit 220 may include a plurality of comparators, and each comparator is respectively used to perform the comparison of each parameter.

[0145] In one example, the second phase shift unit 221 may include a phase shifter. The embodiment of the present disclosure does not limit the circuit implementation manner of the phase shifter, and those skilled in the art can refer to the related technology for implementation.

[0146] In a possible implementation manner, as Figure 2 shown, the phase shift module 20 may further include:

[0147] A third comparison unit 230, configured to output a third control signal when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is less than the difference between the control period and the first preset duration, and the minimum modulation phase duty cycle is greater than the second phase shift duration;

[0148] A third phase shift unit 231, connected to the third comparison unit 230, for:

[0149] Upon receiving the third control signal, shift the maximum modulation phase duty cycle to the left by the second phase shift duration, set the reference value of the rising edge comparator corresponding to the maximum modulation phase duty cycle to the difference between the maximum modulation phase duty cycle and the second phase shift duration, and set the reference value of the falling edge comparator corresponding to the maximum modulation phase duty cycle to the sum of the maximum modulation phase duty cycle and the second phase shift duration;

[0150] Shift the minimum modulation phase duty cycle to the right by the second phase shift duration, and set the reference value of the rising edge comparator corresponding to the minimum modulation phase duty cycle to the sum of the minimum modulation phase duty cycle and the second phase shift duration, and set the reference value of the falling edge comparator corresponding to the minimum modulation phase duty cycle to the difference between the minimum modulation phase duty cycle and the second phase shift duration.

[0151] Through the above device, in the embodiments of the present disclosure, the third comparison unit 230 can compare the magnitude of the second duration with the first preset duration, the magnitude of the first duration with the first preset magnitude, the magnitude of the third duration with the first preset duration, the magnitude of the intermediate value modulation phase duty cycle with the difference between the control period and the first preset duration, and the magnitude of the minimum modulation phase duty cycle with the second phase shift duration, and when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the intermediate value modulation phase duty cycle is less than the difference between the control period and the first preset duration, and the minimum modulation phase duty cycle is greater than the second phase shift duration, output a third control signal to control the phase shift of the third phase shift unit 231.

[0152] In one example, the third comparison unit 230 may include multiple comparators, and each comparator is respectively used to perform the comparison of each parameter.

[0153] In one example, the third phase shift unit 231 may include a phase shifter. The embodiments of the present disclosure do not limit the circuit implementation manner of the phase shifter, and those skilled in the art can refer to related technologies for implementation.

[0154] In a possible implementation manner, as Figure 2 shown, the phase shift module 20 further includes:

[0155] A fourth comparison unit 240, configured to output a fourth control signal when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the intermediate value modulation phase duty cycle is less than the difference between the control period and the first preset duration, the minimum modulation phase duty cycle is less than the second phase shift duration, and the second phase shift duration is less than the second duration;

[0156] The fourth phase-shifting unit 241, connected to the fourth comparison unit 240, is configured to, when receiving the fourth control signal, shift the duty cycle of the intermediate value modulation phase to the right by the second phase-shifting duration, set the reference value of the rising-edge comparator corresponding to the duty cycle of the intermediate value modulation phase to the sum of the duty cycle of the intermediate value modulation phase and the second phase-shifting duration, and set the reference value of the falling-edge comparator corresponding to the duty cycle of the intermediate value modulation phase to the difference between the duty cycle of the intermediate value modulation phase and the second phase-shifting duration.

[0157] In a possible implementation, the second phase-shifting duration is the difference between the first preset duration and the second duration.

[0158] Through the above device, the embodiment of the present disclosure can compare the second duration with the first preset duration, the first duration with the first preset duration, the third duration with the first preset duration, the duty cycle of the intermediate value modulation phase with the difference between the control period and the first preset duration, the minimum modulation phase duty cycle with the second phase-shifting duration, and the second phase-shifting duration with the second duration through the fourth comparison unit 240, and when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is less than the difference between the control period and the first preset duration, the minimum modulation phase duty cycle is less than the second phase-shifting duration, and the second phase-shifting duration is less than the second duration, output the fourth control signal to control the phase shift of the fourth phase-shifting unit 241.

[0159] In an example, the fourth comparison unit 240 may include multiple comparators, and each comparator is respectively configured to perform the comparison of each parameter.

[0160] In an example, the fourth phase-shifting unit 241 may include a phase shifter. The embodiment of the present disclosure does not limit the circuit implementation manner of the phase shifter, and those skilled in the art may refer to related technologies for implementation.

[0161] In a possible implementation, as Figure 2 shown, the phase-shifting module 20 may further include:

[0162] The fifth comparison unit 250 is configured to output a fifth control signal when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is less than the first preset duration, and the sum of the second duration and the third duration is greater than the first preset duration;

[0163] The fifth phase-shifting unit 251, connected to the fifth comparison unit 250, is configured to, when receiving the fifth control signal, shift the duty cycle of the intermediate value modulation phase to the right by a third phase-shifting duration, set the reference value of the rising-edge comparator corresponding to the duty cycle of the intermediate value modulation phase to the sum of the duty cycle of the intermediate value modulation phase and the third phase-shifting duration, and set the reference value of the falling-edge comparator corresponding to the duty cycle of the intermediate value modulation phase to the difference between the duty cycle of the intermediate value modulation phase and the third phase-shifting duration.

[0164] With the above device, the embodiment of the present disclosure can compare the second duration with the first preset duration, the first duration with the first preset duration, the first phase-shifting duration with the third duration, and the sum of the second duration and the third duration with the first preset duration through the fifth comparison unit 250, and when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is less than the first preset duration, and the sum of the second duration and the third duration is greater than the first preset duration, output a fifth control signal to control the phase shift of the fifth phase-shifting unit 251.

[0165] In one example, the fifth comparison unit 250 may include multiple comparators, and each comparator is respectively configured to perform comparison of each parameter.

[0166] In one example, the fifth phase-shifting unit 251 may include a phase shifter. The embodiment of the present disclosure does not limit the circuit implementation manner of the phase shifter, and those skilled in the art can refer to related technologies for implementation.

[0167] In a possible implementation manner, the third phase-shifting duration is the difference between the first preset duration and the third duration.

[0168] In a possible implementation manner, as Figure 2 shown, the phase-shifting module 20 may further include:

[0169] A sixth comparison unit 260, configured to output a sixth control signal when the second duration is less than a first preset duration, the first duration is greater than the first preset duration, and the duty cycle of the intermediate value modulation phase is less than the first preset duration; or when the second duration is less than the first preset duration, the first duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is greater than the first preset duration, the first duration is less than a first phase shift duration, and the first phase shift duration is less than the third duration; or when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, and the duty cycle of the intermediate value modulation phase is greater than the difference between the control period and the first preset duration; or when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is less than the difference between the control period and the first preset duration, the minimum modulation phase duty cycle is less than a second phase shift duration, and the second phase shift duration is greater than the second duration.

[0170] A sixth phase shift unit 261, connected to the sixth comparison unit 260, configured to, when receiving the sixth control signal, perform a phase shift on the control signal in the current control period so that the current sampling module 60 samples the phase current of one phase.

[0171] As Figure 2 shown, the control module 10 may further include:

[0172] An acquisition unit 110, configured to acquire the phase currents of other phases collected in the previous control period.

[0173] An arithmetic unit 120, connected to the acquisition unit 110, configured to obtain the voltage signal by using the phase current of one phase collected in the current control period and the phase currents of other phases collected in the previous control period.

[0174] Through the above device, embodiments of the present disclosure can compare the second duration with the first preset duration, the first duration with the first preset duration, the duty cycle of the intermediate value modulation phase with the first preset duration, the first duration with the first phase shift duration, the first phase shift duration with the third duration, the duty cycle of the intermediate value modulation phase with the difference between the control period and the first preset duration, the minimum modulation phase duty cycle with the second phase shift duration, and the second phase shift duration with the second duration through the sixth comparison unit 260. And when the second duration is less than the first preset duration, the first duration is greater than the first preset duration, and the duty cycle of the intermediate value modulation phase is less than the first preset duration; or when the second duration is less than the first preset duration, the first duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is greater than the first preset duration, the first duration is less than the first phase shift duration, and the first phase shift duration is less than the third duration; or when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, and the duty cycle of the intermediate value modulation phase is greater than the difference between the control period and the first preset duration; or when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is less than the difference between the control period and the first preset duration, the minimum modulation phase duty cycle is less than the second phase shift duration, and the second phase shift duration is greater than the second duration, a sixth control signal is output to control the phase shift of the sixth phase shift unit 261.

[0175] In one example, the sixth comparison unit 260 may include multiple comparators, and each comparator is respectively used to perform the comparison of each parameter.

[0176] In one example, the sixth phase shift unit 261 may include a phase shifter. Embodiments of the present disclosure do not limit the circuit implementation manner of the phase shifter, and those skilled in the art can refer to related technologies for implementation.

[0177] Embodiments of the present disclosure do not limit the implementation manner of the acquisition unit 110. In a possible implementation manner, the device may include:

[0178] A storage module for storing the phase current sampled in each control period.

[0179] In one example, the storage module can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0180] Embodiments of the present disclosure can use the storage module to store the phase currents sampled in each control cycle and can be called when needed.

[0181] It should be noted that embodiments of the present disclosure do not limit the specific implementation manner of how the acquisition unit 110 acquires the stored phase current data from the storage module, and those skilled in the art can implement it according to related technologies.

[0182] Embodiments of the present disclosure do not limit the specific implementation manner of the operation unit 120. The operation unit 120 can be implemented using dedicated hardware circuits or using general hardware circuits (such as a central processing unit CPU, a microcontroller unit MCU, etc.) in combination with executable logic instructions. The executable logic instructions can be implemented with reference to the motor control method of related technology SVPWM. In this regard, embodiments of the present disclosure do not limit it.

[0183] In a possible implementation manner, the phase shift module 20 may further include:

[0184] A sampling time determination unit, configured to determine the sampling time according to the phase-shifted PWM signal and transmit the sampling time to the control module 10;

[0185] The control module 10 may further include:

[0186] A sampling control unit 130, configured to control the current sampling module 60 to perform current sampling according to the sampling time.

[0187] Embodiments of the present disclosure do not limit the specific implementation manners of the sampling time determination unit and the sampling control unit 130, and those skilled in the art can implement them with reference to related technologies.

[0188] In a possible implementation manner, the phase shift module 20 may further include:

[0189] A relationship determination unit, configured to determine the correspondence between the sampled current sampled by the current sampling module 60 in the next control cycle and the three-phase currents of the three-phase motor 50, and transmit the correspondence to the control module 10.

[0190] The specific implementation manner of the sampling relationship determination unit in the embodiments of the present disclosure is not limited, and those skilled in the art can refer to related technologies for implementation.

[0191] Through the above device, the embodiments of the present disclosure can determine the control parameters of the PWM signal according to the voltage signal, and perform phase shift on the PWM signal according to the control parameters in each control stage when any one of the transistors in the lower half bridges of the three bridge arms is turned on, and output the phase-shifted PWM signal. After phase shift, current sampling is performed by using the current sampling module. The current sampling device in the embodiments of the present disclosure can solve the problem of sampling blind area, can perform comprehensive current sampling, improve the real-time performance and comprehensiveness of current sampling, and improve the accuracy of motor control.

[0192] The embodiments of the present disclosure have been described above. The above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations are obvious to those of ordinary skill in the art in the technical field without departing from the scope and spirit of the described embodiments. The selection of the terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technologies in the market, or to enable other ordinary skill in the art in the technical field to understand the disclosed embodiments.

Claims

1. A current sampling device, characterized in that, The device includes a control module, a phase-shifting module, a driving module, a three-phase full-bridge inverter, a three-phase motor, and a current sampling module. Among them, the control module is configured to output a voltage signal according to a preset current and a sampled current; the phase-shifting module is connected to the control module and is configured to generate a pulse width modulation (PWM) signal according to the voltage signal; the driving module is connected to the phase-shifting module and is configured to generate a switching control signal according to the PWM signal; the three-phase full-bridge inverter includes three bridge arms, each bridge arm includes an upper half-bridge and a lower half-bridge, and transistors are provided on the upper half-bridge and the lower half-bridge of each bridge arm. The three-phase full-bridge inverter is configured to receive the switching control signal and change the switching states of the respective transistors according to the switching control signal; the three-phase motor is connected to the three-phase full-bridge inverter; the current sampling module is connected to the bus of the three-phase motor and the control module to sample the bus current to obtain the sampled current, wherein, the phase-shifting module is further configured to: determine control parameters of the PWM signal according to the voltage signal, and in each control stage when any one of the transistors in the lower half-bridges of the three bridge arms is turned on, phase-shift the PWM signal according to the control parameters and output the phase-shifted PWM signal, the control parameters include a control period, a maximum modulation phase duty ratio of the control period, an intermediate value modulation phase duty ratio, and a minimum modulation phase duty ratio. Among them, the phase-shifting module includes a duration determination unit, and the duration determination unit is configured to: determine a first duration according to the control period and the maximum modulation phase duty ratio; determine a second duration according to the maximum modulation phase duty ratio and the intermediate value modulation phase duty ratio; determine a third duration according to the intermediate value modulation phase duty ratio and the minimum modulation phase duty ratio, the phase-shifting module further includes: a first comparison unit configured to output a first control signal when the second duration is less than a first preset duration, the first duration is greater than the first preset duration, the intermediate value modulation phase duty ratio is greater than the first preset duration, and the first duration is greater than a first phase-shifting duration; a first phase-shifting unit connected to the first comparison unit and configured to: when receiving the first control signal, shift the maximum modulation phase duty ratio to the left by the first phase-shifting duration, set the reference value of the rising edge comparator corresponding to the maximum modulation phase duty ratio to the difference between the maximum modulation phase duty ratio and the first phase-shifting duration, and set the reference value of the falling edge comparator corresponding to the maximum modulation phase duty ratio to the sum of the maximum modulation phase duty ratio and the first phase-shifting duration; shift the minimum modulation phase duty ratio to the right by the first phase-shifting duration, and set the reference value of the rising edge comparator corresponding to the minimum modulation phase duty ratio to the sum of the minimum modulation phase duty ratio and the first phase-shifting duration, and set the reference value of the falling edge comparator corresponding to the minimum modulation phase duty ratio to the difference between the minimum modulation phase duty ratio and the first phase-shifting duration, the phase-shifting module further includes: A sampling time determination unit, configured to determine a sampling time according to the phase-shifted PWM signal and transmit the sampling time to the control module; The control module further includes: A sampling control unit, configured to control the current sampling module to perform current sampling according to the sampling time.

2. The device according to claim 1, wherein The phase-shifting module further includes: A second comparison unit, configured to output a second control signal when the second duration is less than a first preset duration, the first duration is greater than the first preset duration, the intermediate value modulation phase duty cycle is greater than the first preset duration, the first duration is less than a first phase-shifting duration, and the first phase-shifting duration is less than the third duration; A second phase-shifting unit, connected to the second comparison unit, and configured to: When receiving the second control signal, shift the intermediate value modulation phase duty cycle to the right by the first phase-shifting duration, set the reference value of the rising edge comparator corresponding to the intermediate value modulation phase duty cycle to the sum of the intermediate value modulation phase duty cycle and the first phase-shifting duration, and set the reference value of the falling edge comparator corresponding to the intermediate value modulation phase duty cycle to the difference between the intermediate value modulation phase duty cycle and the first phase-shifting duration.

3. The device according to claim 1 or 2, characterized in that, The first phase-shifting duration is the difference between the first preset duration and the third duration.

4. The device according to claim 1, wherein The phase-shifting module further includes: A third comparison unit, configured to output a third control signal when the first duration is less than a first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the intermediate value modulation phase duty cycle is less than the difference between the control period and the first preset duration, and the minimum modulation phase duty cycle is greater than a second phase-shifting duration; A third phase-shifting unit, connected to the third comparison unit, and configured to: When receiving the third control signal, shift the maximum modulation phase duty cycle to the left by the second phase-shifting duration, set the reference value of the rising edge comparator corresponding to the maximum modulation phase duty cycle to the difference between the maximum modulation phase duty cycle and the second phase-shifting duration, and set the reference value of the falling edge comparator corresponding to the maximum modulation phase duty cycle to the sum of the maximum modulation phase duty cycle and the second phase-shifting duration; Shift the minimum modulation phase duty cycle to the right by the second phase-shifting duration, and set the reference value of the rising edge comparator corresponding to the minimum modulation phase duty cycle to the sum of the minimum modulation phase duty cycle and the second phase-shifting duration, and set the reference value of the falling edge comparator corresponding to the minimum modulation phase duty cycle to the difference between the minimum modulation phase duty cycle and the second phase-shifting duration.

5. The device according to claim 1, characterized in that, The phase-shifting module further includes: A fourth comparison unit, configured to output a fourth control signal when the first duration is less than a first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the intermediate value modulation phase duty cycle is less than the difference between the control period and the first preset duration, the minimum modulation phase duty cycle is less than the second phase-shifting duration, and the second phase-shifting duration is less than the second duration; The fourth phase-shifting unit is connected to the fourth comparison unit. When receiving the fourth control signal, it is configured to shift the duty cycle of the intermediate value modulation phase to the right by the second phase-shifting duration, set the reference value of the rising-edge comparator corresponding to the duty cycle of the intermediate value modulation phase to the sum of the duty cycle of the intermediate value modulation phase and the second phase-shifting duration, and set the reference value of the falling-edge comparator corresponding to the duty cycle of the intermediate value modulation phase to the difference between the duty cycle of the intermediate value modulation phase and the second phase-shifting duration.

6. The device according to claim 4 or 5, characterized in that The second phase-shifting duration is the difference between the first preset duration and the second duration.

7. The device according to claim 1, wherein The phase-shifting module further includes: The fifth comparison unit is configured to output a fifth control signal when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is less than the first preset duration, and the sum of the second duration and the third duration is greater than the first preset duration. The fifth phase-shifting unit is connected to the fifth comparison unit. When receiving the fifth control signal, it is configured to shift the duty cycle of the intermediate value modulation phase to the right by the third phase-shifting duration, set the reference value of the rising-edge comparator corresponding to the duty cycle of the intermediate value modulation phase to the sum of the duty cycle of the intermediate value modulation phase and the third phase-shifting duration, and set the reference value of the falling-edge comparator corresponding to the duty cycle of the intermediate value modulation phase to the difference between the duty cycle of the intermediate value modulation phase and the third phase-shifting duration.

8. The device according to claim 7, characterized in that, The third phase-shifting duration is the difference between the first preset duration and the third duration.

9. The device according to claim 1, wherein The phase-shifting module further includes: The sixth comparison unit is configured to output a sixth control signal when the second duration is less than the first preset duration, the first duration is greater than the first preset duration, and the duty cycle of the intermediate value modulation phase is less than the first preset duration; or when the second duration is less than the first preset duration, the first duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is greater than the first preset duration, the first duration is less than the first phase-shifting duration, and the first phase-shifting duration is less than the third duration; or when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, and the duty cycle of the intermediate value modulation phase is greater than the difference between the control period and the first preset duration; or when the first duration is less than the first preset duration, the second duration is greater than the first preset duration, the third duration is greater than the first preset duration, the duty cycle of the intermediate value modulation phase is less than the difference between the control period and the first preset duration, the minimum modulation duty cycle is less than the second phase-shifting duration, and the second phase-shifting duration is greater than the second duration. The sixth phase-shifting unit is connected to the sixth comparison unit. When receiving the sixth control signal, it is configured to phase-shift the control signal in the current control period so that the current sampling module samples the phase current of one phase. The control module further includes: An acquisition unit is configured to acquire the phase currents of other phases collected in the previous control period. An arithmetic unit, connected to the acquisition unit, is configured to obtain the voltage signal by using the phase current of one phase collected in the current control period and the phase currents of other phases collected in the previous control period.

10. The device according to claim 1, characterized in that, The phase shift module further includes: A relationship determination unit, configured to determine the correspondence between the sampled current sampled by the current sampling module in the next control period and the three-phase currents of the three-phase motor, and transmit the correspondence to the control module.

11. The device according to claim 1, characterized in that, The three-phase full-bridge inverter includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor. The first transistor and the fourth transistor form a first bridge arm, and the fourth transistor is the lower bridge arm. The second transistor and the fifth transistor form a second bridge arm, and the fifth transistor is the lower bridge arm. The third transistor and the sixth transistor form a third bridge arm, and the sixth transistor is the lower bridge arm. Wherein, the first ends of the windings of the three-phase motor are connected, and the second ends of the windings are respectively connected between the first transistor and the fourth transistor, between the second transistor and the fifth transistor, and between the third transistor and the sixth transistor.

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