Method and device for requesting data

Abstract

The present application provides a method and device for requesting data, which can reduce the data access bit width. The method includes: a matching unit MU determines a first request message and a second request message, the first request message is used to obtain the first data, and the second request message is used to obtain the second data, the first request message includes first common request information and first private request information, and the second request message includes second common request information and second private request information; the MU generates a first message based on the first request message and the second request message, the first message includes common request information obtained by merging the first common request information and the second common request information, the first private request information, and the second private request information; the MU sends the first message to an input / output controller IOC, and the first message is used to request the acquisition of the first data and the second data.

Description

Technical Field

[0001] The present application relates to the field of communications, and more particularly, to a method and apparatus for requesting data acquisition. Background Art

[0002] Pipeline-based chips have become the mainstream architecture for high-capacity chips. These chips consist of several match-action units (MAUs), input-output controllers (IOCs), and memory units. The MAUs acquire and process data, the memory units store data, and the IOCs distribute and return data.

[0003] The more MAU nodes in an MAU chain, the longer the forwarding latency and the more inter-stage buffering required. The fewer nodes in the MAU chain, the shorter the forwarding latency and the less inter-stage buffering required. In this case, it is necessary to increase the parallel search and processing capabilities of a single MAU and increase the data request and return bit widths between the MAU and the IOC. The narrower the data bit width between the MAU and IOC, the fewer connections there are, and the smaller the chip area. The wider the data bit width between the MAU and IOC, the more connections there are, and the larger the chip area.

[0004] Currently, the common technology is to provide 2 to 3 parallel data reading and processing in the MAU. A matching unit simultaneously initiates multiple data requests and sends the multiple data requests in parallel to the IOC. The data requests include information such as the data search method, storage location, and data size, collectively known as control information. The IOC parses the control information corresponding to the multiple data requests and obtains multiple data from the memory unit. At the same time, it waits for the memory unit to prepare all the multiple requested data and then returns them to the execution unit for parallel processing.

[0005] This technology reduces the number of MAU nodes in the entire MAU chain through a parallel access mechanism, effectively reducing packet processing latency. However, sending multiple data requests and returning multiple data in parallel increases the bit width between the MAU and IOC exponentially, increasing the chip area accordingly. Summary of the Invention

[0006] The present application provides a method and apparatus for requesting data, which can reduce the data access bit width.

[0007] In a first aspect, a method for requesting to obtain data is provided, including: a matching unit MU determines a first request message and a second request message, the first request message is used to obtain first data, the second request message is used to obtain second data, the first request message includes first common request information and first private request information, and the second request message includes second common request information and second private request information; the MU generates a first message based on the first request message and the second request message, the first message includes common request information obtained by merging the first common request information and the second common request information, the first private request information, and the second private request information; the MU sends the first message to an input-output controller IOC, the first message being used to request to obtain the first data and the second data.

[0008] Based on the above technical solution, when the MU needs to obtain multiple request messages at the same time, the common request messages in the multiple request messages can be merged, and the multiple request messages can be combined into one message to obtain multiple data from the IOC. This can reduce the data request bit width between the MU and the IOC. The narrower the data bit width between the MU and the IOC, the fewer the connections between the MU and the IOC, and the smaller the chip area.

[0009] In combination with the first aspect, in some implementations of the first aspect, the method further includes: the IOC determining the first request message and the second request message based on the first message; and the IOC sending the first request message and the second request message to the memory to obtain the first data and the second data.

[0010] In combination with the first aspect, in certain implementations of the first aspect, the first message also includes a first instruction control word ICW and a second instruction control word ICW, the first ICW is associated with the first request message, and the second ICW is associated with the second request message; the IOC determines the first request message and the second request message based on the first message, including: the IOC determines the first request message based on the first ICW, the merged common request information and the first private request information; the IOC determines the second request message based on the second ICW, the merged common request information and the second private request information.

[0011] In combination with the first aspect, in some implementations of the first aspect, the method further includes: the IOC receiving a second message sent by the memory, the second message including first control information, second control information, the first data, and the second data, the first control information being associated with the first data, and the second control information being associated with the second data; the IOC processing the first data according to the first control information, and processing the second data according to the second control information; the IOC sending a third message to the execution unit AU, the third message including the processed first data and the processed second data.

[0012] Based on the above technical solution, the IOC processes the data returned by the memory according to the control information to generate intermediate data. The bits occupied by the intermediate data are smaller than the bits occupied by the data before processing. The intermediate data is sent to the AU, which can reduce the data transmission delay.

[0013] In combination with the first aspect, in some implementations of the first aspect, the method further includes: the IOC receiving a second message sent by the memory, the second message including first control information, second control information, the first data and the second data, the first control information being associated with the first data, and the second control information being associated with the second data; the IOC sending a third request message to the memory based on the first control information and / or the second control information, the third request message being used to obtain third data; the IOC sending a third message to the execution unit AU, the third message including the first data, the second data and the third data.

[0014] Based on the above technical solution, the MU can avoid sending a request message to the IOC for obtaining the third data. The IOC directly obtains the third data from the memory and returns the obtained third data together with the first data and the second data to the AU, thereby effectively reducing the delay in obtaining the third data.

[0015] In combination with the first aspect, in certain implementations of the first aspect, the first common request information and the second common request information are the same request information.

[0016] In combination with the first aspect, in certain implementations of the first aspect, before the MU generates a first message based on the first request message and the second request message, the method also includes: the MU obtains the first shared request information and the second shared request information; the MU merges the first shared request information and the second shared request information to obtain the merged shared request information.

[0017] In combination with the first aspect, in some implementations of the first aspect, the method further includes: the AU receiving the third message sent by the IOC.

[0018] According to a second aspect, a device is provided, including: a matching unit MU, an input-output controller IOC, and a memory, wherein the MU is used to determine a first request message and a second request message, wherein the first request message is used to obtain first data, and the second request message is used to obtain second data, wherein the first request message includes first common request information and first private request information, and the second request message includes second common request information and second private request information; the MU is also used to generate a first message according to the first request message and the second request message, wherein the first message includes common request information obtained by merging the first common request information and the second common request information, the first private request information, and the second private request information; the MU is also used to send the first message to the input-output controller IOC, wherein the first message is used to request to obtain the first data and the second data.

[0019] In combination with the second aspect, in certain implementations of the second aspect, the IOC is used to determine the first request message and the second request message based on the first message; the IOC is also used to send the first request message and the second request message to the memory to obtain the first data and the second data.

[0020] In combination with the second aspect, in certain implementations of the second aspect, the first message also includes a first instruction control word ICW and a second instruction control word ICW, the first ICW is associated with the first request message, and the second ICW is associated with the second request message; the IOC is specifically used to: determine the first request message based on the first ICW, the merged common request information and the first private request information; determine the second request message based on the second ICW, the merged common request information and the second private request information.

[0021] In combination with the second aspect, in certain implementations of the second aspect, the IOC is further used to: receive a second message sent by the memory, the second message including first control information, second control information, the first data and the second data, the first control information being associated with the first data, and the second control information being associated with the second data; process the first data according to the first control information, and process the second data according to the second control information; and send a third message to the execution unit AU, the third message including the processed first data and the processed second data.

[0022] In combination with the second aspect, in some implementations of the second aspect, the IOC is further used to: receive a second message sent by the memory, the second message including first control information, second control information, the first data and the second data, the first control information is associated with the first data, and the second control information is associated with the second data; send a third request message to the memory based on the first control information and / or the second control information, the third request message is used to obtain third data; send a third message to the execution unit AU, the third message including the first data, the second data and the third data.

[0023] In combination with the second aspect, in certain implementations of the second aspect, the first common request information and the second common request information are the same request information.

[0024] In combination with the second aspect, in certain implementations of the second aspect, the AU is used to: obtain the first shared request information and the second shared request information; merge the first shared request information and the second shared request information to obtain the merged shared request information.

[0025] In combination with the second aspect, in some implementations of the second aspect, the AU is further used to: receive the third message sent by the IOC.

[0026] In a third aspect, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a device, the device implements the method in any possible implementation manner of the first aspect above.

[0027] In a fourth aspect, a computer program product comprising instructions is provided, wherein when the instructions are executed by a computer, the device implements the method in any possible implementation manner of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a schematic diagram of a chip with a pipeline architecture.

[0029] Figure 2 This is a schematic diagram of MAU parallel access.

[0030] Figure 3 It is a schematic flow chart of a data processing method according to an embodiment of the present application.

[0031] Figure 4 This is a schematic block diagram of a request to obtain data according to an embodiment of the present application.

[0032] Figure 5 It is a schematic block diagram of a device according to an embodiment of the present application. DETAILED DESCRIPTION

[0033] The technical solution in this application will be described below with reference to the accompanying drawings.

[0034] The embodiments of the present application can be applied to various communication systems, such as wireless local area network (WLAN), narrowband Internet of Things (NB-IoT), global system for mobile communications (GSM), enhanced data rate for GSM evolution (EDGE), wideband code division multiple access (WCDMA), code division multiple access 2000 (CDMA2000), time division-synchronization code division multiple access (TD-SCDMA), long term evolution (LTE), satellite communication, fifth generation (5G) system or new communication systems that will appear in the future.

[0035] Network processor chips play a central role in data forwarding within network devices. With the annual increase in network traffic, the forwarding bandwidth of a single network processor chip has increased from 1Tbit to 10Tbit. Furthermore, with the trend toward flat network deployment and the Internet of Everything, the amount of user forwarding information a single network processor chip needs to store has doubled. Key factors influencing chip area are the width of the connections between forwarding modules and the message context buffering caused by processing latency. A larger width increases the chip area; conversely, a higher latency also increases the chip area.

[0036] With the promotion of 5G concepts and applications, network latency is a key factor affecting user experience. Therefore, it is crucial to reduce the residence time of data in network devices.

[0037] The pipeline architecture chip has become the mainstream architecture of the current large-capacity chip. The pipeline architecture chip includes several match-action units (MAUs), input-output controllers (IOCs), and memory units. Among them, the MAU completes the acquisition and processing of data, the memory unit completes the data storage function, and the IOC completes the distribution and return of data. Figure 1 , which shows a chip schematic diagram of a pipeline architecture. Each MAU includes a matching unit (MU) and an action unit (AU).

[0038] Depend on Figure 1 It can be seen that the more MAU nodes in the MAU chain, the longer the forwarding latency and the more inter-stage buffering will be. The fewer nodes in the MAU chain, the shorter the forwarding latency and the less inter-stage buffering will be. In this case, it is necessary to increase the parallel search and processing capabilities of a single MAU and increase the data request and return bit widths between the MAU and the IOC. The narrower the data bit width between the MAU and the IOC, the fewer connections between the MAU and the IOC, and the smaller the chip area. The wider the data bit width between the MAU and the IOC, the more connections between the MAU and the IOC, and the larger the chip area.

[0039] At present, the general technology is that MAU can realize 2-3 parallel data reading and processing, such as Figure 2 As shown, a schematic diagram of MAU parallel access is shown. A matching unit simultaneously initiates multiple data requests and sends the multiple data requests in parallel to the IOC, where the data request includes information such as the data search method, storage location, and data size, collectively referred to as control information; the IOC parses the control information corresponding to the multiple data requests and obtains multiple data from the memory unit, while waiting for the memory unit to prepare all the requested multiple data before returning them to the execution unit for parallel processing. . This technology reduces the number of MAU nodes on the entire MAU chain through a parallel access mechanism, effectively reducing the data packet processing delay. However, sending multiple data requests and returning multiple data in parallel increases the bit width between the MAU and the IOC exponentially, and the chip area increases accordingly.

[0040] To this end, an embodiment of the present application provides a data processing method that can reduce the area of a network processor chip.

[0041] like Figure 3 FIG2 shows a schematic flow chart of a data processing method 300 proposed in an embodiment of the present application. The data processing device includes a matching execution unit MAU, which includes a matching unit MU, an execution unit AU, an input / output controller IOC, and a memory.

[0042] 310. The MU determines a first request message and a second request message. The first request message is used to obtain the first data, and the second request message is used to obtain the second data. The first request message includes first shared request information and first private request information, and the second request message includes second shared request information and second private request information. It should be understood that the number of request messages is not limited to two and can be multiple, and this application does not impose any restrictions on this.

[0043] 320. The MU generates a first message based on the first request message and the second request message. The first message includes the shared request information obtained by combining the first shared request information and the second shared request information, the first private request information, and the second private request information. The first shared request information and the second shared request information may be the same request information.

[0044] Specifically, the MU obtains the first shared request information and the second shared request information from the first request message and the second request message; the MU merges the first shared request information and the second shared request information to obtain the merged shared request information. The shared request information can be understood as shared request information; if the first shared request information and the second shared request information are the same request information, the "merge" in this application can be understood as retaining either of the two shared request information; if the first shared request information and the second shared request information are different request information, the "merge" in this application can be understood as retaining both shared request information.

[0045] For example, the MU determines two request messages that need to be sent, including a first request message and a second request message, where the first request message is used to obtain first data, and the second request message is used to obtain second data. The first request message includes a source IP address (SIP) and a virtual route forward (VRF), and the second request message includes a destination IP address (DIP) and a VRF. The VRF in the first request message can be determined as the first shared request information, the VRF in the second request message can be determined as the second shared request information, the SIP can be determined as the first private request information, and the DIP can be determined as the second private request information. In this case, if the first shared request information and the second shared request information are the same request information, either the first shared request information or the second shared request information can be retained, and the VRF can be determined as the merged shared request information.

[0046] For another example, the MU determines three request messages that need to be sent, including a first request message, a second request message, and a third request message. The first request message is used to obtain the first data, the second request message is used to obtain the second data, and the third request message is used to obtain the third data. The first request message includes SIP and VRF, the second request message includes the destination network association address (DIP) and VRF, and the third request message includes SIP, DIP, the port number (UDP PORT) and PROTOCOL in the UDP message header. Then, the VRF in the first request message can be determined as the first common request information, the DIP in the second request message can be determined as the second common request information, and the SIP in the third request message can be determined as the third common request information. In this case, the first common request information, the second common request information, and the third common request information are different request information. In this case, the three common request information are retained, and the VRF, DIP, and SIP are determined as the merged common request information.

[0047] 330. The MU sends a first message to the input / output controller (IOC), requesting the acquisition of first data and second data. Optionally, the first message also includes a first instruction control word (ICW) and a second instruction control word (ICW), wherein the first ICW is associated with the first request message and the second ICW is associated with the second request message. It should be understood that the first ICW can be used to indicate which shared request information and which private request information are included in the first request message, and the second ICW can be used to indicate which shared request information and which private request information are included in the second request message.

[0048] In the technical solution provided in the embodiment of the present application, when the MU needs to obtain multiple request messages at the same time, the common request messages in the multiple request messages can be merged, and the multiple request messages can be combined into one message to obtain multiple data from the IOC. This can reduce the data request bit width between the MU and the IOC. The narrower the data bit width between the MU and the IOC, the fewer the connections between the MU and the IOC, and the smaller the chip area.

[0049] The IOC receives the first message sent by the MU and determines a first request message and a second request message based on the first message. Specifically, the IOC determines the first request message based on the first ICW, the merged shared request information, and the first private request information; and the IOC determines the second request message based on the second ICW, the merged shared request information, and the second private request information.

[0050] The IOC sends the obtained first request message and second request message to the memory to obtain the first data and the second data.

[0051] like Figure 4As shown, a schematic block diagram of a request to obtain data according to an embodiment of the present application is shown. For example, the MU determines three request messages that need to be sent, including a first request message, a second request message, and a third request message. The first request message is used to obtain the first data, the second request message is used to obtain the second data, and the third request message is used to obtain the third data. The first request message includes SIP and VRF, the second request message includes the destination network association address DIP and VRF, and the third request message includes SIP, DIP, the port number (UDP PORT) and PROTOCOL in the UDP message header. The instruction control word corresponding to the first request message is ICW0, the instruction control word corresponding to the second request message is ICW1, and the instruction control word corresponding to the third request message is ICW2. The generation module in the MU generates a first message based on the first request message, the second request message, and the third request message, and sends the first message to the IOC; the IOC obtains the first request message, the second request message, and the third request message by parsing the first message, and sends them to the memory.

[0052] Depend on Figure 4 It can be seen that both the first request message and the second request message include 16-bit VRFs, that is, two 16-bit VRFs, and only one 16-bit VRF is retained in the generated first message, which can not only reduce the bit width but also reduce the transmission delay.

[0053] The memory sends a second message to the IOC based on the first request message and the second request message. The second message includes first control information, second control information, first data, and second data. The first control information is associated with the first data, and the second control information is associated with the second data. The control information may be a very long instruction word (VLIW). Typical VLIW operations include statistical operations, committed access rate (CAR) operations, and filtering operations.

[0054] In one implementation, a receiving unit in the IOC receives the second message sent by the memory. Optionally, a preprocessing unit in the IOC may process the first data based on the first control information and the second data based on the second control information. Optionally, the IOC sends a third message to the execution unit (AU), the third message including the processed first data and the processed second data. The AU receives the third message sent by the IOC.

[0055] For example, the first control information indicates a statistical operation, and the statistical type includes the number of statistical messages, the bytes of the statistical messages, etc. After the preprocessing unit in the IOC performs statistics on the first data, it generates a statistical result. The IOC only needs to send the statistical result to the AU without sending any more data. Since the bits occupied by sending data are generally greater than the bits occupied by sending the statistical result, the bits occupied by the statistical result are smaller than the bits occupied by the first data. Sending the statistical result to the AU can occupy fewer bits, thereby reducing the data transmission delay.

[0056] In another implementation, the receiving unit in the IOC receives the second message sent by the memory. The preprocessing unit in the IOC can preset typical VLIW processing logic. Optionally, the IOC can send a third request message to the memory based on the processing logic corresponding to the first control information, or the processing logic corresponding to the second control information, or the processing logic corresponding to the first control information and the second control information, where the third request message is used to obtain third data. Optionally, the IOC sends a third message to the AU, where the third message includes the processed first data, the processed second data, and the third data, or the third message includes the first data, the second data, and the third data, that is, the preprocessing unit in the IOC can process the first data and the second data, or not. The AU receives the third message sent by the IOC.

[0057] Acquiring the third data according to the VLIW processing logic can avoid the MU sending a request message for obtaining the third data to the IOC. The IOC directly obtains the third data from the memory and returns the obtained third data together with the first data and the second data to the AU, thereby effectively reducing the latency of obtaining the third data.

[0058] like Figure 5 , a schematic block diagram of a device 500 according to an embodiment of the present application is shown. The device 500 includes: a matching unit MU510, an input / output controller IOC520, and a memory 530.

[0059] The MU 510 is configured to determine a first request message and a second request message, where the first request message is used to obtain first data, and the second request message is used to obtain second data, where the first request message includes first shared request information and first private request information, and the second request message includes second shared request information and second private request information;

[0060] The MU 510 is further configured to generate a first message according to the first request message and the second request message, wherein the first message includes shared request information obtained by combining the first shared request information and the second shared request information, the first private request information, and the second private request information;

[0061] The MU 510 is further configured to send the first message to the input / output controller IOC 520 , where the first message is used to request to obtain the first data and the second data.

[0062] Exemplarily, the IOC 520 is used to determine the first request message and the second request message according to the first message; the IOC 520 is also used to send the first request message and the second request message to the memory 530 to obtain the first data and the second data.

[0063] Exemplarily, the first message also includes a first instruction control word ICW and a second instruction control word ICW, the first ICW is associated with the first request message, and the second ICW is associated with the second request message; the IOC520 is specifically used to: determine the first request message based on the first ICW, the merged common request information and the first private request information; determine the second request message based on the second ICW, the merged common request information and the second private request information.

[0064] Exemplarily, the IOC 520 is further configured to: receive a second message sent by the memory 530, where the second message includes first control information, second control information, the first data, and the second data, where the first control information is associated with the first data, and the second control information is associated with the second data;

[0065] Processing the first data according to the first control information, and processing the second data according to the second control information;

[0066] A third message is sent to the execution unit AU, where the third message includes the processed first data and the processed second data.

[0067] Exemplarily, the IOC 520 is further configured to: receive a second message sent by the memory 530, where the second message includes first control information, second control information, the first data, and the second data, where the first control information is associated with the first data, and the second control information is associated with the second data;

[0068] Sending a third request message to the memory 530 according to the first control information and / or the second control information, where the third request message is used to obtain third data;

[0069] A third message is sent to the execution unit AU, where the third message includes the first data, the second data, and the third data.

[0070] Exemplarily, the first shared request information and the second shared request information are the same request information.

[0071] Exemplarily, the AU is configured to: obtain the first shared request information and the second shared request information; and merge the first shared request information and the second shared request information to obtain the merged shared request information.

[0072] Exemplarily, the AU is further configured to: receive the third message sent by the IOC 520 .

[0073] The present application also provides a computer-readable storage medium storing a computer program for implementing the method in the above method embodiment. When the computer program is executed on a computer, the computer can implement the method in the above method embodiment.

[0074] The embodiment of the present application also provides a computer program product, which, when executed on a computer, enables the computer to execute the method in the above method embodiment.

[0075] In addition, the term "and / or" in this application is merely a description of the association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B can represent three situations: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the previous and next associated objects are in an "or" relationship; the term "at least one" in this application can mean "one" and "two or more". For example, A, B and C can represent seven situations: A exists alone, B exists alone, C exists alone, A and B exist at the same time, A and C exist at the same time, C and B exist at the same time, and A, B and C exist at the same time.

[0076] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0077] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0078] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0079] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0080] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0081] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0082] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A method for requesting data, characterized in that: include: The matching unit MU determines a first request message and a second request message, where the first request message is used to obtain first data, and the second request message is used to obtain second data, the first request message includes first shared request information and first private request information, and the second request message includes second shared request information and second private request information; The MU generates a first message according to the first request message and the second request message, where the first message includes shared request information obtained by combining the first shared request information and the second shared request information, the first private request information, and the second private request information; The MU sends the first message to the input / output controller (IOC), where the first message is used to request first data and second data.

2. The method according to claim 1, characterized in that The method further comprises: The IOC determines the first request message and the second request message according to the first message; The IOC sends the first request message and the second request message to the memory to obtain the first data and the second data.

3. The method according to claim 2, characterized in that The first message also includes a first instruction control word ICW and a second instruction control word ICW, the first instruction control word ICW is associated with the first request message, and the second instruction control word ICW is associated with the second request message; The IOC determining, according to the first message, the first request message and the second request message, including: The IOC determines the first request message according to the first instruction control word ICW, the merged common request information and the first private request information; The IOC determines the second request message according to the second instruction control word ICW, the merged common request information and the second private request information.

4. The method according to claim 2, characterized in that The method further comprises: The IOC receives a second message sent by the memory, where the second message includes first control information, second control information, the first data, and the second data, where the first control information is associated with the first data, and the second control information is associated with the second data; The IOC processes the first data according to the first control information, and processes the second data according to the second control information; The IOC sends a third message to the execution unit AU, where the third message includes the processed first data and the processed second data.

5. The method according to claim 2, characterized in that The method further comprises: The IOC receives a second message sent by the memory, where the second message includes first control information, second control information, the first data, and the second data, where the first control information is associated with the first data, and the second control information is associated with the second data; The IOC sends a third request message to the memory according to the first control information and / or the second control information, where the third request message is used to obtain third data; The IOC sends a third message to the execution unit AU, where the third message includes the first data, the second data, and the third data.

6. The method according to any one of claims 1 to 3, characterized in that The first shared request information and the second shared request information are the same request information.

7. The method according to any one of claims 1 to 3, characterized in that Before the MU generates the first message according to the first request message and the second request message, the method further includes: The MU obtains the first shared request information and the second shared request information; The MU merges the first shared request information and the second shared request information to obtain the merged shared request information.

8. The method according to claim 4 or 5, characterized in that The method further comprises: The AU receives the third message sent by the IOC.

9. A device for requesting data, characterized in that: include: Matching unit MU, input and output controller IOC and memory, The MU is configured to determine a first request message and a second request message, where the first request message is used to obtain first data, and the second request message is used to obtain second data, where the first request message includes first shared request information and first private request information, and the second request message includes second shared request information and second private request information; The MU is further configured to generate a first message according to the first request message and the second request message, wherein the first message includes shared request information obtained by combining the first shared request information and the second shared request information, the first private request information, and the second private request information; The MU is further configured to send the first message to the input / output controller (IOC), where the first message is configured to request first data and second data.

10. The device according to claim 9, characterized in that The IOC is configured to determine, according to the first message, the first request message and the second request message; The IOC is further configured to send the first request message and the second request message to the memory to obtain the first data and the second data.

11. The device according to claim 10, characterized in that The first message also includes a first instruction control word ICW and a second instruction control word ICW, the first instruction control word ICW is associated with the first request message, and the second instruction control word ICW is associated with the second request message; The IOC is specifically used to: determining the first request message according to the first instruction control word ICW, the merged common request information, and the first private request information; The second request message is determined according to the second instruction control word ICW, the merged common request information and the second private request information.

12. The device according to claim 10, characterized in that The IOC is also used to: receiving a second message sent by the memory, where the second message includes first control information, second control information, the first data, and the second data, where the first control information is associated with the first data, and the second control information is associated with the second data; Processing the first data according to the first control information, and processing the second data according to the second control information; A third message is sent to the execution unit AU, where the third message includes the processed first data and the processed second data.

13. The device according to claim 10, characterized in that The IOC is also used to: receiving a second message sent by the memory, where the second message includes first control information, second control information, the first data, and the second data, where the first control information is associated with the first data, and the second control information is associated with the second data; sending a third request message to the memory according to the first control information and / or the second control information, where the third request message is used to obtain third data; A third message is sent to the execution unit AU, where the third message includes the first data, the second data, and the third data.

14. The device according to any one of claims 9 to 11, characterized in that The first shared request information and the second shared request information are the same request information.

15. The device according to any one of claims 9 to 11, characterized in that The MU is also used to: Obtaining the first shared request information and the second shared request information; The first shared request information and the second shared request information are merged to obtain the merged shared request information.

16. The device according to claim 12 or 13, characterized in that The AU is also used to: Receive the third message sent by the IOC.

17. A computer-readable storage medium, characterized in that A computer program or instruction is stored, and the computer program or instruction is used to implement the method according to any one of claims 1 to 8.

18. A computer program product, characterized in that The computer program product comprises a computer program or instructions, which, when executed by a computer, causes a device to perform the method according to any one of claims 1 to 8.

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