Display substrate, display panel and display device

By designing partition layout and sharing shift registers on the display substrate, the problem of integrating an under-screen camera in a full screen is solved, and efficient synchronous display and improved shooting effects are achieved.

CN114930438BActive Publication Date: 2025-03-18BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202080002594.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-10-30
Publication Date
2025-03-18
Estimated Expiration
2040-10-30

AI Technical Summary

Technical Problem

In the design of a full screen, how to integrate the under-screen camera without affecting the high screen-to-body ratio to improve the visual and user experience?

Method used

A display substrate is designed, including a display area and a border area. The display area is divided into a first display area and a second display area. A plurality of light emitting devices and pixel driving circuits are arranged in an array on the substrate substrate. The shift registers arranged in cascade are located in the border area. By sharing the shift registers and optimizing wiring design, synchronous scanning of the first and second display areas is realized.

Benefits of technology

This design simplifies the technical solution, reduces production costs, reduces the wiring length of the wiring, improves the synchronous display effect, and improves the shooting effect of the under-screen camera.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display substrate, a display panel and a display device, comprising a display area (AA) and a frame area (BB) around it; the display area (AA) comprises a first display area (AA1) and a second display area (AA2) which do not overlap each other; a plurality of light-emitting devices arranged in an array on a substrate (1), specifically comprising a plurality of first light-emitting devices (2) in the first display area (AA1) and a plurality of second light-emitting devices (3) in the second display area (AA2); a plurality of first pixel driving circuits (4) in the frame area (BB) and a plurality of second pixel driving circuits (5) in the second display area (AA2); a plurality of first pixel driving circuits (6) in the frame area (BB) and a plurality of second pixel driving circuits (7) in the second display area (AA2); a plurality of first pixel driving circuits (8) in the frame area (BB) and a plurality of second pixel driving circuits (9) in the frame area (BB); a plurality of first pixel driving circuits (10) in the frame area (BB) and a plurality of second pixel driving circuits (11) in the frame area (BB); a plurality of first pixel driving circuits (12) in the frame area (BB) and a plurality of second pixel driving circuits (13) in the frame area (BB); a plurality of first pixel driving circuits (14) in the frame area (BB) and a plurality of second pixel driving circuits (15) in the frame area (BB); a plurality of first pixel driving circuits (16) in the frame area (BB) and a plurality of second pixel driving circuits (17) in the frame area (BB); a plurality of first pixel driving circuits (18) in the frame area (BB) and a plurality of second pixel driving circuits (19) in the frame area (BB); a plurality of first pixel driving circuits (19) in the frame area (BB) and a plurality of second pixel driving circuits (11) in the frame area (BB); a plurality of first pixel driving circuits (12) in the frame area (BB) and a plurality of second pixel driving circuits (13) in the frame area (BB); a plurality of A driving circuit (5); a plurality of first pixel driving circuits (4) electrically connected to a plurality of first light-emitting devices (2) in a one-to-one correspondence, and a plurality of second pixel driving circuits (5) electrically connected to a plurality of second light-emitting devices (3) in a one-to-one correspondence; a plurality of shift registers (6) cascaded in a border area (BB); each shift register (6) being connected to a first pixel driving circuit (4) and a second pixel driving circuit (5) electrically connected to a row of first light-emitting devices (2) and a row of second light-emitting devices (3), respectively, and the row of first light-emitting devices (2) and the row of second light-emitting devices (3) are in the same row.
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Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate, a display panel and a display device. Background Art

[0002] With the rapid development of smartphones, not only are smartphones required to have beautiful appearance, but they are also required to provide users with a better visual experience. Major manufacturers have begun to increase the screen-to-body ratio on smartphones, making full-screen a new competitive point for smartphones. With the development of full-screen phones, the demand for improved performance and functions is also increasing day by day. Under-screen cameras can bring a sense of visual and user experience impact to a certain extent without affecting the high screen-to-body ratio. Summary of the invention

[0003] In one aspect, an embodiment of the present disclosure provides a display substrate, comprising:

[0004] A base substrate, the base substrate comprising a display area and a frame area located around the display area; wherein the display area comprises: a first display area and a second display area located at least on one side of the first display area;

[0005] A plurality of light emitting devices are arranged in an array on the base substrate; the plurality of light emitting devices include: a plurality of first light emitting devices located in the first display area, and a plurality of second light emitting devices located in the second display area;

[0006] A plurality of pixel driving circuits are located between the substrate and the layer where the plurality of light-emitting devices are located; the plurality of pixel driving circuits include: a plurality of first pixel driving circuits located in the frame area, and a plurality of second pixel driving circuits located in the second display area; wherein the plurality of first pixel driving circuits are electrically connected to the plurality of first light-emitting devices in a one-to-one correspondence, and the plurality of second pixel driving circuits are electrically connected to the plurality of second light-emitting devices in a one-to-one correspondence;

[0007] A plurality of shift registers arranged in cascade are located in the border area; each of the shift registers is correspondingly connected to the first pixel driving circuit and the second pixel driving circuit which are electrically connected to a row of the first light-emitting devices and a row of the second light-emitting devices respectively, and the row of the first light-emitting devices and the row of the second light-emitting devices are arranged in the same row.

[0008] Optionally, in the above-mentioned display substrate provided in an embodiment of the present disclosure, the frame area includes: a first frame area adjacent to the first display area, a second frame area opposite to the first frame area, and a third frame area and a fourth frame area connecting the first frame area and the second frame area;

[0009] The plurality of first pixel driving circuits are located in the first frame area, and the plurality of shift registers are located in at least one of the third frame area and the fourth frame area;

[0010] The display substrate also includes: a plurality of wirings, located in at least one of the third border area and the fourth border area adjacent to the first display area, and the first border area; wherein one end of each of the wirings is correspondingly connected to one of the shift registers, and the other end is correspondingly connected to at least one of the first pixel driving circuits, and the first light-emitting devices electrically connected to the at least one first pixel circuit are arranged in the same row.

[0011] Optionally, in the display substrate provided by the embodiment of the present disclosure, the plurality of shift registers arranged in cascade are in two groups, wherein one group of the plurality of shift registers arranged in cascade is at least located in the third frame area, and the other group of the plurality of shift registers arranged in cascade is at least located in the fourth frame area;

[0012] The plurality of first pixel driving circuits are located in the first border area;

[0013] The multiple wirings are located in the third border area and the fourth border area adjacent to the first display area, and the first border area; wherein each of the wirings is connected to a corresponding shift register and a plurality of the first pixel driving circuits corresponding to the first light-emitting devices in an adjacent half row.

[0014] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, it includes: a first gate metal layer, a second gate metal layer, a first source-drain metal layer and a second source-drain metal layer which are stacked and insulated from each other;

[0015] The plurality of routing lines are arranged in the same layer as at least one of the first gate metal layer, the second gate metal layer and the second source / drain metal layer.

[0016] Optionally, in the above-mentioned display substrate provided by the embodiment of the present disclosure, each group of the plurality of shift registers arranged in cascade connection includes: a plurality of first shift registers arranged in cascade connection, and a plurality of second shift registers arranged in cascade connection;

[0017] The multiple routing lines include: multiple first routing lines arranged in the same layer as the first gate metal layer, the second gate metal layer and at least one layer of the second source and drain metal layer, and multiple second routing lines arranged in the same layer as the first gate metal layer and at least one layer of the second gate metal layer; wherein each of the first routing lines is electrically connected to a first shift register and a plurality of first pixel driving circuits corresponding to an adjacent half row of the first light-emitting devices; and each of the second routing lines is electrically connected to a second shift register and a plurality of first pixel driving circuits corresponding to an adjacent half row of the first light-emitting devices.

[0018] Optionally, in the above-mentioned display substrate provided by the embodiment of the present disclosure, the plurality of first shift registers arranged in cascade connection are located between the plurality of second shift registers arranged in cascade connection and the display area;

[0019] Each of the first wirings is bent from a side of the first shift register close to the display area to the first frame area between the first pixel driving circuit and the display area;

[0020] Each of the second wirings is bent from a side of the second shift register away from the display area to the first border area between the first pixel driving circuit and the display area.

[0021] Optionally, the display substrate provided in the embodiment of the present disclosure further includes: a plurality of first adapter wires and a plurality of second adapter wires arranged in the first frame area and in the same layer as the first source-drain metal layer; wherein:

[0022] Each of the first adapter lines connects one of the first routing lines and one of the first pixel driving circuits, and each of the second adapter lines connects one of the second routing lines and one of the first pixel driving circuits.

[0023] Optionally, the display substrate provided in the embodiment of the present disclosure further includes: a plurality of gate lines and a plurality of light-emitting control lines arranged in the second display area and in the same layer as the first gate metal layer, and a plurality of third adapter lines and a plurality of fourth adapter lines arranged in the third frame area and the fourth frame area and in the same layer as the first source-drain metal layer; wherein,

[0024] Each of the gate lines is electrically connected to the second pixel driving circuit of a half row, and is electrically connected to one of the first shift registers through one of the third transfer lines;

[0025] Each of the light emitting control lines is electrically connected to a half-row of the second pixel driving circuits, and is electrically connected to one of the second shift registers via one of the fourth switching lines.

[0026] Optionally, the above-mentioned display substrate provided in the embodiment of the present disclosure further includes: a plurality of data lines located in the second display area; wherein each of the data lines is correspondingly connected to the first pixel driving circuit and the second pixel driving circuit which are electrically connected to a column of the first light-emitting devices and a column of the second light-emitting devices respectively, and the column of the first light-emitting devices and the column of the second light-emitting devices are arranged in the same column.

[0027] Optionally, the display substrate provided in the embodiment of the present disclosure further includes: a plurality of third wirings extending along the row direction and a plurality of fourth wirings extending along the column direction in the second display area; wherein,

[0028] The data line arranged opposite to the first display area is connected to multiple fourth lines through one third line, each of the fourth lines is electrically connected to a corresponding first pixel driving circuit, and the first light-emitting devices corresponding to the first pixel driving circuits electrically connected to at least one fourth line are arranged in the same column.

[0029] Optionally, in the display substrate provided in the embodiment of the present disclosure, each of the third wirings is located at a plurality of row gaps adjacent to the first display area, and two third wirings are arranged at the same row gap;

[0030] The fourth wirings are arranged in a one-to-one correspondence at a plurality of column gaps on both sides of the first display area in the row direction.

[0031] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, it further includes: a plurality of fifth adapter wires located in the frame area adjacent to the first display area;

[0032] Each of the fifth transfer lines is correspondingly connected to one of the fourth wirings and one of the first pixel driving circuits.

[0033] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, it includes: a first gate metal layer, a second gate metal layer, a first source-drain metal layer and a second source-drain metal layer which are stacked and insulated from each other;

[0034] The data lines and the plurality of fifth switching lines are arranged in the same layer as the first source-drain metal layer, the plurality of third routing lines are arranged in the same layer as the second gate metal layer, and the plurality of fourth routing lines are arranged in the same layer as the second source-drain metal layer.

[0035] Optionally, the above-mentioned display substrate provided in the embodiment of the present disclosure further includes: a plurality of power signal lines extending in the column direction, one of the power signal lines being electrically connected to a column of the second pixel driving circuits, or one of the power signal lines being electrically connected to the first pixel driving circuits and the second pixel driving circuits contained in the same column.

[0036] Optionally, the display substrate provided in the embodiment of the present disclosure further includes: a plurality of initialization signal lines extending in the row direction in the second display area, and a plurality of sixth transfer lines located in the frame area;

[0037] Among them, one of the initialization signal lines is electrically connected to the second pixel driving circuit of half a row, and each of the initialization signal lines located on both sides of the row direction of the first display area is also electrically connected to the first pixel driving circuit corresponding to the first light-emitting device in the row through one of the sixth adapter lines.

[0038] Optionally, the above-mentioned display substrate provided in the embodiment of the present disclosure further includes: a plurality of transparent wirings located between the layer where the plurality of pixel driving circuits are located and the layer where the plurality of light-emitting devices are located, each of the transparent wirings being connected one-to-one between the first pixel circuit and the first light-emitting device.

[0039] Optionally, in the above-mentioned display substrate provided in an embodiment of the present disclosure, the first display area is configured to install a light extraction module.

[0040] On the other hand, an embodiment of the present disclosure further provides a display panel, comprising the above-mentioned display substrate provided by an embodiment of the present disclosure.

[0041] On the other hand, an embodiment of the present disclosure further provides a display device, comprising: a light extraction module, and the above-mentioned display panel provided by the embodiment of the present disclosure; wherein the light extraction module is arranged in the first display area of ​​the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 It is a structural schematic diagram of a display device with an under-screen camera in the related art;

[0043] Figure 2 A schematic diagram of the structure of a display device provided in an embodiment of the present disclosure;

[0044] Figure 3 for Figure 2 A schematic diagram of an enlarged structure of region a in the middle;

[0045] Figure 4 for Figure 2 Another enlarged structural diagram of region a in the middle;

[0046] Figure 5 for Figure 2 Another enlarged structural diagram of region a in the middle;

[0047] Figure 6 A signal wiring diagram of a first shift register provided in an embodiment of the present disclosure;

[0048] Figure 7 A signal wiring diagram of a second shift register provided in an embodiment of the present disclosure;

[0049] Figure 8 A signal transfer wiring diagram of a shift register provided in an embodiment of the present disclosure;

[0050] Fig. 9 A data signal wiring diagram of a first pixel circuit provided by an embodiment of the present disclosure;

[0051] Fig.10 A diagram of horizontal transfer of data signals within a display area provided by an embodiment of the present disclosure;

[0052] Fig.11 A diagram of vertical transfer of data signals within a display area provided by an embodiment of the present disclosure;

[0053] Fig.12 A diagram of vertical transfer of data signals within a border area provided by an embodiment of the present disclosure;

[0054] Fig.13 for Figure 2 Another enlarged structural diagram of region a in the middle;

[0055] Fig.14 for Figure 2 Another enlarged structural diagram of area a in the middle. DETAILED DESCRIPTION

[0056] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. It should be noted that the size and shape of the figures in the drawings do not reflect the actual proportions, and the purpose is only to illustrate the contents of the present disclosure. And the same or similar numbers throughout represent the same or similar elements or elements with the same or similar functions. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0057] Unless otherwise defined, the technical or scientific terms used herein shall have the usual meanings understood by persons of ordinary skill in the field to which the present disclosure belongs. The words "first", "second" and similar terms used in the present disclosure specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Inside", "outside", "upper", "lower" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0058] Figure 1 FIG. 1 is a schematic diagram of a planar structure of a display device with an under-screen camera structure in the related art. Figure 1 As shown, the display device includes: a first display area AA1 and a second display area AA2, and the camera can be arranged at the position of the first display area AA1. Specifically, a plurality of light emitting devices EL are arranged in the first display area AA1, and a pixel driving circuit (e.g. Figure 1 D_1 and D_2 in the pixel display area are located in the upper frame area BB1; a plurality of pixel driving circuits P are provided in the second display area AA2, each pixel driving circuit P includes a light emitting device and a corresponding driving circuit, that is, the driving circuit in the pixel driving circuit P is located near the corresponding light emitting device. Figure 1 As shown, for the pixel driving circuit placed in the upper frame area BB1 (eg Figure 1 In the related art, a shift register GOA is added to provide a driving signal, which is complex and costly.

[0059] In view of the above technical problems existing in the related art, the present disclosure provides a display substrate, such as Figures 2 to 4 As shown, including:

[0060] A base substrate 1, the base substrate 1 includes a display area AA and a frame area BB located around the display area AA; wherein the display area AA includes: a first display area AA1 and a second display area AA2 located at least on one side of the first display area AA1;

[0061] A plurality of light emitting devices are arranged in an array on a base substrate 1; the plurality of light emitting devices include: a plurality of first light emitting devices 2 located in a first display area AA1, and a plurality of second light emitting devices 3 located in a second display area AA2;

[0062] A plurality of pixel driving circuits are located between the substrate 1 and the layer where the plurality of light-emitting devices are located; the plurality of pixel driving circuits include: a plurality of first pixel driving circuits 4 located in the frame area BB, and a plurality of second pixel driving circuits 5 located in the second display area AA2; wherein the plurality of first pixel driving circuits 4 are electrically connected to the plurality of first light-emitting devices 2 in a one-to-one correspondence, and the plurality of second pixel driving circuits 5 are electrically connected to the plurality of second light-emitting devices 3 in a one-to-one correspondence;

[0063] A plurality of shift registers 6 arranged in cascade are located in the border area BB; each shift register 6 is connected to a first pixel driving circuit 4 and a second pixel driving circuit 5 which are electrically connected to a row of first light-emitting devices 2 and a row of second light-emitting devices 3 respectively, and the above-mentioned row of first light-emitting devices 2 and the above-mentioned row of second light-emitting devices 3 are arranged in the same row.

[0064] In the above-mentioned display substrate provided in the embodiment of the present disclosure, by sharing a shift register 6 with the first pixel driving circuit 4 electrically connected to the first light-emitting devices 2 contained in a row in the first display area AA1 and the second pixel driving circuit 5 corresponding to the second light-emitting devices 3 arranged in the same row in the second display area AA2, a technical effect of synchronously scanning the first pixel driving circuit 4 corresponding to the first light-emitting devices 2 in the first display area AA1 contained in the same row and the second pixel driving circuit 5 corresponding to the first light-emitting devices 2 in the second display area AA2 is achieved, avoiding the need to provide a shift register 6 separately for the first pixel driving circuit 4 corresponding to the first light-emitting devices 2 in the first display area AA1, thereby simplifying the technical solution and reducing the production cost.

[0065] It should be noted that in the present disclosure, the density of multiple first light-emitting devices 2 in the first display area AA1 is the same as the density of multiple second light-emitting devices 3 in the second display area AA2 to improve the overall display effect; and in the present disclosure, the first light-emitting devices 2 and the second light-emitting devices 3 refer to pixels actually used to display light, and do not include floating (dummy) pixels. Specifically, dummy pixels are pixels that have a stacked structure consisting of an anode, a light-emitting layer (EL) and a cathode, but are not used to emit light because they are not connected to a signal line. Similarly, the first pixel driving circuit 4 and the second pixel driving circuit 5 are circuits for connecting light-emitting pixels. In addition, in the present disclosure, the shape of the first display area AA1 can be Figure 1 The square shown may also be other shapes such as a circle, and the specific design can be based on actual needs and is not limited here.

[0066] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figures 2 to 4As shown, the border area BB includes: a first border area BB1 adjacent to the first display area AA1, a second border area BB2 opposite to the first border area BB1, and a third border area BB3 and a fourth border area BB4 connecting the first border area BB1 and the second border area BB2; the second display area AA2 can be specifically located between the first display area AA1 and the second border area BB2, between the first display area AA1 and the third border area BB3, and between the first display area AA1 and the fourth border area BB4; that is, the second display area AA2 can specifically surround the left side, the bottom side and the right side of the first display area AA1, and the upper side boundary of the first display area AA1 coincides with the upper side boundary of the second display area AA2; of course, the second display area AA2 can also surround the periphery of the first display area AA1, which is not limited here.

[0067] Optionally, a plurality of first pixel driving circuits 4 may be located in the first frame area BB1, and a plurality of shift registers 6 may be located in at least one of the third frame area BB3 and the fourth frame area BB4; the display substrate may further include: a plurality of routing wires 7 located in at least one of the third frame area BB3 and the fourth frame area BB4 adjacent to the first display area AA1, and the first frame area BB1; wherein one end of each routing wire 7 is connected to a corresponding shift register 6, and the other end is connected to a corresponding at least one first pixel driving circuit 4, and the first light-emitting devices 2 electrically connected to the at least one first pixel driving circuit 4 are arranged in the same row. By arranging a plurality of routing wires 7 in close proximity in the frame area BB where the first shift register 6 and the first pixel driving circuit 4 are located, the wiring length of the routing wires 7 can be effectively reduced.

[0068] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figures 3 to 5 As shown, the multiple shift registers 6 arranged in cascade are divided into two groups, one of which is located at least in the third frame area BB3, and the other is located at least in the fourth frame area BB4; the multiple first pixel driving circuits 4 can be located in the first frame area BB1; the multiple wirings 7 are located in the third frame area BB3 and the fourth frame area BB4 adjacent to the first display area AA1, and the first frame area BB1; wherein each wiring 7 is connected to a shift register 6 and the multiple first pixel driving circuits 4 corresponding to the adjacent half-row first light-emitting devices 2. For example, in Figure 3 and Figure 4In the figure, the three from the left (i.e., half a row) of the six first light-emitting devices 2 contained in the first row adjacent to the first border area BB1 can respectively correspond to the three from the left of the six first pixel circuits 4 on the left side of the first border area BB that are electrically connected, and the three from the right (i.e., half a row) of the six first light-emitting devices 2 contained in the first row can respectively correspond to the three from the right of the six first pixel circuits 4 on the right side of the first border area BB that are electrically connected; the three from the left (i.e., half a row) of the six first light-emitting devices 2 contained in the second row can respectively correspond to the three from the right of the six first pixel circuits 4 on the left side of the first border area BB that are electrically connected, and the three from the right (i.e., half a row) of the six first light-emitting devices 2 contained in the first row can respectively correspond to the three from the left of the six first pixel circuits 4 on the right side of the first border area BB that are electrically connected; accordingly, the four wirings 7 can be electrically connected to the three from the right of the six first pixel circuits 4 on the left side, the three from the left of the six first pixel circuits 4 on the left side, the three from the left of the six first pixel circuits 4 on the right side, and the three from the right of the six first pixel circuits 4 on the right side in the first border area BB, respectively.

[0069] By setting a plurality of first pixel driving circuits 2 in the upper frame area BB1 adjacent to the first display area AA1, the length of the transparent wiring connecting the first pixel driving circuit 2 and the first light-emitting device 5 can be effectively reduced, thereby reducing the resistance of the transparent wiring and improving the long-range uniformity of the driving signal. In addition, by setting two groups of cascaded multiple shift registers 6 in the third frame area BB3 and the fourth frame area BB4, respectively, the pixel driving circuits electrically connected to each row of light-emitting devices can be provided with driving signals by two shift registers 6, thereby effectively reducing the time difference of receiving the driving signals by the pixel driving circuits electrically connected to the light-emitting devices in the same row, and improving the synchronous display effect.

[0070] Optionally, the display substrate provided in the embodiment of the present disclosure includes: a first gate metal layer (Gate1), a second gate metal layer (Gate2), a first source-drain metal layer (SD1) and a second source-drain metal layer (SD2) which are stacked and insulated from each other; a plurality of wirings 7 can be arranged in the same layer as at least one of the first gate metal layer, the second gate metal layer and the second source-drain metal layer. Generally, the shift register 6, the first pixel driving circuit 4 and the second pixel driving circuit 5 can each have a plurality of transistors and at least one capacitor, the gate of each transistor and the first electrode plate of the capacitor can be located in the first gate metal layer, the second electrode plate of the capacitor can be located in the second gate metal layer, and the source and drain of each transistor can be located in the first source-drain metal layer.

[0071] It should be understood that in the present disclosure, "same-layer arrangement" refers to a layer structure formed by using the same film-forming process to form a film layer for making a specific pattern, and then using the same mask to form a layer structure through a single patterning process. That is, one patterning process corresponds to a mask (also called a photomask). Depending on the specific pattern, one patterning process may include multiple exposure, development or etching processes, and the specific patterns in the formed layer structure may be continuous or discontinuous, and these specific patterns may also be at different heights or have different thicknesses.

[0072] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figures 3 to 7 As shown, each group of multiple shift registers 6 arranged in cascade may include: multiple first shift registers 601 arranged in cascade, and multiple second shift registers 602 arranged in cascade; wherein, the multiple first shift registers 601 can be used to provide a gate scanning signal (Gate), and the multiple second shift registers 602 can be used to provide a light-emitting control signal (EM); at this time, the multiple routing lines 7 may include: multiple first routing lines 701 arranged in the same layer as at least one of the first gate metal layer, the second gate metal layer and the second source and drain metal layer, and multiple second routing lines 702 arranged in the same layer as at least one of the first gate metal layer and the second gate metal layer; wherein each first routing line 701 is electrically connected to a first shift register 601 and a plurality of first pixel driving circuits 4 corresponding to the first light-emitting devices 2 of an adjacent half row; each second routing line 702 is electrically connected to a second shift register 602 and a plurality of first pixel driving circuits 4 corresponding to the first light-emitting devices 2 of an adjacent half row.

[0073] The gate scanning signal of the first shift register 601 is provided to the second pixel driving circuit 5 of the display area AA through the first source-drain metal layer, and the first wiring 701 electrically connected to the first pixel driving circuit 4 can be wound with the first gate metal layer, the second gate metal layer, the second source-drain metal layer, etc. by changing the layer, wherein the first source-drain metal layer can be simply and conveniently transferred to the first gate metal layer, the second gate metal layer, and the second source-drain metal layer through a transfer hole, thereby optimizing the wiring method. In the specific implementation, the transfer hole is determined according to the actual wiring situation, and the specific position is not required. In addition, if Figure 7 As shown, since in the related art a low-level (VSS) signal line located in the first source-drain metal layer is distributed on the side of the shift register 6 away from the display area AA, the second wiring 702 connecting the second shift register 602 and the first pixel circuit 4 can be routed by switching layers to the first gate metal layer and / or the second gate metal layer to reduce the wiring pressure in the border area BB of the shift register 6 away from the display area AA.

[0074] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figures 3 to 7 As shown, when the cascaded multiple first shift registers 601 are located between the cascaded multiple second shift registers 602 and the display area AA; each first routing line 701 can be bent from the side of the first shift register 601 close to the display area AA to the first border area BB1 between the first pixel driving circuit 4 and the display area AA; each second routing line 702 can be bent from the side of the second shift register 602 away from the display area AA to the first border area BB1 between the first pixel driving circuit 4 and the display area AA.

[0075] It can be seen that the first wiring 701 and the second wiring 702 are connected to the position of the first pixel driving circuit 4 contained in the frame area BB from both sides of the shift register 6, bypassing the display area AA, avoiding the change of the original signal line (such as the gate line and the light-emitting control line) electrically connected to the shift register 6 in the display area AA, and optimizing the wiring design of the first wiring 701 and the second wiring 702. In addition, the bending parts of the first wiring 701 and the second wiring 702 can be Figure 3 The arc shown can also be Figure 4 The right angle shown is not limited here.

[0076] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 and Figure 4 As shown, it may also include: a plurality of first transfer lines 8 and a plurality of second transfer lines 9 arranged in the first frame area BB1 and in the same layer as the first source-drain metal layer; wherein each first transfer line 8 connects a first routing line 701 and a first pixel driving circuit 4, and each second transfer line 9 connects a second routing line 702 and a first pixel driving circuit 4. In a specific implementation, the plurality of first transfer lines 8 and the plurality of second transfer lines 9 may be wired longitudinally in the first source-drain metal layer, so as to simply and conveniently realize the connection of the plurality of first routing lines 701 and the second routing lines 702 that are wired transversely in the first frame area BB1 through the transfer holes, as shown in FIG. Figure 8 shown.

[0077] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figures 3 to 7As shown, it can generally also include: a plurality of gate lines 10 and a plurality of light-emitting control lines 11 arranged in the second display area AA2 and in the same layer as the first gate metal layer, and a plurality of third transfer lines 12 and a plurality of fourth transfer lines 13 arranged in the third frame area BB3 and the fourth frame area BB4 and in the same layer as the first source and drain metal layer; wherein each gate line 10 is electrically connected to a half-row second pixel driving circuit 5, and is electrically connected to a first shift register 601 through a third transfer line 12; each light-emitting control line 11 is electrically connected to a half-row second pixel driving circuit 5, and is electrically connected to a second shift register 602 through a fourth transfer line 13.

[0078] As can be seen from the above, in the present disclosure, the gate scanning signal of the first shift register 601 is provided to the gate line 10 in the display area AA through the third adapter line 12 of the first source-drain metal layer, and the light-emitting control signal of the second shift register 602 is provided to the light-emitting control line 11 in the display area AA through the fourth adapter line 13 of the first source-drain metal layer, without changing the wiring method of the original gate line 10 and the light-emitting control line 11, and therefore, the compatibility with related technologies is better.

[0079] like Figure 1 As shown, for the pixel driving circuit (eg Figure 1 D_1, D_2 in the figure), the data line providing the data signal Data is usually routed along the edge of the first display area AA1 through one or more film layers to the pixel driving circuit (for example Figure 1 D_1, D_2 in the figure). This wiring method will occupy a part of the light-transmitting area of ​​the first display area AA1, affecting the photographing effect; at the same time, after the data line is extended from the edge of the first display area AA1 to the upper frame area BB1, it needs to be horizontally wired to connect to the corresponding pixel driving circuit position, which will occupy a part of the frame area, so that the wiring space is limited or the frame area is increased.

[0080] Based on this, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 and Figure 4 As shown, it may also include: a plurality of data lines 14 located in the second display area AA2; wherein each data line 14 is correspondingly connected to a first pixel driving circuit 4 and a second pixel driving circuit 5 electrically connected to a column of first light-emitting devices 2 and a column of second light-emitting devices 3, respectively, and the above-mentioned column of first light-emitting devices 2 and the above-mentioned column of first light-emitting devices 3 are arranged in the same column.

[0081] By arranging a first pixel driving circuit 4 and a second pixel driving circuit 5 which are electrically connected to a column of first light-emitting devices 2 and second light-emitting devices 3 respectively and sharing a data line 16 in the second display area AA2, it is avoided to wind wires in the first display area AA1 to provide data signals for the first pixel driving circuit 2, thereby improving the shooting effect of the under-screen camera.

[0082] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 , Figure 4 , Figures 9 to 11 As shown, it may also include: a plurality of third wirings 15 extending along the row direction and a plurality of fourth wirings 14 extending along the column direction in the second display area AA2; wherein,

[0083] The data line 14 arranged opposite to the first display area AA1 is connected to at least one fourth line 16 through a third line 15, each fourth line 16 is electrically connected to a first pixel driving circuit 4, and the first light-emitting devices 2 corresponding to the first pixel circuits 4 electrically connected to the at least one fourth line 16 are arranged in the same column.

[0084] It should be noted that in the present disclosure, “arranged opposite to each other” specifically means that the extension line of the data line 14 overlaps with the first display area AA1 .

[0085] The data signal provided by the data line 14 is transferred to the first pixel driving circuit 4 by the third routing line 15 and the fourth routing line 16 arranged in the second display area AA2, thereby avoiding winding in the first display area AA1 to provide the data signal to the first pixel driving circuit 4, thereby improving the shooting effect of the under-screen camera; at the same time, the third routing line 15 extending along the row direction is completed and optimized in the second display area AA2, reducing the wiring pressure of other signal lines in the upper frame area BB1.

[0086] In a specific implementation, in order to prevent crosstalk between data signals, an additional horizontal wiring space required for the third routing line 15 can be reserved in the conventional 7T1C pixel driving circuit, which is used for the data line 14 to transfer from the first source-drain metal layer to the second gate metal layer where the third routing line 15 is located; and an additional vertical wiring space required for the fourth routing line 16 is reserved, which is used for the third routing line 15 to transfer from the second gate metal layer to the second source-drain metal layer where the fourth routing line 16 is located; wherein the positions of the transfer holes can be adjacent, or can be determined according to the specific size and structure of the pixel, and the specific positions are not required. In addition, the third routing line 15 can be wired in alternate rows, and the fourth routing line 16 can be wired in alternate columns, and without affecting the various functions of the original 7T1C pixel driving circuit, their specific positions in the conventional 7T1C pixel driving circuit are not required.

[0087] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 , Figure 4 and Fig. 9 As shown, each third routing line 15 can be specifically located at a plurality of row gaps adjacent to the first display area AA1, and two third routing lines 15 are arranged at the same row gap; each fourth routing line 16 is arranged one by one at a plurality of column gaps adjacent to the first display area AA1. In other words, after the data line 14 led out from the source driving circuit (IC) end reaches the first display area AA1, it can be sequentially transferred row by row through the third routing lines 15 at the IC end position of the first display area AA1 to the left and right sides of the first display area AA1, and then sequentially transferred column by column through the fourth routing lines 16 to the first pixel driving circuit 4.

[0088] The above-mentioned row gap specifically refers to the gap between pixel rows formed by multiple second light-emitting devices 3 in the second display area AA2; the column gap specifically refers to the gap between pixel columns formed by multiple second light-emitting devices 3 in the second display area AA2.

[0089] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 3 and Figure 4 As shown, it may also include: a plurality of fifth adapter lines 17 located in the frame area BB adjacent to the first display area AA1; each fifth adapter line 17 correspondingly connects a fourth wiring line 16 and a first pixel driving circuit 4. That is, the data signal provided by the fourth wiring line 16 is transferred to the corresponding first pixel driving circuit 4 through the fifth adapter line 17.

[0090] Optionally, in the above-mentioned display substrate provided by the embodiment of the present disclosure, the plurality of data lines 14 and the plurality of fifth transfer lines 17 can be arranged in the same layer as the first source-drain metal layer, the plurality of third routing lines 15 can be arranged in the same layer as the second gate metal layer, and the plurality of fourth routing lines 16 can be arranged in the same layer as the second source-drain metal layer, so that the longitudinally transferred data signal is transferred back from the second source-drain metal layer where the fourth routing lines 16 are located to the first source-drain metal layer where the fifth transfer lines 17 are located at the boundary of the display area AA, and then connected to the corresponding first pixel driving circuit 4. The transfer hole can be determined according to the actual wiring situation, and the specific position is not required.

[0091] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Fig.12 As shown, it may also include: a plurality of power signal (VDD) lines 18 extending in the column direction, one power signal line 18 is electrically connected to a column of second pixel driving circuits 5, or one power signal line 18 is electrically connected to the first pixel driving circuits 4 and the second pixel driving circuits 5 contained in the same column. Specifically, the power signal line 18 may be directly connected from the display area AA to the first pixel driving circuit 4 in the frame area BB using the first source-drain metal layer.

[0092] Optionally, the display substrate provided in the embodiment of the present disclosure may further include: a plurality of initialization signal (Vinit) lines extending in the row direction in the second display area AA2, and a plurality of sixth adapter lines located in the frame area BB; wherein one initialization signal line is electrically connected to the second pixel driving circuit 5 of a half row, and each initialization signal line located on both sides of the row direction of the first display area AA1 is also electrically connected to the first pixel driving circuit 5 corresponding to the first light-emitting device 2 of the row through a sixth adapter line. Of course, in a specific implementation, the setting method of the initialization signal line can also be similar to that of the power signal line 18, which is not limited here.

[0093] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Fig.13 and Fig.14 As shown, it may also include: a plurality of transparent wirings 19 located between the layer where the plurality of pixel driving circuits are located and the layer where the plurality of light emitting devices are located, each transparent wiring 19 being connected between the first pixel circuit 4 and the first light emitting device 2 in a one-to-one correspondence.

[0094] In specific implementation, in order to provide more transparent wirings 19 within a certain size range in the column direction to drive more first light-emitting devices 3, thereby meeting the same resolution of the first display area AA1 and the second display area AA2, in the present disclosure, multiple transparent wirings 19 can be set in different film layers. In some embodiments, multiple transparent wirings 19 can be respectively located in the first transparent conductive layer, the second transparent conductive layer, and the third transparent conductive layer. The multiple first light-emitting devices 2 include multiple first color light-emitting devices R, multiple second color light-emitting devices G, and multiple third color light-emitting devices B; the first pixel circuit 4 includes a first sub-pixel circuit, a second sub-pixel circuit, and a third sub-pixel circuit; one end of the transparent wiring 19 located in the first transparent conductive layer can be electrically connected to the first sub-pixel circuit, and the other end can be electrically connected to the first color light-emitting device R; one end of the transparent wiring 19 located in the second transparent conductive layer can be electrically connected to the second sub-pixel circuit, and the other end can be electrically connected to the second color light-emitting device G; one end of the transparent wiring 19 located in the third transparent conductive layer can be electrically connected to the third sub-pixel circuit, and the other end can be electrically connected to the third color light-emitting device B.

[0095] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the first display area AA1 is configured to install a light extraction module, such as a camera module, an optical fingerprint recognition module, an ambient light sensor, etc.

[0096] On the other hand, an embodiment of the present disclosure further provides a display panel, comprising the above-mentioned display substrate provided by an embodiment of the present disclosure.

[0097] Optionally, the display panel may be an organic electroluminescent display panel (OLED), a quantum dot light-emitting display panel (QLED), or a micro light-emitting diode display panel (Micro LED). Since the principle of the display panel to solve the problem is similar to the principle of the display substrate to solve the problem, the implementation of the display panel provided in the embodiment of the present invention can refer to the implementation of the display substrate provided in the embodiment of the present invention, and the repeated parts will not be repeated.

[0098] On the other hand, an embodiment of the present disclosure further provides a display device, comprising: a light extraction module (such as a camera module), and the above-mentioned display panel; wherein the light extraction module is arranged in the first display area AA1 of the display panel.

[0099] The display device can be: a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, a smart watch, a fitness wristband, a personal digital assistant, or any other product or component with a display function. Other essential components of the display device should be understood by those of ordinary skill in the art, and will not be described in detail here, nor should they be used as limitations on the present invention. In addition, since the principle of solving the problem by the display device is similar to the principle of solving the problem by the above-mentioned display panel, the implementation of the display device can refer to the embodiment of the above-mentioned display panel, and the repeated parts will not be described in detail.

[0100] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if these modifications and variations of the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A display substrate, wherein: include: A base substrate, the base substrate comprising a display area and a frame area located around the display area; wherein the display area comprises: a first display area and a second display area located at least on one side of the first display area; A plurality of light emitting devices are arranged in an array on the base substrate; the plurality of light emitting devices include: a plurality of first light emitting devices located in the first display area, and a plurality of second light emitting devices located in the second display area; A plurality of pixel driving circuits are located between the substrate and the layer where the plurality of light-emitting devices are located; the plurality of pixel driving circuits include: a plurality of first pixel driving circuits located in the frame area, and a plurality of second pixel driving circuits located in the second display area; wherein the plurality of first pixel driving circuits are electrically connected to the plurality of first light-emitting devices in a one-to-one correspondence, and the plurality of second pixel driving circuits are electrically connected to the plurality of second light-emitting devices in a one-to-one correspondence; A plurality of shift registers arranged in cascade are located in the border area; each of the shift registers is correspondingly connected to the first pixel driving circuit and the second pixel driving circuit which are electrically connected to a row of the first light-emitting devices and a row of the second light-emitting devices respectively, and the row of the first light-emitting devices and the row of the second light-emitting devices are arranged in the same row.

2. The display substrate according to claim 1, wherein: The frame area includes: a first frame area adjacent to the first display area, a second frame area opposite to the first frame area, and a third frame area and a fourth frame area connecting the first frame area and the second frame area; The plurality of first pixel driving circuits are located in the first frame area, and the plurality of shift registers are located in at least one of the third frame area and the fourth frame area; The display substrate also includes: a plurality of wirings, located in at least one of the third border area and the fourth border area adjacent to the first display area, and the first border area; wherein one end of each of the wirings is correspondingly connected to one of the shift registers, and the other end is correspondingly connected to at least one of the first pixel driving circuits, and the first light-emitting devices electrically connected to the at least one first pixel driving circuit are arranged in the same row.

3. The display substrate according to claim 2, wherein: The plurality of shift registers arranged in cascade are divided into two groups, wherein one group of the plurality of shift registers arranged in cascade is at least located in the third frame area, and the other group of the plurality of shift registers arranged in cascade is at least located in the fourth frame area; The plurality of first pixel driving circuits are located in the first border area; The multiple wirings are located in the third border area and the fourth border area adjacent to the first display area, and the first border area; wherein each of the wirings is connected to a corresponding shift register and a plurality of the first pixel driving circuits corresponding to the first light-emitting devices in an adjacent half row.

4. The display substrate according to claim 3, wherein: include: A first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer are stacked and insulated from each other; The plurality of routing lines are arranged in the same layer as at least one of the first gate metal layer, the second gate metal layer and the second source / drain metal layer.

5. The display substrate according to claim 4, wherein: Each group of the plurality of shift registers arranged in cascade connection comprises: a plurality of first shift registers arranged in cascade connection, and a plurality of second shift registers arranged in cascade connection; The multiple routing lines include: multiple first routing lines arranged in the same layer as the first gate metal layer, the second gate metal layer and at least one layer of the second source and drain metal layer, and multiple second routing lines arranged in the same layer as the first gate metal layer and at least one layer of the second gate metal layer; wherein each of the first routing lines is electrically connected to a first shift register and a plurality of first pixel driving circuits corresponding to an adjacent half row of the first light-emitting devices; and each of the second routing lines is electrically connected to a second shift register and a plurality of first pixel driving circuits corresponding to an adjacent half row of the first light-emitting devices.

6. The display substrate according to claim 5, wherein: The plurality of first shift registers arranged in cascade connection are located between the plurality of second shift registers arranged in cascade connection and the display area; Each of the first wirings is bent from a side of the first shift register close to the display area to the first frame area between the first pixel driving circuit and the display area; Each of the second wirings is bent from a side of the second shift register away from the display area to the first frame area between the first pixel driving circuit and the display area.

7. The display substrate according to claim 6, wherein: Also includes: A plurality of first transfer wires and a plurality of second transfer wires are arranged in the first border area and in the same layer as the first source-drain metal layer; wherein, Each of the first adapter lines connects one of the first routing lines and one of the first pixel driving circuits, and each of the second adapter lines connects one of the second routing lines and one of the first pixel driving circuits.

8. The display substrate according to claim 5, wherein: Also includes: A plurality of gate lines and a plurality of light-emitting control lines are arranged in the second display area and in the same layer as the first gate metal layer, and a plurality of third transfer lines and a plurality of fourth transfer lines are arranged in the third frame area and the fourth frame area and in the same layer as the first source-drain metal layer; wherein, Each of the gate lines is electrically connected to the second pixel driving circuit of a half row, and is electrically connected to one of the first shift registers through one of the third transfer lines; Each of the light emitting control lines is electrically connected to a half-row of the second pixel driving circuits, and is electrically connected to one of the second shift registers via one of the fourth switching lines.

9. The display substrate according to any one of claims 1 to 8, wherein: Also includes: A plurality of power signal lines extending in the column direction, one of the power signal lines is electrically connected to a column of the second pixel driving circuits, or one of the power signal lines is electrically connected to the first pixel driving circuits and the second pixel driving circuits contained in the same column.

10. The display substrate according to any one of claims 1 to 8, wherein: Also includes: A plurality of initialization signal lines extending along a row direction in the second display area, and a plurality of sixth transfer lines located in the frame area; Among them, one of the initialization signal lines is electrically connected to the second pixel driving circuit of half a row, and each of the initialization signal lines located on both sides of the row direction of the first display area is also electrically connected to the first pixel driving circuit corresponding to the first light-emitting device in the row through one of the sixth adapter lines.

11. The display substrate according to any one of claims 1 to 8, wherein: Also includes: A plurality of transparent wirings are located between the layer where the plurality of pixel driving circuits are located and the layer where the plurality of light emitting devices are located, and each of the transparent wirings is connected between the first pixel driving circuit and the first light emitting device in a one-to-one correspondence.

12. The display substrate according to any one of claims 1 to 8, wherein: The first display area is configured to install a light extraction module.

13. A display panel, wherein: Comprising the display substrate as described in any one of claims 1-12.

14. A display device, wherein: include: A light extraction module, and a display panel as claimed in claim 13; wherein the light extraction module is arranged in a first display area of ​​the display panel.

Citation Information

Patent Citations

  • Display substrate, display panel and display device

    CN115280504A