A filter wafer level packaging structure

Abstract

The present invention relates to the field of semiconductor packaging technology, and in particular to a filter wafer-level packaging structure, comprising a first substrate structure layer and a second substrate structure layer, wherein the first substrate structure layer comprises a substrate body, a wafer and a pad, wherein the wafer is arranged on the surface of the substrate body, and the pad is arranged around the wafer and fixedly connected to the substrate body. The present invention has the advantages of small package size, high mechanical strength and anti-electromagnetic shielding, by exposing only the outer side of the chip pad, and then forming a side crawling interconnection method through wafer-level rewiring, reducing the size of the outer edge sealing circle, greatly reducing the product area, and by covering a large area of ​​metal interconnection to form a metal support structure, the cover is protected from being compressed during the plastic sealing process, and the product yield is stabilized, and by covering a large area of ​​metal interconnection to form a metal shielding cover at the same time, it is ensured that external signals will not interfere with the inside of the chip, and the product performance is stabilized.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to a filter wafer-level packaging structure. Background Art

[0002] Semiconductor packaging refers to the process of processing tested wafers into independent chips according to product models and functional requirements. The packaging process is as follows: the wafers from the front-end process of the wafer are cut into small chips through a dicing process, and then the cut chips are glued to the corresponding islands of the substrate frame, and then ultra-fine metal wires or conductive resins are used to connect the bonding pads of the chips to the corresponding pins of the substrate to form the required circuit; then the independent chips are packaged and protected with a plastic shell, and a series of operations are performed after the plastic sealing, and the finished product is tested after the packaging is completed.

[0003] With the continuous increase in the modes and frequency bands supported by wireless mobile communication systems, the RF front-end architecture of current wireless communication mobile terminals has become more and more complex. Limited by the space of equipment and terminals, the newly added RF front-end in the 5G era mainly appears in the form of modules, and more and more devices are integrated in the modules.

[0004] The filter wafer packaging currently available on the market uses a through-hole interconnection method, which consumes more edge sealing size, resulting in a larger chip size and unable to meet terminal needs. In addition, dry film or other polymer materials are used as covers, which have poor structural strength and often collapse during the subsequent module plastic sealing process, resulting in overall stability deviation. In addition, due to the increasing frequency band subdivision requirements, signal stray interference will have a great impact on the performance of the entire product, and cannot meet high-end needs. In order to solve the above problems, a filter wafer-level packaging structure is urgently needed to be developed. Summary of the invention

[0005] The purpose of the present invention is to provide a filter wafer-level packaging structure, which has the advantages of small packaging size, high mechanical strength and anti-electromagnetic shielding, and solves the problem that the existing filter wafer packaging mostly adopts a through-hole interconnection method, and its solution consumes more edge sealing size, resulting in a large chip size, which cannot meet terminal requirements. In addition, a dry film or other polymer material is used as a cover, and its structural strength is poor. In the subsequent module plastic sealing process, collapse often occurs, resulting in overall stability deviation. Moreover, due to the increasing frequency band subdivision requirements, signal stray interference will have a great impact on the overall product performance, and cannot meet high-end requirements.

[0006] To achieve the above-mentioned objectives, the present invention provides the following technical solutions: a filter wafer-level packaging structure, comprising a first substrate structure layer and a second substrate structure layer, the first substrate structure layer comprising a substrate body, a wafer and a welding pad, the wafer is arranged on the surface of the substrate body, and the welding pad is arranged around the wafer and fixedly connected to the substrate body.

[0007] A cofferdam structure is arranged on the top of the first substrate structure layer, a cavity cover is arranged on the top of the cofferdam structure, a metal interconnection layer is arranged on the top of the cavity cover, a solder resist oil structure layer is arranged on the top of the metal interconnection layer, a solder ball is arranged on the top of the solder resist oil structure layer, and a plurality of metal pads and solder resist oil are arranged on the surface of the second substrate structure layer, and the metal pads are welded to the solder balls.

[0008] Preferably, the cofferdam structure includes a cofferdam body, and a surface of the cofferdam body is provided with a plurality of grooves adapted to the welding pads.

[0009] Preferably, the solder resist oil structural layer comprises a solder resist oil body, and a plurality of through holes distributed in a rectangular array are formed on the surface of the solder resist oil body.

[0010] Preferably, the wafer, the bonding pad and the cavity cover form a sealed cavity.

[0011] Preferably, the solder resist oil structure layer is located on the top of the solder pad and is formed by wafer-level redistribution.

[0012] Preferably, the thickness of the cofferdam structure is not less than 1 um, and the cofferdam structure forms a cavity in the electrode part, and the shape of the cavity is not limited.

[0013] Preferably, the cavity cover has a thickness of not less than 1 um and has a certain structural strength, and the cofferdam structure and the cavity cover are both made of insulating material.

[0014] Preferably, the cavity cover exposes the outer edge of the welding pad.

[0015] Preferably, the solder resist oil structure layer only isolates a single signal, and all other ground signals are interconnected to form a metal shielding cover.

[0016] Preferably, the solder resist oil structure layer forms a large area coverage.

[0017] Compared with the prior art, the present invention has the following beneficial effects:

[0018] The present invention forms a complete packaging structure through the first substrate structure layer, the cofferdam structure, the cavity cover, the metal interconnection layer and the solder resist oil structure layer, so that the filter wafer-level packaging structure has the advantages of small packaging size, high mechanical strength and anti-electromagnetic shielding. In actual use, only the outer side of the chip pad is exposed, and then a side crawling interconnection method is formed through a wafer-level rewiring method, which reduces the size of the outer edge sealing circle and greatly reduces the product area. In addition, a metal support structure is formed by covering a large area of ​​the metal interconnection to protect the cover from being compressed during the plastic sealing process, thereby stabilizing the product yield. The metal interconnection is covered over a large area and a metal shield is formed at the same time to ensure that external signals will not interfere with the inside of the chip, thereby stabilizing product performance and solving the problem that the existing filter wafer packaging mostly uses via interconnection. This solution consumes more edge sealing size, resulting in a larger chip size and unable to meet terminal requirements. In addition, dry film or other polymer materials are used as covers, which have poor structural strength and often collapse during the subsequent module plastic sealing process, resulting in overall stability deviation. In addition, due to the increasing frequency band subdivision requirements, signal stray interference will have a great impact on the overall product performance and cannot meet high-end requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a schematic diagram of the structural decomposition of the present invention;

[0020] Figure 2 It is a side cross-sectional view of a part of the structure of the present invention.

[0021] In the figure: 1. first substrate structure layer; 11. substrate body; 12. wafer; 13. solder pad; 2. cofferdam structure; 21. cofferdam body; 22. groove; 3. cavity cover; 4. metal interconnect layer; 5. solder resist oil structure layer; 51. solder resist oil body; 52. through hole; 6. solder ball; 7. second substrate structure layer. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] As attached Figure 1 To Attachment Figure 2 As shown: The present invention provides a filter wafer-level packaging structure, including a first substrate structure layer 1 and a second substrate structure layer 7, the first substrate structure layer 1 includes a substrate body 11, a wafer 12 and a welding pad 13, the wafer 12 is arranged on the surface of the substrate body 11, and the welding pad 13 is arranged around the wafer 12 and fixedly connected to the substrate body 11.

[0024] A cofferdam structure 2 is arranged on the top of the first substrate structure layer 1, a cavity cover 3 is arranged on the top of the cofferdam structure 2, a metal interconnection layer 4 is arranged on the top of the cavity cover 3, a solder resist oil structure layer 5 is arranged on the top of the metal interconnection layer 4, a solder ball 6 is arranged on the top of the solder resist oil structure layer 5, and a plurality of metal pads and solder resist oil are arranged on the surface of the second substrate structure layer 7, and the metal pads are welded to the solder balls 6.

[0025] In the present invention, the cofferdam structure 2 includes a cofferdam body 21 , and a plurality of grooves 22 matching the welding pads 13 are formed on the surface of the cofferdam body 21 .

[0026] In the present invention, the solder resist oil structural layer 5 comprises a solder resist oil body 51 , and a plurality of through holes 52 distributed in a rectangular array are formed on the surface of the solder resist oil body 51 .

[0027] In the present invention, the wafer 12, the bonding pad 13 and the cavity cover 3 constitute a sealed cavity.

[0028] In the present invention, the metal interconnection layer 4 is located on the top of the pad 13 and is formed by wafer-level rewiring.

[0029] In the present invention, the thickness of the cofferdam structure 2 is not less than 1 um, and the cofferdam structure 2 forms a cavity in the electrode part. The shape of the cavity is not limited and depends on actual needs.

[0030] In the present invention, the thickness of the cavity cover 3 is not less than 1 um and has a certain structural strength. The cofferdam structure 2 and the cavity cover 3 are both made of insulating materials.

[0031] In the present invention, the cavity cover 3 exposes the outer edge of the pad, leaving enough interconnection area for the metal interconnection layer 4, and the outer side does not need to be protected, thereby reducing the chip size.

[0032] In the present invention, the metal interconnection layer 4 only isolates a single signal, and all other ground signals are interconnected to form a metal shielding cover.

[0033] In the present invention, the metal interconnection layer 4 forms a large-area coverage, which can increase the structural strength of the cavity cover 3 and prevent the cavity cover 3 from being crushed by the molding pressure during the subsequent molding process.

[0034] Working principle: When the present invention is used, the substrate body 11 is connected to the wafer 12, the welding pad 13 is arranged next to the wafer 12, a cofferdam structure 2 is arranged around the wafer 12, a cavity cover 3 is arranged above the cofferdam structure 2, the cavity cover 3 is tightly attached to the cofferdam structure 2, and a sealed cavity is formed between the wafer 12, the cofferdam structure 2 and the cavity cover 3. A metal interconnection layer 4 is formed on the welding pad 13 by a wafer-level rewiring method, the metal interconnection layer 4 is covered with a solder resist oil structure layer 5, and a vacant space is exposed at a position where welding is required, a solder ball 6 is arranged in the vacant space, a plurality of metal pads and solder resist oil are arranged on the surface of the second substrate structure layer 7, the metal pads are welded to the solder balls or gold balls, and finally plastic sealing is performed.

[0035] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0036] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A filter wafer-level packaging structure, comprising a first substrate structure layer (1) and a second substrate structure layer (7), characterized in that: The first substrate structure layer (1) comprises a substrate body (11), a wafer (12) and a welding pad (13); the wafer (12) is arranged on the surface of the substrate body (11); and the welding pad (13) is arranged around the wafer (12) and is fixedly connected to the substrate body (11); A cofferdam structure (2) is arranged on the top of the first substrate structure layer (1), a cavity cover (3) is arranged on the top of the cofferdam structure (2), a metal interconnection layer (4) is arranged on the top of the cavity cover (3), a solder resist oil structure layer (5) is arranged on the top of the metal interconnection layer (4), a solder resist oil structure layer (5) is arranged on the top of the solder resist oil structure layer (5), a solder ball (6) is arranged on the top of the second substrate structure layer (7), and a plurality of metal pads and solder resist oil are arranged on the surface of the second substrate structure layer (7), and the metal pads are welded to the solder balls (6); The cofferdam structure (2) comprises a cofferdam body (21), and a surface of the cofferdam body (21) is provided with a plurality of grooves (22) adapted to the welding pads (13); The cavity cover (3) exposes the outer edge of the solder pad, leaving enough interconnection area for the metal interconnection layer; the metal interconnection layer (4) forms a large-area coverage to form a metal support structure to protect the cover from being compressed during the plastic sealing process; The metal interconnection layer (4) only isolates a single signal, and all other ground signals are interconnected to form a metal shielding cover; The thickness of the cavity cover (3) is not less than 1 μm, and the cofferdam structure (2) and the cavity cover (3) are both made of insulating material.

2. The filter wafer level packaging structure according to claim 1, characterized in that: The solder resist oil structural layer (5) comprises a solder resist oil body (51), and a plurality of through holes (52) distributed in a rectangular array are provided on the surface of the solder resist oil body (51).

3. The filter wafer level packaging structure according to claim 1, characterized in that: The wafer (12), the welding pad (13) and the cavity cover (3) form a sealed cavity.

4. The filter wafer level packaging structure according to claim 1, characterized in that: The metal interconnection layer (4) is located on the top of the pad (13) and is formed by a wafer-level rewiring method.

5. The filter wafer level packaging structure according to claim 1, characterized in that: The thickness of the cofferdam structure (2) is not less than 1 um, and the cofferdam structure (2) forms a cavity in the electrode part, and the shape of the cavity is not limited.

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