Display panel and display device

Abstract

The application provides a display panel and a display device, a first pixel driving circuit is arranged in a display transition area, so that the first pixel driving circuit does not affect a display light transmission area, and the light transmittance of the display light transmission area is improved. Meanwhile, a first pixel gap is arranged between adjacent first pixel driving circuits in a first display area, so that the first signal line can pass through the first display area from the first pixel gap, and the first signal line does not need to be disconnected at the first display area, thereby avoiding the problem that the load difference of two disconnected lines is caused by the disconnection of the first signal line, and the position limitation of the first display area is eliminated, and innovation is provided for the development of an under-screen device technology.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more specifically, to a display panel and a display device. Background Technology

[0002] The development of display technology is advancing rapidly, and the emergence of various screen technologies has provided endless possibilities for electronic terminals. In particular, the rapid application of display technologies represented by Organic Light-Emitting Diode (OLED) has led to the rapid promotion of mobile terminals with selling points such as "full-screen," "notch-screen," "under-display sound," and "under-display fingerprint." Major mobile phone and panel manufacturers have launched many products with "full-screen" as their selling point, but most still use near-full-screen designs such as "notch screen" and "waterdrop screen." This is because mobile terminals have front-facing cameras, and a certain area must be reserved for them, making this an unavoidable choice; that is, the display area ratio of existing display panels is relatively low. To solve the problem of low display area ratio, engineers have developed a technology in which the display interface is completely covered by the display screen, that is, the photosensitive element is designed under the screen. Summary of the Invention

[0003] In view of this, the present invention provides a display panel and display device that are applicable to technologies employing under-display devices.

[0004] To achieve the above objectives, the technical solution provided by the present invention is as follows:

[0005] A display panel includes a first display area and a second display area, wherein the first display area includes a light-transmitting display area and a display transition area located between the light-transmitting display area and the second display area;

[0006] The first display area includes a plurality of first pixel driving circuits, and the plurality of first pixel driving circuits are located in the display transition area; in a first direction, there is a first pixel gap between two adjacent first pixel driving circuits;

[0007] The display panel also includes a plurality of first signal lines extending along a second direction, the first signal lines extending from the second display area and passing through the display transition area; and in the display transition area, the first signal lines pass through the first pixel gap, and the first direction and the second direction intersect.

[0008] Accordingly, the present invention also provides a display device, the display device including the display panel described above.

[0009] Compared with the prior art, the technical solution provided by the present invention has at least the following advantages:

[0010] The present invention provides a display panel and a display device. The display panel includes a first display area and a second display area. The first display area includes a light-transmitting area and a display transition area located between the light-transmitting area and the second display area. The first display area includes a plurality of first pixel driving circuits, and the plurality of first pixel driving circuits are located in the display transition area. In a first direction, there is a first pixel gap between two adjacent first pixel driving circuits. The display panel also includes a plurality of first signal lines extending along a second direction. The first signal lines extend from the second display area and pass through the display transition area. In the display transition area, the first signal lines pass through the first pixel gaps, and the first direction and the second direction intersect.

[0011] As can be seen from the above, the technical solution provided by this invention places the first pixel driving circuit in the display transition area, avoiding the first pixel driving circuit from affecting the display light-transmitting area and improving the light transmittance of the display light-transmitting area. Simultaneously, a first pixel gap is provided between adjacent first pixel driving circuits located in the first display area, thereby ensuring that the first signal line passes through the first display area via the first pixel gap without needing to disconnect the first signal line at that location. This avoids the load difference problem caused by a broken first signal line, thus eliminating the positional limitation of the first display area and providing innovation for the development of under-display device technology. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0013] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0014] Figure 2 for Figure 1 Enlarged schematic diagram of region A0 in the middle;

[0015] Figure 3 This is a schematic diagram of the structure of a driving circuit for two adjacent first pixels provided in an embodiment of the present invention;

[0016] Figure 4 This is a partial structural diagram of a display panel provided in an embodiment of the present invention;

[0017] Figure 5 A partial structural schematic diagram of another display panel provided in an embodiment of the present invention;

[0018] Figure 6 for Figure 5 An enlarged schematic diagram of region A03 in the diagram;

[0019] Figure 7 A partial structural schematic diagram of another display panel provided in an embodiment of the present invention;

[0020] Figure 8 A partial structural schematic diagram of another display panel provided in an embodiment of the present invention;

[0021] Figure 9 for Figure 1 Another enlarged schematic diagram of region A0 in the diagram;

[0022] Figure 10 for Figure 9 An enlarged schematic diagram of region A01 in the diagram;

[0023] Figure 11 for Figure 9 A schematic diagram of the first display area in the middle;

[0024] Figure 12 for Figure 1 Another enlarged schematic diagram of region A0 in the diagram;

[0025] Figure 13 for Figure 12 A schematic diagram of the first display area in the diagram;

[0026] Figure 14 for Figure 13 A schematic diagram of the dashed box D5 or D6;

[0027] Figure 15 This is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0028] Figure 16 This is a schematic diagram of the structure of a first display area provided in an embodiment of the present invention;

[0029] Figure 17 This is a schematic diagram of another structure of the first display area provided in an embodiment of the present invention;

[0030] Figure 18 This is a schematic diagram of the structure of a row first pixel driving circuit provided in an embodiment of the present invention;

[0031] Figure 19 This is a schematic diagram of another row first pixel driving circuit provided in an embodiment of the present invention;

[0032] Figure 20 This is a schematic diagram of the structure of a driving circuit for adjacent multiple rows of first pixels provided in an embodiment of the present invention;

[0033] Figure 21 This is a schematic diagram of another structure of the first display area provided in an embodiment of the present invention;

[0034] Figure 22 This is a schematic diagram of another structure of the first display area provided in an embodiment of the present invention;

[0035] Figure 23 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention;

[0036] Figure 24 A timing diagram provided for an embodiment of the present invention;

[0037] Figure 25 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0038] Figure 26 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0039] Figure 27 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0040] Figure 28 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0041] Figure 29 Another timing diagram provided for an embodiment of the present invention;

[0042] Figure 30 This is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0043] Figure 31 A partial structural schematic diagram of another display panel provided in an embodiment of the present invention;

[0044] Figure 32 A partial structural schematic diagram of another display panel provided in an embodiment of the present invention;

[0045] Figure 33 A partial structural schematic diagram of another display panel provided in an embodiment of the present invention;

[0046] Figure 34 A partial structural schematic diagram of another display panel provided in an embodiment of the present invention;

[0047] Figure 35 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0048] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0049] As described in the background section, in order to solve the problem of low display area ratio, engineers developed a technology in which the display interface is completely covered by the display screen, that is, the photosensitive element adopts an under-display design. However, in existing display panels that use under-display photosensitive elements, the position of the photosensitive element setting area is fixed, which limits the development of under-display photosensitive element technology.

[0050] Based on this, embodiments of the present invention provide a display panel and display device, which effectively solves the technical problems existing in the prior art, eliminates the positional limitations of the first display area, and provides innovation for the development of under-display device technology.

[0051] To achieve the above objectives, the technical solutions provided by the embodiments of the present invention are as follows, in detail... Figures 1 to 35 The technical solutions provided in the embodiments of the present invention will be described in detail.

[0052] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Figure 2 for Figure 1 An enlarged schematic diagram of region A0 in the image. Figure 1 In the middle, region A0 includes the portion of the first display area A1 and the portion of the second display area A2 surrounding the first display area A1.

[0053] refer to Figure 1 and Figure 2 The display panel includes a first display area A1 and a second display area A2. The first display area A1 includes a light-transmitting display area A11 and a display transition area A12 located between the light-transmitting display area A11 and the second display area A2.

[0054] The first display area A1 includes a plurality of first pixel driving circuits 110, and the plurality of first pixel driving circuits 110 are located in the display transition area A12; in the first direction Y, there is a first pixel gap 111 between two adjacent first pixel driving circuits 110.

[0055] The display panel also includes a plurality of first signal lines 11 extending along the second direction X. The first signal lines 11 extend from the second display area A2 and pass through the display transition area A12. In the display transition area A12, the first signal lines 11 pass through the first pixel gap 111, and the first direction Y and the second direction X intersect.

[0056] It should be noted that the first direction and the second direction provided in the embodiments of the present invention intersect, and optionally the first direction and the second direction are perpendicular. The display panel includes multiple data lines, the first direction Y can be the extension direction of the data lines, and the second direction X can be the arrangement direction of the multiple data lines.

[0057] like Figure 3 The diagram shown is a structural schematic of a driving circuit for two adjacent first pixels provided in an embodiment of the present invention. Figure 3 The pixel driving circuit 110 shown is a circuit layout; its equivalent circuit diagram can be found by referring to [reference needed]. Figure 23 The circuit shown has a schematic diagram where the film layer arrangement corresponding to the traces is for illustrative purposes only and can be set according to actual needs. In the first direction Y, there is a first pixel gap 111 between two adjacent first pixel driving circuits 110, and the first signal line 11 passes through the first pixel gap 111.

[0058] As can be seen from the above, the technical solution provided by the embodiments of the present invention places the first pixel driving circuit in the display transition area, avoiding the first pixel driving circuit from affecting the display light-transmitting area and improving the light transmittance of the display light-transmitting area. Simultaneously, a first pixel gap is provided between adjacent first pixel driving circuits located in the first display area, thereby ensuring that the first signal line passes through the first display area through the first pixel gap without needing to disconnect the first signal line at that location. This avoids the problem of load differences between the two disconnected traces caused by a broken first signal line, thus eliminating the positional limitations of the first display area and providing innovation for the development of under-display device technology.

[0059] It should be noted that in the relevant accompanying drawings, the locations of the film layer layout of the first pixel driving circuit 110 and the second pixel driving circuit 120 are respectively indicated by boxes.

[0060] refer to Figure 2 As shown, the display panel also includes a plurality of second pixel driving circuits 120, which are located in the second display area A2; and the display panel also includes a plurality of second signal lines 12, which extend from the second display area A2 through a display transition area A12, where the second signal lines 12 are electrically connected to the first pixel driving circuit 110 (e.g., ...). Figure 3As shown, in the second display area A2, the second signal line 12 is electrically connected to the second pixel driving circuit 120. That is, the second display area A2 provided in this embodiment of the invention includes a plurality of second pixel driving circuits 120, and the display panel further includes a plurality of second signal lines 12 extending along the second direction X; the first signal line 11 is electrically connected to the second pixel driving circuit 120, and the second signal line 12 is electrically connected to both the first pixel driving circuit 110 and the second pixel driving circuit 120.

[0061] In the second display area A2, the connection between the first signal line 11, the second signal line 12, and the second pixel driving circuit 120 can be divided into rows of sub-pixel driving circuits. For example, the second pixel driving circuit 120 includes two rows and four columns of sub-pixel driving circuits. The first signal line 11 is electrically connected to the sub-pixel driving circuits in one row, and the second signal line 12 is electrically connected to the sub-pixel driving circuits in the other row.

[0062] like Figure 2 As shown, the first signal line 11 provided in this embodiment of the invention is not electrically connected to the first pixel driving circuit 110. Optionally, the first signal line 11 can be electrically connected to the second pixel driving circuit 120 in the second display area A2, and when it extends along the second direction X to the first display area A1, it passes through the first pixel gap 111 between adjacent first pixel driving circuits 110. This eliminates the need to break the first signal line 11 at the edge of the first display area A1, avoiding the situation where the load of the two traces is inconsistent when the first signal line 11 is broken. This allows for flexible setting of the position of the first display area A1 on the display panel. For example, the first display area A1 can be set at the top, middle, or side of the display panel, etc. The present invention does not impose specific limitations on this.

[0063] Figure 1 This illustration shows that, in the second direction X, the first display area A1 is located slightly to the left of the center of the display area. In other embodiments, in the second direction X, the first display area A1 may be located at the center of the display area, or slightly to the right of the center, or at a position that touches the left or right edge of the display area, etc.

[0064] refer to Figure 4The diagram shows a partial structural schematic of a display panel according to an embodiment of the present invention. The signal lines are connected to the pixel driving circuit, indicating that the signal lines include portions of the film layer layout located in the pixel driving circuit. Specifically, the linewidth of the first signal line 11 in the first display area A1 can be smaller than its linewidth in the second display area A2. Furthermore, at least a portion of the linewidth of the first signal line 11 in this embodiment is smaller than the linewidth of the second signal line 12. Specifically, the linewidth of the second signal line 12 in this embodiment is generally uniform, meaning the linewidth of the second signal line 12 in the first display area A1 is the same as the linewidth of the second signal line 12 in the second display area A2. The linewidth of the first signal line 11 in the second display area A2 can be set to be the same as the linewidth of the second signal line 12, wherein the linewidth of the first signal line 11 in the first display area A1 is smaller than the linewidth of the second signal line 12. This allows for a design where the loads of the first signal line 11 and the second signal line 12 tend to be consistent, ensuring that the signal transmission effects of the first signal line 11 and the second signal line 12 are essentially the same. Meanwhile, by making the line width of the first signal line 11 in the first display area A1 smaller than that in the second display area A2, it is possible to avoid the first signal line 11 occupying too much of the limited area of ​​the first display area A1, thus optimizing the line design of the first display area A1.

[0065] The line width of the first signal line 11 in the first display area A1 can be the same as its line width in the second display area A2, and the line width of the second signal line 12 in the first display area A1 can be the same as its line width in the second display area A2, thus simplifying the circuit design.

[0066] The first pixel driving circuit 110 includes at least one sub-pixel driving circuit 110', and the second pixel driving circuit 120 includes at least one sub-pixel driving circuit 120'. The sub-pixel driving circuits 110' and 120' are circuit units with pixel driving functions.

[0067] The equivalent arrangement density of the sub-pixel driving circuit 110' in the first display area A1 can be less than or equal to the arrangement density of the sub-pixel driving circuit 120' in the second display area A2. When the equivalent arrangement density of the sub-pixel driving circuit 110' in the first display area A1 is less than the arrangement density of the sub-pixel driving circuit 120' in the second display area A2, in the first display area A1, both the sub-pixel driving circuit 110' used to drive the light-emitting element located in the light-transmitting area A11 and the sub-pixel driving circuit 110' used to drive the light-emitting element located in the display transition area A12 can be located in the display transition area A12. This eliminates the influence of the sub-pixel driving circuit 110' on the light transmittance of the light-transmitting area A11, thereby improving the light transmittance of the light-transmitting area A11. Here, the equivalent arrangement density can be understood as the ratio of the number of sub-pixel driving circuits in the first display area to the area of ​​the first display area.

[0068] In the first display area A1 and the second display area A2, the sub-pixel driving circuits 110' and 120' can be arranged in multiple rows. In the first display area A1 and its region in the second direction X extension direction, in the multiple rows of sub-pixel driving circuits, a sub-pixel driving circuit row including the sub-pixel driving circuit 110' of the first pixel driving circuit 110 can be provided every other row (the row is entirely composed of the sub-pixel driving circuits 120' of the second pixel driving circuit 120), or a sub-pixel driving circuit row including the sub-pixel driving circuit 110' of the first pixel driving circuit 110 can be provided every multiple rows (the multiple rows are entirely composed of the sub-pixel driving circuits 120' of the second pixel driving circuit 120), or multiple sub-pixel driving circuit rows including the sub-pixel driving circuit 110' of the first pixel driving circuit 110 can be provided every at least one row (the at least one row is entirely composed of the sub-pixel driving circuits 120' of the second pixel driving circuit 120). The present invention does not impose specific limitations on this.

[0069] Specific combination Figure 5 The diagram shown is a partial structural schematic of another display panel provided in an embodiment of the present invention. Figure 5 for Figure 2 The structure is located in region A01. Among them, Figure 5Taking the behavior of the sub-pixel driving circuit 110' with a sub-pixel driving circuit 110 including the first pixel driving circuit 110 set every other line as an example, wherein in the first display area A1 and its extended area in the second direction X, there are multiple rows of sub-pixel driving circuits arranged along the first direction Y. The multiple rows of sub-pixel driving circuits include multiple first-class sub-pixel driving circuit rows 10 and second-class sub-pixel driving circuit rows 20, and the second-class sub-pixel driving circuit rows 20 are located between two adjacent first-class sub-pixel driving circuit rows 10; the first-class sub-pixel driving circuit rows 10 include the sub-pixel driving circuit 110' of the first pixel driving circuit 110 and the sub-pixel driving circuit 120' of the second pixel driving circuit 120, and the second-class sub-pixel driving circuit rows 20 are composed of the sub-pixel driving circuit 120' of the second pixel driving circuit 120. Among them, the first-class sub-pixel driving circuit rows 10 are electrically connected to the second signal line 12, and the second-class sub-pixel driving circuit rows 20 are electrically connected to the first signal line 11; in the first display area A1, the first signal line 11 is located at the gap between adjacent first-class sub-pixel driving circuit rows 10.

[0070] Figure 5 Taking the example that the first sub-pixel driving circuit 110 includes one sub-pixel driving circuit 110', and the second pixel driving circuit 120 includes two sub-pixel driving circuits 120' arranged in two rows and one column.

[0071] As Figure 5 shown, in the first direction Y provided by the present invention, one column of the first pixel driving circuit 110 and one column of the second pixel driving circuit 120 are correspondingly arranged, that is, one column of the first pixel driving circuit 110 and one column of the second pixel driving circuit 120 are located in the same column. And, the length of the first pixel driving circuit 110 provided by the embodiment of the present invention in the direction perpendicular to the first direction Y (the second direction X shown in the figure) is n1, and the length of the second pixel driving circuit 120 in the direction perpendicular to the first direction Y is n2, where n1 < n2. Since the inclined line segment requires space to be set in both the first direction Y and the second direction X, the setting method of the lengths of the first pixel driving circuit and the second pixel driving circuit in the second direction X having the above size relationship provides space for the inclined line segment and part of the straight line segment of the first signal line 11 and the inclined line segment and part of the straight line segment of the second signal line 12. In addition, a second pixel gap can also be set between adjacent columns of the first pixel driving circuit 110, and the signal lines extending along the first direction Y (such as, reset signal line, data signal line or power supply line, etc.) can be located in the second pixel gap.

[0072] Figure 6 For Figure 5 an enlarged schematic diagram of the area A03 in. As Figure 6 As shown, the first pixel driving circuit 110 located in the same row can be connected to multiple second signal lines 12 respectively. Figure 6 Taking four second signal lines 12 as an example, the number of first signal lines 11 passing through the first pixel gap 111 between two adjacent rows of first pixel driving circuits 110 can also be multiple. Figure 6 Taking four first signal lines passing through the same first pixel gap 111 as an example, the angle between the inclined segment of the first signal line and the second direction X is b. With a fixed spacing between the straight segments of adjacent first signal lines 11, a larger angle b (i.e., a gentler slope) results in a larger spacing between the inclined segments of adjacent first signal lines 11, preventing short circuits between them. Conversely, a smaller angle b (i.e., a steeper slope) results in a smaller spacing between the inclined segments of adjacent first signal lines 11, easily causing short circuits. Similarly, the layout design of the first pixel driving circuit 110 affects the position of the second signal lines 12 derived from it. With a fixed spacing between adjacent second signal lines 12, a larger angle between the inclined segment of the second signal line 12 and the second direction X (i.e., a gentler slope) results in a larger spacing between the inclined segments of adjacent second signal lines 12, preventing short circuits between them.

[0073] The first pixel driving circuit 110 may include multiple sub-pixel driving circuits 110', and the second pixel driving circuit 120 may include multiple sub-pixel driving circuits 120'. Specifically, as follows... Figure 7 The diagram shown is a partial structural schematic of another display panel provided in an embodiment of the present invention. Figure 7 for Figure 2 The structure is located in region A01. The first pixel driving circuit 110 includes three sub-pixel driving circuits 110' arranged in a row of three columns (the extension of one row of sub-pixel driving circuits 110' is the extension in the second direction X). The second pixel driving circuit 120 includes eight sub-pixel driving circuits 120' arranged in two rows of four columns (the extension of any row of sub-pixel driving circuits 120' is the extension in the second direction X). The multiple second pixel driving circuits 120 are arranged in an array. A first signal line 11 is electrically connected to one row of sub-pixel driving circuits 120' in the second display area A2 and passes through the first pixel gap 111 in the first display area A. A second signal line 12 is electrically connected to another row of sub-pixel driving circuits 120' in the second display area A2 and is electrically connected to the sub-pixel driving circuits 110' of the first pixel driving circuit 110 in the first display area A1.

[0074] like Figure 7As shown, when the first pixel driving circuit 110 includes three columns of sub-pixel driving circuits 110' and the second pixel driving circuit 120 includes four columns of sub-pixel driving circuits 120', the length of the three columns of sub-pixel driving circuits 110' perpendicular to the first direction Y (the second direction X as shown in the figure) is n1, and the length of the four columns of sub-pixel driving circuits 120' perpendicular to the first direction Y is n2, and n1 <n2。

[0075] The size n1 of the first pixel driving circuit 110 in the second direction can also satisfy the relationship: n1≥1 / 5╳n2, and further, n1≥1 / 3╳n2.

[0076] Figure 8 This is a partial structural diagram of another display panel provided in an embodiment of the present invention. Figure 8 for Figure 2 Structure in region A01. Figure 9 for Figure 1 Another enlarged schematic diagram of region A0 in the diagram. Figure 10 for Figure 9 An enlarged schematic diagram of region A02 in the diagram. Figure 11 for Figure 9 A schematic diagram of the first display area. (The diagram shows...) Figure 8 The diagram illustrates the pixel driving circuit and wiring. Figure 9 This is a schematic diagram showing the arrangement of light-emitting elements in the first and second display areas. Figure 10 The diagram also illustrates the positional relationship between the second pixel driving circuit and the light-emitting element. Figure 11 The diagram illustrates the driving relationship between the first pixel driving circuit and the light-emitting element.

[0077] like Figures 8-11 As shown, the pixel driving circuit provided in this embodiment of the invention is used to drive light-emitting elements so that the light-emitting elements at corresponding positions emit light of the corresponding color. Light-emitting elements with the same filling pattern in the figure represent light-emitting elements with the same color.

[0078] like Figure 8 As shown, the sub-pixel driving circuits 110' and 120' include a sub-pixel driving circuit R that drives the red light-emitting element PR, a sub-pixel driving circuit G that drives the green light-emitting element PG, and a sub-pixel driving circuit B that drives the blue light-emitting element PB.

[0079] In the first display area A1, the light-emitting elements 130 can be uniformly arranged, and in the second display area A2, the light-emitting elements 130 can also be uniformly arranged. Alternatively, in the first display area A1, the arrangement density of the light-emitting elements 130 can gradually decrease along the direction from the display transition area A12 to the display light-transmitting area A11, thereby improving the problem of a boundary line between the first display area A1 and the second display area A2 in the displayed image, and further improving the transmittance of the display light-transmitting area A11. Alternatively, regarding the arrangement density of the light-emitting elements 130, a transition area can be provided at the edge of the second display area A2 near the first display area A1, and the arrangement density of the light-emitting elements 130 in the transition area is between the arrangement density of the light-emitting elements at other positions in the second display area A2 and the arrangement density of the light-emitting elements in the first display area A1. Similarly, the transition area can be provided at the edge of the first display area A1 near the second display area A2, thereby improving the problem of a boundary line between the first display area A1 and the second display area A2 in the displayed image.

[0080] The light-emitting element 130 includes a red light-emitting element PR, a green light-emitting element PG, and a blue light-emitting element PB.

[0081] like Figure 9 and Figure 10 As shown, in the second display area A2, the arrangement of the light-emitting elements 130 can be such that eight light-emitting elements 130 constitute a repeating unit RU, with multiple repeating units arranged repeatedly in the row direction (direction X) and column direction (direction Y). Specifically, the repeating unit RU includes two red light-emitting elements PR, two blue light-emitting elements PB, and four green light-emitting elements PG. The repeating unit RU contains four first pixel units PU1, where each first pixel unit PU1 includes two light-emitting elements 130 with different emitting colors. Correspondingly, the second pixel driving circuit 120 provided in this embodiment can drive the light-emitting elements 130 using a pixel rendering (SPR) display method. Specifically, Figure 10 The diagram illustrates that the second pixel driving circuit 120 includes eight sub-pixel driving circuits 120' arranged in two rows and four columns. The second pixel driving circuit 120 is used to drive the eight light-emitting elements 130 of a repeating unit RU to emit light, wherein each sub-pixel driving circuit 120' is used to drive one light-emitting element 130 to emit light.

[0082] like Figure 9 and Figure 11As shown, in the first display area A1, the first pixel driving circuit 110 is located in the display transition area A12. The light-emitting element 130 includes both the light-emitting element 130 located in the display transition area A12 and the light-emitting element 130 located in the display light-transmitting area A11. As shown in the dashed box D2, the first pixel driving circuit 110 can be electrically connected to the light-emitting element 130 located in the display light-transmitting area A11 and drive the light-emitting element 130 to emit light. As shown in the dashed box D3, the first pixel driving circuit 110 can be electrically connected to the light-emitting element 130 located in the display transition area A12 and drive the light-emitting element 130 to emit light. It should be noted that, in order to clearly illustrate the corresponding driving relationship between the first pixel driving circuit and the light-emitting element, Figure 11 The diagram only shows a portion of the first pixel driving circuit and some light-emitting elements. The arrangement of the light-emitting elements PR, PG, and PB is just an example, and the arrangement of the light-emitting elements PR, PG, and PB can be adjusted according to requirements.

[0083] Continue to refer to Figure 9 and Figure 11 The first display area A1 includes multiple second pixel units PU2. Each second pixel unit PU2 includes a red light-emitting element PR, a green light-emitting element PG, and a blue light-emitting element PB. The first pixel driving circuit 110 can drive the light-emitting elements using a physical pixel (Real RGB) display method. Specifically, the first pixel driving circuit 110 can include three sub-pixel driving circuits 110'. Each first pixel driving circuit 110 drives one second pixel unit PU2, and each sub-pixel driving circuit 110' drives one light-emitting element.

[0084] For example, the positions of the light-emitting elements located in the first display area A1 and the positions of the light-emitting elements located in the second display area A2 may include the following correspondence: the row containing a repeating unit RU in the second display area A2 is correspondingly set to the row containing a light-emitting element in the first display area A1, such as... Figure 9 The dashed box D1 in the figure is shown.

[0085] Figure 12 for Figure 1 Another enlarged schematic diagram of region A0 in the diagram. Figure 13 for Figure 12 A schematic diagram of the first display area in the diagram. Figure 14 for Figure 13 A schematic diagram of the dashed box D5 or D6. Figure 12 For an enlarged schematic diagram of region A02, please refer to... Figure 10 and related paragraph content. Figure 12 This is a schematic diagram showing the arrangement of light-emitting elements in the first and second display areas. Figure 13 The diagram illustrates the driving relationship between the first pixel driving circuit and the light-emitting element. Figure 14 This illustrates the driving relationship between the pixel driving circuit and the light-emitting element.

[0086] Combination Figure 8 , Figure 10 as well as Figures 12-14 The pixel driving circuit is used to drive the light-emitting element to emit light. In the figure, light-emitting elements with the same filling pattern represent light-emitting elements with the same color.

[0087] like Figure 12 As shown, the light-emitting elements 130 are uniformly arranged in both the first display area A1 and the second display area A2. Furthermore, the arrangement density of the light-emitting elements 130 in the first display area A1 can be the same as the arrangement density in the second display area A2, and the arrangement pattern of the light-emitting elements 130 in the first display area A1 can be the same as the arrangement pattern in the second display area A2. This reduces or eliminates the difference in display effect between the first display area A1 and the second display area A2. In one embodiment, the area of ​​the light-emitting element 130 located in the first display area A1 can be smaller than the area of ​​the light-emitting element 130 located in the second display area A2, thereby further improving the light transmittance of the first display area A1.

[0088] like Figure 10 and Figure 13 As shown, in the first display area A1 and the second display area A2, the arrangement of the light-emitting elements 130 can be such that eight light-emitting elements 130 constitute a repeating unit RU, and multiple repeating units are arranged repeatedly in the row direction (direction X) and column direction (direction Y). A repeating unit RU includes two red light-emitting elements PR, two blue light-emitting elements PB, and four green light-emitting elements PG.

[0089] like Figure 12 and Figure 13 As shown, the first pixel driving circuit 110 is located in the display transition area A12, and the light-emitting element 130 includes both the light-emitting element 130 located in the display transition area A12 and the light-emitting element 130 located in the display light-transmitting area A11. As shown in the dashed box D5, the first pixel driving circuit 110 can be electrically connected to the light-emitting element 130 located in the display light-transmitting area A11 and drive the light-emitting element 130 to emit light. As shown in the dashed box D6, the first pixel driving circuit 110 can be electrically connected to the light-emitting element 130 located in the display transition area A12 and drive the light-emitting element 130 to emit light. It should be noted that, in order to clearly illustrate the corresponding driving relationship between the first pixel driving circuit and the light-emitting element, Figure 11 The diagram only shows part of the first pixel driving circuit and part of the light-emitting elements.

[0090] Combination Figures 12-14In the first display area A1, a repeating unit RU serves as a second pixel unit PU2. In a second pixel unit PU, two red light-emitting elements PR are electrically connected to each other, two blue light-emitting elements PB are electrically connected to each other, and four green light-emitting elements PG are electrically connected to each other. The driving relationship between the pixel driving circuit and the light-emitting elements can be as follows: the first pixel driving circuit 110 can include three sub-pixel driving circuits 110', each of which drives one second pixel unit PU2. Specifically, one sub-pixel driving circuit R drives two electrically connected red light-emitting elements PR, one sub-pixel driving circuit B drives two electrically connected blue light-emitting elements PB, and one sub-pixel driving circuit G drives four electrically connected green light-emitting elements PG.

[0091] The positions of the light-emitting elements located in the first display area A1 and the positions of the light-emitting elements located in the second display area A2 may include the following correspondence: the row containing the repeating unit RU in the second display area A2 is set to correspond to the row containing the repeating unit RU in the first display area A1, such as... Figure 12 As shown in the dashed box D4 in the image. It should be noted that... Figure 10 , Figure 11 and Figure 13 In the accompanying diagram, the light-emitting element and the pixel driving circuit are shown side by side. The film layer containing the light-emitting element and the film layer containing the pixel driving circuit can be referenced. Figure 15 .

[0092] In addition, it should be noted that the present invention does not impose specific restrictions on the display methods used in the first display area A1 and the second display area A2, and specific designs need to be made according to actual applications.

[0093] In one embodiment of the present invention, any one of the first signal line 11 and the second signal line 12 provided by the present invention may include a light emission control signal line and / or a scan control signal line, wherein the light emission control signal line is a line that provides light emission control signals to the pixel driving circuit, and the scan control signal line is a line that provides scan control signals to the pixel driving circuit.

[0094] Optionally, the different types of signal lines of the first signal line 11 provided by the present invention can be arranged in different layers. For example, when the first signal line 11 includes a light emission control signal line and a scan control signal line, the light emission control signal line and the scan control signal line can be located in different metal layers. Figure 15 The diagram shown is a structural schematic of another display panel provided in an embodiment of the present invention. It should be noted that... Figure 15This illustration only shows one panel structure applicable to all structures of the present invention. The display panel includes: a substrate 211; a buffer layer 212 on the substrate 211; a polysilicon semiconductor layer 213 on the side of the buffer layer 212 facing away from the substrate 211; a first gate insulating layer 214 on the side of the polysilicon semiconductor layer 213 facing away from the substrate 211; a first metal layer 215 on the side of the first gate insulating layer 214 facing away from the substrate 211; a capacitor insulating layer 216 on the side of the first metal layer 215 facing away from the substrate 211; a capacitor metal layer 217 on the side of the capacitor insulating layer 216 facing away from the substrate 211; a first interlayer insulating layer 218 on the side of the capacitor metal layer 217 facing away from the substrate 211; an oxide semiconductor layer 219 on the side of the first interlayer insulating layer 218 facing away from the substrate 211; a second gate insulating layer 220 on the side of the oxide semiconductor layer 219 facing away from the substrate 211; and a gate metal layer 221 on the side of the gate insulating layer 220 facing away from the substrate 211. The structure includes a second interlayer insulating layer 222 located on the side of the gate metal layer 221 facing away from the substrate 211, a second metal layer 223 located on the side of the second interlayer insulating layer 222 facing away from the substrate 211, a first planarization layer 224 located on the side of the second metal layer 223 facing away from the substrate 211, a third metal layer 225 located on the side of the first planarization layer 224 facing away from the substrate 211, a second planarization layer 226 located on the side of the third metal layer 225 facing away from the substrate 211, an anode layer 227 located on the side of the second planarization layer 226 facing away from the substrate 211, and a pixel definition layer 228 located on the side of the anode layer 227 facing away from the substrate 211. The pixel definition layer 228 includes a plurality of anode blocks with openings exposing the anode layer 227, a light-emitting layer 229 located at the openings of the pixel definition layer 228, a cathode layer 230 located on the side of the light-emitting layer 229 facing away from the substrate 211, and a thin film encapsulation layer 231 located on the side of the cathode layer 230 facing away from the substrate 211. The light-emitting element 130 may include an anode layer 227, a light-emitting layer 229, and a cathode layer 230. The light-emitting element 130 may be a first light-emitting element 131 or a second light-emitting element 132. The light-emitting element 130 may be a light-emitting diode, such as an organic light-emitting diode or an inorganic light-emitting diode. Figure 15 Take organic light-emitting diodes as an example.

[0095] The polysilicon semiconductor layer 213 provided in this embodiment of the invention includes an active region, a gate layer 215 includes a gate electrode, and a source and drain layer 223 includes a source and a drain electrode, forming a low-temperature polysilicon thin-film transistor (TFT) 1. An oxide semiconductor layer 219 includes an active region, a gate metal layer 221 includes a gate electrode, and a source and drain layer 223 includes a source and a drain electrode, forming an oxide semiconductor thin-film transistor (TFT) 2. Additionally, a plate in the first metal layer 215 and a plate in the capacitor metal layer 217 form a capacitor C1. Optionally, the first signal line and the second signal line provided in this embodiment of the invention can be located in at least one of the first metal layer 215, the capacitor metal layer 217, the gate metal layer 221, the second metal layer 223, and the third metal layer 225. Different types of signal lines, such as the first signal line and the second signal line, can be disposed in different layers or in the same layer; this invention does not impose specific limitations on this.

[0096] The pixel driving circuit provided in this embodiment of the invention is used to provide driving signals to the light-emitting element, so as to control the light-emitting element to emit light and achieve the purpose of displaying an image. Combined with... Figures 1-14 The first display area A1 provided by the present invention includes a plurality of first light-emitting elements 131, and the first pixel driving circuit 110 is used to drive the first light-emitting elements 131; and the second display area A2 includes a plurality of second pixel driving circuits 120 and a plurality of second light-emitting elements 132, and the second pixel driving circuit 120 is used to drive the second light-emitting elements 132.

[0097] It is understood that the display light-transmitting area A12 provided in this embodiment of the invention includes a plurality of first light-emitting elements 131, and the display transition area A12 also includes a plurality of first light-emitting elements 131, thereby enabling the display of the image in the first display area A1 to be achieved through the first light-emitting elements 131. Meanwhile, the display light-transmitting area 131 provided in this embodiment of the invention only includes the first light-emitting elements 131, while the first pixel driving circuit 110, which is electrically connected to the first light-emitting elements 131 in the display light-transmitting area A12, is disposed in the display transition area A12, thereby improving the light transmittance in the display light-transmitting area A12 and enhancing the light collection effect.

[0098] In one embodiment of the present invention, the density of the second light-emitting element 132 in the second display area A2 is greater than or equal to the density of the first light-emitting element 131 in the display transition area A12; and the density of the first light-emitting element 131 in the display transition area A12 is greater than or equal to the density of the first light-emitting element 131 in the display light-transmitting area A12. It is understood that by making the density of the first light-emitting element 131 in the display light-transmitting area A12 lower than the density of the first light-emitting element 131 in the display transition area A12, it is possible to ensure that the display light-transmitting area A12 can display the image and improve transmittance, while also ensuring a high display effect in the display transition area A12. Furthermore, by making the density of the first light-emitting element 131 in the display transition area A12 lower than the density of the second light-emitting element 132 in the second display area A2, it is avoided that an excessive number of first light-emitting elements 131 in the first display area A1 would increase the difficulty of light collection.

[0099] refer to Figure 16 The diagram shown is a schematic representation of a first display area according to an embodiment of the present invention. The display transition area A12 provided in this embodiment includes a sub-transition area located between the display light-transmitting area A12 and the second display area A2; the sub-transition area includes multiple rows of first pixel driving circuits 110 arranged along the first direction Y. Figure 16 As shown, the display transition area A12 provided in this embodiment of the invention includes a sub-transition area A121 and a sub-transition area A122. Each sub-transition area includes multiple rows of first pixel driving circuits 110 arranged along the first direction Y. That is, multiple first pixel driving circuits 110 connected to the same second signal line 12 constitute a row.

[0100] It is understood that in the display panel provided in the embodiments of the present invention, the number of sub-transition areas is determined by the position of the first display area A1 on the display panel, that is, the number of sub-transition areas is determined by the relative position of the first display area A1 and the second display area A2. For example, when the first display area A1 is located within the range of the second display area A2, the display transition area A12 may include two sub-transition areas; or, when the first display area A1 is located at the edge of the second display area A1 in the first direction Y, the display transition area A12 may include one or two sub-transition areas. The present invention does not specifically limit this.

[0101] like Figure 16 As shown, the first signal line 11 provided in this embodiment of the invention is located between adjacent rows, that is, the first signal line 11 is located between adjacent rows formed by the first pixel driving circuit 110, which avoids the first signal line 11 being broken at the first display area A1, and ensures high flexibility in setting the position of the first display area A1.

[0102] Combination Figure 17 and Figure 18 As shown, Figure 17 This is a schematic diagram of another structure of the first display area provided in an embodiment of the present invention. Figure 18 This is a schematic diagram of the structure of a row of first pixel driving circuits provided in an embodiment of the present invention. The sub-transition region provided in this embodiment includes a flush region A113 and a tilted region A114. A row of first pixel driving circuits 110 extending from the tilted region A114 to the flush region A113 includes a tilted portion 1101 and a flush portion 1102. The tilted portion 1101 is located in the tilted region A114, and the flush portion 1102 is located in the flush region A113. The included angle α between the tilted portion 1101 and the flush portion 1102 is an obtuse angle.

[0103] It is understood that the flush portion 1102, i.e., the plurality of first pixel driving circuits 110, provided in the embodiments of the present invention are arranged in a horizontal direction, while the inclined portion 1101, i.e., the plurality of first pixel driving circuits 110, are arranged in an inclined direction having an angle with the horizontal direction. For example Figure 19 As shown, in the first pixel driving circuit of a row provided in this embodiment of the invention, the included angle between the tilted portion 1101 and the flush portion 1102 is the set angle α between the arrangement direction of the first pixel driving circuit 110 of the tilted portion 1101 and the arrangement direction of the first pixel driving circuit 110 of the flush portion 1102. The arrangement direction of the first pixel driving circuit 110 of the tilted portion 1101 can be represented by the lines connecting the same nodes of each first pixel driving circuit 110 (e.g., ...). Figure 18 The dashed line connecting the top nodes of the first pixel driving circuit 110. It should be noted that when some nodes of the same type in each first pixel driving circuit 110 are not on the same straight line, these individual nodes are removed, and the included angle α is determined with reference to the line connecting the remaining nodes; for example... Figure 19 As shown, nodes of the first pixel driving circuit 110a above the dashed line and nodes of the first pixel driving circuit 110b below the dashed line are removed. The angle α is determined by referring to the line connecting the nodes of the remaining first pixel driving circuits 110 on a straight line. Furthermore, the arrangement direction of the flush portion 1102 is horizontal, and the angle α is the angle between the line connecting the same nodes of each first pixel driving circuit 110 in the inclined portion 1101 and the horizontally extending line. The angle α between the inclined portion 1101 and the flush portion 1102 provided in this embodiment is an obtuse angle, which allows the first signal lines 11 between adjacent rows to extend smoothly from the inclined region A114 to the flush region A113, avoiding steep slopes in the first signal lines 11, reducing the possibility of broken lines during the fabrication of the first signal lines 11, and preventing short circuits between adjacent first signal lines 11 that cross the same first pixel gap 111 due to insufficient spacing.

[0104] In one embodiment of the present invention, the multiple rows of first pixel driving circuits are defined as first pixel driving circuits 110 in the first row to the first pixel driving circuits 110 in the Nth row, and the first pixel driving circuits 110 in the first row are close to the display light-transmitting area A12, where N is an integer greater than or equal to 2; wherein, the setting angle α in the first pixel driving circuit 110 in the i-th row is greater than or equal to the setting angle α in the first pixel driving circuit 110 in the first row, and i is an integer greater than 1 and less than or equal to N. Optionally, the setting angle range in the first pixel driving circuit 110 in the first row provided in the embodiment of the present invention is 144 degrees to 152 degrees, including the endpoint value. By optimizing the setting angle range of the first pixel driving circuit 110 in the first row, the position and arrangement of the first pixel driving circuits 110 in the first row are defined, providing key parameters for the layout of the first pixel driving circuits 110 in subsequent rows. While determining the position of the first pixel driving circuit 110 in the first row, the position of the first pixel driving circuit 110 in the last row can also be determined. For the remaining first pixel driving circuits 110 in the same column (excluding the first and last rows), the positions of the remaining first pixel driving circuits 110 can be determined by setting them at equal intervals based on the positions of the first pixel driving circuits 110 in the first row and the first pixel driving circuits 110 in the last row. In this way, for each first pixel driving circuit in the same column, there will be no situation where the spacing between adjacent first pixel driving circuits 110 is too large. Correspondingly, when the portion of the first signal line 11 corresponding to the first pixel driving circuit 110 in the column extends to the position corresponding to the first pixel driving circuit 110 in the previous column or to the position corresponding to the first pixel driving circuit 110 in the next column, the slope of its inclined line segment will not be too steep, thus avoiding short circuits between adjacent first signal lines 11.

[0105] In the embodiment of the present invention, the included angle α along the direction from the first pixel driving circuit 110 of the first row to the first pixel driving circuit 110 of the Nth row increases, thereby making the first signal line 11 between the first pixel driving circuits 110 of adjacent rows smoother and further reducing the possibility of broken lines during the preparation of the first signal line 11.

[0106] Further integration Figure 17 and Figure 18As shown, at any sub-transition region, the first pixel driving circuit 110 in the multiple rows is defined as the first pixel driving circuit 110 in the first row 101 to the first pixel driving circuit 110 in the Nth row 10N (N is 10 in the illustration, i.e., N = 10). The first pixel driving circuit 110 in the first row 101 is close to the display light-transmitting area A12, and N is an integer greater than or equal to 2. For the inclined portion 1101 in the first pixel driving circuit 110 in the first row 101, the spacing h of adjacent first pixel driving circuits 110 in the first direction Y is the same, thereby defining the position and spacing parameters of the first pixel driving circuit 110 in the first row 101, laying the foundation for subsequent optimization design of the position of the first pixel driving circuit 110 in the remaining rows.

[0107] In one embodiment of the present invention, in the first pixel driving circuit 110 of the same column provided by the present invention, the lengths of the first pixel gaps 111 in the first direction Y are the same. For example... Figure 20 The diagram shows a structural schematic of an adjacent multi-row first pixel driving circuit according to an embodiment of the present invention. The sub-transition region includes multiple columns of first pixel driving circuits 110 arranged along the second direction X. In the inclined region A114, for the same column of first pixel driving circuits 110, the length of each first pixel gap 111 in the first direction Y is the same. For example… Figure 20 In the inclined region A114 on either side of the flush region A113 shown, from the inclined region A114 to the flush region A113, the gaps 1111 of each first pixel in the first column of the first pixel driving circuit 110 are the same; and the gaps 1112 of each first pixel in the second column of the first pixel driving circuit 110 are the same, and so on. The gaps 111 of each first pixel in the same column of the first pixel driving circuit 110 are the same, so as to facilitate the wiring design of the lines at the first display area A1. The gaps of the first pixels can be different for the first pixel driving circuits in different columns.

[0108] Furthermore, for each of the first pixel gaps 111 located between two adjacent rows, the length of each of the first pixel gaps 111 in the first direction Y gradually decreases along the direction from the inclined region A114 to the flush region A113. For example... Figure 20 As shown, the corresponding first pixel gap 1111 in the first pixel driving circuit 110 of the first column is greater than the corresponding first pixel gap 1112 in the first pixel driving circuit 110 of the second column, thereby making the angle between the inclined portion 1101 and the flush portion 1102 of each row of the first pixel driving circuit 110 an obtuse angle.

[0109] In one embodiment of the present invention, the first signal line 11 provided by the present invention can cross the first pixel gap 111 between the first pixel driving circuits 110 of adjacent rows in a curved manner at the inclined region A114; or, the first signal line 11 provided by the present invention can also cross the first pixel gap 111 between the first pixel driving circuits 110 of adjacent rows in a zigzag manner at the inclined region A114. Figure 20 In the inclined region A114, the first signal line 11 includes a straight line segment 11a and an inclined line segment 11b connected to each other; in the first direction Y, the straight line segment 11a overlaps with the first pixel driving circuit 110, that is, the straight line segment 11a is located between adjacent first pixel driving circuits 110 along the first direction Y; the inclined line segment 11b connects two adjacent straight line segments 11a respectively.

[0110] In the inclined region A114, the second signal line 12 may include interconnected straight line segments and inclined line segments, with the inclined line segments connecting two adjacent straight line segments respectively. At least a portion (not shown in the figure) of the straight line segment of the second signal line 12 passes through the region of the first pixel driving circuit 110.

[0111] like Figure 20 As shown, the included angle b between the inclined line segment 11b and the straight line segment 11a provided in this embodiment of the invention is in the range of [150°, 180°). The included angle between the inclined line segment 11b and the straight line segment 11a is the angle at which the inclined line segment 11b and the straight line segment 11a cross and turn away from the side of the light-transmitting area A12. Setting this angle in the range of [150°, 180°] can reduce the possibility of line breakage during the preparation of the first signal line 11.

[0112] Further reference Figure 20 As shown, in the inclined region A114, the angle b between the inclined line segment 11b and the straight line segment 11a increases in the direction from the display light-transmitting region A11 to the inclined region A114. For example, the angle b1 between the first signal lines 11 of the first pixel driving circuits 110 in the preceding adjacent row is smaller than the angle b2 between the first signal lines 11 of the following adjacent first pixel driving circuits 110, making the broken line portion of the first signal line 11 smoother and further reducing the probability of breakage during the fabrication of the first signal line 11.

[0113] refer to Figure 21 The diagram shows another structural schematic of a first display area provided by an embodiment of the present invention. The sub-transition area provided by this embodiment includes multiple columns 200 of first pixel driving circuits 110 arranged along the second direction X. Optionally, in the flush area A113, the number of first pixel driving circuits 110 in each column 200 is the same; as shown... Figure 21As shown, the number of the first pixel driving circuits 110 in each column 200 provided in the embodiment of the present invention is the same. In the figure, the number of the first pixel driving circuits 110 in each column 200 is taken as 10 for illustration, but the present invention does not make specific limitations thereto, and specific design needs to be carried out according to actual applications.

[0114] As Figure 22 shown, it is a schematic structural diagram of another first display area provided in the embodiment of the present invention. Among them, the relationship between the width W113 of the flush area A113 in the second direction X and the width W11 of the display light-transmitting area A11 in the second direction X may include: W113 < W11, or, W113 = W11, or, W113 > W11. When W113 < W11, the first pixel driving circuits 110 located in the flush area A113 and the first pixel driving circuits 110 located in the inclined area A114 may jointly form a broken line shape surrounding the display light-transmitting area A11, and the light-transmitting display area A11 may be circular.

[0115] In an embodiment of the present invention, for the multiple columns of the first pixel driving circuits 110 located in the inclined area A114, in the direction from the inclined area A114 to the flush area A113, the number of the first pixel driving circuits 110 in the subsequent column is greater than or equal to the number of the first pixel driving circuits 110 in the previous column. It should be noted that for the number of the first pixel driving circuits 110 in each column and the number of the first pixel driving circuits 110 in each row at the sub-transition area provided in the embodiment of the present invention, no specific limitations are made, and specific analysis and design need to be carried out according to factors such as the outer contour shape of the first display area A1 and the type of the display device. For example, after determining the outer contour shape of the first display area A1, the number and position layout of the first pixel driving circuits 110 are carried out within the first display area A1 of this shape, and finally the circuit structure at the first display area A1 is obtained. Optionally, the outer contour shape of the first display area A1 provided in the embodiment of the present invention may be circular, oval, rectangular, rhombic, etc. [[ID=X]]

[0116] In an embodiment of the present invention, the present invention does not make specific limitations on the type of the pixel driving circuit; the specific structure of a pixel driving circuit provided in the embodiment of the present invention will be described below. Refer to Figure 23The diagram shows a schematic of a pixel driving circuit according to an embodiment of the present invention. The first and / or second pixel driving circuits provided in this embodiment can be 7T1C circuits, meaning the pixel driving circuit includes 7 transistors and 1 capacitor. Specifically, it includes a driving transistor T1, a data writing transistor T3 electrically connected to the driving transistor T1, and a second reset transistor T7 electrically connected to the anode of the light-emitting element D. The first pixel driving circuit (or the second pixel driving circuit) includes a driving transistor T1, a first reset transistor T2, a data writing transistor T3, a connection transistor T4, a first light-emitting control transistor T5, a second light-emitting control transistor T6, a second reset transistor T7, and a storage capacitor C. The gate of the driving transistor T1 is electrically connected to the second terminal of the first reset transistor T2, the second terminal of the connection transistor T4, and the second terminal of the storage capacitor C. The first terminal of the driving transistor T1 is electrically connected to the second terminal of the first light-emitting control transistor T5 and the second terminal of the data writing transistor T3. The second terminal of the driving transistor T1 is electrically connected to the first terminal of the connection transistor T4 and the first terminal of the second light-emitting control transistor T6.

[0117] The first terminal of the first reset transistor T2 is connected to the first reset voltage Vref1, and the gate of the first reset transistor T2 is connected to the first scan control signal S1; the first terminal of the data writing transistor T3 is connected to the data voltage Vdata, and the gate of the data writing transistor T3 is connected to the second scan control signal S2. The data voltage Vdata can be provided by the data signal line; the gate of the connecting transistor T4 is connected to the third scan control signal S3, wherein the first scan control signal S1, the second scan control signal S2, and the third scan control signal S3 are provided by the scan control signal line; the first terminal of the first light-emitting control transistor T5 and the first terminal of the storage capacitor C are both connected to the first power supply voltage PVDD, and the gate of the first light-emitting control transistor T5 is connected to the light-emitting control signal EM; the second terminal of the second light-emitting control transistor T6 is electrically connected to the anode of the light-emitting element D, and the gate of the second light-emitting control transistor T6 is connected to the light-emitting control signal EM; the first terminal of the second reset transistor T7 is connected to the second reset voltage Vref2, and the second terminal of the second reset transistor T7 is electrically connected to the anode of the light-emitting element D. The gate of the second reset transistor T7 is connected to the second scan control signal S2, and the cathode of the light-emitting element D is connected to the second power supply voltage PVEE. The first reset voltage Vref1 and the second reset voltage Vref2 can be provided by the reset signal line.

[0118] It is understood that in the embodiments of the present invention, the gate of the data writing transistor T3 and the gate of the second reset transistor T7 are both connected to the second scan control signal S2. That is, the gate of the data writing transistor T3 and the gate of the second reset transistor T7 are connected, thereby reducing the number of wirings in the first pixel driving circuit. Furthermore, the second reset transistor T7 provided in the embodiments of the present invention can be located in the area between at least two transistors in the first pixel driving circuit on the layout, such as... Figure 3 As shown, the second reset transistor T7 is located between the first reset transistor T2 and the data writing transistor T3 (the present invention does not impose specific limitations on this), thereby reducing the area occupied by the first pixel driving circuit and increasing the effective wiring area in the first display area.

[0119] In one embodiment of the present invention, all transistors in the first pixel driving circuit provided by the present invention can be P-type transistors or N-type transistors, and the present invention does not impose specific limitations on this. Figure 23 As shown, this embodiment of the invention is described using an example where all transistors are P-type transistors, and the operation of each transistor in the reset stage M1, data writing stage M2, and light emission stage M3 of the first pixel driving circuit can be specifically referred to Figure 24 The timing diagram is shown.

[0120] Figure 23 Taking the first reset transistor T2 and the connection transistor T4 as P-type transistors as an example, the P-type transistors can be low-temperature polycrystalline silicon thin-film transistors. In another embodiment, the first reset transistor and the connection transistor can also be N-type transistors, specifically oxide semiconductor transistors, which can reduce transistor leakage current issues. When the first reset transistor and the connection transistor are N-type transistors, the enable level of the corresponding scan control signal is high.

[0121] When the display panel is in low-frequency operating mode, the first scan control signal S1 and the third scan control signal S3 do not provide enable signals, while the second scan control signal S2 provides enable signals. The timing of the second scan control signal S2 is different from that of the third scan control signal S3, and the scan control signals of adjacent pixel rows cannot be reused. Therefore, each row of pixel driving circuits needs to be equipped with a separate scan control signal line that provides the second scan control signal S2. The first signal line 11 includes a scan control signal line. The scan control signal line can pass through the first pixel gap in the first display area A1 and connect the scan control signal lines located on both sides of the first display area A1, which is conducive to achieving load balancing on each row of scan control signal lines.

[0122] refer to Figures 25-28As shown, the pixel driving circuit can also be an 8T1C type pixel circuit, which includes 8 transistors and 1 capacitor. The pixel driving circuit provided in this embodiment of the invention also includes a bias compensation transistor T8. The gate of the bias compensation transistor T8 is connected to a bias control signal SV, the first terminal of the bias compensation transistor T8 is connected to a bias voltage Vdh, and the second terminal of the bias compensation transistor T8 is electrically connected to the first terminal of the driving transistor T1, as shown. Figure 26 and Figure 27 Alternatively, the second terminal of the bias compensation transistor T8 is electrically connected to the second terminal of the driving transistor T1, such as... Figure 25 and Figure 28 As shown. In this embodiment of the invention, the bias compensation transistor T8 is used to transmit the bias compensation voltage Vdh to the first pixel driving circuit before or after the data writing stage M2, and before the light emission stage M3, to improve the hysteresis characteristics of the driving transistor T1. Alternatively, the bias compensation transistor T8 is used to transmit the bias compensation voltage Vdh to the source or drain of the driving transistor T1 in a display frame without a data writing stage, to improve the bias state of the driving transistor T1. The bias compensation voltage Vdh is provided by a bias signal line, which can be the first signal line and the second signal line provided in this application. Figure 25 and Figure 26 Taking a P-type transistor as an example, Figure 27 and Figure 28 Taking an N-type transistor as an example, the driving transistor is used.

[0123] Figures 25-28 In this embodiment, the first reset transistor T2 and the connection transistor T4 are N-type transistors, specifically oxide semiconductor transistors, to reduce leakage current. In another embodiment, the first reset transistor T2 and the connection transistor T4 can be P-type transistors, specifically low-temperature polysilicon transistors.

[0124] Figures 25-28 The gate of the data writing transistor T3 is connected to the second scan control signal S2, and the gate of the second reset transistor T7 is connected to the fourth scan control signal S4. If the second scan control signal S2 and the fourth scan control signal S4 are the same, the gate of the data writing transistor T3 and the gate of the second reset transistor T7 can be connected together, and the same scan control signal line can be used to provide the scan control signal to reduce the number of wirings in the pixel driving circuit.

[0125] Figure 29 for Figure 25 The diagram shows a timing schematic of a pixel driving circuit. The operation of each transistor in the reset phase M1, data writing phase M2, bias compensation phase M21, and light emission phase M3 of the pixel driving circuit can be found in [reference needed]. Figure 29As shown in the timing diagram, the timing and duration of the bias compensation stage M21 can be adjusted as needed.

[0126] The pixel driving circuit includes P-type transistors and N-type transistors. Even if the timing is the same, the different enable levels of the transistors increase the number of control signals required by the pixel driving circuit, which increases the number of signal lines connected to the pixel driving circuit. In addition, at least some control signals cannot be carried over from the signals in adjacent pixel driving circuit rows. The signal lines connected to each row of pixel driving circuits need to be set separately. In the first display area A1, by setting the first signal lines connected to specific pixel driving circuit rows in the first pixel gap, the wiring difficulty of the signal lines in the first display area A1 is reduced, and it is also beneficial to balance the load on the signal lines connected to each row of pixel driving circuits.

[0127] It should be noted that the control signals S1-S4 can be understood as the scanning control signals mentioned above, and EM can be understood as the light emission control signals mentioned above.

[0128] Optionally, the bias compensation transistor T8 provided in this embodiment of the invention can be located in the area between at least two transistors in the first pixel driving circuit on the layout, such as between the data writing transistor T2 and the data writing transistor T3 (the invention does not impose specific limitations on this), thereby reducing the area occupied by the first pixel driving circuit and increasing the effective wiring area in the first display area.

[0129] refer to Figure 30 The diagram shows a structural schematic of another display panel provided by an embodiment of the present invention. In the second direction X, and in any row of the first pixel driving circuits 110, there is a second pixel gap 112 between two adjacent first pixel driving circuits 110. The display transition area A12 includes a plurality of third signal lines 13 extending in the first direction Y and electrically connected to the first pixel driving circuits 110. The third signal lines 13 are located at the second pixel gap 112, further optimizing the wiring structure of the display panel.

[0130] In one embodiment of the present invention, the third signal line 13 provided by the present invention is located at the display light-transmitting area A12. It can pass through the display light-transmitting area A12 or avoid the display light-transmitting area A12 by winding. The present invention does not impose specific limitations on this. Furthermore, in the first display area A1 provided by the embodiment of the present invention, in the sub-transition area, for the first pixel driving circuit 110 of a row, the lengths of each second pixel gap 112 in a third direction (where the second direction X and the first direction Y can be perpendicular, and in this case, the third direction is the second direction X) are the same, wherein the third direction is perpendicular to the first direction Y.

[0131] Optionally, the third signal line provided in this embodiment of the invention is a reset signal line, a data signal line, or a power line. The reset signal line is the signal line that provides the first reset voltage Vref1 and the second reset voltage Vref2 to the pixel driving circuit. The data signal line is the signal line that provides the data voltage Vdata to the pixel driving circuit. The power line is the signal line that provides the power supply voltage PVDD to the pixel driving circuit.

[0132] refer to Figure 31 The diagram shows a partial structural schematic of another display panel provided in an embodiment of the present invention. The second display area includes a plurality of second pixel driving circuits 120. The display panel also includes a plurality of second signal lines 12 extending along a second direction X. The first signal line 11 is electrically connected to the second pixel driving circuit 120, and the second signal line 12 is electrically connected to both the first pixel driving circuit 110 and the second pixel driving circuit 120. The second pixel driving circuit 120 electrically connected to the first signal line 11 is a first group of pixel driving circuits 31, and the second pixel driving circuit 120 electrically connected to the second signal line 12 is a second group of pixel driving circuits 32. The first group of pixel driving circuits 31 and the second group of pixel driving circuits 32 are alternately arranged in the first direction Y. The second pixel driving circuit 120 may include two rows of sub-pixel driving circuits 120'. The first signal line 11 is connected to one row of sub-pixel driving circuits 120' of the second pixel driving circuit 120 (such as the sub-pixel driving circuits 120' in the first group of pixel driving circuits 31), and the second signal line 12 is connected to the other row of sub-pixel driving circuits 120' of the second pixel driving circuit 120 (such as the sub-pixel driving circuits 120' in the second group of pixel driving circuits 32).

[0133] Further reference Figure 32 The diagram shows a partial structural schematic of another display panel provided in an embodiment of the present invention. The display panel further includes multiple first bias voltage lines 141 extending along the second direction X for transmitting the bias voltage Vdh mentioned above. In the second display area A2, the first bias voltage lines 141 are located between adjacent first group pixel driving circuits 31 and second group pixel driving circuits 32, and are electrically connected to both groups of pixel driving circuits. The first bias voltage lines 141 extend from the second display area A2 to the first display area A1, and in the first display area A1, the first bias voltage lines 141 are electrically connected to the first pixel driving circuit 110.

[0134] In one embodiment of the present invention, both the first signal line 11 and the second signal line 12 provided by the present invention include a first bias voltage line 141. In the first display area A1, the first bias voltage line 141 in the first signal line 11 is located at the first pixel gap 111. The linewidth of the first bias voltage line 141 provided by the present invention in the first display area A1 is smaller than its linewidth in the second display area A2, thereby improving the uniformity of all first bias voltage lines 141 and ensuring high signal transmission performance.

[0135] refer to Figure 33 The diagram shows a partial structural schematic of another display panel provided in an embodiment of the present invention. The display panel further includes multiple first bias voltage lines 141 extending along the second direction X, used to transmit the bias voltage Vdh described above. In the second display area A2, the first group of pixel driving circuits 31 and the second group of pixel driving circuits 32 are each electrically connected to one of the first bias voltage lines 141. At the boundary between the second display area A2 and the first display area A1, two adjacent first bias voltage lines 141 are merged into one and extend towards the first display area A1. In the first display area A1, the first bias voltage line 141 is electrically connected to the first pixel driving circuit 110. Furthermore, merging the first bias voltage lines 141 reduces the number of wiring lines while ensuring a larger wiring space in the first display area A1.

[0136] refer to Figure 30 The diagram shows a partial structural schematic of another display panel provided in an embodiment of the present invention. The display panel further includes multiple second bias voltage lines 142 extending along the first direction Y. In the first display area A1, the plurality of first pixel driving circuits 110 are arranged in multiple columns along the second direction X, with a second pixel gap 112 between adjacent columns. The second bias voltage lines 142 are located within the second pixel gaps 112. Forming the first bias voltage lines 141 and second bias voltage lines 142 into a grid pattern allows for better provision of voltage signals to the pixel driving circuits.

[0137] Accordingly, embodiments of the present invention also provide a display device, the display device including the display panel provided in any of the above embodiments.

[0138] refer to Figure 35 The diagram shown is a structural schematic of a display device provided in an embodiment of the present invention, wherein the display device 1000 provided in the embodiment of the present invention can be a mobile terminal device.

[0139] Optionally, the display device provided by the present invention can also be an electronic display device such as a computer or a wearable display device, and the present invention does not impose specific limitations on it.

[0140] In one embodiment of the present invention, the display device provided by the present invention includes an optical sensor, such as a camera, disposed corresponding to the display light-transmitting area. This sensor can be disposed on the back side of the display panel and overlap with the display light-transmitting area of ​​the display panel. Alternatively, the display light-transmitting area provided in this embodiment of the present invention can also be provided with other photosensitive elements, which requires specific design according to the type of display device.

[0141] This invention provides a display panel and a display device. The display panel includes a first display area and a second display area. The first display area includes a light-transmitting area and a display transition area located between the light-transmitting area and the second display area. The first display area includes a plurality of first pixel driving circuits, and the plurality of first pixel driving circuits are located in the display transition area. In a first direction, there is a first pixel gap between two adjacent first pixel driving circuits. The display panel also includes a plurality of first signal lines extending along a second direction. The first signal lines extend from the second display area and pass through the display transition area. In the display transition area, the first signal lines pass through the first pixel gaps, and the first direction and the second direction intersect.

[0142] As can be seen from the above, the technical solution provided by the embodiments of the present invention places the first pixel driving circuit in the display transition area, avoiding the first pixel driving circuit from affecting the display light-transmitting area and improving the light transmittance of the display light-transmitting area. Simultaneously, a first pixel gap is provided between adjacent first pixel driving circuits located in the first display area, thereby ensuring that the first signal line passes through the first display area through the first pixel gap without needing to disconnect the first signal line at that location. This avoids the load difference problem caused by a broken first signal line, thus eliminating the positional limitation of the first display area and providing innovation for the development of under-display device technology.

[0143] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, characterized in that, The display panel includes a first display area and a second display area. The first display area includes a light-transmitting display area and a display transition area located between the light-transmitting display area and the second display area. The first display area includes a plurality of first pixel driving circuits, and the plurality of first pixel driving circuits are located in the display transition area; in a first direction, there is a first pixel gap between two adjacent first pixel driving circuits; The display panel further includes a plurality of first signal lines extending along a second direction, the first signal lines extending from the second display area and passing through the display transition area; and in the display transition area, the first signal lines pass through the first pixel gap, and the first direction and the second direction intersect; The second display area includes a plurality of second pixel driving circuits, and the display panel further includes a plurality of second signal lines extending along the second direction; The first signal line is electrically connected to the second pixel driving circuit, and the second signal line is electrically connected to both the first pixel driving circuit and the second pixel driving circuit. In the first direction, a column of first pixel driving circuits and a column of second pixel driving circuits are correspondingly arranged; The length of the first pixel driving circuit perpendicular to the first direction is n1, and the length of the second pixel driving circuit perpendicular to the first direction is n2, wherein n1 <n2。 2. The display panel according to claim 1, characterized in that, The first signal line is not electrically connected to the first pixel driving circuit.

3. The display panel according to claim 1, characterized in that, The line width of the first signal line in the first display area is smaller than its line width in the second display area.

4. The display panel according to claim 1, characterized in that, In the first display area and its extension area in the second direction, there is a multi-row sub-pixel driving circuit disposed along the first direction. The multi-row sub-pixel driving circuit includes a plurality of first-type sub-pixel driving circuit rows and second-type sub-pixel driving circuit rows, and the second-type sub-pixel driving circuit rows are located between two adjacent first-type sub-pixel driving circuit rows. The first pixel driving circuit includes at least one sub-pixel driving circuit, the second pixel driving circuit includes at least one sub-pixel driving circuit, the first type of sub-pixel driving circuit row includes the sub-pixel driving circuit of the first pixel driving circuit and the sub-pixel driving circuit of the second pixel driving circuit, and the second type of sub-pixel driving circuit row is composed of the sub-pixel driving circuit of the second pixel driving circuit, wherein the first type of sub-pixel driving circuit row is electrically connected to the second signal line, and the second type of sub-pixel driving circuit row is electrically connected to the first signal line; In the first display area, the first signal line is located in the gap between adjacent rows of the first type of sub-pixel driving circuits.

5. The display panel according to claim 1, characterized in that, At least a portion of the first signal line has a line width smaller than that of the second signal line.

6. The display panel according to claim 1, characterized in that, The first signal line and the second signal line can be either light emission control signal line or scan control signal line.

7. The display panel according to claim 6, characterized in that, Different types of signal lines in the first signal line are arranged in different layers.

8. The display panel according to claim 1, characterized in that, n1≥1 / 5╳n2.

9. The display panel according to claim 1, characterized in that, The first pixel driving circuit includes three sub-pixel driving circuits arranged in a row of three columns, and the second pixel driving circuit includes eight sub-pixel driving circuits arranged in a row of two rows of four columns.

10. The display panel according to claim 1, characterized in that, The first display area includes a plurality of first light-emitting elements, and the first pixel driving circuit is used to drive the first light-emitting elements; and the second display area includes a plurality of second pixel driving circuits and a plurality of second light-emitting elements, and the second pixel driving circuit is used to drive the second light-emitting elements.

11. The display panel according to claim 10, characterized in that, The density of the second light-emitting element in the second display area is greater than or equal to the density of the first light-emitting element in the display transition area; and the density of the first light-emitting element in the display transition area is greater than or equal to the density of the first light-emitting element in the display light-transmitting area.

12. The display panel according to claim 1, characterized in that, The display transition area includes a sub-transition area located between the display light-transmitting area and the second display area; The sub-transition region includes multiple rows of the first pixel driving circuits arranged along the first direction.

13. The display panel according to claim 12, characterized in that, The first signal line is located between adjacent rows.

14. The display panel according to claim 12, characterized in that, The sub-transition region includes a flush region and a tilted region. A row of first pixel driving circuits extending from the tilted region to the flush region includes a tilted portion and a flush portion. The tilted portion is located in the tilted region, and the flush portion is located in the flush region. The included angle between the tilted portion and the flush portion is an obtuse angle.

15. The display panel according to claim 14, characterized in that, The first pixel driving circuits in the multiple rows are defined as the first pixel driving circuits in the first row to the first pixel driving circuits in the Nth row, and the first pixel driving circuits in the first row are close to the display light-transmitting area, where N is an integer greater than or equal to 2. For the tilted portion of the first pixel driving circuit in the first row, the spacing between adjacent first pixel driving circuits in the first direction is the same.

16. The display panel according to claim 15, characterized in that, The sub-transition region includes multiple columns of the first pixel driving circuits arranged along the second direction; In the inclined region, for a column of the first pixel driving circuits, the length of each first pixel gap in the first direction is the same.

17. The display panel according to claim 15, characterized in that, For each of the first pixel gaps located between two adjacent rows, the length of each of the first pixel gaps gradually decreases in the first direction along the direction from the inclined area to the flush area.

18. The display panel according to claim 14, characterized in that, In the inclined region, the first signal line includes interconnected straight line segments and inclined line segments; In the first direction, the straight line segment overlaps with the first pixel driving circuit; The inclined line segments connect two adjacent straight line segments respectively.

19. The display panel according to claim 18, characterized in that, The included angle between the inclined line segment and the straight line segment is in the range of [150°, 180°].

20. The display panel according to claim 18, characterized in that, In the inclined area, the angle between the inclined line segment and the straight line segment tends to increase in the direction from the light-transmitting display area to the inclined area.

21. The display panel according to claim 14, characterized in that, The first pixel driving circuits in the multiple rows are defined as the first pixel driving circuits in the first row to the first pixel driving circuits in the Nth row, and the first pixel driving circuits in the first row are close to the display light-transmitting area, where N is an integer greater than or equal to 2. Wherein, the angle set in the first pixel driving circuit of the i-th row is greater than or equal to the angle set in the first pixel driving circuit of the first row, and i is an integer greater than 1 and less than or equal to N.

22. The display panel according to claim 21, characterized in that, The angle range set in the first pixel driving circuit of the first row is 144 degrees to 152 degrees, including the endpoint value.

23. The display panel according to claim 21, characterized in that, The included angle along the direction from the first pixel driving circuit in the first row to the first pixel driving circuit in the Nth row tends to increase.

24. The display panel according to claim 14, characterized in that, The sub-transition region includes multiple columns of the first pixel driving circuits arranged along the second direction.

25. The display panel according to claim 24, characterized in that, In the flush region, the number of first pixel driving circuits in each column is the same.

26. The display panel according to claim 24, characterized in that, For the multiple columns of first pixel driving circuits located in the tilted region, in the direction from the tilted region to the flush region, the number of first pixel driving circuits in the later column is greater than or equal to the number of first pixel driving circuits in the previous column.

27. The display panel according to claim 1, characterized in that, The first pixel driving circuit includes a driving transistor, a data writing transistor electrically connected to the driving transistor, and a second reset transistor electrically connected to the anode of the light-emitting element.

28. The display panel according to claim 27, characterized in that, The gate of the data writing transistor is connected to the gate of the second reset transistor.

29. The display panel according to claim 27, characterized in that, The second reset transistor is located in the region between at least two transistors in the first pixel driving circuit.

30. The display panel according to claim 29, characterized in that, In the second direction, and in any row of the first pixel driving circuit, there is a second pixel gap between two adjacent first pixel driving circuits; The display transition area includes a plurality of third signal lines extending in the first direction and electrically connected to the first pixel driving circuit, the third signal lines being located at the second pixel gap.

31. The display panel according to claim 30, characterized in that, The display transition area includes a sub-transition area located between the display light-transmitting area and the second display area; In the sub-transition region, for the first pixel driving circuit of a row, the length of each second pixel gap in the third direction is the same, wherein the third direction is perpendicular to the first direction.

32. The display panel according to claim 30, characterized in that, The third signal line is a reset signal line, a data signal line, or a power line.

33. The display panel according to claim 1, characterized in that, The second display area includes multiple second pixel driving circuits; The display panel also includes multiple second signal lines extending along a second direction; The first signal line is electrically connected to the second pixel driving circuit, and the second signal line is electrically connected to both the first pixel driving circuit and the second pixel driving circuit. The second pixel driving circuit electrically connected to the first signal line is a first group of pixel driving circuits, and the second pixel driving circuit electrically connected to the second signal line is a second group of pixel driving circuits. The first group of pixel driving circuits and the second group of pixel driving circuits are alternately arranged in the first direction.

34. The display panel according to claim 33, characterized in that, The display panel also includes multiple first bias voltage lines extending along the second direction; In the second display area, the first bias voltage line is located between the adjacent first group of pixel driving circuits and the second group of pixel driving circuits, and is electrically connected to both groups of pixel driving circuits. The first bias voltage line extends from the second display area to the first display area, and in the first display area, the first bias voltage line is electrically connected to the first pixel driving circuit.

35. The display panel according to claim 33, characterized in that, The display panel also includes multiple first bias voltage lines extending along the second direction; In the second display area, the first group of pixel driving circuits and the second group of pixel driving circuits are respectively electrically connected to a first bias voltage line. At the boundary between the second display area and the first display area, two adjacent bias voltage lines merge into one and extend into the first display area. In the first display area, the first bias voltage line is electrically connected to the first pixel driving circuit.

36. The display panel according to claim 34, characterized in that, Both the first signal line and the second signal line include a first bias voltage line.

37. The display panel according to any one of claims 33-36, characterized in that, The display panel also includes multiple second bias voltage lines extending along the first direction.

38. The display panel according to claim 37, characterized in that, In the first display area, the plurality of first pixel driving circuits are arranged in multiple columns along the second direction, with a second pixel gap between adjacent columns, and the second bias voltage line is located in the second pixel gap.

39. A display panel, characterized in that, The display panel includes a first display area and a second display area. The first display area includes a light-transmitting display area and a display transition area located between the light-transmitting display area and the second display area. The first display area includes a plurality of first pixel driving circuits, and the plurality of first pixel driving circuits are located in the display transition area; in a first direction, there is a first pixel gap between two adjacent first pixel driving circuits; The display panel further includes a plurality of first signal lines extending along a second direction, the first signal lines extending from the second display area and passing through the display transition area; and in the display transition area, the first signal lines pass through the first pixel gap, and the first direction and the second direction intersect; The display transition area includes a sub-transition area located between the display light-transmitting area and the second display area; the sub-transition area includes multiple rows of the first pixel driving circuits arranged along the first direction; The sub-transition region includes a flush region and a tilted region. A row of first pixel driving circuits extending from the tilted region to the flush region includes a tilted portion and a flush portion. The tilted portion is located in the tilted region, and the flush portion is located in the flush region. The included angle between the tilted portion and the flush portion is an obtuse angle.

40. A display device, characterized in that, The display device includes the display panel as described in any one of claims 1-39.

41. The display device according to claim 40, characterized in that, The display device includes an optical sensor disposed corresponding to the light-transmitting area of ​​the display.

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