A packaging method for a packaging structure of a vertical MOSFET chip

By using low-temperature sintered silver connection technology in the drain region of the vertical MOSFET chip and introducing metal conductive heat dissipation plates and three-dimensional metal frames into the package structure, the problems of high on-resistance and poor thermal heat dissipation performance in traditional package structures are solved, low on-resistance and excellent thermal dissipation performance are achieved, and the overall performance and reliability of the product are improved.

CN114975130BActive Publication Date: 2025-04-29ZHE JIANG HE XIN SEMICON CO LTD
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Patent Information

Application Number
CN202210604701.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-31
Publication Date
2025-04-29
Estimated Expiration
2042-05-31

AI Technical Summary

Technical Problem

The traditional wire-bonded packaging structure leads to high on-resistance and poor thermal dissipation performance of vertical MOSFET chips, which affects the product's current carrying capacity and performance improvement.

Method used

Low-temperature sintered silver connection technology is used to form a silver particle sintered body with high conductivity in the drain region of the vertical MOSFET chip, and the design of a metal conductive heat dissipation plate and a three-dimensional metal frame can achieve low on-resistance, excellent heat dissipation performance and simplified packaging structure.

Benefits of technology

It realizes the low on-resistance, high current carrying capacity and excellent heat dissipation performance of vertical MOSFET chips, which reduces production costs and improves product reliability and quality.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a method for manufacturing a packaging structure of a vertical MOSFET chip, and belongs to the field of semiconductor packaging technology. The front side of the vertical MOSFET chip is flipped onto the etched surface of a three-dimensional metal frame, and the drain, source and gate of the vertical MOSFET chip are distributed in the same plane through the folding use of the three-dimensional metal frame, shortening the interconnection distance between the vertical MOSFET chip and the outside world, enhancing the conductive effect of the chip, and simplifying the packaging structure; at the same time, a metal conductive heat dissipation plate is used to contact the back side drain area of ​​the vertical MOSFET chip with a large area, and the heat dissipation performance is excellent, which improves the quality of the product; the source metal pin and the gate metal pin of the three-dimensional metal frame are provided with a reinforcement structure, which enhances the bonding force between the metal column and the plastic packaging material, and achieves the purpose of increasing the reliability of the product.
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Description

Technical Field

[0001] The invention relates to a packaging method for a packaging structure of a vertical MOSFET chip, belonging to the technical field of semiconductor packaging. Background Art

[0002] MOSFET stands for Metal Oxide Semiconductor Field Effect Transistor. Vertical MOSFET is a common voltage-type control device with a series of advantages such as fast switching speed, high frequency performance, high input impedance, low noise, low driving power, large dynamic range, wide safe operating area (SOA), etc. Therefore, it is widely used in various industries such as switching power supplies, motor control, and power tools.

[0003] With the development of the 5G industry, consumer electronics and new energy vehicle industries, for example, the power consumption of 5G base stations has increased, and the power consumption of 5G base stations is twice that of 4G. In order to reduce power consumption requirements, it is necessary to increase the low loss and high thermal stability requirements for vertical MOSFETs. This also places higher requirements on the package type's low on-resistance, low heat generation and fast heat dissipation.

[0004] On-resistance (RDS), i.e., the resistance between drain and source, is one of the main characteristic parameters of power vertical MOSFET. Vertical MOSFET devices achieve low RDS (on) by placing the drain region on the surface opposite to the source contact. By placing the drain region on the surface opposite to the source contact, the conduction path of the current is shortened, which reduces RDS (on).

[0005] In the traditional wire bonding package type, the on-resistance is equal to the sum of the on-resistance of the chip and the parasitic resistance of the package, that is, the on-resistance RDS(on)=R L +R D +R W +Rds(on), where R L is the lead frame resistance, R D is the resistance between the chip drain and the frame, R W is the resistance of the bonding wire, and Rds(on) is the internal resistance of the chip. Traditional wire bonding packages all use wire bonding packaging. w The on-resistance of the entire package will be larger, which will eventually affect the current carrying capacity of the product. In addition, the traditional vertical MOSFET packaging form completely wraps the chip in the plastic package, causing the heat generated by the chip when working to not be dissipated in time, restricting the performance improvement of the product. Summary of the invention

[0006] In order to overcome the shortcomings of the traditional vertical MOSFET wire bonding packaging structure implementation method, the present invention provides a packaging method for a vertical MOSFET packaging structure, so that the vertical MOSFET chip 10 using this packaging method can achieve low on-resistance, carry large current, have excellent heat dissipation performance, and have a simple packaging structure.

[0007] The technical solution of the present invention:

[0008] The present invention provides a packaging method for a packaging structure of a vertical MOSFET chip, and the process method thereof is as follows:

[0009] Step 1: Prepare incoming wafers, select qualified wafers through the incoming inspection process, and perform a cleaning process to remove dust, oil, etc. There are neatly arranged horizontal and vertical cutting lanes I on the wafer. Cutting lanes I pre-divide the wafer into a plurality of vertical MOSFET chips. The front side of each vertical MOSFET chip is provided with a source region and a gate region, and the back side is provided with a drain region;

[0010] Step 2: Making source conductive pads in the source region of the vertical MOSFET chip and setting gate conductive pads in the gate region thereof by sputtering, etching, chemical deposition, printing or spraying liquid metal in sequence;

[0011] Step 3: Forming a high-conductivity silver particle sintered body as a conductive circuit layer in the drain region of the vertical MOSFET chip by low-temperature sintering silver connection technology;

[0012] Step 4: using a cutting process to form a plurality of independent vertical MOSFET chips along the cutting path I, wherein a source conductive pad is disposed in the source region of the vertical MOSFET chip and a gate conductive pad is disposed in the gate region thereof;

[0013] Step 5: Prepare a metal conductive heat dissipation original board, and neatly attach the back sides of the vertical MOSFET chips to the metal conductive heat dissipation original board in sequence, leaving horizontal and vertical cutting paths II between the vertical MOSFET chips;

[0014] Step 6: Cut the metal conductive heat dissipation original plate along cutting path II to form a metal conductive heat dissipation plate attached to the back of the vertical MOSFET chip to form a new chip monomer;

[0015] Step 7: Prepare a three-dimensional metal frame strip, with the etching surface on the back facing upwards, and arrange a plurality of hollow patterns, transverse cutting lanes III, longitudinal cutting lanes III and alignment points in an array on the three-dimensional metal frame strip. The transverse cutting lanes III are arranged on the upper and lower sides of the three-dimensional metal frame strip.

[0016] Each of the hollow patterns is a continuous pattern in the region of the upper and lower transverse cutting paths III, the upper and lower transverse cutting paths III respectively pass through the upper edge and the lower edge of each hollow pattern, the transverse cutting paths III and the longitudinal cutting paths III pre-divide the three-dimensional metal frame strip into a plurality of three-dimensional metal frames, each of the three-dimensional metal frames has a discontinuous source metal sheet and a gate metal sheet, the source metal sheet and the gate metal sheet extend inwardly to form a source metal bridge pier and a gate metal bridge pier, respectively, the hollow pattern forms a gap between the source metal sheet and the gate metal sheet, and the gap separates the source metal sheet and the gate metal sheet;

[0017] A source metal pin and a gate metal pin are welded on the left side of the etched surface of the source metal sheet and the right side of the etched surface of the gate metal sheet, respectively, wherein the cylindrical surfaces of the source metal pin and the gate metal pin are provided with a reinforcement structure, and together with the three-dimensional metal frame, a cavity is formed;

[0018] Step 8, the front sides of the new chip monomers are sequentially flipped and placed into the cavity of the three-dimensional metal frame strip, and the source conductive pad and the gate conductive pad are respectively fixedly connected with the source metal bridge pier and the gate metal bridge pier by aligning the points, so that the source and gate of the vertical MOSFET chip are respectively connected to the source metal pin and the gate metal pin on the lead frame;

[0019] Step nine: using a film-assisted plastic encapsulation single-sided molding process to encapsulate the three-dimensional metal frame bar and the vertical MOSFET chip with a plastic encapsulation material, and filling the hollow pattern;

[0020] Step 10: exposing the etched surface of the source metal pin and the etched surface of the gate metal pin of the three-dimensional metal frame strip, and the surface II of the metal conductive heat sink on the back side of the vertical MOSFET chip through a grinding process;

[0021] Step 11, respectively forming a conductive metal layer I, a conductive metal layer II and a conductive metal layer III on the etched surface of the source metal pin, the etched surface of the gate metal pin and the surface II of the metal conductive heat sink by sputtering, chemical deposition, printing or spraying;

[0022] Step 12: Divide the package into a plurality of vertical MOSFET chip package structure units along the horizontal cutting line III and the vertical cutting line III, and lead the source and gate of the vertical MOSFET chip upward to the same plane as the drain of the vertical MOSFET chip through a three-dimensional metal frame.

[0023] Furthermore, in step seven, the cylindrical surfaces of the source metal pin and the gate metal pin are provided with a reinforcement structure, the reinforcement structure is a plurality of micro grooves, and the forming process of the micro metal column with the micro grooves is as follows:

[0024] A metal sheet is prepared with a pre-cutting path on the metal sheet, and a photoresist pattern is formed through a photoresist forming process. The opening of the photoresist pattern penetrates the photoresist layer, and then the exposed metal in the opening of the photoresist pattern is removed to a designed depth through a half-etching process. The residual photoresist is then removed, and the metal sheet is divided along the photolithography path to form a plurality of independent micro-metal columns with micro-grooves. The micro-metal columns are in a cubic shape, and the micro-grooves are at the upper part of the micro-metal columns. The length direction of the micro-grooves is parallel to the height direction of the micro-metal columns, and their distribution is arranged according to actual needs.

[0025] Furthermore, in step seven, the reinforcement structure is a plurality of micro grooves, and the forming process of the micro metal column with the micro grooves is as follows:

[0026] A three-dimensional cylinder is selected as the micro-metal column, and both ends of the micro-metal column are fixed. A high-reflection laser is used to melt a small notch on the cylindrical surface of the micro-metal column through a laser cutting process at the upper part of the micro-metal column. At the same time, high-pressure gas coaxial with the laser beam blows away the molten residual metal chips to form micro-grooves. The distribution of the micro-grooves is arranged according to actual needs. After the micro-metal column with the micro-grooves is prepared, the bottom of the micro-metal column is connected to the left side of the etched surface of the source metal sheet and the right side of the etched surface of the gate metal sheet through a welding process, so that the micro-grooves of the micro-metal column face inward, forming a source metal pin and a gate metal pin respectively.

[0027] Furthermore, in step seven, the reinforcement structure is a plurality of micro grooves, and the forming process of the micro metal column with the micro grooves is as follows:

[0028] Prepare a metal sheet with a pre-cutting path on it. The pre-cutting path pre-divides the metal sheet into a plurality of micro-metal columns. Fix the metal sheet on a CNC lathe. After alignment, use a diamond drill to open micro-grooves in sequence. After blowing away the debris, divide the metal sheet along the photolithography path to form a plurality of independent micro-metal columns with micro-grooves.

[0029] Furthermore, in step seven, the cylindrical surfaces of the source metal pin and the gate metal pin are provided with a reinforcement structure, the reinforcement structure is a plurality of micro-bumps, and the forming process of the micro-metal column with the micro-bumps is as follows:

[0030] A metal sheet is prepared, with a pre-cutting path on the metal sheet, a photoresist pattern is formed by a photoresist process, the opening of the photoresist pattern penetrates the photoresist layer, and then metal is deposited in the photoresist pattern to a designed height by sputtering corrosion, chemical deposition, printing or spraying of liquid metal. After solidification, micro-bumps are formed on the upper part of the micro-metal column, and the length direction of the micro-bumps is perpendicular to the height direction of the micro-metal column, and the distribution is arranged according to actual needs; the residual photoresist is removed, and the metal sheet is divided along the photolithography path to form a plurality of independent micro-metal columns with micro-bumps; after the micro-metal columns with the micro-bumps are prepared, the bottom of the micro-metal columns are respectively connected to the left etching surface of the source metal sheet and the right etching surface of the gate metal sheet by a welding process, so that the micro-bumps of the micro-metal columns are all facing inward, forming a source metal pin and a gate metal pin respectively.

[0031] Furthermore, in step seven, after the micro-metal column with the reinforcement structure is prepared, the bottom of the micro-metal column is connected to the left side of the etched surface of the source metal sheet and the right side of the etched surface of the gate metal sheet through a welding process, so that the reinforcement structures face inward to form a source metal pin and a gate metal pin, respectively; the solder used in the welding process is printed on the etched surface on the back of the three-dimensional metal frame bar, and is distributed on the left and right sides of the hollow pattern, respectively.

[0032] Furthermore, in step seven, the cylindrical surface of the source metal pin and the gate metal pin is provided with a reinforcement structure, and the reinforcement structure is a rough cylindrical surface. The forming method of the rough cylindrical surface is as follows: the surface of the metal column is roughened by a plasma etching process, and the roughness Ra control range is: Ra is 0.2~0.4; after the metal column with the rough cylindrical surface is prepared, the bottom of the micro-metal column is connected to the left side of the etched surface of the source metal sheet and the right side of the etched surface of the gate metal sheet through a welding process, respectively forming a source metal pin and a gate metal pin; the solder used in the welding process is printed on the etched surface on the back of the three-dimensional metal frame bar, and is distributed on the left and right sides of the hollow pattern respectively.

[0033] Furthermore, in step seven, the hollow pattern is in the shape of the word "2".

[0034] Beneficial Effects

[0035] The present invention provides a packaging method for a packaging structure of a vertical MOSFET chip, provides a low-temperature solder connection technology represented by sintered silver, realizes the connection between a metal heat sink and a drain region of a vertical MOSFET chip, avoids the use of a traditional wire bonding method, increases the current carrying capacity, and reduces the resistance R between the chip drain and the lead frame. D , reducing the bond wire resistance R W, thereby achieving the purpose of reducing the on-resistance RDS (on) of the packaged product. This packaging method can improve production efficiency and has the advantage of reducing production costs; the packaging structure of the vertical MOSFET chip formed by the vertical MOSFET chip is flipped on the etching surface of the three-dimensional metal frame. The drain, source and gate of the vertical MOSFET chip are distributed in the same plane through the folding use of the three-dimensional metal frame, shortening the interconnection distance between the vertical MOSFET chip and the outside world, enhancing the conductive effect of the chip, and simplifying the packaging structure; at the same time, a metal conductive heat sink is used to contact the back drain area of ​​the vertical MOSFET chip with a large area, and the heat dissipation performance is excellent, which improves the quality of the product; in addition, the source metal pin and the gate metal pin of the three-dimensional metal frame are provided with a reinforcement structure, which enhances the bonding force between the metal column and the plastic packaging material, thereby achieving the purpose of increasing product reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A flow chart of a packaging method for a packaging structure of a vertical MOSFET chip according to the present invention;

[0037] Figure 2 A schematic diagram of a cross-sectional structure of an embodiment of a packaging structure of a vertical MOSFET chip of the present invention;

[0038] Figure 3 for Figure 2 A schematic diagram of the relative positions of a vertical MOSFET chip and a three-dimensional metal frame;

[0039] Figures 4 to 6 for Figure 2 Schematic diagram of the distribution of micro grooves in;

[0040] Figure 7 A schematic diagram of a cross-sectional structure of another embodiment of a packaging structure of a vertical MOSFET chip of the present invention;

[0041] Figure 8 for Figure 7 A schematic diagram of the relative positions of a vertical MOSFET chip and a three-dimensional metal frame;

[0042] Figures 9 to 11 for Figure 7 Schematic diagram of the distribution of micro-convex points in;

[0043] FIG. 12A to FIG. 12Q A process flow chart of a packaging method for a packaging structure of a vertical MOSFET chip according to the present invention;

[0044] Among them: vertical MOSFET chip 10

[0045] Source conductive pad 13

[0046] Gate conductive pad 15

[0047] Conductive circuit layer 30

[0048] Three-dimensional metal frame 20

[0049] Metal frame body 21

[0050] Source metal sheet 211

[0051] Source Metal Pier 212

[0052] Gate metal sheet 213

[0053] Gate metal pier 214

[0054] Source metal pin 22

[0055] Etched surface 221 of source metal pin

[0056] Gate metal pin 24

[0057] Etched surface of gate metal pin 241

[0058] Gap 25

[0059] Cavity 26

[0060] Metal conductive heat sink 40

[0061] Surface of metal conductive heat sink Ⅰ42

[0062] Surface of metal conductive heat sink II43

[0063] Conductive metal layer Ⅰ61

[0064] Conductive metal layer II 63

[0065] Conductive metal layer Ⅲ65

[0066] Plastic packaging material 90;

[0067] Wafer 100

[0068] Cutting channel Ⅰ110

[0069] Three-dimensional metal frame bar 200

[0070] Hollow pattern 220

[0071] Horizontal cutting channel Ⅲ210

[0072] Longitudinal cutting channel Ⅲ230

[0073] Counterpoint 250

[0074] Metal conductive heat dissipation original plate 400

[0075] Cutting channel II410. DETAILED DESCRIPTION

[0076] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It will be appreciated that the specific embodiments described herein are only used to explain the relevant inventions, rather than to limit the inventions. It should also be noted that, for ease of description, only portions related to the relevant inventions are shown in the accompanying drawings. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments may be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.

[0077] A flow chart of a packaging method for a packaging structure of a vertical MOSFET chip of the present invention, as shown in Figure 1 As shown:

[0078] S1: Prepare incoming wafers and pre-divide the wafers into a plurality of vertical MOSFET chips. Each vertical MOSFET chip has a source region and a gate region on the front side and a drain region on the back side;

[0079] S2: forming a source conductive pad in the source region of the vertical MOSFET chip and setting a gate conductive pad in the gate region thereof by sputtering, chemical deposition, printing or spraying liquid metal in sequence;

[0080] S3: A high-conductivity silver particle sintered body is formed as a conductive circuit layer in the drain region of the vertical MOSFET chip through low-temperature sintering silver connection technology;

[0081] S4: Using a cutting process to form a plurality of independent vertical MOSFET chips;

[0082] S5: prepare a metal conductive heat dissipation original board, and sequentially attach the back sides of the vertical MOSFET chips to the metal conductive heat dissipation original board;

[0083] S6: cutting the metal conductive heat dissipation original plate to form a metal conductive heat dissipation plate attached to the back of the vertical MOSFET chip to form a new chip monomer;

[0084] S7: preparing a three-dimensional metal frame strip, forming a source metal sheet, a gate metal sheet, and forming a source metal pin and a gate metal pin with a reinforcement structure on the etched surfaces of the source metal sheet and the gate metal sheet, respectively, and the source metal pin and the gate metal pin and the three-dimensional metal frame together form a cavity;

[0085] S8: sequentially placing the front side of the new chip monomer invertedly into the cavity of the three-dimensional metal frame strip, so that the source and gate of the vertical MOSFET chip are respectively connected to the source metal pin and the gate metal pin on the lead frame;

[0086] S9: Encapsulating the three-dimensional metal frame strip and the vertical MOSFET chip with a plastic encapsulation material through a film-assisted plastic encapsulation single-sided molding process;

[0087] S10: exposing the etched surface of the source metal pin and the etched surface of the gate metal pin of the three-dimensional metal frame strip, and the surface II of the metal conductive heat sink on the back side of the vertical MOSFET chip through a grinding process;

[0088] S11: forming a conductive metal layer I, a conductive metal layer II and a conductive metal layer III on the etched surface of the source metal pin, the etched surface of the gate metal pin and the surface II of the metal conductive heat sink respectively by sputtering, chemical deposition, printing or spraying;

[0089] S12: dividing the package body into package structure units of a plurality of vertical MOSFET chips.

[0090] The examples are as follows:

[0091] The present invention provides a packaging structure of a vertical MOSFET chip, wherein the front side of the vertical MOSFET chip 10 is provided with a source region and a gate region, and the back side is provided with a drain region.

[0092] The source region of the vertical MOSFET chip 10 is provided with a source conductive pad 13, and the gate region is provided with a gate conductive pad 15. The cross-sections of the source conductive pad 13 and the gate conductive pad 15 are circular, rectangular, hexagonal, or octagonal, and the material thereof is a composite conductive metal layer, such as a Cu / Sn layer or a Ni / Au layer. The drain region of the vertical MOSFET chip 10 is provided with a conductive circuit layer 30. The conductive circuit layer 30 can form a high-conductivity silver particle sintered body in the drain region of the vertical MOSFET chip 10 through a low-temperature sintering silver connection technology, or it can be laid in the drain region of the vertical MOSFET chip 10 using finished welding materials, such as conductive glue, soft solder, solder paste, etc., or it can be one of copper, silver, nickel, gold, tin, tin-silver, or a combination of several materials, such as a Cu / Sn layer or a Ni / Au layer.

[0093] The back drain region of the vertical MOSFET chip 10 is fixedly connected to the metal conductive heat sink 40 through the conductive circuit layer 30 to achieve electrical conduction. The cross-sectional dimension of the metal conductive heat sink 40 is not less than the cross-sectional dimension of the vertical MOSFET chip 10, and its material is preferably copper with excellent electrical conductivity. The metal conductive heat sink 40 is in contact with the drain region 17 over a large area, achieving excellent heat dissipation performance of the packaged product.

[0094] The three-dimensional metal frame 20 includes a metal frame body 21, a plurality of source metal pins 22 and a plurality of gate metal pins 24. The cross-sections of the source metal pins 22 and the gate metal pins 24 are circular, rectangular or hexagonal, etc. Figure 3 The square is used to indicate this.

[0095] The metal frame body 21 includes a discontinuous source metal sheet 211 and a gate metal sheet 213, and the source metal sheet 211 and the gate metal sheet 213 extend inwardly to form a source metal bridge pier 212 and a gate metal bridge pier 214, respectively. The cross-sectional shapes of the source metal bridge pier 212 and the gate metal bridge pier 214 match the shapes of the source region and the gate region of the vertical MOSFET chip 10, respectively. A gap 25 is set between the source metal bridge pier 212 and the gate metal bridge pier 214, and the gap 25 allows the liquid plastic encapsulation material 90 to flow more smoothly therebetween, thereby isolating the source metal sheet 211 and the gate metal sheet 213 from each other. The source metal bridge pier 212 and the gate metal bridge pier 214 are respectively fixedly connected to the source conductive pad 13 and the gate conductive pad 15 of the vertical MOSFET chip 10, and have directionality. Figure 3 In the figure, the source metal bridge pier 212 is L-shaped and rotated 90 degrees clockwise, and the gate metal bridge pier 214 is in a straight line shape. The etched surfaces of the source metal sheet 211 and the gate metal sheet 213 are respectively fixed to the source metal pin 22 and the gate metal pin 24. The etched surfaces of the source metal sheet 211 and the gate metal sheet 213 are etched surfaces for implementing the etching process, and have a certain roughness. The roughness Ra range is: Ra is 0.2~0.4, which enhances the connection strength between the source metal sheet 211 and the gate metal sheet 213 and the source metal pin 22 and the gate metal pin 24. The metal frame body 21 and the source metal pin 22 and the gate metal pin 24 form a cavity 26. The cavity 26 is used to carry the vertical MOSFET chip 10. The front side of the vertical MOSFET chip 10 is flipped in this cavity 26 and is electrically connected to the three-dimensional metal frame 20.

[0096] In an optional embodiment, the source metal sheet 211 and the gate metal sheet 213 are integrated with the source metal pin 22 and the gate metal pin 24 respectively.

[0097] The source metal pin 22 and the gate metal pin 24 are of equal height, and the etched surface 231 of the source metal pin and the etched surface 241 of the gate metal pin are flush with the surface II43 of the metal conductive heat sink, so that the source, gate, and drain of the vertical MOSFET chip 10 are distributed in the same plane, shortening the interconnection distance between the vertical MOSFET chip 10 and the outside world, enhancing the conductive effect of the chip, avoiding the use of traditional wire bonding, and reducing the resistance R between the chip drain and the lead frame. D , reducing the bond wire resistance R W , thereby achieving the purpose of reducing the on-resistance RDS (on) of the packaged product.

[0098] The plastic encapsulation material 90 fills and encapsulates the vertical MOSFET chip 10, the three-dimensional metal frame 20 and the gap 25 as a whole, and only exposes the surface II43 of the metal conductive heat sink and the etched surface 221 of the source metal pin and the etched surface 241 of the gate metal pin. The plastic encapsulation material 90 arranged between the vertical MOSFET chip 10 and its metal conductive heat sink 40 and the source metal pin 22 and the gate metal pin 24 can effectively prevent short circuits caused by voltage breakdown, thereby improving product reliability.

[0099] In an optional embodiment, the cylindrical surfaces of the source metal pin 22 and the gate metal pin 24 are further provided with a reinforcement structure, wherein the reinforcement structure is a plurality of micro grooves. Figure 1 and Figure 4 , Figure 4 , Figure 6 In the figure, two rectangular micro grooves Ⅰ223 and two rectangular micro grooves Ⅱ243 are used as illustrations. Figure 1 is a partial enlarged schematic diagram of the source metal pin 22 and the gate metal pin 24, Figure 4 , Figure 4 , Figure 6 is an enlarged schematic diagram of the front view of micro groove I 223, and the schematic diagram of the front view of micro groove II 243 is the same as Figure 4 , Figure 4 , Figure 6 The micro groove I 223 is arranged on the upper part of the source metal pin 22 and faces the inner side of the cavity 26; the micro groove II 243 is arranged on the upper part of the gate metal pin 24 and faces the inner side of the cavity 26. The length direction of the micro groove I 223 and the micro groove II 243 is parallel to the height direction of the source metal pin 22 and the gate metal pin 24. The arrangement of the micro groove I 223 and the micro groove II 243 can be arranged up and down, such as Figure 4 As shown, it can also be arranged in parallel, such as Figure 4 As shown, or misplaced layout, such as Figure 6As shown. The number of micro grooves I 223 and micro grooves II 243 is not limited and is determined according to actual needs, but should not be too many. The design of micro grooves I 223 and micro grooves II 243 on the source metal pin 22 and the gate metal pin 24 can increase the bonding force between the source metal pin 22 and the gate metal pin 24 and the plastic packaging material 90, thereby achieving the purpose of increasing product reliability.

[0100] In an optional embodiment, the cylindrical surfaces of the source metal pin 22 and the gate metal pin 24 are further provided with a reinforcement structure, wherein the reinforcement structure is a plurality of micro-bumps. Figure 7 and Figure 8 , Fig. 9 , Fig. 9 , Fig.11 In the figure, two rectangular micro-convex points Ⅰ225 and two rectangular micro-convex points Ⅱ245 are used as illustrations. Figure 7 is a partial enlarged schematic diagram of the source metal pin 22 and the gate metal pin 24, Fig. 9 , Fig. 9 , Fig.11 is a front view of micro-bump I 225, and the front view of micro-bump II 245 is the same as Fig. 9 , Fig. 9 , Fig.11 The micro-bump I 225 is arranged on the upper part of the source metal pin 22 and faces the inner side of the cavity 26; the micro-bump II 245 is arranged on the upper part of the gate metal pin 24 and faces the inner side of the cavity 26. The length direction of the micro-bump I 225 and the micro-bump II 245 is perpendicular to the height direction of the source metal pin 22 and the gate metal pin 24. The arrangement of the micro-bump I 225 and the micro-bump II 245 can be arranged up and down, such as Fig. 9 As shown, it can also be arranged in parallel, such as Fig. 9 As shown, or misplaced layout, such as Fig.11 As shown. The number of micro-bumps I 225 and micro-bumps II 245 is not limited and is determined according to actual needs, but should not be too many. The design of micro-bumps I 225 and micro-bumps II 245 on the source metal pin 22 and the gate metal pin 24 can increase the bonding force between the source metal pin 22 and the gate metal pin 24 and the plastic packaging material 90, thereby achieving the purpose of increasing product reliability.

[0101] In an optional embodiment, the cylindrical surfaces of the source metal pin 22 and the gate metal pin 24 can also be rough surfaces with a roughness Ra range of: Ra is 0.2~0.4, which can also increase the bonding force between the source metal pin 22 and the gate metal pin 24 and the plastic packaging material 90, thereby achieving the purpose of increasing product reliability.

[0102] In an optional embodiment, a packaging structure of a vertical MOSFET chip of the present invention also includes a conductive metal layer I26, a conductive metal layer II27 and a conductive metal layer III28, wherein the conductive metal layer I26 is arranged on the etched surface 231 of the source metal pin, the conductive metal layer II27 is arranged on the etched surface 241 of the gate metal pin, and the conductive metal layer III28 is arranged on the surface II43 of the metal conductive heat sink, so as to be used for electrical connection with other external devices.

[0103] The present invention provides a packaging method for a packaging structure of a vertical MOSFET chip, and the process method thereof is as follows:

[0104] Step 1: Fig. 12A As shown, the incoming wafer 100 is prepared, qualified wafers are selected through the incoming material inspection process, and a cleaning process is performed to remove dust, oil, etc., and there are neatly arranged horizontal and vertical intersecting cutting lanes Ⅰ110 on the wafer 100. The cutting lanes Ⅰ110 pre-divide the wafer 100 into a plurality of vertical MOSFET chips 10. The front side of each vertical MOSFET chip 10 is provided with a source region and a gate region, and the back side is set as a drain region.

[0105] Step 2: Fig. 12B As shown, a source conductive pad 13 is made in the source region of the vertical MOSFET chip 10, and a gate conductive pad 15 is set in its gate region by sputtering, etching, chemical deposition, printing or spraying of liquid metal; when a composite conductive metal layer such as a Cu / Sn layer or a Ni / Au layer is made, the process of step two needs to be repeated multiple times to form a conductive metal layer of the corresponding material.

[0106] Step 3: Fig. 12C As shown, a silver particle sintered body with high conductivity is formed as a conductive circuit layer 30 in the drain region of the vertical MOSFET chip 10 by low temperature sintering silver connection technology.

[0107] Step 4: Fig.12D and Fig.12E As shown, a plurality of independent vertical MOSFET chips 10 are formed along the cutting path Ⅰ 110 by using a cutting process. Fig.12E As shown in the front view, a source conductive pad 13 is disposed in the source region of the vertical MOSFET chip 10 , and a gate conductive pad 15 is disposed in the gate region thereof.

[0108] Step 5: Fig.12F As shown, a metal conductive heat dissipation original plate 400 is prepared, and the back sides of the vertical MOSFET chips 10 are neatly attached to the metal conductive heat dissipation original plate 400 in sequence, with horizontal and vertical cutting paths II 410 left between the vertical MOSFET chips 10.

[0109] Step 6: Figure 12G As shown, along the cutting line II 410 , the metal conductive heat dissipation original plate 400 is cut to form a metal conductive heat dissipation plate 40 attached to the back of the vertical MOSFET chip 10 , thereby forming a new chip monomer 11 .

[0110] Step 7: Fig.12H and Figure 12I, Fig.12J As shown, the three-dimensional metal frame strip 200 is prepared, and the material selection of the three-dimensional metal frame strip 200 refers to the lead frame of the chip carrier used for the integrated circuit.

[0111] The etching surface of the back side of the three-dimensional metal frame bar 200 faces upwards, and a plurality of hollow patterns 220, transverse cutting lanes III 210, longitudinal cutting lanes III 230 and alignment points 250 are arranged in an array on the etching surface. The transverse cutting lanes III 210 are arranged on the upper and lower sides of the three-dimensional metal frame bar 200.

[0112] Each hollow pattern 220 is a continuous pattern in the area of ​​the upper and lower horizontal cutting paths III 210, such as a 2-character pattern.

[0113] The upper and lower horizontal cutting paths III 210 pass through the upper and lower edges of each hollow pattern 220. The horizontal cutting paths III 210 and the vertical cutting paths III 230 pre-divide the three-dimensional metal frame strip 200 into a plurality of three-dimensional metal frames 20. Each three-dimensional metal frame 20 has a discontinuous source metal sheet 211 and a gate metal sheet 213. The source metal sheet 211 and the gate metal sheet 213 extend inward to form a source metal bridge pier 212 and a gate metal bridge pier 214 respectively. The hollow pattern 220 forms a gap 25 between the source metal sheet 211 and the gate metal sheet 213. The gap 25 separates the source metal sheet 211 and the gate metal sheet 213 and also serves as a guide.

[0114] A source metal pin 22 and a gate metal pin 24 are welded on the left side of the etched surface of the source metal sheet 211 and the right side of the etched surface of the gate metal sheet 213, respectively. The source metal pin 22 and the gate metal pin 24 and the three-dimensional metal frame 20 together form a cavity 26, as shown in FIG12I ;

[0115] The cylindrical surfaces of the source metal pin 22 and the gate metal pin 24 are provided with a reinforcement structure, which is a plurality of micro grooves or a plurality of micro bumps or a rough cylindrical surface. The source metal pin 22 and the gate metal pin 24 are formed separately by using micro metal columns. Generally, the material of the micro metal column is metal copper, and the process is as follows:

[0116] The forming process of the micro metal pillar 272 with the micro groove 277 is as follows:

[0117] Prepare a metal sheet 270, on which there are pre-cutting lines 271, and the pre-cutting lines 271 divide the metal sheet 270 into metal columns arranged in an array, and the metal columns are rectangular, such as Fig.12Ia and Figure 12Ib , Figure 12Ib for Fig.12Ia A partially enlarged front view of the metal sheet 270, the upper surface of which is covered with a photoresist layer 274;

[0118] A photoresist pattern 275 is formed by a photoresist forming process, and an opening 276 of the photoresist pattern 275 penetrates the photoresist layer 274. Then, a half etch process is performed to remove the exposed metal in the opening 276 of the photoresist pattern 275 to a designed depth, such as Figure 12Ic and Figure 12Id , Figure 12Id for Figure 12Ic A partial enlarged front view of

[0119] Then, the residual photoresist is removed, and the metal sheet 270 is divided along the photolithography path 271 to form a plurality of independent micro-metal pillars 272 with micro-grooves 277. The micro-metal pillars 272 are in a cubic shape, and the micro-grooves 277 are located at the upper part of the micro-metal pillars 272. The length direction of the micro-grooves 277 is parallel to the height direction of the micro-metal pillars 272. The distribution of the micro-grooves 277 is arranged according to actual needs, such as Figure 12Ie to Figure 12If , Figure 12If It is a front view of a micro-metal pillar 272 with a micro-groove 277 .

[0120] Alternatively, the forming process of the micro-metal pillars with micro-grooves is as follows:

[0121] The micro-metal column is a three-dimensional cylinder. The two ends of the micro-metal column are fixed. A high-reflection laser is used to melt a small notch on the cylindrical surface of the micro-metal column through a laser cutting process at the upper part of the micro-metal column. At the same time, high-pressure gas coaxial with the laser beam blows away the molten residual metal chips to form micro-grooves. The distribution of the micro-grooves is arranged according to actual needs.

[0122] Alternatively, the forming process of the micro-metal pillars with micro-grooves is as follows:

[0123] Prepare a metal sheet 270 with a pre-cutting path 271 on the metal sheet 270. The pre-cutting path 271 pre-divides the metal sheet 270 into a plurality of micro-metal pillars 272. Fix the metal sheet 270 on a CNC lathe, and after alignment, use a diamond drill to open micro-grooves in sequence. After blowing away the debris, divide the metal sheet 270 along the photolithography path 271 to form a plurality of independent micro-metal pillars 272 with micro-grooves 277.

[0124] Alternatively, the forming process of the micro metal pillar 282 with the micro bump 287 is as follows:

[0125] Prepare a metal sheet 280, on which a pre-cutting path 281 is provided, such as Figure 12Ig and Figure 12Ih , Figure 12Ih for Figure 12Ig A partially enlarged front view of the metal sheet 280, the upper surface of which is covered with a photoresist layer 284;

[0126] A photoresist pattern 285 is formed by a photoresist process, and an opening 286 of the photoresist pattern 285 penetrates the photoresist layer 284. Then, metal is deposited in the photoresist pattern 285 to a designed height by sputtering, chemical deposition, printing or spraying of liquid metal. After curing, micro-bumps 287 are formed on the upper part of the micro-metal pillars 282. The length direction of the micro-bumps 287 is perpendicular to the height direction of the micro-metal pillars 282. The distribution of the micro-bumps 287 is arranged according to actual needs, such as Fig.12Ii and Fig.12Ij , Fig.12Ij for Fig.12Ii A partially enlarged front view.

[0127] The residual photoresist is removed, and the metal sheet 280 is divided along the photolithography path 281 to form a plurality of independent micro metal pillars 282 with micro bumps 287, such as FIG. 12I1 to FIG. 12I1 , Fig.12Il It is a front view of a micro metal pillar 282 with micro bumps 287.

[0128] After the micro-metal pillars with reinforcement structures are prepared, the bottoms of the micro-metal pillars are connected to the left side of the etched surface of the source metal sheet 211 and the right side of the etched surface of the gate metal sheet 213 by welding process, so that the micro grooves or micro bumps of the micro-metal pillars are facing inward, forming the source metal pins 22 and the gate metal pins 24 respectively. The solder used for welding can be one of titanium, copper, silver, nickel, gold, tin, tin-silver or a combination of several methods, such as Fig.12J As shown, solder is printed on the etched surface on the back side of the three-dimensional metal frame bar 200 and is respectively distributed on the left and right sides of the hollow pattern 220 .

[0129] Alternatively, the rough surface of the micro-metal column is formed as follows: the surface of the micro-metal column is roughened by a plasma etching process, and the roughness Ra is controlled in the range of Ra: 0.2-0.4. After the metal column with the rough column surface is prepared, the bottom of the micro-metal column is connected to the left side of the etched surface of the source metal sheet 211 and the right side of the etched surface of the gate metal sheet 213 by a welding process, respectively, to form a source metal pin 22 and a gate metal pin 24; the solder used in the welding process is printed on the etched surface on the back of the three-dimensional metal frame bar 200, and is distributed on the left and right sides of the hollow pattern 220 respectively.

[0130] Step 8: Figure 12K and Figure 12LAs shown, the front side of the new chip monomer 11 is flipped upside down and placed into the cavity 26 of the three-dimensional metal frame bar 200. Through the alignment point 250, the source conductive pad 13 and the gate conductive pad 15 are respectively fixedly connected with the source metal bridge pier 23 and the gate metal bridge pier 25, so that the source and gate of the vertical MOSFET chip 10 are respectively connected to the source metal pin 22 and the gate metal pin 24 on the lead frame.

[0131] Step 9: Figure 12M As shown, the three-dimensional metal frame bar 200 and the vertical MOSFET chip 10 are covered with a plastic material 90 through a film-assisted molding (FAM) process, and the hollow pattern 220 is filled.

[0132] Step 10: Fig.12N and Fig.12O As shown, the etched surface 221 of the source metal pin and the etched surface 241 of the gate metal pin of the three-dimensional metal frame strip 200, as well as the surface II43 of the metal conductive heat sink on the back side of the vertical MOSFET chip 10 are exposed through the grinding process.

[0133] Step 11: Figure 12P As shown, a conductive metal layer I61, a conductive metal layer II63 and a conductive metal layer III65 are respectively manufactured on the etched surface 231 of the source metal pin, the etched surface 241 of the gate metal pin and the surface II43 of the metal conductive heat sink by sputtering, corrosion, chemical deposition, printing or spraying. The conductive metal layer I61, the conductive metal layer II63 and the conductive metal layer III65 are used for subsequent mounting of the packaged chip, as shown in FIG. Fig.12N shown.

[0134] Step 12: Figure 12P and Figure 12Q As shown, the above-mentioned package body is divided into a plurality of package structure units of vertical MOSFET chips along the horizontal cutting road III210 and the vertical cutting road III230, and the source and gate of the vertical MOSFET chip 10 are led upward to the same plane as the drain of the vertical MOSFET chip 10 through the three-dimensional metal frame 20.

[0135] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the embodiments of the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A packaging method for a packaging structure of a vertical MOSFET chip, the process method of which is as follows: Step 1, preparing an incoming wafer (100), wherein the wafer (100) has neatly arranged horizontal and vertical intersecting cutting paths I (110), wherein the cutting paths I (110) pre-divide the wafer (100) into a plurality of vertical MOSFET chips (10), wherein each vertical MOSFET chip (10) has a source region and a gate region on the front side, and a drain region on the back side; Step 2: Producing a source conductive pad (13) in the source region of the vertical MOSFET chip (10) and arranging a gate conductive pad (15) in the gate region thereof by sputtering, etching, chemical deposition, printing or spraying liquid metal in sequence; Step 3: forming a high-conductivity silver particle sintered body as a conductive circuit layer (30) in the drain region of the vertical MOSFET chip (10) by low-temperature sintering silver connection technology; Step 4: using a cutting process to form a plurality of independent vertical MOSFET chips (10) along the cutting path I (110), wherein a source conductive pad (13) is provided in the source region of the vertical MOSFET chip (10), and a gate conductive pad (15) is provided in the gate region thereof; Step 5: prepare a metal conductive heat dissipation original plate (400), and sequentially attach the back sides of the vertical MOSFET chips (10) to the metal conductive heat dissipation original plate (400), with horizontal and vertical cutting paths II (410) left between the vertical MOSFET chips (10); Step 6: along the cutting line II (410), the metal conductive heat dissipation original plate (400) is cut to form a metal conductive heat dissipation plate (40) attached to the back of the vertical MOSFET chip (10), thereby forming a new chip monomer (11); Step 7: Prepare a three-dimensional metal frame strip (200), with the etching surface on the back facing upwards, and arrange a plurality of hollow patterns (220), transverse cutting lanes III (210), longitudinal cutting lanes III (230) and alignment points (250) in an array on the three-dimensional metal frame strip (200). The transverse cutting lanes III (210) are arranged on the upper and lower sides of the three-dimensional metal frame strip (200). Each hollow pattern (220) is a continuous pattern in the region of the upper and lower transverse cutting paths III (210), and the upper and lower transverse cutting paths III (210) respectively pass through the upper edge and the lower edge of each hollow pattern (220), and the transverse cutting paths III (210) and the longitudinal cutting paths III (230) pre-divide the three-dimensional metal frame strip (200) into a plurality of three-dimensional metal frames (20), and each three-dimensional metal frame (20) has a discontinuous source metal sheet (211) and a gate metal sheet (213), and the source metal sheet (211) and the gate metal sheet (213) extend inwardly to form a source metal bridge pier (212) and a gate metal bridge pier (214), respectively, and the hollow pattern (220) forms a gap (25) between the source metal sheet (211) and the gate metal sheet (213), and the gap (25) separates the source metal sheet (211) and the gate metal sheet (213); A source metal pin (22) and a gate metal pin (24) are respectively welded on the left side of the etched surface of the source metal sheet (211) and the right side of the etched surface of the gate metal sheet (213); the cylindrical surfaces of the source metal pin (22) and the gate metal pin (24) are provided with a reinforcement structure, and together with the three-dimensional metal frame (20), a cavity (26) is formed; The reinforcement structure is a plurality of micro grooves (277) or a plurality of micro protrusions (287); Step 8, sequentially and inverting the front sides of the chip monomers (11) into the cavity (26) of the three-dimensional metal frame strip (200), aligning the chip monomers (11) with the alignment points (250), and respectively fixing the source conductive pads (13) and the gate conductive pads (15) with the source metal bridge piers 23 and the gate metal bridge piers (25), so as to realize circuit conduction between the source and the gate of the vertical MOSFET chip (10) and the source metal pins (22) and the gate metal pins (24) on the lead frame; Step nine: using a film-assisted plastic packaging single-sided molding process, the three-dimensional metal frame strip (200) and the vertical MOSFET chip (10) are covered with a plastic packaging material (90), and a hollow pattern (220) is filled; Step 10: exposing the etched surface (221) of the source metal pin and the etched surface (241) of the gate metal pin of the three-dimensional metal frame strip (200) and the surface II (43) of the metal conductive heat sink on the back side of the vertical MOSFET chip (10) through a grinding process; Step 11, forming a conductive metal layer I (61), a conductive metal layer II (63) and a conductive metal layer III (65) on the etched surface (231) of the source metal pin, the etched surface (241) of the gate metal pin and the surface II (43) of the metal conductive heat sink respectively by sputtering, chemical deposition, printing or spraying; Step 12: Divide the above-mentioned package body into a plurality of package structure units of vertical MOSFET chips along the horizontal cutting line III (210) and the vertical cutting line III (230), and lead the source and gate of the vertical MOSFET chip (10) upward to the same plane as the drain of the vertical MOSFET chip (10) through the three-dimensional metal frame (20).

2. The packaging method according to claim 1, characterized in that: In step seven, the reinforcement structure is a plurality of micro grooves (277), and the forming process of the micro metal column (272) with the micro grooves (277) is as follows: A metal sheet (270) is prepared. A pre-cutting path (271) is provided on the metal sheet (270). A photoresist pattern (275) is formed by a photoresist forming process. An opening (276) of the photoresist pattern (275) penetrates the photoresist layer (274). Then, a half-etching process is used to remove the exposed metal in the opening (276) of the photoresist pattern (275) to a designed depth. The remaining photoresist is then removed. The metal sheet (270) is divided along the photoetching path (271) to form a plurality of independent micro-metal pillars (272) with micro-grooves (277). The micro-metal pillars (272) are in a cubic shape. The micro-grooves (277) are located at the upper part of the micro-metal pillars (272). The length direction of the micro-grooves (277) is parallel to the height direction of the micro-metal pillars (272). The distribution of the micro-grooves (277) is arranged according to actual needs.

3. The packaging method according to claim 1, characterized in that: In step seven, the reinforcement structure is a plurality of micro grooves, and the forming process of the micro metal column with the micro grooves is as follows: The micro-metal column is a three-dimensional cylinder. The two ends of the micro-metal column are fixed. A high-reflection laser is used to melt a small notch on the cylinder surface of the micro-metal column through a laser cutting process at the upper part of the micro-metal column. At the same time, high-pressure gas coaxial with the laser beam blows away the molten residual metal chips to form micro grooves. The distribution of the micro grooves is arranged according to actual needs. After the micro-metal column with the micro-grooves is prepared, the bottom of the micro-metal column is connected to the left side of the etched surface of the source metal sheet (211) and the right side of the etched surface of the gate metal sheet (213) through a welding process, so that the micro-grooves of the micro-metal column are all facing inward, thereby forming a source metal pin (22) and a gate metal pin (24), respectively.

4. The packaging method according to claim 1, characterized in that: In step seven, the reinforcement structure is a plurality of micro grooves, and the forming process of the micro metal column with the micro grooves is as follows: A metal sheet (270) is prepared. A pre-cutting path (271) is provided on the metal sheet (270). The pre-cutting path (271) pre-divides the metal sheet (270) into a plurality of micro-metal pillars (272). The metal sheet (270) is fixed on a CNC lathe. After alignment, micro-grooves are opened in sequence using a diamond drill. After the debris is blown away, the metal sheet (270) is divided along the photoetching path (271) to form a plurality of independent micro-metal pillars (272) with micro-grooves (277).

5. The packaging method according to claim 1, characterized in that: In step seven, the reinforcement structure is a plurality of micro-bumps (287), and the forming process of the micro-metal pillars (282) with the micro-bumps (287) is as follows: A metal sheet (280) is prepared, and a pre-cutting path (281) is provided on the metal sheet (280). A photoresist pattern (285) is formed by a photoresist process, and an opening (286) of the photoresist pattern (285) penetrates the photoresist layer (284). Then, metal is deposited in the photoresist pattern (285) to a designed height by sputtering, chemical deposition, printing or spraying liquid metal. After curing, micro-bumps (287) are formed on the upper part of the micro-metal pillars (282). The length direction of the micro-bumps (287) is perpendicular to the height direction of the micro-metal pillars (282), and the distribution of the micro-bumps (287) is arranged according to actual needs. The invention relates to a method for manufacturing a metal sheet (280) for forming a plurality of independent micro-metal pillars (282) with micro-bumps (287) by removing residual photoresist and dividing the metal sheet (280) along the photolithography path (281); after the micro-metal pillars (282) with the micro-bumps (287) are prepared, the bottoms of the micro-metal pillars (282) are respectively connected to the left etched surface of the source metal sheet (211) and the right etched surface of the gate metal sheet (213) by a welding process, so that the micro-bumps (287) of the micro-metal pillars (282) are all facing inwards, thereby forming a source metal pin (22) and a gate metal pin (24), respectively.

6. The packaging method according to claims 2 to 5, characterized in that: In step seven, after the micro-metal column with the reinforcement structure is prepared, the bottom of the micro-metal column is connected to the left side of the etched surface of the source metal sheet (211) and the right side of the etched surface of the gate metal sheet (213) through a welding process, so that the reinforcement structures face inward, forming a source metal pin (22) and a gate metal pin (24) respectively; the solder used in the welding process is printed on the etched surface on the back side of the three-dimensional metal frame bar (200), and is distributed on the left and right sides of the hollow pattern (220).

7. The packaging method according to claim 1, characterized in that: In step seven, the cylindrical surfaces of the source metal pin (22) and the gate metal pin (24) are provided with a reinforcement structure, and the reinforcement structure is a rough cylindrical surface. The rough cylindrical surface is formed by the following method: the surface of the metal column is roughened by a plasma etching process, and the roughness Ra is controlled in the range of Ra 0.2 to 0.4; after the metal column with the rough cylindrical surface is prepared, the bottom of the micro-metal column is connected to the left side of the etched surface of the source metal sheet (211) and the right side of the etched surface of the gate metal sheet (213) by a welding process, respectively, to form the source metal pin (22) and the gate metal pin (24), respectively; the solder used in the welding process is printed on the etched surface on the back of the three-dimensional metal frame strip (200), and is distributed on the left and right sides of the hollow pattern (220).

8. The packaging method according to claim 1, characterized in that: In step seven, the hollow pattern (220) is in the shape of the word "2".

Citation Information

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