Power integrated circuits for electric vehicle applications

Abstract

Power and controller integrated circuits for electric vehicle applications are enabled. For example, a system may include: multiple battery cells; and multiple application-specific integrated circuits (ASICs) electrically coupled to the multiple battery cells, wherein one or more of the multiple ASICs include a corresponding control ASIC, and wherein the ASIC includes a corresponding bidirectional DC-AC converter for charging or discharging the multiple battery cells.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 152,115, filed February 22, 2021, entitled “POWER AND CONTROLLER INTEGRATED CIRCUITS FOR ELECTRIC VEHICLE APPLICATIONS,” the entire contents of which are incorporated herein by reference. Technical Field

[0003] The disclosed topics relate to integrated circuits, and more specifically, to controller and power integrated circuits for electric vehicle applications. Background Technology

[0004] Electric vehicles are becoming increasingly popular worldwide and are poised to become one of the most common modes of transportation. This shift in transportation technology is driving a surge in the demand for electricity from electric vehicles and their associated batteries. This increased demand is accompanied by a growing need for larger traditional power conversion modules and other components, such as onboard chargers, DC-DC converters, and traction inverters, posing significant challenges to the packaging and integration of electric vehicles. Furthermore, many manufacturers are adopting 800-volt battery systems exceeding 400 volts, further increasing the number of voltage and temperature sensors required for each parallel or series-connected battery cell within the battery pack. Additionally, traditional 800-volt battery systems require additional balancing circuitry between battery cells. Summary of the Invention

[0005] The following summary is provided to offer a basic understanding of one or more embodiments of the invention. This invention is not intended to identify key or critical elements or to depict any scope of a particular embodiment or any scope of the claims. Its sole purpose is to present concepts in a simplified form as a preamble to the more detailed description that follows. In one or more embodiments described herein, systems, devices, computer-implemented methods, and / or computer program products are provided to controllers and power integrated circuits for electric vehicle applications.

[0006] As mentioned above, vehicle electrical systems and / or components can be improved in various ways, and various embodiments are described herein for this purpose and / or other purposes.

[0007] According to one embodiment, a system may include: a plurality of battery cells; and a plurality of application-specific integrated circuits (ASICs) electrically coupled to the plurality of battery cells, wherein one or more of the plurality of ASICs include a corresponding power ASIC, and wherein the ASIC includes a corresponding bidirectional DC-AC converter for charging or discharging the plurality of battery cells.

[0008] According to another embodiment, a power application-specific integrated circuit (ASIC) for a battery cell in a battery pack may include: a DC-DC bidirectional power conversion module including a DC-DC converter, a DC-AC bidirectional power conversion module including a plurality of metal-oxide-semiconductor field-effect transistors (MOSFETs), and a processor executing computer-executable components stored in memory, wherein the computer-executable components include a bridge component that controls one or more DC-AC bridges or one or more DC-DC bridges.

[0009] According to another embodiment, a method may include: receiving instruction data for the battery cells of a battery pack by a power application-specific integrated circuit (ASIC) including a processor, the instruction data representing an instruction to control one or more DC-AC bridges or one or more DC-DC bridges of the power ASIC; and based on the instruction, controlling one or more DC-AC bridges of the power ASIC using a DC-AC bidirectional power conversion module of the power ASIC including a plurality of metal-oxide-semiconductor field-effect transistors (MOSFETs), or controlling one or more DC-DC bridges of the power ASIC using a DC-DC bidirectional power conversion module including a DC-DC converter. Attached Figure Description

[0010] Figure 1 A block diagram of an example non-restrictive control ASIC according to one or more embodiments described herein is shown.

[0011] Figure 2 A block diagram of an example non-limiting power ASIC according to one or more embodiments described herein is shown.

[0012] Figure 3 A block diagram of an example non-limiting smart battery pack according to one or more embodiments described herein is shown.

[0013] Figure 4 A block diagram of an example non-limiting battery system according to one or more embodiments described herein is shown.

[0014] Figure 5A block diagram of an example non-limiting group of MOSFETs according to one or more embodiments described herein is shown.

[0015] Figure 6 Example non-limiting broadcast sequences are shown according to one or more embodiments described herein.

[0016] Figure 7 A flowchart illustrating an example non-limiting process associated with a control ASIC according to one or more embodiments described herein is shown.

[0017] Figure 8 A flowchart illustrating an example non-limiting process associated with a power ASIC according to one or more embodiments described herein is shown.

[0018] Figure 9 This is an example, non-limiting computing environment in which one or more embodiments described herein may be implemented.

[0019] Figure 10 This is an example, non-limiting network environment in which one or more embodiments described herein may be implemented. Detailed Implementation

[0020] The following detailed description is illustrative only and is not intended to limit the embodiments and / or their application or use. Furthermore, it is not intended to be construed as being bound by any express or implied information provided in the foregoing background or summary or detailed description sections.

[0021] One or more embodiments will now be described with reference to the accompanying drawings, wherein similar reference numerals are always used to refer to similar elements. In the following description, numerous specific details are set forth for purposes of explanation in order to provide a more thorough understanding of one or more embodiments. However, it will be apparent that one or more embodiments may be practiced in various circumstances without these specific details.

[0022] It will be understood that when one element is referred to as being "coupled" to another element, it can describe one or more different types of coupling, including but not limited to chemical coupling, communication coupling, capacitive coupling, electrical coupling, electromagnetic coupling, inductive coupling, operational coupling, optical coupling, physical coupling, thermal coupling, and / or another type of coupling. As mentioned herein, "entity" can include people, clients, users, computing devices, software applications, agents, machine learning models, artificial intelligence, and / or other entities. It should be understood that such entities can facilitate the implementation of the subject matter disclosure according to one or more embodiments described herein.

[0023] Figure 1A block diagram of an example non-limiting control ASIC 102 according to one or more embodiments described herein is shown. The control ASIC 102 may include one or more bidirectional DC-DC converter control components 104, one or more bidirectional DC-AC converter control components 106, a communication bus 108, one or more regulators 110, a communication component 112, one or more sensors (e.g., voltage sensors and / or temperature sensors) 114, one or more sensors 116 (e.g., impedance sensors), a diagnostic interface 118, a low-power mode management component 120, a programming interface 122, and / or a security component 124.

[0024] In various embodiments, one or more of the following components are communicatively or operably coupled to each other to perform one or more functions of the control ASIC 102: bidirectional DC-DC converter control component 104, bidirectional DC-AC converter control component 106, bus 108, regulator 110, communication component 112, sensor 114, sensor 116, diagnostic interface 118, low-power mode management component 120, programming interface 122, and / or security component 124. Note that the control ASIC 102 may be programmable and can be configured to be the program. For example, the control ASIC 102 may control the voltage output (e.g., 12V, 16V, or another suitable voltage) of a power ASIC (e.g., power ASIC 202), and the output may then be aggregated in parallel and / or series to adjust the voltage and / or current. In this respect, the output voltage may be adjustable (e.g., software-regulated using the processor (e.g., processor 180) and memory (e.g., memory 182) of the control ASIC 102).

[0025] In various embodiments, component 104 may include an analog-to-digital converter (ADC) channel 134, a digital proportional-integral-derivative (PID) controller 136, a digital-to-analog converter (DAC) 138, a high-speed (HS) comparator 140, a pulse-width modulation (PWM) generation component 142, a PWM output 144, a differential amplifier 146, an ADC channel 148, and / or digital input / output (I / O) 150. Note that the control ASIC 102 may include one or more components 104 that are communicatively or operatively coupled (e.g., via a bus or wireless network) to perform one or more functions of component 104.

[0026] Bus 108 (e.g., internal communication interface) may include one or more memory buses, memory controllers, peripheral buses, external buses, local buses, quantum buses, and / or another type of bus that may employ various bus architectures (e.g., Industry Standard Architecture (ISA), Extended ISA (EISA), Micro Channel Architecture (MSA), Intelligent Drive Electronics (IDE), Advanced Graphics Port (AGP), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), Universal Serial Bus (USB), Card Bus, Small Computer System Interface (SCSI), FireWire (IEEE 1394), etc.).

[0027] ADC channel 134 can measure a DC-DC output voltage (e.g., from power ASIC 202) and compare it with a digital reference voltage (e.g., using a digital PID controller 136). The output from the digital PID controller 136 can be provided to DAC 138. A differential amplifier or HS comparator 140 can determine the actual current and compare it with the difference generated by the voltage controller. PWM generation component 142 can control a MOSFET in the primary or secondary stage (e.g., for power ASIC 202). Note that ADC channel 134 and / or ADC channel 148 may include multiple ADC channels. Also note that component 104 may include multiple DACs 138.

[0028] Component 106 may include PWM output 152, logic connection 154, event-based trigger 156, PWM 158, event-based trigger 160, PWM 162, logic connection 166, PWM output 168, and zero-crossing detection circuitry 170, which may include capture component 172 and / or one or more high-speed comparators 174 and / or ADC channels 176. Note that component 106 may control MOSFET 222 (e.g., as shown in the image). Figure 2(Showing MOSFETs Q1, Q2, Q3, and Q4). At this point, PWM output 152 can control Q1 and Q2, and PWM output 168 can control Q3 and Q4. The foregoing can be facilitated using corresponding half-bridge gate drivers of the power ASIC 202 (e.g., full-bridge gate driver 218 and / or full-bridge gate driver 220). At this point, the outputs from PWM output 152 and / or PWM output 168 can be output to the power ASIC 202. To achieve the foregoing, event-based triggers 156 or 160 (e.g., timers) can be used. Zero-crossing detection circuit 170 can utilize, for example, a high-speed comparator 174 and a capture component 172 to capture the rising and falling edges of the AC current detected by AC current sensor 226. The zero-crossing detection output can be used to control the PWM components or the event-based triggers to control the DC-AC stage. PWM outputs, PWM ADC channels (e.g., ADC channel 176), and / or digital I / O can control the corresponding drivers. Note that the aforementioned operations can be programmable (e.g., using a processor 180 and a memory 182 that control ASIC 102).

[0029] One or more of the regulators 110 can receive an input voltage 126 from the corresponding battery cell. At this point, the input to the regulator 110 is the cell voltage, which can range from 1.5V to 5V depending on the corresponding battery cell (e.g., battery cell 130), although other suitable battery cells and corresponding voltages can be used in the embodiments herein. In various embodiments, the regulator 110 can adjust the voltage to power all internal peripherals of the control ASIC 102. Note that multiple regulators 110 can be used to provide various voltages. For example, the regulator 110 controlling the ASIC 102 can operate one or more (e.g., all) peripherals controlling the ASIC 102 without degrading the corresponding functionality. As an example, Table 1 below shows two built-in regulators, where the power supply of regulator 1 is used to control all digital I / O and other peripherals within the ASIC 102, and the voltage of regulator 2 is used only for the ADC channel to sense all signals in order to meet accuracy requirements. At this point, the control ASIC 102 can facilitate mode switching (e.g., sleep to wake-up, wake-up to sleep, etc.). The control ASIC 102 can also be woken up wirelessly. Table 1 below shows exemplary voltages and amperes:

[0030]

[0031]

[0032] Table 1 Built-in Power Management Specifications

[0033] Note that controlling ASIC 102 may include multiple components 106.

[0034] Communication component 112 may include, for example, a radio frequency (RF) communication component. Other embodiments may utilize Bluetooth, Wi-Fi, cellular (e.g., 4G, 5G, 6G, etc.), NFC, or other suitable wireless communication protocols to communicate with other control ASICs, battery management systems, main controllers, vehicles, or other components. In this regard, control ASIC 102 may (e.g., via communication component 112) send and / or receive signals to / from a second control ASIC, which may be electrically coupled to a battery cell (e.g., in addition to battery cell 130). Communication component 112 may further facilitate over-the-air (OTA) software updates of control ASIC 102 and / or communication with other battery cells in a battery pack (e.g., a common battery pack).

[0035] Sensor 114 may include a voltage and / or temperature sensor, which, according to embodiments, may meet Automotive Safety Integrity Level (ASIL) B or ASIL D requirements. In this respect, note that sensor 114 may determine the voltage and / or temperature of battery cell 130. According to embodiments, sensor 116 (e.g., an impedance sensor) may determine the AC impedance of battery cell 130. Sensor 116 may utilize high-frequency sensing of voltage and / or current. In this respect, battery health component 188 may determine the health of battery cell 130 (e.g., the state of aging or degradation of battery cell 130) based on the output of sensor 116, according to a defined health metric. In various embodiments, the defined health metric may include the difference between the previous impedance of battery cell 130 and the current impedance of battery cell 130. In a further embodiment, the defined health metric may include the difference between the impedance of battery cell 130 and the impedance of a second battery cell (e.g., a common battery pack comprising battery cell 130 and a second battery cell). In one or more embodiments, the battery health component 188 may determine the health status of the battery cell 130, including battery cell failure, in response to the output of the battery cell impedance sensor 116 being determined to meet a defined impedance criterion, and electrically decouple the battery cell 130 from the battery pack (e.g., or cause the power ASIC to electrically decouple the battery cell 130 from the battery pack). In a further embodiment, the defined health metric may be based on the output of sensor 114 (e.g., voltage and / or temperature). In this respect, the battery health component 188 may determine the health of the battery cell 130 based on the output of sensor 114 (e.g., according to defined voltage and / or temperature metrics).

[0036] Note that the Analog and Digital Interface (ADI) 132 can be used to communicate with other control ASICs, power ASICs, other peripheral components, or other external circuitry connected to or near the control ASIC 102 and / or power ASIC 202 (e.g., for the same battery cell 130). The Diagnostic Interface 118 can determine whether a problem or error exists in the respective control ASIC (e.g., control ASIC 102) and / or power ASIC (e.g., power ASIC 202), and further determine what associated action should be taken (if any). Such an action can be predefined and executed based on the identified problem, or learned using machine learning (e.g., via ML component 186, as discussed in more detail later). In various embodiments, the Diagnostic Interface 118 can also diagnose circuitry external to the battery cell 130. Note that the Diagnostic Interface 118 can utilize one or more ADC channels 178 and / or one or more digital I / Os 180. The foregoing can be used, for example, to protect the battery cell 130 from thermal runaway conditions (e.g., by preventing such events from occurring). Low-power mode management component 120 can prevent battery cell depletion (e.g., during transport or vehicle shutdown) by disabling one or more control ASIC 102 components (e.g., communication component 112, diagnostic interface 118, sensor 114, sensor 116, component 104, component 106, and / or regulator 110) that are not needed during the shutdown state. This can prevent voltage drop or discharge of battery cell 130. Control ASIC 102 can utilize programming interface 122. In various embodiments, programming interface 122 can utilize Joint Test Action Group (JTAG). According to embodiments, security component 124 can be used to prevent tampering or interference with the vehicle or battery cell 130. In this regard, security component 124 can encrypt signals transmitted via communication component 112 and / or decrypt signals received via communication component 112. The control ASIC 102 may include memory (e.g., memory 182) that can store one or more computer / machine-readable and / or executable components and / or instructions that, when executed by a processor (e.g., a classical processor, a quantum processor, etc.), can facilitate the execution of operations defined by the executable components and / or instructions. The memory may include volatile memory (e.g., random access memory (RAM), static RAM (SRAM), dynamic RAM (DRAM), etc.) and / or non-volatile memory (e.g., read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), etc.), which may use one or more memory architectures.Controlling ASIC 102 may include a processor (e.g., processor 180), which may include one or more types of processors and / or electronic circuitry (e.g., classical processors, graphics processors, quantum processors, etc.) that can implement one or more computer- and / or machine-readable, writable, and / or executable components and / or instructions that can be stored in memory. For example, the processor can perform various operations that can be specified by such computer- and / or machine-readable, writable, and / or executable components and / or instructions, including but not limited to logic, control, input / output (I / O), arithmetic, etc. In some embodiments, the processor herein may include one or more central processing units, multi-core processors, microprocessors, dual microprocessors, microcontrollers, systems-on-a-chip (SoCs), array processors, vector processors, quantum processors, and / or another type of processor.

[0037] In various embodiments herein, the control ASIC 102 may (e.g., via processor 180) facilitate various functions such as ASIL D or ASIL B cell measurements (voltage, current, and temperature), impedance spectrum, active balancing, cell state machine, cell thermal emission detection, cell-level Sox (SOC, SOH), cell-level safety SWC, digital control implementations of isolated DC-DC converters with bidirectional power flow (e.g., peak current control with DC-DC output voltage regulation), digital control implementations of DC-AC power stages with bidirectional power flow, and may be able to implement capture component channels, PWM channels for DC-DC and / or DC-AC power stage control implementations, diagnostic capabilities for monitoring internal and external circuitry, zero-crossing current detection of the AC current output of the DC-AC power block, low-energy management modes, and / or other suitable functions.

[0038] Turn now Figure 2 This diagram illustrates a block diagram of an example non-limiting power ASIC 202 according to one or more embodiments described herein. The power ASIC 202 may include a processor (e.g., processor 180), a memory (e.g., memory 182), a power management component 210, a DC current sensor 224, an AC current sensor 226, a DC positive terminal 228, an AC terminal 230, an AC terminal 232, a DC negative terminal 234, a DC-DC bidirectional power conversion module 236, and / or a DC-AC bidirectional power conversion module 238.

[0039] In various embodiments, one or more of the following components are communicatively or operably coupled to each other to perform one or more functions of the power ASIC 202: processor (e.g., processor 180), memory (e.g., memory 182), power management component 210, DC current sensor 224, AC current sensor 226, DC positive terminal 228, AC terminal 230, AC terminal 232, DC negative terminal 234, DC-DC bidirectional power conversion module 236 and / or DC-AC bidirectional power conversion module 238.

[0040] According to one embodiment, the DC-DC bidirectional power conversion module 236 may include a DC-DC primary power stage 214, a DC-DC secondary power stage 206, a MOSFET gate driver 208, a MOSFET gate driver 216, and / or other suitable components. In various embodiments, the DC-AC bidirectional power conversion module 238 may include a full-bridge gate driver 218 and a full-bridge gate driver 220. In some embodiments, the DC-AC bidirectional power conversion module 238 may include MOSFETs 222 (Q1-Q4). In other embodiments, the DC-AC bidirectional power conversion module 238 may include MOSFETs 222. In various implementations, the MOSFETs 222 may be disconnected, connected in parallel, or connected in series.

[0041] like Figure 2 As shown, each full-bridge gate driver (e.g., 218 and / or 220) (e.g., a bridge assembly) can control a DC-AC bridge and / or a DC-DC bridge. At this point, such a bridge assembly can control individual branches of the DC-AC power stage (e.g., Q1 and Q2 may include the first branch, and Q3 and Q4 may include the second branch). Each full-bridge gate driver receives a PWM input from an external ADI 132. The DC+ (228) and DC- (234) terminals can include input power supply terminals with voltage ranges, for example, from 1.5V to 5V (or other suitable voltages). Depending on the switching of the full-bridge MOSFETs, the AC voltage of the DC-AC power stage can include, for example, four possible modes, although other suitable modes or number of modes may be used. According to one example, if the input voltage between the DC+ and DC- terminals includes a positive DC voltage (+V... DC If so, then the following modes can be used:

[0042] • Active Mode 1: The voltage between terminals A and B, VAB (voltage potential difference between A and B) = +V DC (When Q1 and Q4 are on, and Q2 and Q3 are off)

[0043] • Active Mode 2: Voltage between terminals A and B, VAB = -V DC(When Q2 and Q3 are on, and Q1 and Q4 are off)

[0044] Bypass mode: The voltage between terminals A and B, VAB = 0V (when Q1 and Q3 are on or Q2 and Q4 are on).

[0045] • High impedance mode: When Q3 and Q4 are on while Q1 and Q2 are off, or Q1 and Q2 are on while Q3 and Q4 are off, or all four MOSFETs (Q1, Q2, Q3, and Q4) are off.

[0046] In various embodiments, a bypass mode may include or enable electrical isolation of a battery cell (e.g., battery cell 130) from other battery cells in the battery pack. Additionally, a high-impedance mode may include a reduced maximum electrical load defined on the battery cell (e.g., battery cell 130). According to one embodiment, active modes 1, 2, and bypass mode may be used during normal operation of the DC-AC stage. In various embodiments, the high-impedance mode is typically not used as long as DC+ and DC- voltages are present, or as long as voltage is present on AC terminals A and B. The default operating mode of the DC-AC power stage may include bypass mode unless the PWM input is received by an external interface (e.g., via ADI 132) for any of the MOSFETs to turn off.

[0047] Full-bridge gate driver 218 can be used to drive the first branch of full-bridge MOSFETs Q1 and Q2, while full-bridge gate driver 220 can be used to drive the second branch of full-bridge MOSFETs Q3 and Q4. Since each gate driver can be responsible for driving each branch of the full-bridge circuit, breakdown should be avoided internally within the gate drivers. To mitigate breakdown, for example, four PWM pulses (for each full-bridge MOSFET) can be applied by an external controller (e.g., control ASIC 102). Control ASIC 102 can be programmed to allow dead time between the Q1 and Q2 PWM pulses and the Q3 and Q4 PWM pulses. However, if the external pulses include overlapping conduction times of the Q1 and Q2 PWM pulses or the Q3 and Q4 PWM pulses respectively, the corresponding gate driver internal hardware circuitry can detect the PWM conduction time overlap and keep the full-bridge circuit in bypass mode; diagnostics can also be provided via an external ADI132. In another embodiment, for example, an external controller (e.g., controlling ASIC 102) applies only two PWM pulses (one PWM for each branch), and the corresponding gate driver can then generate complementary PWM pulses with sufficient dead time to avoid breakdown problems. In the case of two PWM inputs, the gate driver control logic can correspond to the following Table 2:

[0048]

[0049]

[0050] Table 2 Full-Bridge DC-AC Gate Driver Logic. Note that the DC-AC full-bridge power stage can be implemented using four N-channel power MOSFETs 222 or a combination of P- and N-channel MOSFETs 222. According to one example, if a battery cell (e.g., battery cell 306) fails, the control ASIC (e.g., control ASIC 102) can cause the power ASIC 202 to turn on Q2 and Q4, thus bypassing the power supply through Q2 and Q4. At this point, if the power ASIC 202 fails, the corresponding vehicle can continue to operate under power regardless of the failure. In another example, if Q1 and Q2 are turned on, a positive voltage can be achieved at AC terminal 230, and a negative voltage (e.g., + / - 3.6V, 0V, or another suitable voltage) can be achieved at AC terminal 232. The bridging configuration of the power ASIC 202 provides this flexibility. Using such control, the battery cells in this paper (e.g., the battery pack) can be bypassed, which avoids the cell balancing step. Regenerative braking is also enabled, for example, because the bridge is bidirectional. Note that the energy flow direction, unit balance, or other functions described in this paper can be implemented using artificial intelligence based on, for example, machine learning models.

[0051] The power management component 210 within the power ASIC 202 can be used to power the full-bridge gate drivers 218 and / or 220, the DC-DC power stage MOSFET gate drivers 208 or 216, and / or sensors (e.g., 224 and / or 226). The AC current sensor 226 and the DC current sensor 224 can measure AC and / or DC currents, respectively, to provide feedback to the control ASIC 102 for the regulated operation of the series-connected DC-AC power stage (e.g., from an adjacent battery cell including a similar control ASIC and power ASIC). Because the DC-AC power stage can be bidirectional, energy can be easily transferred from the DC side to the AC side, which can be used during vehicle-to-grid power transfer.

[0052] According to one embodiment, the power ASIC 202 may also include a built-in DC-DC power converter (e.g., a DC-DC bidirectional power conversion module 236) that can provide power to the vehicle's low-voltage (LV) and medium-voltage (MV) loads. Because the DC-DC topology can be isolated, the primary and secondary power stages of the DC-DC converter can be housed within the power ASIC 202. Input voltages from the DC+ and DC- terminals (228 and 234, respectively) can be applied to the DC-DC primary power stage. Current isolation can be provided via an external connection to a planar transformer. The topology of the DC-DC power stage can include flyback, forward, half-bridge resonant, full-bridge resonant, phase-shifted full-bridge, or dual active bridge converters. In various embodiments, DC-DC primary and secondary gate drivers (e.g., 216 and 208, respectively) can be integrated within the DC-DC power stage to drive the primary and secondary sides of the DC-DC MOSFETs. In various embodiments, the DC-DC converter (e.g., DC-DC bidirectional power conversion module 236) can facilitate fixed-frequency duty cycle control, fixed-frequency phase-shift control, or a variable frequency with a fixed duty cycle, or a combination thereof. The LV output of the DC-DC secondary power stage 206 can be connected in parallel with a similar battery cell or a combination of battery cell LV (e.g., 12V or 14V) outputs to provide sufficient power to the LV loads within the corresponding vehicle. The LV outputs of multiple battery cells described herein can also be connected in series to provide power to medium-voltage (e.g., 48V) loads within the corresponding vehicle.

[0053] Note that the power ASIC 202 may be controlled by the control ASIC 102, for example via ADI 132. In various embodiments herein, the capabilities of the power ASIC 202 may include active balancing of the battery cells 130, for example by transferring energy between the battery cells 130 and other battery cells in the corresponding battery pack (e.g., via a DC-DC or DC-AC power stage of the corresponding battery cells that need to be balanced). In this regard, note that the control ASIC 102 may include active balancing logic. This can improve the lifespan of the battery cells 130 and protect them from overcharging or discharging, which could otherwise lead to dangerous situations (e.g., thermal runaway, explosion, etc.). According to one embodiment, the power ASIC 202 may enable the corresponding battery cells to output different states (e.g., -VCell, +VCell, or bypass) upon request from the main battery management system (BMS) to meet the vehicle's power demands. The foregoing may allow the corresponding battery cells to be connected in series during charging to form a high-voltage (HV) string, and may also generate a sine wave during operating modes. In one example, the default mode of such a smart battery cell may include a bypass mode, which can make the smart battery cell safer during transportation and assembly. The bypass mode can disconnect aged or defective battery cells (e.g., the combination of battery cells and ASIC described herein) from the complete battery pack without interrupting vehicle performance, and can protect battery cells from overcharging and / or discharging and avoid thermal hazards. According to one embodiment, cell bypass operation can be used at the end of the charging process. In one implementation, the charging current can be reduced to a low voltage when one of the individual cells in the battery pack reaches its maximum voltage. It is noteworthy that any battery cell can be bypassed whenever it reaches its maximum charge or voltage, for example, to compensate for the efficiency of less charged battery cells.

[0054] In various embodiments herein, the power ASIC 202 and / or control ASIC 102 may include a printed circuit board (PCB) that can be directly mounted on each battery cell, which can correspondingly improve the performance of the battery cell and / or battery pack. Therefore, the battery cell lifetime can increase and improve the redundancy of LV (e.g., 12V or 14V), MV (e.g., 48V), and HV (e.g., 400V or 800V) power availability, charging, and / or motor control in the vehicle. For example, the power ASIC 202 and control ASIC 102 can supply current (e.g., AC or DC current, depending on the motor type) to the motor of the vehicle that includes the power ASIC 202 and control ASIC 102. Furthermore, the overall weight of the battery pack and the associated vehicle can be reduced. Note that the power ASIC 202 may include a cell bypass mode to provide AC power to the vehicle during driving and / or charging from the AC or DC input, vehicle-to-grid power transfer, DC-DC converter power to the vehicle, LV and MV loads, and / or power transfer from the 14V DC side to the battery cell when requested or when the voltage on the LV side increases to more than 14V over an extended period of time. Note that LVs such as 14V can be used for vehicle components such as headlights, wiper motors, window motors, radios, fans, mobile device chargers, power steering motors, or other suitable vehicle components.

[0055] The aforementioned ASIC allows for the removal of dedicated on-board vehicle chargers, traction inverters, and DC-DC converters from the vehicle, as these functions can be provided by the control ASIC 102 and power ASIC 202, which can be directly mounted onto the battery cells. This also facilitates easier assembly of battery packs and corresponding vehicles.

[0056] It is important to note that various DC voltages can be output, such as 14V, 48V, or 400V. For example, a 48V output can be used in plug-in hybrid electric vehicles (PHEVs) or active suspension systems. For such loads, the DC-DC outputs can be connected in series, and the DC-DC power stage can operate in current-controlled mode. When the DC-DC power stage operates in series, the same current exists in multiple DC-DC converters. The DC-DC converter is bidirectional. For example, if solar panels are mounted on a vehicle, the ASIC described herein can generate power for a 12V network, which can be used to charge each cell in the corresponding battery pack. At this point, the battery pack cells (e.g., 3.6V cells) can be charged using either 12V or 14V DC. According to one embodiment, if one cell in the battery pack includes 3.6V and another cell includes 3.8V, the 3.8V cell can be charged using the DC-DC power stage within the power ASIC 202 connected to both battery cells. Therefore, the DC-DC power stage of the power ASIC 202 connected to the 3.8V unit can convert power from 3.8V to 14V, and the DC-DC stage of the power ASIC 202 of the 3.6V unit can convert power from 14V to 3.6V in order to balance the voltage (e.g., voltage balancing).

[0057] Note that the power ASIC 202 may include various capabilities such as DC-AC power conversion for driving (e.g., AC voltage, current and frequency control for the vehicle's electric motor during driving and power transfer from the vehicle to the grid when stationary), DC-AC reverse power mode for regenerative braking and AC charging (e.g., AC voltage, current and / or frequency control for AC charging from the grid), DC-AC conversion during DC fast charging, DC-DC power conversion from the battery cell to a 14V load, 14V DC-DC in series (e.g., at least three in series) to provide power to a 48V load, DC-DC reverse power transfer (e.g., from a 14V load or a 48V load to a battery cell (e.g., using a solar panel placed on the vehicle)), and / or monitoring of AC and DC current and / or voltage.

[0058] Figure 3An exemplary smart battery pack 302 according to one or more embodiments described herein is illustrated. Pack 302 may include a plurality of control ASICs 304, a plurality of battery cells 306, and a plurality of power ASICs 308. Note that control ASIC 304 may be similar to control ASIC 102, and power ASIC 308 may be similar to power ASIC 202. In various embodiments, the battery pack herein may include a power ASIC (e.g., power ASIC 308) and a control ASIC (e.g., control ASIC 304) as a single integrated chip / circuit (e.g., a single ASIC).

[0059] By utilizing battery pack 302, the level of the output sinusoidal voltage can be determined for each individual battery cell (e.g., battery cell 306) in the complete battery pack 302. At this point, a conventional standalone inverter can be replaced by a DC-AC power stage connected to each battery cell 306. A conventional on-board charger and traction inverter can be used for a single circuit in each battery cell 306. At this point, the DC-AC power stage connected to each battery cell 306 can also be used for AC charging. The outputs of the DC-AC power stage of each battery cell 306 can be connected in series, and all series units can be divided into, for example, three series to generate a three-phase AC voltage for the motor during drive. The operation can be similar in the reverse direction when, for example, an external three-phase voltage is applied from the grid to charge a single battery cell 306. The above eliminates the need for a standalone on-board charger and traction inverter. Similarly, a standalone DC-DC converter used in conventional electric vehicles can be replaced by a DC-DC converter connected to each battery cell 306.

[0060] In various embodiments, the power ASIC 308 may include bidirectional DC-AC and / or DC-DC power stages. The DC-AC power block can be used to provide power to the electric vehicle during driving and / or for charging from the AC or DC input when the vehicle is plugged in. The DC-DC power block may include isolated DC-DC converters having, for example, a 14V DC output to power the vehicle's LV loads. Furthermore, the power ASIC 308 can transfer power from the 14VDC side to the battery cell 306 whenever requested (e.g., by the control ASIC 304) or whenever the voltage on the LV side increases to more than 14V over an extended (e.g., defined) time period.

[0061] Furthermore, parameters related to the battery cell, such as cell voltage, temperature, current, or other suitable parameters, can be transmitted (e.g., via wireless signals), which can reduce or eliminate hard-wired connections between voltage and temperature sensors (e.g., CVTN) and the centralized BMS. In various embodiments, the battery cell 306, along with the complete DC-AC and / or DC-DC power stage and control ASIC (e.g., control ASIC 304), can use this wireless communication to transmit cell-related information (e.g., cell voltage, cell temperature, and / or cell current).

[0062] Figure 4 A block diagram of an exemplary battery system including a printed circuit board (PCB) 402 according to various embodiments herein is shown. PCB 402 may include a control ASIC 404, a power ASIC 406, and a battery cell 408. For example, control ASIC 404 may be similar to control ASIC 102. Battery cell 408 may be similar to battery cell 130, and power ASIC 406 may be similar to power ASIC 202. Control ASIC 404 may include a central processing unit (CPU) (e.g., processor 180), which may include a single-core or multi-core processor. The CPU, combined with memory (e.g., memory 182), may facilitate software functions, cell-level security and / or battery management, and cell-level diagnostics of power ASIC 406. In various embodiments, memory may store recorded data, and CPU may support firmware updates, such as OTA.

[0063] The control ASIC 404 may include communication components (e.g., non-current wireless communication components) (e.g., communication component 112) that enable smart battery cells (e.g., battery cells coupled to PCB 402) to communicate with each other and / or exchange data with the main control unit (e.g., the main PCB 402). Communication component 112 may operate independently of the main CPU of PCB 402 and may therefore include a separate dedicated CPU. The associated communication protocol may include periodic wireless broadcasting of data. For example, the main control unit may broadcast once every 1 ms. See example Figure 6This illustrates three sub-cells broadcast between each primary broadcast. One or more sensors controlling ASIC 404 can continuously monitor battery cell voltage, temperature, and current (e.g., using ASIL D). At this point, ASIL D hardware / software can be embedded in control ASIC 404. Other embodiments may utilize ASIL B. Control ASIC 404 can determine the battery cell SoX (e.g., SoC and SoH). One or more sensors controlling ASIC 404 enable ASIC 404 to continuously monitor battery cell AC impedance by injecting AC current pulses, which allows monitoring of changes in battery cell characteristics under different usage and storage conditions. According to one embodiment, control ASIC 404 can facilitate active cell-to-cell balancing, which can be achieved by transferring energy from more charged battery cells to less charged battery cells via a corresponding power supply ASIC 406 (e.g., by controlling the output of power supply ASIC 406). Control ASIC 404 can continuously monitor various battery cell parameters (e.g., voltage, current, temperature, and / or AC impedance). Communication error and / or control ASIC 102 monitoring can be used to facilitate the detection of thermal emissions from battery cells.

[0064] The control ASIC 404 can regulate the DC-DC power stage via an ADI 132. In various embodiments, the control ASIC 404 senses the analog output voltage of the DC-DC converter via an ADC channel, compares it to an internal reference, and generates a current reference signal using a digital PID control loop. This digital current reference can then be converted to an analog current reference and compared to the actual primary current sensed by a differential amplifier. According to one embodiment, the differential amplifier gain can be controlled, for example, by an external component. The output of the analog current comparator can be used as the input to a PWM component to generate the PWM pulses required for the primary and secondary power stages. Therefore, by using a built-in analog amplifier, the output signal of the analog amplifier can be used as a reference for primary peak current control. Digital control algorithms can be implemented to control the power flow in both directions. All suitable peripherals required, such as differential amplifiers, high-speed analog comparators, DACs (digital-to-analog converters), digital PID controllers, timers, ADC channels, and digital I / O, can be supported by the control ASIC 404.

[0065] The control ASIC 404 can bidirectionally control / diagnose the power flow of the DC-DC and DC-AC power stages to meet vehicle operational needs, for example, based on requests received from the main BMS, other vehicle engine control units, or another PCB 402. The control ASIC 404 can configure the battery cell output to, for example, three different voltage states, such as +VCell, -VCell, and zero voltage, or a high-impedance state, to meet vehicle power demands or enable active balancing between battery cells. Using this functionality, the control ASIC 404 can safely isolate aged or defective battery cells from the complete HV string without interrupting vehicle operation, for example, by controlling its corresponding power ASIC 406 to bypass mode. In various embodiments, the control ASIC 404 can determine the zero-crossing current at the rising and falling edges of the current output of the DC-AC power block, which can be achieved through a built-in HS comparator embedded in the control ASIC 404. Note that the control ASIC 404 can comply with safety ISO / SAE 21434CAL4, AES, and / or ACL levels. According to one embodiment, security levels ranging from CAL1 to CAL4 can be employed. In various embodiments, the control ASIC 404 may include a built-in power management unit / component capable of enabling various low-power management modes. Furthermore, the control ASIC 404 can be "woke up" from a variety of different sleep modes (e.g., via wireless communication or via any other hardwired interface).

[0066] Figure 5 A functional diagram of the power ASIC block 502 is shown. The document also illustrates a battery cell 506 and a DC-DC converter 504. According to one embodiment, the DC-AC power stage may include four MOSFETs (Q1, Q2, Q3, and Q4) that can be turned on or off based on the vehicle's usage mode. For example, when Q1 and Q4 are on, the AC voltage between terminals 1 and 2 may be +Vcell. When Q2 and Q3 are on, the AC voltage between terminals 1 and 2 may be -Vcell. Furthermore, the DC-AC module can operate continuously in bypass mode. In this mode, Q1 and Q3 or Q2 and Q4 are continuously on, resulting in zero voltage between terminals 1 and 2. This could be the default mode for the DC-AC power stage under any fault conditions (e.g., within the power ASIC if there is any fault within the control ASIC, or if the battery cell is damaged).

[0067] Various embodiments described herein may employ artificial intelligence or machine learning systems and techniques (e.g., via ML component 186) to facilitate learning of user behavior, context-based scenarios, preferences, etc., in order to promote automated actions with high confidence. Utility-based analysis can be used to compare the benefits of taking action with the costs of taking incorrect action. Probability-based or statistical analysis may be used in conjunction with the foregoing and / or the following. Note that the control ASIC, power ASIC, or smart battery system described herein may include ML component 186, which may employ artificial intelligence (AI) models and / or machine learning (ML) models that can learn to perform the functions described above or below (e.g., via training using historical training data and / or feedback data).

[0068] In some embodiments, the artificial intelligence component may include an AI and / or ML model that can be trained (e.g., via supervised and / or unsupervised techniques) to perform the functions described above using historical training data including various contextual conditions corresponding to various battery management operations. In this example, such an AI and / or ML model may further learn (e.g., via supervised and / or unsupervised techniques) using training data including feedback data to perform the functions described above, wherein such feedback data may be collected and / or stored (e.g., in memory) by the artificial intelligence component. In this example, such feedback data may include various instructions described above / below that may respond to observed / stored context-based information being input over time to, for example, an ASIC or system described herein.

[0069] The artificial intelligence component described herein can initiate operations associated with a battery cell or battery pack based on a defined confidence level determined using information (e.g., feedback data). For example, based on learning to perform such functions using the feedback data defined above, if the artificial intelligence component determines, for example, that the battery pack is damaged and needs isolation, or if the charging between battery cells should be balanced, the artificial intelligence component may initiate operations associated with the vehicle.

[0070] In one embodiment, the AI ​​component of this paper can perform a utility-based analysis that compares the costs and benefits of initiating the aforementioned actions. In this embodiment, the AI ​​component can use one or more additional contextual conditions to determine whether battery management actions should be taken.

[0071] Figure 7A flowchart of a process 700 associated with a control ASIC according to one or more embodiments described herein is shown. At 702, process 700 may include bidirectional DC-DC conversion of a power ASIC for a battery cell in a battery pack controlled by a control application-specific integrated circuit (ASIC) including a processor. At 704, process 700 may include bidirectional DC-AC conversion of a power ASIC for a battery cell in a battery pack controlled by a control ASIC.

[0072] Figure 8 A flowchart of process 800 associated with a power ASIC according to one or more embodiments described herein is shown. At 802, process 800 may include receiving instruction data for the battery cells of a battery pack by a power application-specific integrated circuit (ASIC) including a processor, the instruction data representing instructions to control one or more DC-AC bridges or one or more DC-DC bridges of the power ASIC. At 804, process 800 may include, based on the instructions, the power ASIC controlling one or more DC-AC bridges of the power ASIC using a DC-AC bidirectional power conversion module of the power ASIC including a plurality of metal-oxide-semiconductor field-effect transistors (MOSFETs), or the power ASIC controlling one or more DC-DC bridges of the power ASIC using a DC-DC bidirectional power conversion module including a DC-DC converter.

[0073] To facilitate the aforementioned functions, the AI ​​component can perform classification, correlation, inference, and / or representation related to AI principles. For example, the AI ​​component in this paper can employ an automatic classification system and / or automatic classification. In one example, the AI ​​component can employ probability-based and / or statistical analysis (e.g., taking into account analytical utility and cost) to learn and / or generate inference. The AI ​​component can employ any suitable machine learning-based, statistical, and / or probability-based techniques. For example, the AI ​​component can employ expert systems, fuzzy logic, support vector machines (SVM), hidden Markov models (HMM), greedy search algorithms, rule-based systems, Bayesian models (e.g., Bayesian networks), neural networks, other nonlinear training techniques, data fusion, utility-based analysis systems, systems employing Bayesian models, etc. In another example, the AI ​​component can perform a set of machine learning computations. For example, AI components can perform clustering machine learning computation sets, logistic regression machine learning computation sets, decision tree machine learning computation sets, random forest machine learning computation sets, regression tree machine learning computation sets, least squares machine learning computation sets, instance-based machine learning computation sets, regression machine learning computation sets, support vector regression machine learning computation sets, k-means machine learning computation sets, spectral clustering machine learning computation sets, rule learning machine learning computation sets, Bayesian machine learning computation sets, deep Boltzmann machine learning computation sets, deep belief network computation sets, and / or various machine learning computation sets.

[0074] The ASIC and / or system described herein can be coupled (e.g., communication ground, electrical ground, operational ground, optical ground, etc.) to one or more local or remote (e.g., external) systems, sources, and / or devices (e.g., electronic control systems (ECUs), classical and / or quantum computing devices, communication devices, etc.). For example, the ASIC or system (or other systems, controllers, processors, etc.) described herein can be coupled (e.g., communication ground, electrical ground, operational ground, optical ground, etc.) to one or more local or remote (e.g., external) systems, sources, and / or devices using data cables (e.g., High Definition Multimedia Interface (HDMI), Recommended Standard (RS), Ethernet cables, etc.) and / or one or more wired networks described below.

[0075] In some embodiments, the ASIC or system described herein may be coupled via a network (e.g., communication ground, electrical ground, operational ground, optical ground, etc.) to one or more local or remote (e.g., external) systems, sources, and / or devices (e.g., electronic control units (ECUs), classical and / or quantum computing devices, communication devices, etc.). In these embodiments, such a network may include one or more wired and / or wireless networks, including but not limited to cellular networks, wide area networks (WANs) (e.g., the Internet), and / or local area networks (LANs). For example, the ASIC described herein may communicate with one or more local or remote (e.g., external) systems, sources, and / or devices, such as computing devices using such a network, which may virtually include any desired wired or wireless technology, including but not limited to: Power Line Ethernet, Wireless Fidelity (Wi-Fi), etc. Fiber optic communication; Global System for Mobile Communications (GSM), Universal Mobile Telecommunications System (UMTS), WiMAX, Enhanced General Packet Radio Service (Enhanced GPRS), 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE), 3rd Generation Partnership Project 2 (3GPP2) Ultra Mobile Broadband (UMB), High-Speed ​​Packet Access (HSPA), ZigBee and other 802.xx wireless technologies and / or legacy telecommunications technologies, Session Initiation Protocol (SIP). RF4CE protocol, WWirelessHART protocol, 6LoWPAN (IPv6 over low-power wireless LAN), Z-Wave, ANT, ultra-wideband (UWB) standard protocol and / or other proprietary and non-proprietary communication protocols. In this example, therefore, the ASIC or system described herein may include hardware (e.g., central processing unit (CPU), transceiver, decoder, antenna (e.g., ultra-wideband (UWB) antenna, etc.). The combination of hardware and software that facilitates communication of information between the system described herein and remote (e.g., external) systems, sources and / or devices (e.g., computing and / or communication devices, such as smartphones, smartwatches, wireless earbuds, etc.).

[0076] The ASIC and / or system described herein may include one or more computer and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by a processor (e.g., a classical processor, a quantum processor, etc.), facilitate the performance of operations defined by those components and / or instructions. Furthermore, in many embodiments, as described herein with or without reference to the various accompanying drawings disclosed herein, any component associated with the ASIC or system herein may include one or more computer and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by a processor, facilitate the performance of operations defined by those components and / or instructions. For example, any component associated with the ASIC or system disclosed herein (e.g., communicatively, electrically, operatively, and / or optically coupled to and / or employed by the system described herein) may include such computer and / or machine-readable, writable, and / or executable components and / or instructions. Therefore, according to many embodiments, the ASIC, or system, and / or any component associated therewith as disclosed herein may employ a processor to execute such computer and / or machine-readable, writable, and / or executable components and / or instructions to facilitate the performance of one or more operations described herein with reference to the system and / or any such component associated therewith.

[0077] The ASICs and / or systems described herein may include any type of system, device, machine, apparatus, component, and / or instrumentation, including a processor and / or capable of communicating with one or more local or remote electronic systems and / or one or more local or remote devices via wired and / or wireless networks. All such embodiments are contemplated. For example, systems described herein may include computing devices, general-purpose computers, special-purpose computers, in-vehicle computing devices, communication devices, in-vehicle communication devices, server devices, quantum computing devices (e.g., quantum computers), tablet computing devices, handheld devices, server-type computers and / or databases, laptop computers, notebook computers, desktop computers, cellular phones, smartphones, consumer appliances and / or instruments, industrial and / or commercial equipment, digital assistants, multimedia internet-enabled telephones, multimedia players, and / or other types of devices.

[0078] To provide additional context for the various embodiments described herein, Figure 9 The following discussion is intended to provide a brief, general description of a suitable computing environment 900 in which various embodiments of the embodiments described herein can be implemented. Although the embodiments have been described above in the general context of computer-executable instructions that can run on one or more computers, those skilled in the art will recognize that the embodiments can also be implemented in combination with other program components and / or as a combination of hardware and software.

[0079] Typically, program components include routines, programs, components, data structures, etc., that perform specific tasks or implement specific abstract data types. Furthermore, those skilled in the art will understand that the methods of this invention can be practiced with other computer system configurations, including single-processor or multi-processor computer systems, minicomputers, mainframe computers, Internet of Things (IoT) devices, distributed computing systems, and personal computers, handheld computing devices, microprocessor-based or programmable consumer electronics devices, each of which can be operatively coupled to one or more associated devices.

[0080] The embodiments illustrated in this article can also be practiced in a distributed computing environment, where certain tasks are performed by remote processing devices linked via a communication network. In a distributed computing environment, program modules can reside in both local and remote memory storage devices.

[0081] Computing devices typically include a variety of media, which may include computer-readable storage media, machine-readable storage media, and / or communication media, the two terms being used differently from each other below. A computer-readable storage medium or a machine-readable storage medium can be any available storage medium accessible by a computer, and includes volatile and non-volatile media, removable and non-removable media. By way of example and not limitation, a computer-readable storage medium or a machine-readable storage medium can be implemented in conjunction with any method or technique for storing information such as computer-readable or machine-readable instructions, program modules, structured data, or unstructured data.

[0082] Computer-readable storage media may include, but are not limited to, random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, optical disc read-only memory (CDROM), digital universal disc (DVD), Blu-ray disc (BD) or other optical disc storage, magnetic tape, magnetic disk storage or other magnetic storage devices, solid-state drives or other solid-state storage devices, or other tangible and / or non-transitory media that can be used to store desired information. In this regard, the terms “tangible” or “non-transitory” used herein to describe memory, storage, or computer-readable media should be understood to exclude the provision that only transmits transient signals as a modifier, and not to waive the rights to all standard memory, storage, or computer-readable media that not only transmit transient signals themselves.

[0083] Computer-readable storage media can be accessed by one or more local or remote computing devices, for example, through access requests, queries or other data retrieval protocols, to perform various operations on the information stored on the media.

[0084] Communication media typically embody computer-readable instructions, data structures, program modules, or other structured or unstructured data in data signals such as modulated data signals (e.g., carrier waves or other transmission mechanisms), and include any information delivery or transmission medium. The term "modulated data signal" or signal refers to a signal whose one or more characteristics are set or altered in a manner that encodes information in one or more signals. By way of example and not limitation, communication media include wired media, such as wired networks or direct wired connections, and wireless media, such as acoustic, RF, infrared, and other wireless media.

[0085] Refer again Figure 9 An example environment 900 for implementing various embodiments of the aspects described herein includes a computer 902, which includes a processing unit 904, system memory 906, and a system bus 908. The system bus 908 couples system components, including but not limited to the system memory 906, to the processing unit 904. The processing unit 904 can be any of a variety of commercially available processors. Dual microprocessors and other multiprocessor architectures can also be used as the processing unit 904.

[0086] System bus 908 can be any of several types of bus architectures, which can be further interconnected to memory buses (with or without memory controllers), peripheral buses, and local buses using any of the various commercially available bus architectures. System memory 906 includes ROM 910 and RAM 912. The Basic Input / Output System (BIOS) can be stored in non-volatile memory such as ROM, erasable programmable read-only memory (EPROM), or EEPROM, where the BIOS contains basic routines that facilitate, for example, the transfer of information between components within computer 902 during startup. RAM 912 may also include high-speed RAM, such as static RAM for caching data.

[0087] Computer 902 also includes an internal hard disk drive (HDD) 914 (e.g., EIDE, SATA), one or more external storage devices 916 (e.g., floppy disk drive (FDD) 916, memory stick or flash drive reader, memory card reader, etc.), and an optical disc drive 920 (e.g., capable of reading from or writing to CD-ROMs, DVDs, BDs, etc.). While the internal HDD 914 is shown as residing within computer 902, it can also be configured for external use within a suitable chassis (not shown). Furthermore, although not shown in environment 900, a solid-state drive (SSD) can be used to supplement or replace the HDD 914. The HDD 914, external storage devices 916, and optical disc drive 920 can be connected to system bus 908 via HDD interface 924, external storage interface 926, and optical disc drive interface 928, respectively. Interface 924 for external drive implementations may include at least one or both of Universal Serial Bus (USB) and Institute of Electrical and Electronics Engineers (IEEE) 1394 interface technologies. Other external drive connection technologies are envisioned in the embodiments described herein.

[0088] The drive and its associated computer-readable storage medium provide non-volatile storage of data, data structures, computer-executable instructions, etc. For computer 902, the drive and storage medium accommodate the storage of any data in a suitable digital format. Although the above description of computer-readable storage media refers to various types of storage devices, those skilled in the art will understand that other types of computer-readable storage media, whether currently existing or developed in the future, may also be used in the example operating environment, and any such storage medium may contain computer-executable instructions for performing the methods described herein.

[0089] Multiple program modules can be stored in the drive and RAM 912, including an operating system 930, one or more application programs 932, other program modules 934, and program data 936. All or part of the operating system, application programs, modules, and / or data can also be cached in RAM 912. The systems and methods described herein can be implemented using a variety of commercially available operating systems or combinations of operating systems.

[0090] Computer 902 may optionally include emulation technology. For example, a hypervisor (not shown) or other intermediary may emulate the hardware environment of operating system 930, and the emulated hardware may optionally be different from that of operating system 930. Figure 9The hardware shown is illustrated. In such an embodiment, the operating system 930 may include one of a plurality of virtual machines (VMs) hosted on the computer 902. Furthermore, the operating system 930 may provide a runtime environment for the application 932, such as the Java Runtime Environment or the .NET Framework. A runtime environment is a consistent execution environment that allows the application 932 to run on any operating system that includes a runtime environment. Similarly, the operating system 930 may support containers, and the application 932 may be in the form of a container, which is a lightweight, standalone, executable software package that includes, for example, code, runtime, system tools, system libraries, and settings for the application.

[0091] Furthermore, the computer 902 can enable security modules, such as Trusted Processing Modules (TPMs). For example, using a TPM, a startup component hashes the next startup component before loading it and waits for the result to match a security value. This process can occur at any layer of the computer 902's code execution stack, for example, at the application execution level or the operating system (OS) kernel level, thus achieving security at any level of code execution.

[0092] Users can input commands and information into computer 902 through one or more wired / wireless input devices (e.g., keyboard 938, touchscreen 940, and pointing devices such as mouse 942). Other input devices (not shown) may include microphones, infrared (IR) remote controls, radio frequency (RF) remote controls or other remote controls, joysticks, virtual reality controllers and / or virtual reality headsets, gamepads, styluses, image input devices (e.g., cameras), gesture sensor input devices, visual motion sensor input devices, emotion or face detection devices, biometric input devices (e.g., fingerprint or iris scanners), etc. These and other input devices are typically connected to processing unit 904 via input device interface 944, which may be coupled to system bus 908, but can be connected via other interfaces such as parallel ports, IEEE 1394 serial ports, game ports, USB ports, IR interfaces, etc. Interfaces, etc.

[0093] The monitor 946 or other types of display devices can also be connected to the system bus 908 via an interface (such as a video adapter 948). In addition to the monitor 946, the computer typically includes other peripheral output devices (not shown), such as speakers, printers, etc.

[0094] Computer 902 can operate in a networked environment using logical connections via wired and / or wireless communications to one or more remote computers, such as remote computer 950. Although only memory / storage device 952 is shown for simplicity, remote computer 950 can be a workstation, server computer, router, personal computer, portable computer, microprocessor-based entertainment device, peer-to-peer device, or other public network node, and typically includes many or all of the elements described relative to computer 902. The described logical connections include wired / wireless connections to a local area network (LAN) 954 and / or a larger network (e.g., a wide area network (WAN) 956). Such LAN and WAN network environments are common in offices and companies and facilitate enterprise-wide computer networks, such as intranets, all of which can connect to global communication networks, such as the Internet.

[0095] When used in a LAN network environment, computer 902 can connect to local network 954 via a wired and / or wireless communication network interface or adapter 958. Adapter 958 can facilitate wired or wireless communication to LAN 954, which may also include a wireless access point (AP) configured thereon for communicating with adapter 958 in wireless mode.

[0096] When used in a WAN network environment, computer 902 may include modem 960, or may be connected to a communication server on WAN 956 via other means (such as via the Internet) for establishing communication on WAN 956. Modem 960 may be an internal or external, wired or wireless device, and may be connected to system bus 908 via input device interface 944. In a network environment, program modules depicted relative to computer 902 or parts thereof may be stored in remote memory / storage device 952. It should be understood that the network connection shown is an example, and other means of establishing communication links between computers may be used.

[0097] When used in a LAN or WAN network environment, computer 902 can access cloud storage systems or other network-based storage systems to supplement or replace external storage device 916 as described above. Typically, the connection between computer 902 and the cloud storage system can be established on LAN 954 or WAN 956 via, for example, adapter 958 or modem 960. When computer 902 is connected to the associated cloud storage system, external storage interface 926 can manage the storage provided by the cloud storage system with the help of adapter 958 and / or modem 960, just as it would manage other types of external storage. For example, external storage interface 926 can be configured to provide access to cloud storage sources as if these sources were physically connected to computer 902.

[0098] Computer 902 is operable to communicate with any wireless device or entity operably positioned in wireless communication, such as printers, scanners, desktop and / or portable computers, portable data assistants, communication satellites, any device or location associated with a wirelessly detectable tag (e.g., a kiosk, newsstand, store shelf, etc.), and telephones. This can include Wi-Fi and Wireless technology. Therefore, communication can be a predefined structure like traditional networks, or simply self-organizing communication between at least two devices.

[0099] Now for reference Figure 10 This diagram illustrates a schematic block diagram of a computing environment 1000 according to this specification. System 1000 includes one or more clients 1002 (e.g., computers, smartphones, tablets, cameras, PDAs). Client 1002 can be hardware and / or software (e.g., threads, processes, computing devices). For example, client 1002 can use this specification to contain cookies and / or associated contextual information.

[0100] System 1000 also includes one or more servers 1004. Server 1004 may be hardware or hardware combined with software (e.g., threads, processes, computing devices). For example, server 1004 may accommodate threads to perform conversions of media items by employing aspects of this disclosure. One possible form of communication between client 1002 and server 1004 may be in the form of data packets suitable for transmission between two or more computer processes, wherein the data packets may include encoded, analyzed header space and / or input. For example, data packets may include cookies and / or associated contextual information. System 1000 includes a communication framework 1006 (e.g., a global communication network such as the Internet) that can be used to facilitate communication between client 1002 and server 1004.

[0101] Communication can be facilitated via wired (including fiber optic) and / or wireless technologies. Client 1002 is operatively connected to one or more client data stores 1008, which can be used to store information locally on client 1002 (e.g., cookies and / or associated context information). Similarly, server 1004 is operatively connected to one or more server data stores 1010, which can be used to store information locally on server 1004.

[0102] In one exemplary embodiment, client 1002 may transmit an encoded file (e.g., an encoded media item) to server 1004. Server 1004 may store the file, decode the file, or send the file to another client 1002. It should be understood that, according to this disclosure, client 1002 may also transmit an uncompressed file to server 1004, and server 1004 may compress and / or transform the file. Similarly, server 1004 may encode information and send it to one or more clients 1002 via communication framework 1006.

[0103] The aspects shown in this disclosure can also be implemented in a distributed computing environment, where certain tasks are performed by remote processing devices linked via a communication network. In a distributed computing environment, program modules can reside in both local and remote memory storage devices.

[0104] The above description includes non-limiting examples of various embodiments. Of course, in order to describe the disclosed subject matter, it is impossible to describe every conceivable combination of components or methods, and those skilled in the art will recognize that further combinations and arrangements of various embodiments are possible. The disclosed subject matter is intended to encompass all such changes, modifications, and variations falling within the spirit and scope of the appended claims.

[0105] Regarding the various functions performed by the aforementioned components, devices, circuits, systems, etc., unless otherwise indicated, the terminology used to describe these components (including references to "part") is also intended to include any structure (e.g., functional equivalent) that performs the specified function of said component, even if it is not structurally equivalent to the disclosed structure. Furthermore, while a particular feature of the disclosed subject matter may only be disclosed with respect to one of several embodiments, it may be desirable and advantageous to combine such feature with one or more other features of other embodiments for any given or particular application.

[0106] The terms “exemplary” and / or “illustrator” as used herein are intended to mean as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited to these examples. Furthermore, any aspect or design described herein as “exemplary” and / or “illustrator” is not necessarily to be construed as being more preferred or advantageous than other aspects or designs, nor does it exclude equivalent structures and techniques known to those skilled in the art. Moreover, within the scope of the terms “comprising,” “having,” “including,” and other similar terms used in the specification or claims, these terms are intended to be inclusive—in a manner similar to the term “comprising” as an open transition word—and do not exclude any additional or other elements.

[0107] The term “or” as used herein is intended to mean an inclusive “or”, not an exclusive “or.” For example, the phrase “A or B” is intended to include instances of A, B, and both A and B. Furthermore, the articles “a” and “the” used in this application and the appended claims should generally be interpreted as meaning “one or more”, unless otherwise specified or clearly indicated from the context to the singular form.

[0108] The term "set" as used herein does not include an empty set, i.e., a set containing no elements. Therefore, "set" in this subject disclosure includes one or more elements or entities. Similarly, the term "group" as used herein refers to a collection of one or more entities.

[0109] The description of the illustrated embodiments of this subject matter provided herein, including those described in the abstract, is not intended to be exhaustive or to limit the disclosed embodiments to the precise forms disclosed. Although specific embodiments and examples have been described herein for illustrative purposes, various modifications are possible within the scope of these embodiments and examples, as will be appreciated by those skilled in the art. In this regard, while the subject matter has been described herein in conjunction with various embodiments and corresponding drawings, it should be understood where applicable that other similar embodiments may be used, or modifications and additions may be made to the described embodiments to perform the same, similar, alternative, or substitute functions of the disclosed subject matter without departing from the subject matter. Therefore, the disclosed subject matter should not be limited to any single embodiment described herein, but should be interpreted broadly and comprehensively in accordance with the appended claims.

[0110] Other aspects of the invention are provided by the subject matter of the following provisions:

[0111] 1. A system comprising:

[0112] Multiple battery cells; and

[0113] Multiple application-specific integrated circuits (ASICs) electrically coupled to multiple battery cells, wherein one or more of the multiple ASICs include their respective power ASICs, and wherein each ASIC includes its own bidirectional DC-AC converter for charging or discharging the multiple battery cells.

[0114] 2. The system according to any of the foregoing clauses further includes motors electrically coupled to a plurality of ASICs, wherein each bidirectional DC-AC converter supplies AC power to the motors.

[0115] 3. A system according to any of the foregoing provisions, wherein multiple ASICs are wirelessly coupled to each other.

[0116] 4. In any of the foregoing provisions, the respective bidirectional DC-AC converter includes a corresponding metal-oxide-semiconductor field-effect transistor switch (MOSFET).

[0117] 5. A system according to any of the foregoing provisions, wherein a plurality of ASICs include respective bidirectional DC-DC converters that charge a plurality of battery cells and supply DC power to the DC power components of the system.

[0118] 6. A system pursuant to any of the foregoing provisions, wherein

[0119] Multiple ASICs include their respective battery cell impedance sensors, and

[0120] Multiple ASICs determine the health status of each battery cell based on the individual outputs of their respective battery cell impedance sensors, according to a defined health metric.

[0121] 7. Any set of combinations of the system in Clause 1 above with systems 2-6 above.

[0122] 8. A power application application-specific integrated circuit (ASIC) for a battery cell in a battery pack, comprising:

[0123] DC-DC bidirectional power conversion module, including DC-DC converter;

[0124] A DC-AC bidirectional power conversion module, comprising multiple metal-oxide-semiconductor field-effect transistors (MOSFETs); and

[0125] A processor that executes computer-executable components stored in memory, wherein the computer-executable components include bridge components that control one or more DC-AC bridges or one or more DC-DC bridges.

[0126] 9. A power ASIC according to any of the foregoing provisions, wherein one or more of a plurality of MOSFETs comprise a plurality of MOSFETs connected in parallel.

[0127] 10. A power ASIC according to any of the foregoing provisions, wherein a bridge component alters one or more modes of one or more of a plurality of MOSFETs.

[0128] 11. A power ASIC according to any of the foregoing provisions, wherein one or more modes include one or more of active mode, bypass mode or high impedance mode.

[0129] 12. A power ASIC according to any of the foregoing provisions, wherein the bypass mode includes electrical isolation between the battery cell and other battery cells in the battery pack.

[0130] 13. A power ASIC according to any of the foregoing provisions, wherein the high impedance mode includes a reduced maximum electrical load defined on the battery cell.

[0131] 14. Any combination of the power ASIC of Clause 8 above with the power ASICs 9-13 above.

[0132] 15. A method comprising:

[0133] The power application application integrated circuit (ASIC) including the processor receives instruction data for the battery cells of the battery pack. This instruction data represents instructions to control one or more DC-AC bridges or one or more DC-DC bridges of the power ASIC; and

[0134] Based on instructions,

[0135] A power ASIC uses a DC-AC bidirectional power conversion module comprising multiple metal-oxide-semiconductor field-effect transistors (MOSFETs) to control one or more DC-AC bridges of the power ASIC, or

[0136] The power ASIC uses a bidirectional DC-DC power conversion module, including a DC-DC converter, to control one or more DC-DC bridges of the power ASIC.

[0137] 16. The method according to any of the foregoing clauses further includes:

[0138] Based on instructions, the power ASIC changes one or more modes of one or more MOSFETs out of a plurality of MOSFETs.

[0139] 17. The method according to any of the preceding clauses, wherein one or more modes include one or more of active mode, bypass mode or high impedance mode.

[0140] 18. The method according to any of the foregoing clauses, wherein the bypass mode includes electrical isolation between the battery cell and other battery cells in the battery pack.

[0141] 19. The method according to any of the preceding clauses, wherein the high impedance mode includes a reduced maximum electrical load defined on the battery cell.

[0142] 20. The method according to any of the foregoing clauses, wherein the active mode enables the defined maximum electrical load on the battery cell.

[0143] 21. The method according to any of the preceding clauses, wherein the instructions include a pulse width modulation input.

[0144] 22. The method according to any of the preceding clauses, wherein one or more of the plurality of MOSFETs comprise a plurality of MOSFETs connected in parallel.

[0145] 23. Any combination of the methods in Clause 15 above with methods 16-22 above.

Claims

1. A battery system, comprising: Multiple smart battery cells, wherein each smart battery cell includes: Application-Specific Integrated Circuit (ASIC), wherein the ASIC includes: The power ASIC controls the charging and discharging of the smart battery. Bidirectional DC-AC converter, and A battery cell impedance sensor, wherein the ASIC determines the health status of the smart battery cell based on the output of the battery cell impedance sensor according to a defined health metric.

2. The battery system of claim 1 further includes a motor electrically coupled to the ASIC, wherein the bidirectional DC-AC converter provides alternating current to the motor.

3. The battery system according to claim 1, wherein, The ASIC is wirelessly coupled to communicate with other ASICs.

4. The battery system according to claim 1, wherein, The bidirectional DC-AC converter includes a corresponding metal-oxide-semiconductor field-effect transistor (MOSFET) switch.

5. The battery system according to claim 1, wherein, The ASIC also includes a bidirectional DC-DC converter that charges the smart battery cell and provides DC power to the DC components of the system.

6. A power application-specific integrated circuit (ASIC) for a smart battery cell in a battery pack, wherein the power ASIC comprises: DC-DC bidirectional power conversion module, including DC-DC converter; A DC-AC bidirectional power conversion module, comprising multiple metal-oxide-semiconductor field-effect transistors (MOSFETs); as well as A processor that executes computer-executable components stored in memory, said computer-executable components including bridge components that control one or more DC-AC bridges or one or more DC-DC bridges; and A battery cell impedance sensor, wherein the power ASIC determines the health status of the smart battery cell based on the output of the battery cell impedance sensor and according to a defined health metric.

7. The power ASIC according to claim 6, wherein, One or more of the plurality of MOSFETs include their respective plurality of MOSFETs connected in parallel.

8. The power ASIC according to claim 6, wherein, The bridge assembly alters one or more modes of one or more of the plurality of MOSFETs.

9. The power ASIC according to claim 8, wherein, The one or more modes include one or more of active mode, bypass mode or high impedance mode.

10. The power ASIC according to claim 9, wherein, The bypass mode includes electrical isolation between the smart battery cell and other smart battery cells in the battery pack.

11. The power ASIC according to claim 9, wherein, The high impedance mode includes a reduced maximum electrical load defined on the smart battery cell.

12. A method for use in a power application-specific integrated circuit (ASIC), comprising: The power ASIC of the intelligent battery cell of the battery pack receives instruction data, which represents instructions to control one or more DC-AC bridges or one or more DC-DC bridges of the power ASIC. as well as Based on the instructions, the power ASIC uses a DC-AC bidirectional power conversion module comprising multiple metal-oxide-semiconductor field-effect transistors (MOSFETs) to control one or more DC-AC bridges of the power ASIC, or The power ASIC uses a DC-DC bidirectional power conversion module, including a DC-DC converter, to control the one or more DC-DC bridges of the power ASIC. as well as The health status of the smart battery cell is determined by the output of the battery cell impedance sensor of the power ASIC, based on a defined health metric.

13. The method of claim 12, further comprising: Based on the instructions, the power ASIC changes one or more modes of one or more of the plurality of MOSFETs.

14. The method according to claim 13, wherein, The one or more modes include one or more of active mode, bypass mode or high impedance mode.

15. The method according to claim 14, wherein, The bypass mode includes electrical isolation between the smart battery cell and other smart battery cells in the battery pack.

16. The method of claim 14, wherein, The high impedance mode includes a reduced maximum electrical load defined on the smart battery cell.

17. The method of claim 14, wherein, The active mode enables the maximum electrical load defined on the smart battery cell.

18. The method according to claim 12, wherein, The instructions include pulse width modulation input.

19. The method according to claim 13, wherein, One or more of the plurality of MOSFETs include their respective plurality of MOSFETs connected in parallel.

20. The method according to claim 12, wherein, The power ASIC is electrically coupled to the motor.

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