A GaN LED structure and a manufacturing method thereof

Abstract

The application discloses a GaN LED structure and a manufacturing method thereof. Before growing a GaN layer on a SiO2 patterned sapphire substrate, a SiNx layer is grown, and the SiNx layer and the SiO2 form a SiO2-SiNx double layer to improve a reflection film, so that total reflection of light emitted by the LED in an epitaxial layer is reduced, and then the external quantum efficiency of the LED epitaxy is improved. x In y Ga (1‑x‑y) N buffer layer multilayer design, on the one hand, provides the same orientation high-density nucleation center with the SiO2 patterned sapphire substrate, and on the other hand, promotes lateral growth by reducing the interface free energy between the epitaxial layer and the SiO2 patterned sapphire substrate, so that the defect density can be effectively reduced, and the lattice is over-extended, the LED crystal quality is improved, and then the internal quantum efficiency of the LED is improved; the MgO passivation layer is arranged behind the three-dimensional U-shaped GaN layer, and when the patterned tip of the SiO2 patterned sapphire substrate is not covered, the MgO passivation layer is used for passivating the patterned tip, reducing the upward extension of the threading dislocation, and then improving the leakage performance of the LED epitaxial layer.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, in particular to a GaN LED structure and a manufacturing method thereof, namely, a GaN LED structure on a patterned SiO2 sapphire substrate and a manufacturing method thereof. BACKGROUND

[0002] In recent years, nitride compound semiconductor materials represented by III-V gallium nitride (GaN) have attracted widespread attention due to their wide direct band gap, high thermal conductivity, high hardness, low dielectric constant, radiation resistance and other characteristics, and have great application potential in solid-state lighting, solid-state lasers, optical information storage, ultraviolet detectors and other fields. At present, great breakthroughs have been made in the field of GaN devices internationally. High-brightness blue and green light-emitting diodes (LEDs) have been commercialized, and long-life ultraviolet and blue lasers have also been successfully developed. Due to the lack of suitable substrate materials, epitaxial GaN is grown on a hetero-substrate. Sapphire (Al2O3) is the most common substrate material for epitaxial GaN films. Due to the large lattice constant mismatch and thermal expansion coefficient difference between it and the GaN epitaxial layer, a large number of crystal defects will be generated during epitaxial growth. In order to alleviate or even solve the problems caused by lattice and thermal mismatch, a series of mature technical solutions have been formed in the field of hetero-substrate GaN material growth. Among them, the use of patterned sapphire substrate (PSS) technology can better relieve the stress between the sapphire substrate and the GaN epitaxial growth, reduce the defect density in the GaN epitaxy, and improve the crystal quality of the epitaxial material. In addition, in the field of LED applications, the use of patterned sapphire substrate technology not only improves the material quality, but also reduces the total reflection caused by the refractive index difference, thereby improving the overall light-emitting efficiency of the LED.

[0003] With the development of process technology in the field of LEDs and the expansion of the entire LED industry, many manufacturers are using PSS technology to improve the light-emitting efficiency of LED devices. The research on PSS substrates for GaN LED devices in the industry has also gradually increased. Currently, the PSS substrates used in the industry have relatively mature industrialization routes, and the brightness improvement has reached the theoretical limit. The substrate materials used are all sapphire substrates with single structure, and the same material is used for the substrate material and the patterning.

[0004] It can be seen that the existing PSS technology is in a stable stage of light extraction efficiency of LED devices, and cannot achieve qualitative change in brightness. With the continuous expansion of the application of LED industry, the light extraction efficiency of LED devices cannot meet the market demand in the future. Therefore, how to further improve the light emitting performance of LED under the premise of sapphire substrate material system is a problem to be solved by those skilled in the art. SUMMARY

[0005] Therefore, the present application provides a GaN LED structure and a manufacturing method thereof, which changes the problem of too many defects caused by too large lattice mismatch between the epitaxial layer and the substrate, thereby improving the crystal quality of the LED heteroepitaxial layer, reducing non-radiative recombination, improving internal quantum efficiency, and improving external quantum efficiency by reducing total reflection of light.

[0006] In order to achieve the above purpose, the present application provides the following technical scheme:

[0007] A manufacturing method of a GaN LED structure, the manufacturing method comprising:

[0008] providing a SiO2 patterned sapphire substrate;

[0009] generating a SiNx layer, at least one SiAl x In y Ga (1-x-y) N buffer layer, a three-dimensional U-shaped GaN layer, a MgO passivation layer, a two-dimensional U-shaped GaN layer, an N-type GaN layer, a multi-quantum well layer, and a P-type GaN layer on one side surface of the SiO2 patterned sapphire substrate;

[0010] The SiNx layer and the SiO2 in the SiO2 patterned sapphire substrate form a SiO2-SiNx double-layer improved reflection film to improve the light extraction efficiency of the GaN LED structure.

[0011] Preferably, in the above manufacturing method, the method for growing the SiNx layer comprises:

[0012] SiH4, NH3, H2 and N2 are introduced, and the temperature is set to 500-900 degrees Celsius to generate a SiNx layer with a thickness of 5-40 nm on one side surface of the SiO2 patterned sapphire substrate; wherein the gas flow ratio of NH3 and SiH4 is 5:1-20:1.

[0013] Preferably, in the above manufacturing method, the method for growing the SiAl x In y Ga (1-x-y) N buffer layer comprises:

[0014] Passing in SiH4, NH3, H2, N2, TMGa, TMIn, TMAl, temperature setting is 500-1000 Celsius, at least one layer of SiAl is generated on the side surface of the SiNx layer away from the SiO2 patterned sapphire substrate x In y Ga (1-x-y) N buffer layer (x, y is not a constant value, from large to small synchronous change, x*y≠0), thickness is 10-100nm; wherein, the concentration of Si is 5E17-5E18 / cm3, the component of Al, In is 0.005-0.2.

[0015] Preferably, in the above manufacturing method, the method for growing the three-dimensional U-shaped GaN layer comprises:

[0016] Passing in TMGa, NH3, H2, N2, temperature setting is 1100 Celsius, a three-dimensional U-shaped GaN layer with thickness of 1000-3000nm is generated on the side surface of the SiAl x In y Ga (1-x-y) N buffer layer away from the SiNx layer.

[0017] Preferably, in the above manufacturing method, the method for growing the MgO passivation layer comprises:

[0018] Passing in CP2Mg, NH3, H2, N2, or TMGa, CP2Mg, NH3, H2, N2, temperature setting is 1000-1160 Celsius, an MgO passivation layer is generated on the side surface of the three-dimensional U-shaped GaN layer away from the SiAl x In y Ga (1-x-y) N buffer layer.

[0019] Preferably, in the above manufacturing method, the method for growing the two-dimensional U-shaped GaN layer comprises:

[0020] Passing in TMGa, NH3, H2, N2, temperature setting is 1000-1160 Celsius, a two-dimensional U-shaped GaN layer with thickness of 900-1100nm is generated on the side surface of the MgO passivation layer away from the three-dimensional U-shaped GaN layer; wherein, the passing-in amount of Mg is 50-300sccm, and the time is 5-60s.

[0021] Preferably, in the above manufacturing method, the method for growing the N-type GaN layer comprises:

[0022] Passing in TMGa, SiH4, NH3, H2, N2, temperature setting is 1000-1100 Celsius, on the side surface of the two-dimensional U-shaped GaN layer away from the MgO passivation layer generates N-type GaN layer with thickness of 1800-2500nm; wherein, the concentration of SiH4 is 9E18 / cm 3 .

[0023] Preferably, in the above manufacturing method, the method of growing the multi-quantum well layer comprises:

[0024] Passing in TEGa, TMIn, NH3, H2, N2, temperature setting is 700-900 Celsius, on the side surface of the N-type GaN layer away from the two-dimensional U-shaped GaN layer generates multi-quantum well layer with thickness of 100-150nm; wherein, the temperature of the well is 780 degrees, and the temperature of the barrier is 870 degrees.

[0025] Preferably, in the above manufacturing method, the method of growing the P-type GaN layer comprises:

[0026] Passing in TMGa, CP2Mg, NH3, H2, N2, temperature setting is 900-1000 Celsius, on the side surface of the multi-quantum well layer away from the N-type GaN layer generates P-type GaN layer with thickness of 200-500nm; wherein, the concentration of Mg is 2.5E19 / cm 3 .

[0027] The application also provides a GaN LED structure on a SiO2 patterned sapphire substrate, the GaN LED structure comprising:

[0028] The SiO2 patterned sapphire substrate;

[0029] And, the SiNx layer, at least one layer of SiAl x In y Ga (1-x-y) N buffer layer, three-dimensional U-shaped GaN layer, MgO passivation layer, two-dimensional U-shaped GaN layer, N-type GaN layer, multi-quantum well layer and P-type GaN layer;

[0030] Wherein, the SiNx layer and the SiO2 in the SiO2 patterned sapphire substrate form a SiO2-SiNx double-layer improved reflection film to improve the light extraction efficiency of the GaN LED structure.

[0031] As known from the above description, the GaN LED structure and the manufacturing method thereof provided by the technical scheme of the application can grow a SiNx layer before growing a GaN layer on a SiO2 patterned sapphire substrate, and the SiNx layer and the SiO2 form a SiO2-SiNx double layer to improve the reflection film, so that the light emitted by the LED can be reduced in total reflection in the epitaxial layer, and the external quantum efficiency of the LED epitaxy is improved.

[0032] Further, the SiAl x In y Ga (1-x-y) The N buffer layer multilayer is designed, and the beneficial effect is a stress release layer, a dense film with a large coverage can be obtained, and an excellent platform is provided for subsequent growth. On the one hand, the same orientation high-density nucleation center as the SiO2 patterned sapphire substrate is provided, and on the other hand, the interface free energy between the epitaxial layer and the SiO2 patterned sapphire substrate is reduced to promote lateral growth, so that the defect density can be effectively reduced, and the lattice is overgrown, the crystal quality of the LED is improved, and the internal quantum efficiency of the LED is improved.

[0033] Further, the MgO passivation layer is arranged behind the three-dimensional U-shaped GaN layer, and when the patterned tip of the SiO2 patterned sapphire substrate is not covered, the MgO passivation layer is used to passivate the patterned tip, reduce the penetration of threading dislocations, and then improve the leakage performance of the LED epitaxial layer. BRIEF DESCRIPTION OF DRAWINGS

[0034] In order to more clearly illustrate the technical scheme in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced below. Obviously, the drawings in the following description are only embodiments of the present application, and those skilled in the art can obtain other drawings according to the provided drawings without creating any creative labor.

[0035] The structure, proportion, size, etc. shown in the drawings of the specification are only used to cooperate with the content disclosed in the specification, so that those skilled in the art can understand and read, and are not used to limit the conditions that can be implemented by the present application, so they do not have technical significance. Any modification of structure, change of proportion relationship or adjustment of size, without affecting the effect and purpose that can be achieved by the present application, should still fall within the scope of the technical content disclosed by the present application.

[0036] Figures 1-9 A manufacturing method of a GaN LED structure provided by the embodiment of the present application is provided.

[0037] Figure 10 A rocking curve scanning result schematic diagram in the (002) symmetry plane in the embodiment of the present application is provided.

[0038] Figure 11 Figure 2 is a schematic diagram of a rocking curve scan result on an asymmetric plane (102) in an embodiment of the present application;

[0039] Figure 12 Figure 4 is a schematic diagram of a reverse leakage current IR average in an embodiment of the present application;

[0040] Figure 13 Figure 5 is a schematic diagram of an IR yield in an embodiment of the present application;

[0041] Figure 14 Figure 6 is a schematic diagram of a light efficiency in an embodiment of the present application. DETAILED DESCRIPTION

[0042] The embodiments in the present application will be described below in detail with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative effort belong to the scope of the present application.

[0043] In recent years, GaN semiconductor material has attracted extensive research interest due to its application in light-emitting devices, high-power and high-frequency devices. At present, the main hetero-substrates that can be used for GaN growth include silicon substrate, silicon carbide and sapphire. Due to the large lattice mismatch and thermal mismatch between the hetero-substrate and the GaN epitaxial layer, the GaN epitaxial layer has a high dislocation density. These dislocations act as non-radiative recombination centers and electron scattering centers, which reduces the internal quantum efficiency of GaN-based light-emitting diode (LED) devices. In addition, the total reflection of GaN and air also reduces the light extraction efficiency of the LED, thereby reducing the optical and electrical performance of the LED device.

[0044] In order to solve these problems, many methods have been proposed, such as using lateral epitaxial growth (ELOG) technology to improve the crystal quality of GaN epitaxial film, or using photonic crystal technology, surface roughening technology and patterned sapphire substrate (PSS) technology, etc., which can effectively improve the light extraction efficiency of the LED device. Among them, the use of PSS has attracted widespread attention. It is reported that PSS can change the GaN epitaxial growth from vertical to horizontal, reduce the dislocation density of GaN epitaxial material, thereby improving the internal quantum efficiency. In addition, the non-flat GaN / sapphire surface can change the propagation direction of the light emitted by the active layer, avoid the internal total reflection caused by the large difference in refractive index between GaN and air, increase the scattering of photons, improve the probability of light emission, and increase the light extraction efficiency.

[0045] However, for the conventional PSS, the industrialized route has been relatively mature, and the brightness improvement has reached the theoretical limit, how to further improve the light emitting performance of the LED under the premise of sapphire substrate material system, the LED of SiO2 patterned sapphire substrate (SPSS), compared with the LED of conventional patterned sapphire substrate (CPSS), the light extraction efficiency of SPSS-LED is improved by 26%, the light output power and the brightness are all improved by about 5%, however, the growth on SPSS puts higher requirements on the epitaxial growth technology.

[0046] Therefore, the application provides a GaN LED structure and a manufacturing method thereof.

[0047] SiO2 patterned sapphire substrate is provided;

[0048] SiNx layer, at least one SiAl x In y Ga (1-x-y) N buffer layer, three-dimensional U-shaped GaN layer, MgO passivation layer, two-dimensional U-shaped GaN layer, N-type GaN layer, multi-quantum well layer and P-type GaN layer are generated on one side surface of the SiO2 patterned sapphire substrate.

[0049] The SiNx layer and the SiO2 in the SiO2 patterned sapphire substrate form a SiO2-SiNx double-layer improved reflection film, so as to improve the light extraction efficiency of the GaN LED structure.

[0050] As known from the above description, the technical scheme provided by the application grows a SiNx layer before growing a GaN layer on the SiO2 patterned sapphire substrate, the SiNx layer and the SiO2 form a SiO2-SiNx double-layer improved reflection film, which can reduce the total reflection of the light emitted by the LED in the epitaxial layer, and further improve the external quantum efficiency of the LED epitaxy.

[0051] Further, the SiAl x In y Ga (1-x-y)The N buffer layer multilayer is designed, and its beneficial effect is a stress release layer, a dense film with large coverage can be obtained, and an excellent platform is provided for subsequent growth. On the one hand, the same orientation high-density nucleation center as the SiO2 patterned sapphire substrate is provided, and on the other hand, the interface free energy between the epitaxial layer and the SiO2 patterned sapphire substrate is reduced to promote lateral growth, which can effectively reduce the defect density, and at the same time, the lattice is overgrown, the LED crystal quality is improved, and then the internal quantum efficiency of the LED is improved.

[0052] Further, the MgO passivation layer is arranged behind the three-dimensional U-shaped GaN layer, and when the SiO2 patterned sapphire substrate pattern tip is not covered, the MgO passivation layer is used to passivate the pattern tip, reduce the upward extension of the threading dislocation, and then improve the leakage performance of the LED epitaxial layer.

[0053] In order to make the above-mentioned purposes, characteristics and advantages of the present application more obvious and easy to understand, the present application will be further described in detail below in combination with the drawings and specific embodiments.

[0054] Embodiment 1:

[0055] Reference Figures 1-9 , Figures 1-9 A process flow chart of a manufacturing method of a GaN LED structure provided by the embodiment of the present application is provided, and the manufacturing method comprises:

[0056] Step 1: as shown in the figure, a SiO2 patterned sapphire substrate 10 is provided; Figure 1

[0057] Among them, a SiO2 layer 12 can be deposited on the sapphire substrate 11, then a patterned photoresist layer is prepared on the SiO2 layer 12 by using a photoetching technology, and the SiO2 layer 12 is etched based on the patterned photoresist layer to form the SiO2 patterned sapphire substrate 10.

[0058] In the embodiment of the present application, a device MOCVD (metal organic chemical vapor deposition) is used, trimethyl gallium TMGa and triethyl gallium TEGa are used as Ga sources, ammonia NH3 is used as an N source, H2 and N2 are used as carrier gases, and the doping sources are silane SiH4, trimethyl aluminum TMAl and dimethyl magnesium CP2Mg. The SiO2 patterned sapphire substrate 10 is used, and the graphite disc is used as a carrier disc.

[0059] Step 2: the SiO2 patterned sapphire substrate 10 is subjected to 1min hydrogenation treatment to remove surface impurities and the like.

[0060] Step 3: as shown in the figure, a SiNx layer 13 is grown; Figure 2

[0061] ​​The method for growing the SiNx layer 13 includes: inputting SiH4, NH3, H2 and N2, setting the temperature to 500-900 degrees Celsius (e.g. 800 degrees Celsius), and generating the SiNx layer 13 with a thickness of 5-40 nm (e.g. 10 nm) on one side surface of the SiO2 patterned sapphire substrate 10; wherein the gas flow ratio of NH3 and SiH4 is 5:1-20:1. For example, the gas flow ratio of NH3 and SiH4 is 5:1, the flow of NH3 is 100 sccm, and the flow of SiH4 is 20 sccm.

[0062] The SiNx layer 13 and the SiO2 in the SiO2 patterned sapphire substrate 10 form a SiO2-SiNx double-layer improved reflection film to improve the light extraction efficiency of the GaN LED structure.

[0063] Step 4: as shown in Figure 3 , growing at least one SiAlxInyGa(1-x-y)N buffer layer 14;

[0064] The method for growing the SiAl x In y Ga (1-x-y) N buffer layer 14 includes: inputting SiH4, NH3, H2, N2, TMGa, TMIn and TMAl, setting the temperature to 500-1000 degrees Celsius (e.g. 900 degrees Celsius), and generating at least one SiAl x In y Ga (1-x-y) N buffer layer 14 (x and y are not constant values, and change synchronously from large to small, x*y≠0) with a thickness of 10-100 nm (e.g. 50 nm); wherein the concentration of Si is 5E17-5E18 per cm3, and the components of Al and In are 0.005-0.2.

[0065] Step 5: as shown in Figure 4 , growing a three-dimensional U-shaped GaN layer 15;

[0066] The method for growing the three-dimensional U-shaped GaN layer 15 includes: inputting TMGa, NH3, H2 and N2, setting the temperature to 1100 degrees Celsius, and generating the three-dimensional U-shaped GaN layer 15 with a thickness of 1000-3000 nm (e.g. 2000 nm) on one side surface of the SiAl x In y Ga (1-x-y) N buffer layer 14 away from the SiNx layer 13.

[0067] Step 6: asFigure 5 The MgO passivation layer 16 is grown;

[0068] The method for growing the MgO passivation layer 16 includes: introducing CP2Mg, NH3, H2, N2, setting the temperature to 1000-1160 degrees Celsius (e.g., 1100 degrees Celsius), and growing the MgO passivation layer 16 on the side surface of the three-dimensional U-shaped GaN layer 15 away from the SiAl x In y Ga (1-x-y) The MgO passivation layer 16 is grown on one side surface of the N-type GaN buffer layer 14.

[0069] In this step, the MgO passivation layer 16 is grown on the three-dimensional U-shaped GaN layer 15, and the SiO2 layer 12 at the pattern tip is not covered by the aforementioned epitaxial layer. Therefore, the oxygen element in this layer diffuses out to form the MgO passivation layer 16 with the Mg element during the deposition process. In addition, when the substrate pattern tip is not covered, it can be used for passivation at the pattern tip to reduce the upward extension of the threading dislocation. The Ga source can be introduced or not introduced.

[0070] Step 7: As shown in the figure, a two-dimensional U-shaped GaN layer 17 is grown; Figure 6

[0071] The method for growing the two-dimensional U-shaped GaN layer 17 includes: introducing TMGa, NH3, H2, N2, setting the temperature to 1000-1160 degrees Celsius (e.g., 1150 degrees Celsius), and growing the two-dimensional U-shaped GaN layer 17 with a thickness of 900-1100 nm (e.g., 1000 nm) on the side surface of the MgO passivation layer 17 away from the three-dimensional U-shaped GaN layer 16. The amount of Mg introduced is 50-300 sccm, and the time is 5-60 s.

[0072] Step 8: As shown in the figure, an N-type GaN layer 18 is grown; Figure 7

[0073] The method for growing the N-type GaN layer 18 includes: introducing TMGa, SiH4, NH3, H2, N2, setting the temperature to 1000-1100 degrees Celsius (e.g., 1070 degrees Celsius), and growing the N-type GaN layer 18 with a thickness of 1800-2500 nm (e.g., 2000 nm) on the side surface of the two-dimensional U-shaped GaN layer 17 away from the MgO passivation layer 16. The concentration of SiH4 is 9E18 / cm 3 .

[0074] Step 9: As shown in the figure, a multi-quantum well layer 19 is grown; Figure 8

[0075] ​​​The method for growing the multi-quantum well layer 19 comprises: inputting TEGa, TMIn, NH3, H2 and N2, setting the temperature to 700-900 DEG C, and generating the multi-quantum well layer 19 with a thickness of 100-150 nm (for example, 130 nm) on the side surface of the N-type GaN layer 18 away from the two-dimensional U-shaped GaN layer 17; wherein the temperature of the well is set to 780 DEG C, and the temperature of the barrier is set to 870 DEG C.

[0076] Step 10: as shown in the figure, growing the P-type GaN layer 20; Figure 9

[0077] The method for growing the P-type GaN layer 20 comprises: inputting TMGa, CP2Mg, NH3, H2 and N2, setting the temperature to 900-1000 DEG C (for example, 950 DEG C), and generating the P-type GaN layer 20 with a thickness of 200-500 nm (for example, 300 nm) on the side surface of the multi-quantum well layer 19 away from the N-type GaN layer 18; wherein the concentration of Mg is 2.5E19 / cm 3 .

[0078] Step 11: performing a cooling annealing treatment, and ending the growth. The GaN LED structure is subjected to XRD testing, chip manufacturing, and photoelectric parameter testing.

[0079] Therefore, compared with the traditional structure, the XRD 102 / 002 half peak width of the embodiment 1 is obviously reduced, which proves that the dislocation density of the screw dislocation, the edge dislocation and the mixed dislocation of the LED is reduced, and the crystal quality is effectively improved. After the epitaxial wafer is subjected to chip manufacturing, the photoelectric parameters are improved, the average value of the reverse leakage current IR is reduced, and the IR yield is improved. Due to the reduction of defects, the radiation and light emission of the LED are improved, and the light efficiency is obviously improved.

[0080] Embodiment 2

[0081] As shown in the figure, the manufacturing method comprises: Figures 1-9

[0082] Step 21: as shown in the figure, providing a SiO2 patterned sapphire substrate 10; Figure 1

[0083] The SiO2 layer 12 can be deposited on the sapphire substrate 11, then a patterned photoresist layer is prepared on the SiO2 layer 12 by using a photolithography technology, and the SiO2 layer 12 is etched based on the patterned photoresist layer to form the SiO2 patterned sapphire substrate 10.

[0084] ​​​In the embodiment of the present application, a device MOCVD (metal organic chemical vapor deposition) is used, with TMGa (trimethyl gallium) and TEGa (triethyl gallium) as Ga sources, NH3 (ammonia) as N source, H2 and N2 as carrier gas, and silane SiH4, TMAl (trimethyl aluminum) and CP2Mg (dimethyl magnesium) as doping sources, with a SiO2 patterned sapphire substrate 10 and a graphite disc as a carrier disc.

[0085] Step 22: Perform 1 min hydrogenation treatment on the SiO2 patterned sapphire substrate 10 to remove surface impurities and the like.

[0086] Step 23: As shown in the figure, grow a SiNx layer 13. Figure 2

[0087] The method for growing the SiNx layer 13 includes: introducing SiH4, NH3, H2 and N2, setting the temperature to 500-900 degrees Celsius (for example, 800 degrees Celsius), and generating a SiNx layer 13 with a thickness of 5-40 nm (for example, 10 nm) on one side surface of the SiO2 patterned sapphire substrate 10; wherein the gas flow ratio of NH3 to SiH4 is 5:1-20:1. For example, the gas flow ratio of NH3 to SiH4 is 10:1, the flow rate of NH3 is 100 sccm, and the flow rate of SiH4 is 10 sccm.

[0088] The SiNx layer 13 and the SiO2 in the SiO2 patterned sapphire substrate 10 form a SiO2-SiNx double-layer improved reflection film to improve the light extraction efficiency of the GaN LED structure.

[0089] Step 24: As shown in the figure, grow at least one SiAlxInyGa(1-x-y)N buffer layer 14. Figure 3

[0090] The method for growing the SiAlxInyGa(1-x-y)N buffer layer 14 includes: introducing SiH4, NH3, H2, N2, TMGa, TMIn and TMAl, setting the temperature to 500-1000 degrees Celsius (for example, 900 degrees Celsius), and generating at least one SiAlxInyGa(1-x-y)N buffer layer 14 (x, y are not constant values, and change synchronously from large to small, x*y≠0) with a thickness of 10-100 nm (for example, 50 nm) on the side surface of the SiNx layer 13 away from the SiO2 patterned sapphire substrate 10; wherein the concentration of Si is 5E17-5E18 per cm3, and the components of Al and In are 0.005-0.2. x In y Ga (1-x-y) N buffer layer 14, the concentration of Si is 5E17-5E18 per cm3, and the components of Al and In are 0.005-0.2. x In y Ga (1-x-y) N buffer layer 14, the concentration of Si is 5E17-5E18 per cm3, and the components of Al and In are 0.005-0.2.​​

[0091] Step 25: As Figure 4 As shown, a three-dimensional U-shaped GaN layer 15 is grown;

[0092] The method for growing the three-dimensional U-shaped GaN layer 15 includes: introducing TMGa, NH3, H2, and N2, setting the temperature to 1100 degrees Celsius, and growing the SiAl layer. x In y Ga (1-x-y) A three-dimensional U-shaped GaN layer 15 with a thickness of 1000-3000 nm (e.g., 2000 nm) is formed on the surface of the N buffer layer 14 facing away from the SiNx layer 13.

[0093] Step 26: As Figure 5 As shown, a MgO passivation layer 16 is grown;

[0094] The method for growing the MgO passivation layer 16 includes: introducing CP2Mg, NH3, H2, N2, or TMGa, CP2Mg, NH3, H2, N2, and setting the temperature to 1000–1160 degrees Celsius (e.g., 1100 degrees Celsius), with the three-dimensional U-shaped GaN layer 15 facing away from the SiAl. x In y Ga (1-x-y) A MgO passivation layer 16 is formed on one side surface of the N buffer layer 14.

[0095] In this step, the MgO passivation layer 16 is set after the three-dimensional U-shaped GaN layer 15. Since the SiO2 layer 12 located at the tip of the pattern is not covered by the aforementioned epitaxial layer, the oxygen element in this layer diffuses out during the deposition process and forms the MgO passivation layer 16 with the Mg element. When the tip of the substrate pattern is not covered, it can be used to passivate the tip of the pattern, reduce the upward extension of penetrating dislocations, and can be connected to the Ga source or not.

[0096] Step 27: As Figure 6 As shown, a two-dimensional U-shaped GaN layer 17 is grown;

[0097] The method for growing the two-dimensional U-shaped GaN layer 17 includes: introducing TMGa, NH3, H2, and N2, setting the temperature to 1000–1160 degrees Celsius (e.g., 1150 degrees Celsius), and generating a two-dimensional U-shaped GaN layer 17 with a thickness of 900–1100 nm (e.g., 1000 nm) on the surface of the MgO passivation layer 17 opposite to the three-dimensional U-shaped GaN layer 16; wherein the amount of Mg introduced is 50–300 sccm, and the time is 5–60 s.

[0098] Step 28: As Figure 7 As shown, an N-type GaN layer 18 is grown;

[0099] The method for growing the N-type GaN layer 18 includes: inputting TMGa, SiH4, NH3, H2, N2, setting the temperature to 1000-1100 degrees Celsius (for example, 1070 degrees Celsius), and generating the N-type GaN layer 18 with a thickness of 1800-2500 nm (for example, 2000 nm) on the side surface of the two-dimensional U-shaped GaN layer 17 away from the MgO passivation layer 16; and the concentration of SiH4 is 9E18 / cm3. 3 .

[0100] Step 29: as shown in the figure, the multi-quantum well layer 19 is grown. Figure 8

[0101] The method for growing the multi-quantum well layer 19 includes: inputting TEGa, TMIn, NH3, H2, N2, and setting the temperature to 700-900 degrees Celsius, and generating the multi-quantum well layer 19 with a thickness of 100-150 nm (for example, 130 nm) on the side surface of the N-type GaN layer 18 away from the two-dimensional U-shaped GaN layer 17; and the temperature of the well is set to 780 degrees Celsius, and the temperature of the barrier is set to 870 degrees Celsius.

[0102] Step 30: as shown in the figure, the P-type GaN layer 20 is grown. Figure 9

[0103] The method for growing the P-type GaN layer 20 includes: inputting TMGa, CP2Mg, NH3, H2, N2, setting the temperature to 900-1000 degrees Celsius (for example, 950 degrees Celsius), and generating the P-type GaN layer 20 with a thickness of 200-500 nm (for example, 300 nm) on the side surface of the multi-quantum well layer 19 away from the N-type GaN layer 18; and the concentration of Mg is 2.5E19 / cm3. 3 .

[0104] Step 31: a cooling annealing process is performed, and the growth is ended. The GaN LED structure is tested by XRD, and a chip is made, and photoelectric parameters are tested.

[0105] Therefore, compared with example 1, the gas flow ratio of NH3 and SiH4 for growing the SiNx layer 13 is different in example 2, and experiments show that the quality of the SiNx layer 13 grown by different gas flow ratios of NH3 and SiH4 is different, and the reflection ability of the SiO2-SiNx double-layer improved reflection film is different.

[0106] Example 3:

[0107] As shown in the figure, the manufacturing method includes: Figures 1-9 ​​​

[0108] Step 41: As Figure 1 As shown, a SiO2 patterned sapphire substrate 10 is provided;

[0109] Specifically, a SiO2 layer 12 can be deposited on a sapphire substrate 11, and then a patterned photoresist layer can be prepared on the SiO2 layer 12 using photolithography. Based on the patterned photoresist layer, the SiO2 layer 12 is etched to form a SiO2 patterned sapphire substrate 10.

[0110] In this embodiment of the invention, MOCVD (metal-organic chemical vapor deposition) is used, with trimethylgallium (TMGa) and triethylgallium (TEGa) as Ga sources, ammonia (NH3) as N sources, and H2 and N2 as carrier gases. The doping sources are silane (SiH4), trimethylaluminum (TMAl), and magnesium cerene (CP2Mg), respectively. A patterned sapphire substrate 10 is used with SiO2, and a graphite disk is used as the carrier disk.

[0111] Step 42: Perform hydrogenation treatment on the SiO2 patterned sapphire substrate 10 for 1 minute to remove surface impurities, etc.

[0112] Step 43: As Figure 2 As shown, a SiNx layer 13 is grown;

[0113] The method for growing the SiNx layer 13 includes: introducing SiH4, NH3, H2, and N2 at a temperature of 500–900 degrees Celsius (e.g., 800 degrees Celsius) to form a SiNx layer 13 with a thickness of 5–40 nm (e.g., 10 nm) on one side surface of the SiO2 patterned sapphire substrate 10; wherein the gas flow rate ratio of NH3 to SiH4 is 5:1–20:1. For example, if the gas flow rate ratio of NH3 to SiH4 is 5:1, then the flow rate of NH3 is 100 sccm, and the flow rate of SiH4 is 20 sccm.

[0114] The SiNx layer 13 and the SiO2 in the SiO2 patterned sapphire substrate 10 form a SiO2-SiNx double-layer reflective film to improve the light extraction efficiency of the GaN LED structure.

[0115] Step 44: As Figure 3 As shown, the first SiAlxInyGa(1-xy)N buffer layer 14 is grown;

[0116] Among them, the first layer of SiAl is grown x In y Ga (1-x-y)The method for forming the SiAlxInyGa(1-x-y)N buffer layer 14 includes: inputting SiH4, NH3, H2, N2, TMGa, TMIn, and TMAl, setting the temperature to 500-1000 degrees Celsius (for example, 900 degrees Celsius), and generating a first layer of SiAl on the side surface of the SiNx layer 13 away from the SiO2 patterned sapphire substrate 10. x In y Ga (1-x-y) The SiAlxInyGa(1-x-y)N buffer layer 14 (x and y are not constant values, and change synchronously from large to small, x*y≠0) has a thickness of 10-100 nm (for example, 50 nm); wherein the concentration of Si is 5E17-5E18 per cm3, and the components of Al and In are 0.005-0.2.

[0117] Step 45: growing a second layer of SiAlxInyGa(1-x-y)N buffer layer (not shown in the figure);

[0118] The method for growing the second layer of SiAlxInyGa(1-x-y)N buffer layer includes: inputting SiH4, NH3, H2, N2, TMGa, TMIn, and TMAl, setting the temperature to 500-1000 degrees Celsius (for example, 900 degrees Celsius), and generating a second layer of SiAl on the side surface of the first layer of SiAl x In y Ga (1-x-y) The method for forming the SiAlxInyGa(1-x-y)N buffer layer 14 includes: inputting SiH4, NH3, H2, N2, TMGa, TMIn, and TMAl, setting the temperature to 500-1000 degrees Celsius (for example, 900 degrees Celsius), and generating a first layer of SiAl on the side surface of the SiNx layer 13 away from the SiO2 patterned sapphire substrate 10. x In y Ga (1-x-y) The method for forming the SiAlxInyGa(1-x-y)N buffer layer 14 includes: inputting SiH4, NH3, H2, N2, TMGa, TMIn, and TMAl, setting the temperature to 500-1000 degrees Celsius (for example, 900 degrees Celsius), and generating a first layer of SiAl on the side surface of the SiNx layer 13 away from the SiO2 patterned sapphire substrate 10. x In y Ga (1-x-y) The SiAlxInyGa(1-x-y)N buffer layer 14 (x and y are not constant values, and change synchronously from large to small, x*y≠0) has a thickness of 10-100 nm (for example, 50 nm); wherein the concentration of Si is 5E17-5E18 per cm3, and the components of Al and In are 0.005-0.2.

[0119] It should be noted that the SiAlxInyGa(1-x-y)N buffer layer is at least one layer, and the number of layers can be set based on requirements, and the growth method is the same as that of the SiAlxInyGa(1-x-y)N buffer layer described above.

[0120] Step 46: as shown in the figure, growing a three-dimensional U-shaped GaN layer 15; Figure 4

[0121] The method for growing the three-dimensional U-shaped GaN layer 15 includes: inputting TMGa, NH3, H2, and N2, and setting the temperature to 1100 degrees Celsius, and generating a second layer of SiAl on the side surface of the second layer of SiAl x In y Ga (1-x-y) ​The N-buffer layer is away from the first SiAl layer. x In y Ga (1-x-y) A three-dimensional U-shaped GaN layer 15 with a thickness of 1000-3000 nm (e.g., 2000 nm) is formed on one side surface of the N buffer layer 14.

[0122] Step 47: As Figure 5 As shown, a MgO passivation layer 16 is grown;

[0123] The method for growing the MgO passivation layer 16 includes: introducing CP2Mg, NH3, H2, N2, or TMGa, CP2Mg, NH3, H2, N2, and setting the temperature to 1000–1160 degrees Celsius (e.g., 1100 degrees Celsius), with the three-dimensional U-shaped GaN layer 15 facing away from the second SiAl layer. x In y Ga (1-x-y) A MgO passivation layer 16 is formed on one side surface of the N buffer layer.

[0124] In this step, the MgO passivation layer 16 is set after the three-dimensional U-shaped GaN layer 15. Since the SiO2 layer 12 located at the tip of the pattern is not covered by the aforementioned epitaxial layer, the oxygen element in this layer diffuses out during the deposition process and forms the MgO passivation layer 16 with the Mg element. When the tip of the substrate pattern is not covered, it can be used to passivate the tip of the pattern, reduce the upward extension of penetrating dislocations, and can be connected to the Ga source or not.

[0125] Step 48: As Figure 6 As shown, a two-dimensional U-shaped GaN layer 17 is grown;

[0126] The method for growing the two-dimensional U-shaped GaN layer 17 includes: introducing TMGa, NH3, H2, and N2, setting the temperature to 1000–1160 degrees Celsius (e.g., 1150 degrees Celsius), and generating a two-dimensional U-shaped GaN layer 17 with a thickness of 900–1100 nm (e.g., 1000 nm) on the surface of the MgO passivation layer 17 opposite to the three-dimensional U-shaped GaN layer 16; wherein the amount of Mg introduced is 50–300 sccm, and the time is 5–60 s.

[0127] Step 49: As Figure 7 As shown, an N-type GaN layer 18 is grown;

[0128] The method for growing the N-type GaN layer 18 includes: inputting TMGa, SiH4, NH3, H2, N2, setting the temperature to 1000-1100 degrees Celsius (for example, 1070 degrees Celsius), and generating the N-type GaN layer 18 with a thickness of 1800-2500 nm (for example, 2000 nm) on the side surface of the two-dimensional U-shaped GaN layer 17 away from the MgO passivation layer 16; wherein the concentration of SiH4 is 9E18 / cm3. 3 .

[0129] Step 50: as shown in Figure 8 , the multi-quantum well layer 19 is grown;

[0130] The method for growing the multi-quantum well layer 19 includes: inputting TEGa, TMIn, NH3, H2, N2, and setting the temperature to 700-900 degrees Celsius, and generating the multi-quantum well layer 19 with a thickness of 100-150 nm (for example, 130 nm) on the side surface of the N-type GaN layer 18 away from the two-dimensional U-shaped GaN layer 17; wherein the temperature of the well is set to 780 degrees Celsius, and the temperature of the barrier is set to 870 degrees Celsius.

[0131] Step 51: as shown in Figure 9 , the P-type GaN layer 20 is grown;

[0132] The method for growing the P-type GaN layer 20 includes: inputting TMGa, CP2Mg, NH3, H2, N2, setting the temperature to 900-1000 degrees Celsius (for example, 950 degrees Celsius), and generating the P-type GaN layer 20 with a thickness of 200-500 nm (for example, 300 nm) on the side surface of the multi-quantum well layer 19 away from the N-type GaN layer 18; wherein the concentration of Mg is 2.5E19 / cm3. 3 .

[0133] Step 52: annealing treatment is performed, and the growth is ended. The GaN LED structure is tested by XRD, and the chip is manufactured, and the optoelectronic parameters are tested.

[0134] Therefore, compared with example 1, the SiAl x In y Ga (1-x-y) The GaN buffer layer 14 is composed of two or more layers, and each layer is different in the doping amount of Al and In.

[0135] Example 4:

[0136] As shown in Figures 1-9 , the manufacturing method includes:

[0137] Step 61: as shown in Figure 1As shown in the figure, a SiO2 patterned sapphire substrate 10 is provided;

[0138] As shown in the figure, a SiO2 patterned sapphire substrate 10 is provided;

[0139] In the embodiment, a device MOCVD (metal organic chemical vapor deposition) is used, with TMGa and TEGa as Ga sources, NH3 as N source, H2 and N2 as carrier gas, and SiH4, TMAl and CP2Mg as doping sources, and the SiO2 patterned sapphire substrate 10 is used, and a graphite disc is used as a carrier disc.

[0140] Step 62: The SiO2 patterned sapphire substrate 10 is subjected to 1 min hydrogenation treatment to remove surface impurities and the like.

[0141] Step 63: As shown in the figure, a SiNx layer 13 is grown; Figure 2

[0142] The method for growing the SiNx layer 13 includes: introducing SiH4, NH3, H2 and N2, and setting the temperature to 500-900 degrees Celsius (for example, 800 degrees Celsius), to generate a SiNx layer 13 with a thickness of 5-40 nm (for example, 10 nm) on one side surface of the SiO2 patterned sapphire substrate 10; and the gas flow ratio of NH3 to SiH4 is 5:1-20:1. For example, when the gas flow ratio of NH3 to SiH4 is 5:1, the flow rate of NH3 is 100 sccm, and the flow rate of SiH4 is 20 sccm.

[0143] The SiNx layer 13 and the SiO2 in the SiO2 patterned sapphire substrate 10 form a SiO2-SiNx double-layer improved reflection film to improve the light extraction efficiency of the GaN LED structure.

[0144] Step 64: As shown in the figure, at least one SiAlxInyGa(1-x-y)N buffer layer 14 is grown; Figure 3

[0145] The method for growing the SiAlxInyGa(1-x-y)N buffer layer 14 includes: introducing SiH4, TMGa, NH3, H2 and N2, and setting the temperature to 500-900 degrees Celsius (for example, 800 degrees Celsius), to generate a SiAlxInyGa(1-x-y)N buffer layer 14 with a thickness of 5-40 nm (for example, 10 nm) on one side surface of the SiO2 patterned sapphire substrate 10; and the gas flow ratio of NH3 to SiH4 is 5:1-20:1. For example, when the gas flow ratio of NH3 to SiH4 is 5:1, the flow rate of NH3 is 100 sccm, and the flow rate of SiH4 is 20 sccm. x In y Ga (1-x-y) ​​The method for forming the N buffer layer 14 includes: introducing SiH4, NH3, H2, N2, TMGa, TMIn, and TMAl, setting the temperature to 500–1000 degrees Celsius (e.g., 900 degrees Celsius), and forming at least one SiAl layer on the surface of the SiNx layer 13 on the side opposite to the SiO2 patterned sapphire substrate 10. x In y Ga (1-x-y) N buffer layer 14 (x and y are not constant values, but change synchronously from large to small, x*y≠0), with a thickness of 10-100nm (e.g., 50nm); wherein, the concentration of Si is 5E17-5E18 particles / cm3, and the composition of Al and In is 0.005-0.2.

[0146] Step 65: As Figure 4 As shown, a three-dimensional U-shaped GaN layer 15 is grown;

[0147] The method for growing the three-dimensional U-shaped GaN layer 15 includes: introducing TMGa, NH3, H2, and N2, setting the temperature to 1100 degrees Celsius, and growing the SiAl layer. x In y Ga (1-x-y) A three-dimensional U-shaped GaN layer 15 with a thickness of 1000-3000 nm (e.g., 2000 nm) is formed on the surface of the N buffer layer 14 facing away from the SiNx layer 13.

[0148] Step 66: As Figure 5 As shown, a MgO passivation layer 16 is grown;

[0149] The method for growing the MgO passivation layer 16 includes: introducing TMGa, CP2Mg, NH3, H2, and N2, setting the temperature to 1000–1160 degrees Celsius (e.g., 1100 degrees Celsius), and growing the three-dimensional U-shaped GaN layer 15 away from the SiAl. x In y Ga (1-x-y) A MgO passivation layer 16 is formed on one side surface of the N buffer layer 14.

[0150] In this step, the MgO passivation layer 16 is placed after the three-dimensional U-shaped GaN layer 15. Since the SiO2 layer 12 located at the tip of the pattern is not covered by the aforementioned epitaxial layer, the oxygen element in this layer diffuses out during the deposition process and forms the MgO passivation layer 16 with the Mg element. When the tip of the substrate pattern is not covered, it can be used to passivate the tip of the pattern, reduce the upward extension of penetrating dislocations, and can be used to introduce a Ga source or not.

[0151] Step 67: As Figure 6 As shown, a two-dimensional U-shaped GaN layer 17 is grown;

[0152] The method for growing the two-dimensional U-shaped GaN layer 17 includes: introducing TMGa, NH3, H2, N2, setting the temperature to 1000-1160 degrees Celsius (e.g., 1150 degrees Celsius), and generating the two-dimensional U-shaped GaN layer 17 with a thickness of 900-1100 nm (e.g., 1000 nm) on the side surface of the MgO passivation layer 16 away from the three-dimensional U-shaped GaN layer 16; wherein the amount of Mg introduced is 50-300 sccm, and the time is 5-60 s.

[0153] Step 68: As shown in Figure 7 , grow the N-type GaN layer 18;

[0154] The method for growing the N-type GaN layer 18 includes: introducing TMGa, SiH4, NH3, H2, N2, setting the temperature to 1000-1100 degrees Celsius (e.g., 1070 degrees Celsius), and generating the N-type GaN layer 18 with a thickness of 1800-2500 nm (e.g., 2000 nm) on the side surface of the two-dimensional U-shaped GaN layer 17 away from the MgO passivation layer 16; wherein the concentration of SiH4 is 9E18 / cm 3 .

[0155] Step 69: As shown in Figure 8 , grow the multi-quantum well layer 19;

[0156] The method for growing the multi-quantum well layer 19 includes: introducing TEGa, TMIn, NH3, H2, N2, setting the temperature to 700-900 degrees Celsius, and generating the multi-quantum well layer 19 with a thickness of 100-150 nm (e.g., 130 nm) on the side surface of the N-type GaN layer 18 away from the two-dimensional U-shaped GaN layer 17; wherein the temperature of the well is set to 780 degrees Celsius, and the temperature of the barrier is set to 870 degrees Celsius.

[0157] Step 70: As shown in Figure 9 , grow the P-type GaN layer 20;

[0158] The method for growing the P-type GaN layer 20 includes: introducing TMGa, CP2Mg, NH3, H2, N2, setting the temperature to 900-1000 degrees Celsius (e.g., 950 degrees Celsius), and generating the P-type GaN layer 20 with a thickness of 200-500 nm (e.g., 300 nm) on the side surface of the multi-quantum well layer 19 away from the N-type GaN layer 18; wherein the concentration of Mg is 2.5E19 / cm 3 .

[0159] Step 71: Perform cooling annealing to complete the growth process. Perform XRD testing on the GaN LED structure, fabricate the chip, and test its photoelectric parameters.

[0160] Therefore, it can be seen that, compared with Example 1, in Example 4, a Ga source can be introduced or not when growing the MgO passivation layer 16.

[0161] To characterize the crystal quality of GaN LED structures on SiO2 patterned sapphire substrates, HRXRD was used to perform sweeping rocking curve measurements along the symmetric (002) plane and the asymmetric (102) plane of the conventional structure and the samples of the four embodiments.

[0162] like Figure 10 and Figure 11 As shown, Figure 10 and Figure 11 Schematic diagrams of the rocking curve scanning results in the (002) symmetry plane and the (102) asymmetry plane of this invention are shown in the figures. As can be seen from the figures, compared with the conventional structure, the peak width of the rocking curve of the GaN epitaxial layer grown in the embodiments of this invention is significantly reduced. For the (002) symmetry plane, the full width at half maximum (FWHM) value decreases from 120 arcsec to 105 arcsec; for the (102) asymmetry plane, the FWHM value decreases from 190 arcsec to 170 arcsec. Theoretically, the FWHM value of the (002) symmetry plane reflects the dislocation density of screw dislocations and mixed dislocations, while the FWHM value of the (102) asymmetry plane reflects the dislocation density of edge dislocations and mixed dislocations. Therefore, the GaN LED structure grown on a SiO2 patterned sapphire substrate using the fabrication method of this invention can reduce the dislocation density of the GaN epitaxial layer, thereby improving the crystal quality of the GaN epitaxial layer.

[0163] After the epitaxial wafer is fabricated into a chip, the photoelectric parameters of the samples with the traditional structure and the four embodiments are analyzed, such as... Figures 12-14 As shown, Figure 12 This is a schematic diagram of the average reverse leakage current IR provided in an embodiment of the present invention. Figure 13 This is a schematic diagram of IR yield provided in an embodiment of the present invention. Figure 14 This is a schematic diagram of the light effect provided in an embodiment of the present invention. Figure 12 and Figure 13 This indicates that the GaN LED structure grown on a SiO2 patterned sapphire substrate using the structure of this invention exhibits a reduced average reverse leakage current (IR) and improved IR yield. Directly, this reflects improved crystal quality in the epitaxial structure of this invention, resulting in improved electrical properties of the LED chip. Figure 14 As shown, the LED chip using the structure of the present invention has significantly improved luminous efficacy. Due to the reduction of defects, the radiative recombination luminescence of the LED is improved, thereby enhancing luminous efficacy.

[0164] As can be known from the above description, in the method for manufacturing the GaN LED structure on the SiO2 patterned sapphire substrate provided by the technical scheme, before growing the GaN layer on the SiO2 patterned sapphire substrate, a SiNx layer is grown, and the SiNx layer and the SiO2 form a SiO2-SiNx double-layer improved reflection film, which can reduce the total reflection of the light emitted by the LED in the epitaxial layer, and further improve the external quantum efficiency of the LED epitaxy.

[0165] Further, the SiAl x In y The Ga (1-x-y) N buffer layer multilayer is designed, and has the beneficial effect of a stress release layer, can obtain a dense and large coverage thin film, and provides an excellent platform for subsequent growth. On the one hand, the same orientation high-density nucleation center as the SiO2 patterned sapphire substrate is provided, and on the other hand, the interface free energy between the epitaxial layer and the SiO2 patterned sapphire substrate is reduced to promote lateral growth, which can effectively reduce the defect density, and at the same time, plays a role of lattice overmatching, improves the LED crystal quality, and further improves the internal quantum efficiency of the LED.

[0166] Further, the MgO passivation layer is arranged behind the three-dimensional U-shaped GaN layer, and when the patterned tip of the SiO2 patterned sapphire substrate is not covered, the MgO passivation layer is used to passivate the patterned tip, reduce the penetration of threading dislocations, and then improve the leakage performance of the LED epitaxy.

[0167] Based on the above embodiment, another embodiment of the present application further provides a GaN LED structure on a SiO2 patterned sapphire substrate, as shown in the accompanying drawings, the GaN LED structure comprises: Figure 9

[0168] a SiO2 patterned sapphire substrate 10;

[0169] and a SiNx layer 13, at least one SiAl x In y Ga (1-x-y) N buffer layer 14, a three-dimensional U-shaped GaN layer 15, an MgO passivation layer 16, a two-dimensional U-shaped GaN layer 17, an N-type GaN layer 18, a multi-quantum well layer 19 and a P-type GaN layer 20, which are sequentially formed on one side surface of the SiO2 patterned sapphire substrate 10.

[0170] The SiNx layer 13 and the SiO2 layer 12 in the SiO2 patterned sapphire substrate 10 form a SiO2-SiNx double-layer improved reflection film to improve the light extraction efficiency of the GaN LED structure.

[0171] ​The SiO2-SiNx double layer improves the reflector film, and has the advantages that: the LED epitaxial layer has a structure from top to bottom as follows: a P-type GaN layer 20 (refractive index 2.45), a multi-quantum well layer 19 (refractive index 2.49), an N-type GaN layer 18 (refractive index 2.45), a SiO2-SiNx (refractive index 1.47), and a SiO2 patterned sapphire substrate 10 (refractive index 1.78). The GaN / SiO2-SiNx interface can reflect more light into the air than the GaN / sapphire interface. This is because, when the light of the quantum well reaches the bottom GaN / substrate interface, the smaller refractive index of the material corresponds to a smaller total reflection angle, which is more conducive to the reflection of the light back to the top interface to be emitted, thereby improving the light extraction efficiency of the LED device. Therefore, the SiO2-SiNx double layer improves the reflector film and has a higher light extraction efficiency.

[0172] SiAl x In y Ga (1-x-y) The N buffer layer 14 has the advantages that: a dense and large-coverage thin film can be obtained, and an excellent platform is provided for subsequent growth. On the one hand, the same orientation high-density nucleation centers as the substrate are provided, and on the other hand, the interface free energy between the epitaxial layer and the substrate is reduced to promote lateral growth, which can effectively reduce the defect density. The reason is that the GaN lateral growth of the bottom sapphire region of the SiO2 patterned sapphire substrate and the GaN growth of the c-plane region of the sapphire substrate are combined to produce a stacking fault. The formation of the stacking fault hardly causes lattice distortion, and the existence of the stacking fault can effectively inhibit the climbing of the threading dislocation, effectively inhibit and block the upward propagation of the dislocation, effectively reduce the defect density, improve the LED crystal quality, and further improve the internal quantum efficiency of the LED.

[0173] The MgO passivation layer 16 arranged behind the three-dimensional U-shaped GaN layer 15 has the advantages that: when the substrate pattern has not been covered by GaN, the MgO passivation layer 16 is arranged at the tip of the substrate pattern. Since the SiO2 at the tip of the pattern, when GaN is grown, Ga atoms always stay on some vacant Si in the SiO2 matrix, and therefore the proportion of Ga-OH bonds at the SiO2 / GaN interface increases. The Ga-OH bond generates a negative charge, which is an electron trap, and is not conducive to the epitaxial photoelectric performance. The addition of the MgO passivation layer 16 can reduce the formation of Ga-OH bonds, because Mg atoms will preferentially combine with O atoms. The adverse effects of Ga-OH related traps are reduced. At the same time, due to the wide band gap of MgO, the extraction of minority carriers is inhibited under reverse bias, thereby reducing the reverse current and improving the electrical performance.

[0174] In the specification, each embodiment is described in a progressive, or parallel, or progressive and parallel combination manner, and each embodiment focuses on the difference from other embodiments. The same or similar parts of each embodiment can be referred to each other.

[0175] It has to be noted that, in the present document, the terms "first", "second", etc. merely serve to identify a subject or action, without necessarily requiring or implying any actual relationship or order between the subjects or actions, unless explicitly defined otherwise. Furthermore, the terms "comprises", "comprising", or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process or method that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process or method. An element proceeded by "comprises a" does not, without further constraints, exclude the presence of additional identical elements in the process or method.

[0176] The above description of disclosed embodiments provides enabling concepts for practicing or using the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and generic principles defined herein can be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for fabricating a GaN LED structure, characterized in that, The manufacturing method comprises: providing a SiO2 patterned sapphire substrate; On one side surface of the SiO2 patterned sapphire substrate, a SiNx layer, at least one SiAl x In y Ga (1-x-y) N buffer layer, a three-dimensional U-shaped GaN layer, a MgO passivation layer, a two-dimensional U-shaped GaN layer, an N-type GaN layer, a multi-quantum well layer, and a P-type GaN layer; wherein the SiNx layer and the SiO2 in the SiO2 patterned sapphire substrate form a SiO2-SiNx double-layer improved reflection film to improve the light extraction efficiency of the GaN LED structure; wherein the method for growing the three-dimensional U-shaped GaN layer comprises: TMGa, NH3, H2, N2are introduced, and the temperature is set to 1100 degrees Celsius, and a three-dimensional U-shaped GaN layer having a thickness of 1000-3000 nm is formed on the side surface of the SiAl x In y Ga (1-x-y) N buffer layer facing the side surface of the SiNx layer the method for growing the two-dimensional U-shaped GaN layer comprises: passing TMGa, NH3, H2, N2, and setting the temperature to 1000-1160 degrees Celsius to generate a two-dimensional U-shaped GaN layer with a thickness of 900-1100 nm on the side surface of the MgO passivation layer away from the three-dimensional U-shaped GaN layer; wherein the passing amount of Mg is 50-300 sccm, and the time is 5-60 s.

2. The method of manufacturing according to claim 1, wherein, the method for growing the SiNx layer comprises: passing SiH4, NH3, H2, and N2, and setting the temperature to 500-900 degrees Celsius to generate a SiNx layer with a thickness of 5-40 nm on the side surface of the SiO2 patterned sapphire substrate; wherein the gas flow ratio of NH3 and SiH4 is 5:1-20:

1.

3. The method of making of claim 1, wherein, growing the SiAl x In y Ga (1-x-y) N buffer layer comprises: SiH4, NH3, H2, N2, TMGa, TMIn, TMAl are introduced, temperature is set to 500-1000 degrees Celsius, at least one layer of SiAl is generated on the side surface of the SiNx layer away from the SiO2 patterned sapphire substrate x In y Ga (1-x-y) N buffer layer, wherein x, y are not constant values, synchronously change from large to small, x*y≠0, the thickness is 10-100 nm; the concentration of Si is 5E17-5E18 per cm3, the components of Al, In are 0.005-0.

2.

4. The method of making of claim 1, wherein, the method for growing the MgO passivation layer comprises: CP2Mg, NH3, H2, N2, or TMGa, CP2Mg, NH3, H2, N2, and the temperature is set to 1000 to 1160 degrees Celsius, and a MgO passivation layer is generated on the side surface of the three-dimensional U-shaped GaN layer facing away from the SiAl x In y Ga (1-x-y) N buffer layer.

5. The method of making of claim 1, wherein, the method for growing the N-type GaN layer comprises: Passing TMGa, SiH4, NH3, H2, N2, temperature setting is 1000~1100 degrees Celsius, the thickness of the N-type GaN layer is 1800~2500nm on the surface of the two-dimensional U-shaped GaN layer away from the MgO passivation layer; wherein the concentration of SiH4 is 9E18 / cm 3 .

6. The method of making of claim 1, wherein, the method for growing the multi-quantum well layer comprises: passing TEGa, TMIn, NH3, H2, N2, and setting the temperature to 700-900 degrees Celsius to generate a multi-quantum well layer with a thickness of 100-150 nm on the side surface of the N-type GaN layer away from the two-dimensional U-shaped GaN layer; wherein the temperature of the well is 780 degrees Celsius, and the temperature of the barrier is 870 degrees Celsius.

7. The method of making of claim 1, wherein, the method for growing the P-type GaN layer comprises: Pass in TMGa, CP2Mg, NH3, H2, N2, temperature setting is 900~1000 degrees Celsius, the multi-quantum well layer is generated on the side surface of the N type GaN layer away from the P type GaN layer, and the thickness is 200~500nm; wherein, the concentration of Mg is 2.5E19 / cm 3 .

8. A GaN LED structure, characterized by, the GaN LED structure comprises: a SiO2 patterned sapphire substrate; and, a SiNx layer, at least one SiAl layer, and a SiO2 layer formed in sequence on one side surface of the patterned sapphire substrate x In y Ga (1-x-y) N buffer layer, a three-dimensional U-shaped GaN layer, a MgO passivation layer, a two-dimensional U-shaped GaN layer, an N-type GaN layer, a multi-quantum well layer, and a P-type GaN layer wherein the SiNx layer and the SiO2 in the SiO2 patterned sapphire substrate form a SiO2-SiNx double-layer improved reflection film to improve the light extraction efficiency of the GaN LED structure; TMGa, NH3, H2, N2 are passed in the three-dimensional U-shaped GaN layer, and the thickness is 1000-3000 nm; TMGa, NH3, H2, N2 are passed in the two-dimensional U-shaped GaN layer, and the thickness is 900-1100 nm.

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