LED chip and preparation method thereof

CN115000268BActive Publication Date: 2026-08-21XIAMEN CHANGELIGHT CO LTD
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Patent Information

Application Number
CN202210623876.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-06-02
Publication Date
2026-08-21
Estimated Expiration
2042-06-02

AI Technical Summary

Technical Problem

[0005]本发明的目的在于提供一种LED芯片及其制备方法,以解决LED芯片倒装焊接空洞过大的问题

Benefits of technology

[0040]经由上述的技术方案可知,本发明提供的LED芯片及其制备方法,通过在外延叠层表面设置绝缘反射层,且所述绝缘反射层具有分别与所述凹槽裸露部和台面裸露部所对应的通孔;同时,在所述通孔内分别设有金属填充层;第一电极,其通过所述通孔层叠于所述凹槽的裸露部所对应的金属填充层表面,并向上延伸至所述绝缘反射层的表面;第二电极,其通过所述通孔层叠于所述台面的裸露部所对应的金属填充层表面,并向上延伸至所述绝缘反射层的表面。从而,通过填孔金属层的设置可以实现绝缘反射层开孔的填平,减少了因绝缘反射层开孔所导致的表面高度差以及由此产生的空洞,进而解决因其导致的应力失配、热量聚集及电流分布不均匀的技术问题。

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Abstract

The application provides an LED chip and a preparation method thereof. An insulating reflection layer is arranged on an epitaxial stack surface, and the insulating reflection layer has through holes corresponding to exposed parts of a groove and a mesa respectively; meanwhile, metal filling layers are arranged in the through holes respectively; a first electrode is laminated on a surface of the metal filling layer corresponding to the exposed part of the groove through the through hole, and extends upward to a surface of the insulating reflection layer; and a second electrode is laminated on a surface of the metal filling layer corresponding to the exposed part of the mesa through the through hole, and extends upward to the surface of the insulating reflection layer. Thus, the filling of the metal filling layer can realize the filling of the opening of the insulating reflection layer, reduce the surface height difference caused by the opening of the insulating reflection layer and the cavity caused thereby, and further solve the technical problems of stress mismatch, heat accumulation and uneven current distribution caused thereby.
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Description

Technical Field

[0001] This invention relates to the field of light-emitting diodes, and more particularly to an LED chip and its fabrication method. Background Technology

[0002] With the rapid development of LED technology and the gradual improvement of LED luminous efficacy, LED applications are becoming increasingly widespread, and people are paying more and more attention to the development prospects of LEDs in displays. The LED chip, as the core component of an LED lamp, functions to convert electrical energy into light energy. Specifically, it includes an epitaxial wafer and N-type and P-type electrodes respectively disposed on the epitaxial wafer. The epitaxial wafer includes a P-type semiconductor layer, an N-type semiconductor layer, and an active layer located between the N-type and P-type semiconductor layers. When current flows through the LED chip, holes in the P-type semiconductor and electrons in the N-type semiconductor move towards the active layer and recombine there, causing the LED chip to emit light.

[0003] During product testing, the inventors discovered that mainstream Mini LED chips on the market currently exhibit multiple steps due to height differences in the fabrication of structures such as extended electrodes and reflectors. Figure 1 As shown, this results in an uneven electrode surface across the entire chip, making it prone to voids at the interface during die bonding. These voids can lead to stress mismatch, heat accumulation, and uneven current distribution, ultimately causing the functional layer and the entire chip to fail.

[0004] In view of this, in order to overcome the above-mentioned defects of existing LED chips, the inventor has specially designed an LED chip and its preparation method, which leads to this invention. Summary of the Invention

[0005] The purpose of this invention is to provide an LED chip and its fabrication method to solve the problem of excessively large voids in LED chip flip-chip bonding.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] An LED chip, comprising:

[0008] Substrate;

[0009] An epitaxial stack disposed on the surface of the substrate includes at least a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along a first direction, and a local area of ​​the epitaxial stack is etched to a portion of the first type semiconductor layer to form a groove and a mesa; the first direction is perpendicular to the substrate and extends from the substrate to the epitaxial stack.

[0010] An insulating reflective layer is disposed on the surface of the epitaxial stack and has through holes that expose a portion of the surface of the groove and the mesa; at the same time, a metal filling layer is disposed in each of the through holes.

[0011] The first electrode is stacked on the surface of the metal filling layer corresponding to the exposed portion of the groove through the through hole, and extends upward to the surface of the insulating reflective layer;

[0012] The second electrode is stacked on the surface of the metal filling layer corresponding to the exposed portion of the platform through the through-hole, and extends upward to the surface of the insulating reflective layer.

[0013] Preferably, the insulating reflective layer and the metal filling layer are obtained through a single photolithography process, specifically including:

[0014] An insulating reflective layer is deposited on the surface of the epitaxial stack, and a photoresist pattern is formed on the surface of the insulating reflective layer. Using the photoresist pattern as a mask, through holes are etched in the corresponding groove exposed portion and mesa exposed portion of the insulating reflective layer, and the photoresist on the surface of the insulating reflective layer is retained.

[0015] After depositing a metal layer on the surface of the insulating reflective layer, the metal layer at the non-through-hole area is peeled off using a descaling process, so that the metal filling layer is formed inside the through-hole.

[0016] Preferably, an insulating layer is further provided between the epitaxial stack and the insulating reflective layer, the insulating layer comprising a first insulating layer and a second insulating layer that are independently formed and mutually support each other, specifically including:

[0017] The first insulating layer is disposed on the sidewall of the groove;

[0018] The second insulating layer covers the epitaxial stack, and one through hole penetrates the insulating reflective layer, the second insulating layer and the first insulating layer to form the groove exposed portion, and another through hole penetrates the insulating reflective layer and the second insulating layer located on the platform to form the platform exposed portion.

[0019] Preferably, the thickness of the metal filler layer is equal to the thickness of the insulating reflective layer.

[0020] Preferably, an extended electrode is provided on the platform and / or the bottom surface of the groove, and the extended electrode includes one or more of chromium, nickel, aluminum, titanium, platinum, gold, palladium and silver.

[0021] Preferably, a current spreading layer is provided on the platform, and the metal filling layer is in contact with the current spreading layer.

[0022] Preferably, a current spreading layer is provided on the platform, and the spreading electrode is stacked on the surface of the current spreading layer.

[0023] Preferably, the current spreading layer includes one or more of ITO, IZO, IGO, and ZnO.

[0024] Preferably, the insulating reflective layer includes a DBR reflective layer.

[0025] Preferably, the first electrode and the second electrode are each composed of one or more stacks of chromium, nickel, aluminum, titanium, platinum, gold, palladium, silver, and gold-tin alloy.

[0026] Preferably, the epitaxial stack has at least one substrate exposed portion, wherein the insulating layer is stacked on the substrate in such a way that it is held in the substrate exposed portion.

[0027] Preferably, the exposed substrate surrounds the periphery of the epitaxial stack; the insulating layer is stacked on the substrate in such a way that it is held in the exposed substrate and surrounds the periphery of the epitaxial stack.

[0028] The present invention also provides a method for preparing an LED chip, the method comprising the following steps:

[0029] Step S01: Provide a substrate; and grow an epitaxial stack on the surface of the substrate, the epitaxial stack including a first type semiconductor layer, an active region and a second type semiconductor layer stacked sequentially along a first direction, the first direction being perpendicular to the substrate and pointing from the substrate to the epitaxial stack;

[0030] Step S02: Etch a local area of ​​the epitaxial stack to a portion of the first type semiconductor layer to form a groove and a mesa;

[0031] Step S03: Deposit to form a first insulating layer, the first insulating layer filling the groove;

[0032] Step S04: Deeply etch the edges of the epitaxial stack to form exposed substrate portions;

[0033] Step S05: Fabricate a current spreading layer on the surface of the platform;

[0034] Step S06: Deposit a second insulating layer, the second insulating layer covering the epitaxial stack in a manner that is held in the exposed portion of the substrate; and etch the second insulating layer and the first insulating layer by photolithography to expose the bottom surface of the groove and a portion of the surface of the current spreading layer;

[0035] Step S07: Fabricate extended electrodes in the exposed portion of the groove and the exposed portion of the current spreading layer, respectively;

[0036] Step S08: Deposit the insulating reflective layer on the surface of the epitaxial stack, and form a photoresist pattern on the surface of the insulating reflective layer. Using the photoresist pattern as a mask, etch through holes in the corresponding groove exposed portion and mesa exposed portion of the insulating reflective layer, and retain the photoresist on the surface of the insulating reflective layer.

[0037] Step S09: After depositing a metal layer on the surface of the insulating reflective layer, the metal layer at the non-through hole is peeled off using a descaling process, so that a metal filling layer is formed inside the through hole.

[0038] Step S10: Fabricate a first electrode and a second electrode. The first electrode is stacked on the exposed portion of the groove through a through-hole and extends upward to the surface of the insulating reflective layer. The second electrode is stacked on the exposed portion of the platform through a through-hole and extends upward to the surface of the insulating reflective layer.

[0039] Preferably, the thickness of the metal filler layer is equal to the thickness of the insulating reflective layer.

[0040] As can be seen from the above technical solution, the LED chip and its fabrication method provided by the present invention, by setting an insulating reflective layer on the surface of the epitaxial laminate, wherein the insulating reflective layer has through holes corresponding to the exposed portion of the groove and the exposed portion of the mesa respectively; simultaneously, a metal filling layer is provided in each of the through holes; a first electrode is stacked on the surface of the metal filling layer corresponding to the exposed portion of the groove through the through holes and extends upward to the surface of the insulating reflective layer; a second electrode is stacked on the surface of the metal filling layer corresponding to the exposed portion of the mesa through the through holes and extends upward to the surface of the insulating reflective layer. Therefore, by setting the through-hole filling metal layer, the openings in the insulating reflective layer can be filled, reducing the surface height difference and voids caused by the openings in the insulating reflective layer, thereby solving the technical problems of stress mismatch, heat accumulation, and uneven current distribution caused by these openings.

[0041] Secondly, the insulating reflective layer and the metal filling layer are obtained through a single photolithography process, specifically including: depositing the insulating reflective layer on the surface of the epitaxial stack, forming a photoresist pattern on the surface of the insulating reflective layer, etching through-holes in the corresponding groove exposed portions and mesa exposed portions of the insulating reflective layer using the photoresist pattern as a mask, and retaining the photoresist on the surface of the insulating reflective layer; after depositing a metal layer on the surface of the insulating reflective layer, peeling off the metal layer in the non-through-hole areas using a photoresist stripping process, so that the metal filling layer is formed in the through-hole. This eliminates the need for additional photolithography steps, utilizing the remaining photoresist from etching to create the metal filling layer in the through-hole, resulting in a simple process with high mass production capability.

[0042] Then, an insulating layer is provided between the epitaxial stack and the insulating reflective layer. This insulating layer includes a first insulating layer and a second insulating layer, which are independently formed and interconnected. Specifically, the first insulating layer is disposed on the sidewall of the groove; the second insulating layer covers the epitaxial stack, and one through-hole penetrates the insulating reflective layer, the second insulating layer, and the first insulating layer to form the exposed portion of the groove, and another through-hole penetrates the insulating reflective layer and the second insulating layer located on the mesa to form the exposed portion of the mesa. Thus, the first insulating layer can fill the groove, and the second insulating layer can cover the extended electrode, reducing the height difference caused by it. This further solves the problem of voids caused by height differences and better avoids technical problems such as stress mismatch, heat accumulation, and uneven current distribution. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0044] Figure 1 This is a top view of a Mini LED chip in the prior art;

[0045] Figure 2 This is a schematic diagram of the structure of the LED chip provided in an embodiment of the present invention;

[0046] Figures 3.1A to 3.10A This is a schematic diagram of the structure corresponding to the steps of the LED chip fabrication method provided in the embodiments of the present invention;

[0047] Figures 3.1B to 3.10B This is a top view schematic diagram corresponding to the steps of the LED chip fabrication method provided in the embodiments of the present invention;

[0048] Symbol explanations in the figure: 1. Substrate, 1.1. Exposed substrate, 2. Type I semiconductor layer, 3. Active region, 4. Type II semiconductor layer, 5. Mesa, 6. Groove, 7. First insulating layer, 8. Current spreading layer, 9. Second insulating layer, 10. Extended electrode, 11. Insulating reflective layer, 11.1. Through hole, 12. Photoresist, 13. Metal filling layer, 14. First electrode, 15. Second electrode. Detailed Implementation

[0049] To make the content of this invention clearer, the following description, in conjunction with the accompanying drawings, further illustrates the invention. This invention is not limited to this specific embodiment. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.

[0050] like Figure 2 As shown, an LED chip includes:

[0051] Substrate 1;

[0052] An epitaxial stack is disposed on the surface of the substrate 1. The epitaxial stack includes at least a first type semiconductor layer 2, an active region 3, and a second type semiconductor layer 4 stacked sequentially along a first direction. A local area of ​​the epitaxial stack is etched to a portion of the first type semiconductor layer 2 to form a groove 6 and a mesa 5. The first direction is perpendicular to the substrate 1 and points from the substrate 1 to the epitaxial stack.

[0053] An insulating reflective layer 11 is disposed on the surface of the epitaxial stack and has through holes 11.1 that expose a portion of the surface of the groove 6 and the platform 5; at the same time, a metal filling layer 13 is provided in each of the through holes 11.1.

[0054] The first electrode 14 is stacked on the surface of the metal filling layer 13 corresponding to the exposed portion of the groove 6 through the through hole 11.1, and extends upward to the surface of the insulating reflective layer 11;

[0055] The second electrode 15 is stacked on the surface of the metal filling layer 13 corresponding to the exposed portion of the platform 5 through the through hole 11.1, and extends upward to the surface of the insulating reflective layer 11.

[0056] It is worth mentioning that the type of substrate 1 is not limited in the LED chip of this embodiment. For example, substrate 1 can be, but is not limited to, sapphire substrate 1, silicon substrate 1, etc. In addition, the types of the epitaxial stacked first type semiconductor layer 2, active region 3 and second type semiconductor layer 4 are also not limited in the LED chip of this embodiment. For example, the first type semiconductor layer 2 can be, but is not limited to, a gallium nitride layer, and correspondingly, the second type semiconductor layer 4 can be, but is not limited to, a gallium nitride layer.

[0057] In this embodiment of the invention, the insulating reflective layer 11 and the metal filling layer 13 are obtained through a single photolithography process, specifically including:

[0058] An insulating reflective layer 11 is deposited on the surface of the epitaxial stack, and a photoresist pattern is formed on the surface of the insulating reflective layer 11. Using the photoresist pattern as a mask, through holes 11.1 are etched on the exposed portions of the corresponding grooves 6 and mesa 5 of the insulating reflective layer 11, respectively, and the photoresist 12 on the surface of the insulating reflective layer 11 is retained.

[0059] After depositing a metal layer on the surface of the insulating reflective layer 11, the metal layer at the non-through hole 11.1 is peeled off using a desmearing process, so that the metal filling layer 13 is formed inside the through hole 11.1.

[0060] In this embodiment of the invention, an insulating layer is further provided between the epitaxial stack and the insulating reflective layer 11. The insulating layer includes a first insulating layer 7 and a second insulating layer 9 that are independently formed and mutually support each other, specifically including:

[0061] The first insulating layer 7 is disposed on the sidewall of the groove 6;

[0062] The second insulating layer 9 covers the epitaxial stack, and one through hole penetrates the insulating reflective layer 11, the second insulating layer 9 and the first insulating layer 7 to form the exposed portion of the groove, and another through hole penetrates the insulating reflective layer 11 and the second insulating layer 9 located on the table surface to form the exposed portion of the table surface.

[0063] It is worth mentioning that the material of the insulating layer can be, but is not limited to, SiO2 (silicon dioxide).

[0064] In this embodiment of the invention, the thickness of the metal filling layer 13 is equal to the thickness of the insulating reflective layer 11.

[0065] In this embodiment of the invention, an extension electrode 10 is provided on the bottom surface of the platform 5 and / or the groove 6. The extension electrode 10 includes one or more of chromium, nickel, aluminum, titanium, platinum, gold, palladium and silver.

[0066] In this embodiment of the invention, a current spreading layer 8 is provided on the platform 5, and the metal filling layer 13 is in contact with the current spreading layer 8.

[0067] In this embodiment of the invention, a current spreading layer 8 is provided on the platform 5, and the spreading electrode 10 is stacked on the surface of the current spreading layer 8.

[0068] In this embodiment of the invention, the current spreading layer 8 includes one or more of ITO, IZO, IGO, and ZnO.

[0069] In this embodiment of the invention, the insulating reflective layer 11 includes a DBR reflective layer.

[0070] In this embodiment of the invention, the first electrode 14 and the second electrode 15 are respectively composed of one or more stacks of chromium, nickel, aluminum, titanium, platinum, gold, palladium, silver, and gold-tin alloy.

[0071] In this embodiment of the invention, the epitaxial stack has at least one substrate exposed portion 1.1, wherein the insulating layer is stacked on the substrate 1 in such a way that it is held in the substrate exposed portion 1.1.

[0072] In this embodiment of the invention, the exposed substrate portion 1.1 surrounds the periphery of the epitaxial stack; the insulating layer is stacked on the substrate 1 in such a way that it is held in the exposed substrate portion 1.1 and surrounds the periphery of the epitaxial stack.

[0073] This invention also provides a method for fabricating an LED chip, the method comprising the following steps:

[0074] Step S01, as follows Figure 3.1A and Figure 3.1B As shown: A substrate 1 is provided; and an epitaxial stack is grown on the surface of the substrate 1. The epitaxial stack includes a first type semiconductor layer 2, an active region 3 and a second type semiconductor layer 4 stacked sequentially along a first direction. The first direction is perpendicular to the substrate 1 and points from the substrate 1 to the epitaxial stack.

[0075] Step S02, as follows Figure 3.2A and Figure 3.2B As shown: A local area of ​​the epitaxial stack is etched to a portion of the first type semiconductor layer 2 to form a groove 6 and a mesa 5;

[0076] Step S03, as follows Figure 3.3A and Figure 3.3B As shown: A first insulating layer 7 is deposited to form the groove 6;

[0077] Step S04, as Figure 3.4A and Figure 3.4B As shown: The edges of the epitaxial stack are deeply etched to form a substrate exposed portion 1.1;

[0078] Step S05, as follows Figure 3.5A and Figure 3.5B As shown: A current spreading layer 8 is formed on the surface of the platform 5;

[0079] Step S06, as follows Figure 3.6A and Figure 3.6B As shown: a second insulating layer 9 is deposited, which covers the epitaxial stack in such a way that it is held in the exposed portion 1.1 of the substrate; and the second insulating layer 9 and the first insulating layer 7 are etched by photolithography to expose the bottom surface of the groove 6 and part of the surface of the current spreading layer 8.

[0080] Step S07, as follows Figure 3.7A and Figure 3.7B As shown: Extended electrodes 10 are fabricated in the exposed portion of the groove 6 and the exposed portion of the current extension layer 8, respectively;

[0081] Step S08, as follows Figure 3.8A and Figure 3.8B As shown: The insulating reflective layer 11 is deposited on the surface of the epitaxial stack, and a photoresist pattern is formed on the surface of the insulating reflective layer 11. After etching through holes 11.1 on the exposed parts of the groove 6 and the exposed parts of the mesa 5 of the insulating reflective layer 11, the photoresist 12 on the surface of the insulating reflective layer 11 is retained.

[0082] Step S09, as follows Figure 3.9A and Figure 3.9B As shown: After depositing a metal layer on the surface of the insulating reflective layer 11, the metal layer at the non-through hole 11.1 is peeled off using a descaling process, so that a metal filling layer 13 is formed inside the through hole 11.1;

[0083] Step S10, as follows Figure 3.10A and Figure 3.10B As shown: A first electrode 14 and a second electrode 15 are fabricated. The first electrode 14 is stacked on the exposed portion of the groove 6 through a through hole 11.1 and extends upward to the surface of the insulating reflective layer 11. The second electrode 15 is stacked on the exposed portion of the platform 5 through a through hole 11.1 and extends upward to the surface of the insulating reflective layer 11.

[0084] In this embodiment of the invention, the thickness of the metal filling layer 13 is equal to the thickness of the insulating reflective layer 11.

[0085] As can be seen from the above technical solution, the LED chip and its fabrication method provided by the present invention, by setting an insulating reflective layer 11 on the surface of the epitaxial laminate, wherein the insulating reflective layer 11 has through holes 11.1 corresponding to the exposed portions of the groove 6 and the exposed portions of the mesa 5 respectively; simultaneously, a metal filling layer 13 is provided in each of the through holes 11.1; a first electrode 14 is stacked on the surface of the metal filling layer 13 corresponding to the exposed portion of the groove 6 through the through holes 11.1 and extends upward to the surface of the insulating reflective layer 11; a second electrode 15 is stacked on the surface of the metal filling layer 13 corresponding to the exposed portion of the mesa 5 through the through holes 11.1 and extends upward to the surface of the insulating reflective layer 11. Thus, by setting the through-hole filling metal layer, the openings of the insulating reflective layer 11 can be filled, reducing the surface height difference caused by the openings of the insulating reflective layer 11 and the voids generated therefrom, thereby solving the technical problems of stress mismatch, heat accumulation and uneven current distribution caused by it.

[0086] Secondly, the insulating reflective layer 11 and the metal filling layer 13 are obtained through a single photolithography process, specifically including: depositing the insulating reflective layer 11 on the surface of the epitaxial stack, forming a photoresist pattern on the surface of the insulating reflective layer 11, using the photoresist pattern as a mask to etch through-holes 11.1 at the exposed portions of the corresponding grooves 6 and mesa 5 of the insulating reflective layer 11, and retaining the photoresist 12 on the surface of the insulating reflective layer 11; after depositing a metal layer on the surface of the insulating reflective layer 11, using a photoresist stripping process to remove the metal layer at locations other than the through-holes 11.1, so that the metal filling layer 13 is formed inside the through-holes 11.1. This eliminates the need for additional photolithography steps, utilizing the remaining photoresist 12 from etching to fabricate the metal filling layer 13 in the through-holes 11.1, resulting in a simple process with high mass production capability.

[0087] Then, an insulating layer is provided between the epitaxial stack and the insulating reflective layer 11. This insulating layer includes a first insulating layer 7 and a second insulating layer 9, which are independently formed and interconnected. Specifically, the first insulating layer 7 is disposed on the sidewall of the groove 6; the second insulating layer 9 covers the epitaxial stack, and one through-hole penetrates the insulating reflective layer 11, the second insulating layer 9, and the first insulating layer 7 to form the exposed portion of the groove, while another through-hole penetrates the insulating reflective layer 11 and the second insulating layer 9 located on the platform to form the exposed portion of the platform. Thus, the first insulating layer 7 can fill the groove 6, and the second insulating layer 9 can cover the extended electrode 10, reducing the height difference caused by it. This further solves the problem of voids caused by height differences and better avoids technical problems such as stress mismatch, heat accumulation, and uneven current distribution.

[0088] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0089] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0090] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, characterized in that, include: Substrate; An epitaxial stack disposed on the surface of the substrate includes at least a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along a first direction, and a local area of ​​the epitaxial stack is etched to a portion of the first type semiconductor layer to form a groove and a mesa; the first direction is perpendicular to the substrate and extends from the substrate to the epitaxial stack. An insulating reflective layer is disposed on the surface of the epitaxial stack and has through holes that expose a portion of the surface of the groove and the mesa; at the same time, a metal filling layer is disposed in each of the through holes. The first electrode is stacked on the surface of the metal filling layer corresponding to the exposed portion of the groove through the through hole, and extends upward to the surface of the insulating reflective layer; The second electrode is stacked on the surface of the metal filling layer corresponding to the exposed portion of the platform through the through hole, and extends upward to the surface of the insulating reflective layer; The insulating reflective layer and the metal filling layer are obtained through a single photolithography process, specifically including: An insulating reflective layer is deposited on the surface of the epitaxial stack, and a photoresist pattern is formed on the surface of the insulating reflective layer. Using the photoresist pattern as a mask, through holes are etched in the corresponding groove exposed portion and mesa exposed portion of the insulating reflective layer, and the photoresist on the surface of the insulating reflective layer is retained. After depositing a metal layer on the surface of the insulating reflective layer, the metal layer at the non-through-hole area is peeled off using a descaling process, so that the metal filling layer is formed inside the through-hole. An extended electrode is provided on the platform and / or the bottom surface of the groove, and the metal filling layer respectively forms contact with the extended electrode corresponding to the through hole.

2. The LED chip according to claim 1, characterized in that, An insulating layer is further provided between the epitaxial stack and the insulating reflective layer. The insulating layer includes a first insulating layer and a second insulating layer that are independently formed and mutually support each other, specifically including: The first insulating layer is disposed on the sidewall of the groove; The second insulating layer covers the epitaxial stack, and a through hole penetrates the insulating reflective layer, the second insulating layer and the first insulating layer to form the exposed portion of the groove, and another through hole penetrates the insulating reflective layer and the second insulating layer located on the platform to form the exposed portion of the platform.

3. The LED chip according to claim 1, characterized in that, The thickness of the metal filler layer is the same as the thickness of the insulating reflective layer.

4. The LED chip according to claim 2, characterized in that, The extended electrode includes one or more of the following: chromium, nickel, aluminum, titanium, platinum, gold, palladium, and silver.

5. The LED chip according to claim 1, characterized in that, A current spreading layer is provided on the platform, and the metal filling layer is in contact with the current spreading layer.

6. The LED chip according to claim 4, characterized in that, A current spreading layer is provided on the platform, and the spreading electrode is stacked on the surface of the current spreading layer.

7. The LED chip according to claim 5 or 6, characterized in that, The current spreading layer includes one or more of ITO, IZO, IGO, and ZnO.

8. The LED chip according to claim 1, characterized in that, The insulating reflective layer includes a DBR reflective layer.

9. The LED chip according to claim 1, characterized in that, The first electrode and the second electrode are respectively composed of one or more stacks of chromium, nickel, aluminum, titanium, platinum, gold, palladium, silver, and gold-tin alloy.

10. The LED chip according to claim 2, characterized in that, The epitaxial stack has at least one substrate exposed portion, wherein the insulating layer is stacked on the substrate in such a way that it is held in the substrate exposed portion.

11. The LED chip according to claim 10, characterized in that, The exposed substrate surrounds the periphery of the epitaxial stack; the insulating layer is stacked on the substrate in such a way that it is held in the exposed substrate and surrounds the periphery of the epitaxial stack.

12. A method for fabricating an LED chip, characterized in that, The preparation method includes the following steps: Step S01: Provide a substrate; and grow an epitaxial stack on the surface of the substrate, the epitaxial stack including a first type semiconductor layer, an active region and a second type semiconductor layer stacked sequentially along a first direction, the first direction being perpendicular to the substrate and pointing from the substrate to the epitaxial stack; Step S02: Etch a local area of ​​the epitaxial stack to a portion of the first type semiconductor layer to form a groove and a mesa; Step S03: Deposit to form a first insulating layer, the first insulating layer filling the groove; Step S04: Deeply etch the edges of the epitaxial stack to form exposed substrate portions; Step S05: Fabricate a current spreading layer on the surface of the platform; Step S06: Deposit a second insulating layer, the second insulating layer covering the epitaxial stack in a manner that is held in the exposed portion of the substrate; and etch the second insulating layer and the first insulating layer by photolithography to expose the bottom surface of the groove and a portion of the surface of the current spreading layer; Step S07: Fabricate extended electrodes in the exposed portion of the groove and the exposed portion of the current spreading layer, respectively; Step S08: An insulating reflective layer is deposited on the surface of the epitaxial stack, and a photoresist pattern is formed on the surface of the insulating reflective layer. Using the photoresist pattern as a mask, through holes are etched on the exposed parts of the corresponding grooves and exposed parts of the mesa of the insulating reflective layer, and the photoresist on the surface of the insulating reflective layer is retained. Step S09: After depositing a metal layer on the surface of the insulating reflective layer, the metal layer at the non-through hole is peeled off using a descaling process, so that a metal filling layer is formed inside the through hole. Step S10: Fabricate a first electrode and a second electrode. The first electrode is stacked on the exposed portion of the groove through a through-hole and extends upward to the surface of the insulating reflective layer. The second electrode is stacked on the exposed portion of the platform through a through-hole and extends upward to the surface of the insulating reflective layer.

13. The method for preparing an LED chip according to claim 12, characterized in that, The thickness of the metal filler layer is the same as the thickness of the insulating reflective layer.

Citation Information

Patent Citations

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    CN111081832A