Sine-cosine encoder subdivision output method and system based on angle interpolation
By performing high-resolution interpolation on the demodulated angle of the sine and cosine encoder and comparing it with a threshold, the problems of low subdivision multiple and signal interference in the existing technology are solved, achieving a higher subdivision multiple and a higher input signal frequency, thus improving the angle detection accuracy.
Patent Information
- Application Number
- CN202210633270.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-06-07
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2042-06-07
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Figure CN115001345B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of encoder demodulation technology, and in particular to a sine-cosine encoder subdivision output method and system based on angle interpolation. BACKGROUND
[0002] With the continuous improvement of the performance requirements of high-precision equipment on servo systems, the requirement for the position measurement accuracy of motor shafts is also getting higher and higher. The selection of high-resolution encoders brings an increase in the cost and size of the equipment, and the use of sine-cosine encoders and the output of signals for subdivision demodulation is a low-cost solution to achieve high-precision angle detection. In order to facilitate the interface with motion control cards, signal acquisition cards and other devices, the demodulated angle needs to be processed into the quadrature pulses of the equivalent incremental encoder. The quadrature pulse output of the traditional equivalent encoder is obtained by comparing the demodulated angle with a set threshold, but when the subdivision multiple is large, the output pulse will be lost.
[0003] The existing methods for subdividing the quadrature pulse output of the sine-cosine encoder include the hardware circuit comparison method and the software demodulation method. The hardware circuit comparison method has the problems of low subdivision multiple, signal disturbance and easy generation of pulse edge jitter; the software demodulation method generates equivalent incremental encoder quadrature pulses by comparing the demodulated discrete angle value with a set threshold, but the subdivision multiple is limited by the sampling frequency. SUMMARY
[0004] The present application aims to at least partially solve one of the problems in the related art.
[0005] To this end, the first object of the present application is to propose a sine-cosine encoder subdivision output method based on angle interpolation, which makes the subdivision multiple of the output equivalent incremental encoder quadrature pulses not subject to the sampling frequency, and realizes a higher subdivision multiple under the same frequency input signal, and increases the upper limit frequency of the input signal under the same subdivision multiple requirement.
[0006] The second object of the present application is to propose a sine-cosine encoder subdivision output system based on angle interpolation.
[0007] The third object of the present application is to propose a sine-cosine encoder subdivision quadrature pulse output device.
[0008] The fourth object of the present application is to propose a non-transitory computer readable storage medium.
[0009] To achieve the above objectives, a first aspect of the present invention proposes a sine and cosine encoder subdivision output method based on angle interpolation, comprising the following steps: Step S1, amplifying the 1Vpp sine and cosine signals output by the sine and cosine encoder; Step S2, inputting the amplified 1Vpp sine and cosine signals into a dual-channel AD converter to obtain sampled values; Step S3, inputting the sampled values into an FPGA to use the CORDIC algorithm to obtain the arctangent values of the two signals, obtain discrete angle values, and demodulate them; Step S4, performing high-resolution interpolation calculation on the demodulated discrete angle values, and then comparing them with a preset threshold to obtain quadrature pulse output.
[0010] The sine and cosine encoder subdivision output method based on angle interpolation in this invention performs linear interpolation on the demodulation angle of the sine and cosine encoder, and then compares the interpolated angle with a set threshold to achieve high-resolution equivalent incremental encoder output. This makes the subdivision factor of the output equivalent incremental encoder quadrature pulse not limited by the sampling frequency, achieving a higher subdivision factor under the same input signal frequency, and increasing the upper limit frequency of the input signal under the same subdivision factor requirement.
[0011] In addition, the sine and cosine encoder subdivision output method based on angle interpolation according to the above embodiments of the present invention may also have the following additional technical features:
[0012] Furthermore, in one embodiment of the present invention, the specific steps for solving the discrete angle values in step S3 are as follows:
[0013] Step S301: In the rectangular coordinate system formed by the horizontal and vertical axes, the coordinates are (x... A ,y A Point A is rotated counterclockwise by an angle α around the origin O to obtain coordinates (x). B ,y B Point B of ) is specifically:
[0014]
[0015] Step S302: If the angle value of any point is to be obtained from its coordinates, that is, to obtain the angle θ between the point and the positive x-axis, it is only necessary to rotate the point n times to the positive x-axis.
[0016] Step S303, assume the angle of the i-th rotation is θ i Then the expression for the i-th rotation is:
[0017]
[0018] Let tanθ = 2 -i Then the angle θ of the i-th rotation i =arctan(2-i To ensure that the sum of the cumulative rotation angles approaches the desired angle infinitely, even if y approaches 0, the rotation direction needs to be changed when y changes sign. This yields the iterative formula for the arctangent in the CORDIC algorithm:
[0019]
[0020] In the formula, d i =±1 serves as the decision factor to determine the rotation direction, and its value depends on the y obtained after the previous iteration. i The sign of the value, when y i When d > 0, then i =-1, iterate clockwise; otherwise, d i =1, iterating counterclockwise, thus obtaining the angle demodulated using the arctangent method:
[0021]
[0022] Furthermore, in one embodiment of the present invention, the specific steps of performing high-resolution interpolation calculations on the demodulated discrete angle values in step S4 are as follows:
[0023] Step S401: N angle estimates are uniformly inserted between two adjacent discrete angle values to obtain the angle interpolation θ. est (i), specifically:
[0024]
[0025] In the formula, θ1 and θ2 are the calculated values of two adjacent angles. T clk T is the system clock cycle of the FPGA chip. s The period for signal sampling and angle calculation;
[0026] Step S402, compare the angle interpolation with a preset threshold to obtain the orthogonal pulse output, specifically:
[0027]
[0028] Where A and B are the output pulse signals, 1 represents high level and 0 represents low level, θ′ is the position value within a single sine and cosine period after demodulation and interpolation, and j is a natural number.
[0029] Furthermore, in one embodiment of the present invention, the orthogonal pulse output is an orthogonal square wave signal with several cycles.
[0030] To achieve the above objectives, a second aspect of the present invention proposes a sine / cosine encoder subdivision output system based on angle interpolation, comprising: an amplification module for amplifying the 1Vpp sine / cosine signal output from the sine / cosine encoder; a sampling module for inputting the amplified 1Vpp sine / cosine signal into a dual-channel AD converter for sampling to obtain sampled values; an arctangent angle calculation module for inputting the sampled values into an FPGA to calculate the arctangent values of the two signals using the CORDIC algorithm, obtaining discrete angle values and demodulating them; and an angle interpolation and subdivision output module for performing high-resolution interpolation calculations on the demodulated discrete angle values, comparing them with a preset threshold, and obtaining quadrature pulse outputs.
[0031] The sine and cosine encoder subdivision output system based on angle interpolation of this invention performs linear interpolation on the demodulation angle of the sine and cosine encoder, and then compares the interpolated angle with a set threshold to achieve high-resolution equivalent incremental encoder output. This makes the subdivision multiple of the output equivalent incremental encoder quadrature pulses not limited by the sampling frequency, achieving a higher subdivision multiple under the same input signal frequency, and increasing the upper limit frequency of the input signal under the same subdivision multiple requirement.
[0032] In addition, the sine and cosine encoder subdivision output system based on angle interpolation according to the above embodiments of the present invention may also have the following additional technical features:
[0033] Furthermore, in one embodiment of the present invention, the specific steps for solving the discrete angle values in the arctangent angle calculation module are as follows:
[0034] In a rectangular coordinate system consisting of the horizontal and vertical axes, the coordinates are (x... A ,y A Point A is rotated counterclockwise by an angle α around the origin O to obtain coordinates (x). B ,y B Point B of ) is specifically:
[0035]
[0036] If we want to obtain the angle value of any point from its coordinates, that is, to obtain the angle θ between the point and the positive x-axis, we only need to rotate the point n times to the positive x-axis.
[0037] Assume the angle of the i-th rotation is θ i Then the expression for the i-th rotation is:
[0038]
[0039] Let tanθ = 2 -i Then the angle θ of the i-th rotation i=arctan(2 -i To ensure that the sum of the cumulative rotation angles approaches the desired angle infinitely, even if y approaches 0, the rotation direction needs to be changed when y changes sign. This yields the iterative formula for the arctangent in the CORDIC algorithm:
[0040]
[0041] In the formula, d i =±1 serves as the decision factor to determine the rotation direction, and its value depends on the y obtained after the previous iteration. i The sign of the value, when y i When d > 0, then i =-1, iterate clockwise; otherwise, d i =1, iterating counterclockwise, thus obtaining the angle demodulated using the arctangent method:
[0042]
[0043] Furthermore, in one embodiment of the present invention, the specific steps for performing high-resolution interpolation calculations on the demodulated discrete angle values in the angle interpolation and subdivision output module are as follows:
[0044] N angle estimates are uniformly inserted between two adjacent discrete angle values to obtain the angle interpolation θ. est (i), specifically:
[0045]
[0046] In the formula, θ1 and θ2 are the calculated values of two adjacent angles. T clk T is the system clock cycle of the FPGA chip. s The period for signal sampling and angle calculation;
[0047] The angle interpolation is compared with a preset threshold to obtain the orthogonal pulse output, specifically:
[0048]
[0049] Where A and B are the output pulse signals, 1 represents high level and 0 represents low level, θ′ is the position value within a single sine and cosine period after demodulation and interpolation, and j is a natural number.
[0050] Furthermore, in one embodiment of the present invention, the orthogonal pulse output is an orthogonal square wave signal with several cycles.
[0051] A third aspect of the present invention provides a sine / cosine encoder subdivision quadrature pulse output device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the sine / cosine encoder subdivision output method based on angle interpolation as described in the above embodiments.
[0052] A fourth aspect of the present invention provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the sine and cosine encoder subdivision output method based on angle interpolation as described in the above embodiments.
[0053] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0054] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:
[0055] Figure 1 This is a flowchart of a sine and cosine encoder subdivision output method based on angle interpolation according to an embodiment of the present invention;
[0056] Figure 2 This is a block diagram of an embodiment of the orthogonal pulse subdivision output method based on angle interpolation according to the present invention;
[0057] Figure 3 This is a schematic diagram illustrating the principle of the CORDIC algorithm for solving the arctangent value according to an embodiment of the present invention;
[0058] Figure 4 These are the output signal waveforms of a sine and cosine encoder and the demodulated angle waveforms according to an embodiment of the present invention.
[0059] Figure 5 This is a schematic diagram illustrating the subdivision output principle based on angle value comparison in one embodiment of the present invention;
[0060] Figure 6 This is a simulation diagram of the subdivision pulse output signal without angle interpolation according to an embodiment of the present invention;
[0061] Figure 7 This is a schematic diagram illustrating the principle of angular linear interpolation according to an embodiment of the present invention;
[0062] Figure 8 This is a simulation diagram of the angle signal after high-resolution angle interpolation according to an embodiment of the present invention;
[0063] Figure 9 This is a simulation diagram of the subdivision pulse output signal after angle interpolation according to an embodiment of the present invention;
[0064] Figure 10 This is a schematic diagram of the structure of a sine and cosine encoder subdivision output system based on angle interpolation according to an embodiment of the present invention. Detailed Implementation
[0065] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.
[0066] The following describes the sine and cosine encoder subdivision output method and system based on angle interpolation according to embodiments of the present invention with reference to the accompanying drawings. First, the sine and cosine encoder subdivision output method based on angle interpolation according to embodiments of the present invention will be described with reference to the accompanying drawings.
[0067] Figure 1 This is a flowchart of a sine and cosine encoder subdivision output method based on angle interpolation according to an embodiment of the present invention.
[0068] like Figure 1 As shown, the sine and cosine encoder subdivision output method based on angle interpolation includes the following steps:
[0069] In step S1, the 1Vpp sine and cosine signals output by the sine and cosine encoder are amplified.
[0070] In step S2, the amplified 1Vpp sine and cosine signals are input into a dual-channel AD converter to obtain sampled values.
[0071] Specifically, such as Figure 2 As shown, the two 1Vpp sine and cosine signals output by the sine and cosine encoder are filtered and amplified before being input into a dual-channel high-speed AD converter. The AD converter then oversamples the two amplified sine and cosine signals. The digital output of the AD converter is connected to the FPGA, which sends the digital values (i.e., sampled values) of the two signals into the FPGA.
[0072] In step S3, the sampled values are input into the FPGA to use the CORDIC algorithm to obtain the arctangent values of the two signals, obtain discrete angle values, and demodulate them.
[0073] Specifically, such as Figure 3 As shown, in the rectangular coordinate system formed by the horizontal axis (x-axis) and the vertical axis (y-axis), the coordinates are (x... A ,y A Point A is rotated counterclockwise around the origin O by an angle to obtain coordinates (x). B ,yB Point B can be determined using the following counterclockwise coordinate rotation formula:
[0074]
[0075] Factoring the above equation by extracting the common factor cosα, we get:
[0076]
[0077] The above describes the process of point A reaching point B after one rotation.
[0078] Therefore, if we want to obtain the angle value of any point from its coordinates, that is, the angle θ between that point and the positive x-axis, we only need to rotate the point n times to get it onto the positive x-axis. Let's assume the angle of the i-th rotation is θ. i Then the expression for the i-th rotation is:
[0079]
[0080] Let tanθ = 2 -i Then the angle θ of the i-th rotation i =arctan(2 -i To ensure that the sum of the cumulative rotation angles approaches the desired angle infinitely, even if y approaches 0, the rotation direction must be changed in the next rotation when y changes sign. This yields the iterative formula for the arctangent in the CORDIC algorithm:
[0081]
[0082] In the formula, d i =±1 serves as the decision factor to determine the rotation direction, and its value depends on the y obtained after the previous iteration. i The sign of the value, when y i When d > 0, then i =-1, iterate clockwise; otherwise, d i =1, iterating counterclockwise, thus obtaining the angle demodulated using the arctangent method:
[0083]
[0084] It should be noted that, as Figure 4 The figure shows the output signal waveform of the sine and cosine encoder and the angle waveform after demodulation using the CORDIC algorithm. The sine and cosine encoder outputs sine and cosine signals, which are demodulated to produce discrete angle values ranging from 0 to 360°. The number of discrete angle points depends on the sampling frequency of the sine and cosine signals.
[0085] In step S4, high-resolution interpolation calculations are performed on the demodulated discrete angle values, and then compared with a preset threshold to obtain orthogonal pulse output.
[0086] Specifically, such as Figure 5 As shown, in the traditional method, the subdivision pulse output is obtained by directly comparing the demodulation angle value with the set value. However, when the required subdivision factor is large or the frequency of the sine and cosine signals is high, the traditional method of comparing the demodulation angle with the set value will lead to asymmetry in the positive and negative pulse widths of the square wave signal or loss of pulse signal. Specifically, as shown in the figure... Figure 6 As shown in the simulation diagram, when the frequency is multiplied by 32, the positive and negative pulse widths of the subdivision output signal are severely asymmetrical; when the frequency is multiplied by 64, the subdivision output signal is lost, which will lead to angle errors.
[0087] like Figure 7 As shown, in order to improve the subdivision frequency multiplication factor, this embodiment of the invention employs high-resolution linear interpolation of the demodulated discrete angles. N angle estimates are uniformly inserted between two adjacent calculated angle values (e.g., θ1 and θ2) to obtain the angle interpolation θ. est (i), respectively:
[0088]
[0089] In the formula, θ1 and θ2 are the calculated values of two adjacent angles. T clk T is the system clock cycle of the FPGA chip. s The period for signal sampling and angle calculation;
[0090] like Figure 8 As shown, the angles obtained by arctangent calculation of sine and cosine signal sample values are discrete values. Due to the limitation of the sampling frequency, these discrete angle values exhibit obvious step-like changes. When using uninterpolated discrete angles for comparison to generate quadrature pulses, the step-like changes in the discrete angles lead to... Figure 6 The pulse loss shown occurs. When high-resolution angle interpolation is performed according to the embodiments of the present invention, the continuity of the angle is enhanced, and the subdivision factor is increased.
[0091] like Figure 9 As shown, the method for obtaining orthogonal pulses by comparing angle interpolation with a set threshold is as follows:
[0092]
[0093] In the formula, A and B are the output pulse signals, 1 represents high level and 0 represents low level, and θ′ is the position value within a single sine and cosine period after demodulation and interpolation.
[0094] Furthermore, in one embodiment of the present invention, the quadrature pulse output is a quadrature square wave signal with several cycles.
[0095] Specifically, when the 0–360° angle of a sine / cosine cycle is represented by a 10-bit binary number in the FPGA, the range is 0–1023. During subdivision pulse output, since four comparison points are needed to generate one cycle of quadrature pulses, a sine / cosine cycle can generate a maximum of 256 cycles of quadrature square wave signals, which is 256 times the subdivision of the 0–360° angle, resulting in 256 cycles of quadrature square wave signals output by the quadrature pulse.
[0096] like Figure 9 As shown, at the same sine and cosine signal frequencies, after using the high-resolution angle interpolation of this embodiment of the invention, the subdivision factor is increased to 256 times without pulse loss. And from... Figure 6 The simulation results of the conventional method show that pulse loss occurs when the subdivision factor is 64.
[0097] As can be seen from the simulation waveforms above, the orthogonal pulse subdivision output method based on angle interpolation in this embodiment of the invention can improve the subdivision factor of the output signal of the equivalent incremental encoder, thereby improving the accuracy of angle detection.
[0098] In summary, the sine and cosine encoder subdivision output method based on angle interpolation proposed in this invention performs linear interpolation on the demodulation angle of the sine and cosine encoder, and then compares the interpolated angle with a set threshold, thereby achieving high-resolution equivalent incremental encoder output. This makes the subdivision multiple of the output equivalent incremental encoder quadrature pulses not limited by the sampling frequency, achieving a higher subdivision multiple under the same input signal frequency, and increasing the upper limit frequency of the input signal under the same subdivision multiple requirement.
[0099] Next, with reference to the accompanying drawings, a sine and cosine encoder subdivision output system based on angle interpolation according to an embodiment of the present invention is described.
[0100] Figure 10 This is a schematic diagram of the structure of a sine and cosine encoder subdivision output system based on angle interpolation according to an embodiment of the present invention.
[0101] like Figure 10 As shown, the system 10 includes: an amplification module 100, a sampling module 200, an arctangent angle calculation module 300, and an angle interpolation and subdivision output module 400.
[0102] The amplification module 100 amplifies the 1Vpp sine and cosine signals output from the sine and cosine encoder. The sampling module 200 inputs the amplified 1Vpp sine and cosine signals into a dual-channel A / D converter for sampling to obtain sampled values. The arctangent angle calculation module 300 inputs the sampled values into the FPGA to calculate the arctangent values of the two signals using the CORDIC algorithm, obtaining discrete angle values for demodulation. The angle interpolation and subdivision output module 400 performs high-resolution interpolation calculations on the demodulated discrete angle values, compares them with a preset threshold, and obtains quadrature pulse outputs.
[0103] Furthermore, in one embodiment of the present invention, the specific steps for solving the discrete angle values in the arctangent angle calculation module are as follows:
[0104] In a rectangular coordinate system consisting of the horizontal and vertical axes, the coordinates are (x... A ,y A Point A is rotated counterclockwise by an angle α around the origin O to obtain coordinates (x). B ,y B Point B of ) is specifically:
[0105]
[0106] If we want to obtain the angle value of any point from its coordinates, that is, to obtain the angle θ between the point and the positive x-axis, we only need to rotate the point n times to the positive x-axis.
[0107] Assume the angle of the i-th rotation is θ i Then the expression for the i-th rotation is:
[0108]
[0109] Let tanθ = 2 -i Then the angle θ of the i-th rotation i =arctan(2 -i To ensure that the sum of the cumulative rotation angles approaches the desired angle infinitely, even if y approaches 0, the rotation direction needs to be changed when y changes sign. This yields the iterative formula for the arctangent in the CORDIC algorithm:
[0110]
[0111] The orthogonal pulse output mentioned in the formula is an orthogonal square wave signal with several cycles. Therefore, the angle demodulated using the arctangent method is:
[0112]
[0113] Furthermore, in one embodiment of the present invention, the specific steps for performing high-resolution interpolation calculations on the demodulated discrete angle values in the angle interpolation and subdivision output module are as follows:
[0114] N angle estimates are uniformly inserted between two adjacent discrete angle values to obtain the angle interpolation θ. est (i), specifically:
[0115]
[0116] In the formula, θ1 and θ2 are the calculated values of two adjacent angles. T clk T is the system clock cycle of the FPGA chip. s The period for signal sampling and angle calculation;
[0117] The angle interpolation is compared with a preset threshold to obtain the orthogonal pulse output, specifically:
[0118]
[0119] Where A and B are the output pulse signals, 1 represents high level and 0 represents low level, θ′ is the position value within a single sine and cosine period after demodulation and interpolation, and j is a natural number.
[0120] Furthermore, in one embodiment of the present invention, the quadrature pulse output is a quadrature square wave signal with several cycles.
[0121] It should be noted that the foregoing explanation of the embodiment of the sine and cosine encoder subdivision output method based on angle interpolation also applies to the system of this embodiment, and will not be repeated here.
[0122] The sine and cosine encoder subdivision output system based on angle interpolation proposed in this embodiment of the invention performs linear interpolation on the demodulation angle of the sine and cosine encoder, and then compares the interpolated angle with a set threshold, thereby realizing a high-resolution equivalent incremental encoder output. This makes the subdivision multiple of the output equivalent incremental encoder quadrature pulses not limited by the sampling frequency, achieving a higher subdivision multiple under the same input signal frequency, and increasing the upper limit frequency of the input signal under the same subdivision multiple requirement.
[0123] To implement the above embodiments, the present invention also proposes a sine / cosine encoder subdivision quadrature pulse output device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the sine / cosine encoder subdivision output method based on angle interpolation as described in the foregoing embodiments.
[0124] To implement the above embodiments, the present invention also proposes a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the sine and cosine encoder subdivision output method based on angle interpolation as described in the foregoing embodiments.
[0125] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0126] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0127] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more N executable instructions for implementing custom logic functions or processes, and the scope of preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of the invention pertain.
[0128] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.
[0129] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.
[0130] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.
[0131] Furthermore, the functional units in the various embodiments of the present invention can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.
[0132] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention.
Claims
1. A method for subdivision output of a sine / cosine encoder based on angle interpolation, characterized in that, Includes the following steps: Step S1: Amplify the 1Vpp sine and cosine signals output by the sine and cosine encoder; Step S2: Input the amplified 1Vpp sine and cosine signals into the dual-channel AD converter to obtain the sampled values; Step S3: Input the sampled value into the FPGA to use the CORDIC algorithm to obtain the arctangent value of the two signals, obtain the discrete angle value, and demodulate it; Step S4: Perform high-resolution interpolation calculation on the demodulated discrete angle values, and then compare them with the preset threshold to obtain the quadrature pulse output; The specific steps for performing high-resolution interpolation calculations on the demodulated discrete angle values in step S4 are as follows: Step S401: N angle estimates are uniformly inserted between two adjacent discrete angle values to obtain the angle interpolation. Specifically: In the formula, , Calculate the value for two adjacent angles. , The system clock cycle of the FPGA chip. The period for signal sampling and angle calculation; Step S402, compare the angle interpolation with a preset threshold to obtain the orthogonal pulse output, specifically: Where A and B are the output pulse signals, 1 represents a high level and 0 represents a low level. The position values within a single sine and cosine period after demodulation and interpolation. It is a natural number.
2. The sine / cosine encoder subdivision output method based on angle interpolation according to claim 1, characterized in that, The specific steps for solving the discrete angle values in step S3 are as follows: Step S301: In the rectangular coordinate system formed by the horizontal and vertical axes, the coordinates are... Point A rotates counterclockwise around the origin O by an angle The coordinates are obtained as Point B is specifically: ; Step S302: If the angle value of any point is obtained from its coordinates, then the angle between the point and the coordinates of that point is calculated. x The angle between the positive and negative axes Simply pass through this point n Next rotation to x It can be on the positive half-axis; Step S303, assuming the first i The angle of the next rotation is Then the first i The expression for this rotation is: make Then the first i The angle of the second rotation ; To make the sum of the cumulative rotation angles infinitely close to the desired angle, even if y Infinitely close to 0, when y When the sign changes, the rotation direction needs to be changed in the next rotation, resulting in the iterative formula for the arctangent in the CORDIC algorithm: In the formula, d i The value of ±1 serves as a decision factor to determine the rotation direction; its value depends on the result obtained from the previous iteration. y i The sign of the value, when y i When >0, then d i =-1, iterate clockwise; otherwise, d i =1, iterating counterclockwise, we obtain the angle demodulated using the arctangent method as follows: 。 3. The sine and cosine encoder subdivision output method based on angle interpolation according to claim 1, characterized in that, The orthogonal pulse output is an orthogonal square wave signal with several cycles.
4. A sine / cosine encoder subdivision output system based on angle interpolation, characterized in that, include: The amplification module is used to amplify the 1Vpp sine and cosine signals output by the sine and cosine encoder. The sampling module is used to input the amplified 1Vpp sine and cosine signals into the dual-channel AD converter for sampling to obtain sampled values. The arctangent angle calculation module is used to input the sampled values into the FPGA to calculate the arctangent values of the two signals using the CORDIC algorithm, obtain discrete angle values, and perform demodulation. An angle interpolation and subdivision output module is used to perform high-resolution interpolation calculations on the demodulated discrete angle values, and then compare them with a preset threshold to obtain orthogonal pulse output; The specific steps for high-resolution interpolation calculation of the demodulated discrete angle values in the angle interpolation and subdivision output module are as follows: N angle estimates are uniformly inserted between two adjacent discrete angle values to obtain angle interpolation. Specifically: In the formula, , Calculate the value for two adjacent angles. , The system clock cycle of the FPGA chip. The period for signal sampling and angle calculation; The angle interpolation is compared with a preset threshold to obtain the orthogonal pulse output, specifically: Where A and B are the output pulse signals, 1 represents a high level and 0 represents a low level. The position values within a single sine and cosine period after demodulation and interpolation. It is a natural number.
5. The sine / cosine encoder subdivision output system based on angle interpolation according to claim 4, characterized in that, The specific steps for solving discrete angle values in the arctangent angle calculation module are as follows: In a rectangular coordinate system consisting of the horizontal and vertical axes, the coordinates are ( , Point A is rotated counterclockwise around the origin O by an angle of [missing information]. The coordinates are ( , Point B of ) is specifically: ; If we want to find the angle value of any point from its coordinates, that is, to find the angle between that point and... x The angle between the positive and negative axes Simply pass through this point n Next rotation to x It can be on the positive half-axis; Assume the first i The angle of the next rotation is Then the first i The expression for this rotation is: make Then the first i The angle of the second rotation ; To make the sum of the cumulative rotation angles infinitely close to the desired angle, even if y Infinitely close to 0, when y When the sign changes, the rotation direction needs to be changed in the next rotation, resulting in the iterative formula for the arctangent in the CORDIC algorithm: In the formula, d i The value of ±1 serves as a decision factor to determine the rotation direction; its value depends on the result obtained from the previous iteration. y i The sign of the value, when y i When >0, then d i =-1, iterate clockwise; otherwise, d i =1, iterating counterclockwise, we obtain the angle demodulated using the arctangent method as follows: 。 6. The sine / cosine encoder subdivision output system based on angle interpolation according to claim 4, characterized in that, The orthogonal pulse output is an orthogonal square wave signal with several cycles.
7. A sine / cosine encoder subdivision quadrature pulse output device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the sine and cosine encoder subdivision output method based on angle interpolation as described in any one of claims 1-3.
8. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the sine and cosine encoder subdivision output method based on angle interpolation as described in any one of claims 1-3.
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