A manufacturing method of a small-pitch high-brightness LED display screen and the LED display screen

Abstract

The application provides a small-pitch high-brightness LED display screen manufacturing method and an LED display screen. The method comprises the following steps: growing an epitaxial layer on a substrate to obtain an epitaxial wafer; forming a transparent conductive layer on the epitaxial wafer, forming a mesa step and a cutting path on the transparent conductive layer; forming an electrode layer on the transparent conductive layer and the first semiconductor layer of the epitaxial wafer, forming an insulating reflective layer on the epitaxial wafer and exposing an electrode layer of one polarity; forming a high-reflective metal layer on the epitaxial wafer to connect at least two exposed electrode layers, so as to form an LED chip group by connecting each LED chip; forming a passivation layer on the epitaxial wafer, exposing an electrode layer of another polarity and a high-reflective metal layer of one LED chip; and respectively forming a metal bonding layer; grinding and thinning the substrate of the LED chip group and cutting along the cutting path; and sequentially testing, sorting and packaging each LED chip group. The application solves the problems of low cutting, sorting and packaging efficiency and insufficient LED brightness.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of optoelectronic technology, in particular to a small-pitch high-brightness LED display screen manufacturing method and LED display screen. BACKGROUND

[0002] With the continuous development of LED display technology, small-pitch LED display screens have great potential in the future display field. With the increasing requirement of pixel density of the display screen, that is, the size of the LED chip and the unit pitch are becoming smaller and smaller, the difficulty of the packaging end will be greater and greater. After a 4-inch epitaxial wafer is completed by the chip front-end process, a chip with a length and width of 50-400μm is formed. After grinding, cutting, testing and sorting, hundreds of thousands of chips are produced on an epitaxial wafer. The chips of three wavebands of blue, green and red are packaged, and each three chips of different colors form a pixel point.

[0003] With the reduction of the size of the chip, the time required for cutting and sorting of an epitaxial wafer will be more and more, which will greatly affect the production capacity. With the further reduction of the size of the chip, the difficulty from the chip end to the packaging end will be higher and higher. The smaller the size, the greater the difficulty of transfer. The packaging section can only package one chip at a time, which undoubtedly slows down the packaging speed. When the size of the chip is small to a certain size close to the micro level, the sorting and packaging operations cannot be performed.

[0004] In addition, in most cases, two PADs need to be set for each LED chip to realize the individual driving of each LED chip, that is, the driving source on the corresponding PCB board of the display screen also needs to be set one by one corresponding to the number of chips, which undoubtedly increases the manufacturing difficulty. In addition, the brightness of the LED chip in the existing LED display screen is not high enough, and there is still a lot of room for improvement. SUMMARY

[0005] Therefore, the purpose of the present application is to provide a small-pitch high-brightness LED display screen manufacturing method and LED display screen to fundamentally solve the problems of low cutting and sorting packaging efficiency of the existing LED chip and low brightness of the LED.

[0006] The small-pitch high-brightness LED display screen manufacturing method according to an embodiment of the present application comprises:

[0007] Each epitaxial wafer is obtained by epitaxial layer growth on different substrates, wherein the epitaxial wafer includes a red light epitaxial wafer, a green light epitaxial wafer and a blue light epitaxial wafer;

[0008] A transparent conductive layer is formed on the second semiconductor layer on the surface of each epitaxial wafer, and etching is performed on the transparent conductive layer to form a mesa step exposing the first semiconductor layer and a cutting path for cutting.

[0009] forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer, and forming an insulating reflective layer on the epitaxial wafer and exposing the electrode layer of one polarity;

[0010] forming a high-reflective metal layer on each epitaxial wafer to connect the exposed at least two electrode layers, so that the connected at least two LED chips are finally combined to form an LED chip group;

[0011] forming a passivation layer on each epitaxial wafer, and exposing the electrode layer of another polarity and the high-reflective metal layer in one of the LED chips;

[0012] forming a metal bonding layer on the exposed electrode layer of another polarity and the high-reflective metal layer in one of the LED chips, respectively;

[0013] grinding and thinning the substrate of the LED chip group and cutting along the cutting path at the peripheral LED chips in the LED chip group;

[0014] sequentially performing testing, sorting, and packaging operations on the LED chip group of each waveband to form an LED display screen.

[0015] In addition, the method for manufacturing an LED display screen with small pitch and high brightness according to the above-mentioned embodiments of the present application can further have the following additional technical features:

[0016] Further, the step of etching the transparent conductive layer to form a mesa step exposing the first semiconductor layer and a cutting path for cutting includes:

[0017] forming a special pattern mask of the mesa on the transparent conductive layer by photolithography, which includes coating, exposure, and development operations;

[0018] removing the transparent conductive layer outside the mask by wet etching to expose the second semiconductor layer;

[0019] forming a mesa step by ICP etching to expose the first semiconductor layer, and performing a degumming operation;

[0020] forming a special pattern mask of the ISO on the surface of the epitaxial wafer by photolithography;

[0021] forming a cutting path by ICP etching, and performing a degumming operation.

[0022] Further, the step of forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer includes:

[0023] forming a special pattern mask of the electrode layer on the surface of the epitaxial wafer by photolithography;

[0024] forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer by a metal evaporation process, and performing a photoresist removing operation.

[0025] Further, the insulating reflective layer comprises an insulating protective layer and a reflective layer.

[0026] The step of forming the insulating reflective layer on the epitaxial wafer and exposing the electrode layer of one polarity comprises:

[0027] sequentially depositing the insulating protective layer and the reflective layer on the epitaxial wafer;

[0028] performing photolithography on the surface of the epitaxial wafer to form a special pattern mask of the insulating reflective layer;

[0029] forming the electrode layer of one polarity by ICP etching and performing a photoresist removing operation.

[0030] Further, the step of forming the passivation layer on each epitaxial wafer and exposing the electrode layer of the other polarity and the high-reflective metal layer in one LED chip comprises:

[0031] performing photolithography on the high-reflective metal layer to form a special pattern mask of the high-reflective metal layer;

[0032] forming the electrode layer of the other polarity by etching the high-reflective metal layer above the electrode layer of the other polarity to expose the insulating reflective layer and performing a photoresist removing operation.

[0033] depositing the passivation layer on the epitaxial wafer and performing photolithography on the passivation layer to form a special pattern mask of the passivation layer;

[0034] forming the electrode layer of the other polarity by etching the insulating reflective layer and the passivation layer above the electrode layer of the other polarity to expose the electrode layer, and forming the high-reflective metal layer in one LED chip by etching the passivation layer above the high-reflective metal layer to expose the high-reflective metal layer.

[0035] Further, the step of forming the metal bonding layer on the exposed electrode layer of the other polarity and the high-reflective metal layer in one LED chip respectively comprises:

[0036] performing photolithography on each LED chip of the LED chip group to form a special pattern mask of the metal bonding layer;

[0037] forming the metal bonding layer on the exposed electrode layer of the other polarity and the high-reflective metal layer in one LED chip by a metal evaporation process and performing a photoresist removing operation.

[0038] Further, the transparent conductive layer is an ITO transparent conductive layer, an FTO transparent conductive layer, a ZAO transparent conductive layer, or a Ni micro-grid transparent conductive layer.

[0039] The metal components of the electrode layer, the high-reflection metal layer, and the metal bonding layer include any one or a combination of Cr, Al, Ti, Pt, Ni, and Au.

[0040] The photoresist thickness corresponding to the photoetching is 2.5-10 um, the exposure amount is 150-1000 mj, and the developing time is 50-250 s.

[0041] According to an embodiment of the present application, a small-pitch high-brightness LED display screen comprises:

[0042] The LED chip groups of different wavebands are arranged in sequence, and the LED chip groups include red LED chip groups, green LED chip groups, and blue LED chip groups.

[0043] The LED chip group is composed of at least two LED chips, and each LED chip includes a substrate, and an epitaxial layer, a transparent conductive layer, an electrode layer, an insulating reflective layer, a high-reflection metal layer, a passivation layer, and a metal bonding layer which are sequentially arranged on the substrate.

[0044] The epitaxial layer includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer which are sequentially arranged on the substrate, the transparent conductive layer is arranged on the second semiconductor layer, the electrode layer is arranged on the first semiconductor layer and the transparent conductive layer respectively, the insulating reflective layer is provided with openings exposing the electrode layer, the high-reflection metal layer is arranged on one of the openings exposing the electrode layer, and the high-reflection metal layers of the LED chips are interconnected, the passivation layer is arranged on the high-reflection metal layer, and the high-reflection metal layer and the passivation layer are provided with openings corresponding to the positions of the other openings of the electrode layer, and the metal bonding layer is arranged on the other opening exposing the electrode layer, and the high-reflection metal layer of one of the LED chips in the LED chip group is further provided with the metal bonding layer.

[0045] Further, the metal components of the electrode layer, the high-reflection metal layer, and the metal bonding layer include any one or a combination of Cr, Al, Ti, Pt, Ni, and Au.

[0046] Further, the insulating reflective layer includes an insulating protective layer and a reflective layer, the insulating protective layer includes a SiN layer or a SiO2 layer, and the reflective layer includes an Ag reflective layer or a DBR reflective layer.

[0047] Compared with the prior art, the same polarity electrode layers of at least two LED chips are connected by the high-reflectivity metal layer to form an LED chip group, so that the LED chip group is cut instead of each LED chip, thereby improving the cutting efficiency, and the multiple LED chips on the LED chip group are regarded as a whole for sorting and packaging, so that the sorting and packaging of multiple LED chips are performed at one time, the size of the LED chip is enlarged, and the sorting and packaging difficulty is reduced; meanwhile, the sorting and packaging efficiency is improved due to the sorting and packaging of multiple LED chips at one time, and when the metal bonding layer is arranged, one metal bonding layer is arranged to complete the packaging of one polarity of the LED chip group, and the metal bonding layer corresponding to the number of LED chips is arranged to complete the packaging of the other polarity of the LED chip group, so that the number of metal bonding layers used in the packaging end is reduced. Meanwhile, the use of the driving source corresponding to the metal bonding layer is reduced in the packaging process, the number of driving sources arranged on the PCB is reduced, the manufacturing difficulty of the PCB is reduced, and the voltage or current of each LED chip in the LED chip group is kept consistent, so that the display of the LED display screen is better controlled, the high-reflectivity metal layer and the insulating reflective layer form the ODR structure, the reflectivity under a large angle is improved, the brightness of the LED chip is further improved, the chip current is expanded due to the large coverage of the high-reflectivity metal layer, the chip voltage is reduced, and the problems of low cutting, sorting and packaging efficiency of the LED chip and low brightness of the LED are solved. BRIEF DESCRIPTION OF DRAWINGS

[0048] Figure 1 The flow chart of the method for manufacturing the small-pitch LED display screen in the first embodiment of the application;

[0049] Figure 2 The structure diagram of the LED chip group in the small-pitch LED display screen in the second embodiment of the application;

[0050] Figure 3 The cross-sectional structure diagram of the LED chip group in the small-pitch LED display screen in the second embodiment of the application;

[0051] Figure 4 The cross-sectional structure diagram of the LED chip group in the small-pitch LED display screen in the second embodiment of the application;

[0052] Figure 5 The structure diagram of the LED display screen in the prior art.

[0053] The following detailed description will further explain the present application with reference to the above mentioned drawings. DETAILED DESCRIPTION

[0054] For the purpose of promoting an understanding of the present application, the present application will be described with reference to the drawings. Several embodiments of the present application are illustrated in the drawings. However, the present application can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete. It will be fully appreciated that the present application is capable of being practiced with or without the specific embodiments set forth herein.

[0055] It should be noted that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements can also be present. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0056] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0057] Embodiment One

[0058] Referring to FIG. 1, a method for manufacturing a small-pitch high-brightness LED display screen according to a first embodiment of the present application is shown, which specifically includes steps S01-S08. Figure 1

[0059] Step S01, epitaxial layer growth is performed on different substrates to obtain different waveband epitaxial wafers, wherein the epitaxial wafers include red light epitaxial wafers, green light epitaxial wafers and blue light epitaxial wafers.

[0060] ​In this embodiment of the invention, the manufacturing method is used to manufacture an LED display screen, which is composed of a number of pixels arranged in an array. The vertical and horizontal number of pixels are set according to the pixel resolution required by the LED display screen. Each pixel is composed of LED chips of three different wavelengths: blue, green, and red. Therefore, to manufacture an LED display screen, it is first necessary to prepare LED chips of three wavelengths. Typically, an epitaxial layer is first fabricated on a large substrate to obtain an epitaxial wafer. Then, P electrodes and N electrodes are fabricated on the epitaxial wafer to obtain an LED wafer. At this time, hundreds of thousands of LED chips can be fabricated on a single epitaxial wafer. Therefore, the fabricated LED wafer needs to be ground and cut to obtain the final individual LED chips.

[0061] Therefore, epitaxial layers are first grown on different substrates to obtain epitaxial wafers for each wavelength band, namely red, green, and blue epitaxial wafers. The main method is to adjust the elemental composition ratio of the semiconductors in the epitaxial layer so that the light-emitting layer in the epitaxial layer can emit the desired wavelength, such as providing ultraviolet, blue, red, and infrared light radiation. The specific materials of the epitaxial layer in each wavelength band are set according to the actual production application to prepare the required red, green, and blue epitaxial wafers. No specific limitations are made here.

[0062] The substrate is the substrate on which the epitaxial layer is grown, and it serves a supporting and stabilizing function. The substrate can be an insulating substrate or a conductive substrate, and it can be a planar substrate or a patterned substrate. The substrate material includes, but is not limited to, sapphire, aluminum nitride, gallium nitride, silicon, and silicon carbide. In a specific embodiment of the invention, a sapphire substrate is used.

[0063] Furthermore, the epitaxial layer includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer sequentially stacked on the substrate, wherein the polarity of the first semiconductor layer is opposite to that of the second semiconductor layer. In a specific embodiment of the invention, the first semiconductor layer is an N-type semiconductor layer, such as an N-type gallium nitride (GaN) layer; correspondingly, the second semiconductor layer is a P-type semiconductor layer, such as a P-type gallium nitride layer. It should be noted that the N-type semiconductor layer is formed by silicon doping or carbon doping, while the P-type semiconductor layer is formed by magnesium doping or zinc doping. It is understood that in other embodiments of the invention, the first semiconductor layer may also be a P-type semiconductor layer, and the second semiconductor layer may also be an N-type semiconductor layer, depending on the actual production conditions and requirements for fabricating the corresponding epitaxial wafer, which is not specifically limited here.

[0064] Step S02, forming a transparent conductive layer on the second semiconductor layer of each epitaxial wafer surface, and etching on the transparent conductive layer to form a mesa step exposing the first semiconductor layer and a cutting path for cutting.

[0065] In the embodiment of the present application, after growing each waveband epitaxial wafer on the substrate, a layer of transparent conductive layer is deposited on the second semiconductor layer (i.e. P-type semiconductor layer) of each epitaxial wafer surface, which is deposited by the way of magnetron sputtering bombarding target material to obtain the transparent conductive layer. The transparent conductive layer is ITO (indium tin oxide) transparent conductive layer, FTO (fluorine-doped tin oxide) transparent conductive layer, ZAO (aluminum-doped zinc oxide) transparent conductive layer or Ni micro-grid transparent conductive layer. In the embodiment, ITO transparent conductive layer is used, and the thickness of the transparent conductive layer is 120-1200 A (angstrom). The transparent conductive layer is used for facilitating current diffusion and forming ohmic contact.

[0066] Further, in the embodiment of the present application, after forming the transparent conductive layer on the second semiconductor layer of each epitaxial wafer surface, etching on the transparent conductive layer to form a mesa step exposing the first semiconductor layer and a cutting path for cutting, the steps include:

[0067] forming a special pattern mask of mesa on the transparent conductive layer by photolithography, which includes coating, exposure and development operations; removing the transparent conductive layer outside the mask by wet etching to expose the second semiconductor layer; forming a mesa step by ICP etching to expose the first semiconductor layer, and performing a glue removing operation; forming a special pattern mask of ISO on the epitaxial wafer surface by photolithography; forming a cutting path by ICP etching, and performing a glue removing operation.

[0068] Specifically, a layer of photoresist is first coated on the surface of the transparent conductive layer, wherein the photoresist has a thickness of 2.5-10 um after the photoetching, and then the photoresist layer formed on the transparent conductive layer is exposed and developed by using a mesa photoetching plate, wherein the exposure amount is 150-1000 mj (millijoule), and the developing time is 50-250 s, so as to form a photoresist layer with a mesa special pattern. At this time, the photoresist layer with the mesa special pattern is used as a mask, and then a mixed solution obtained by mixing hydrochloric acid and ferric chloride in a certain proportion (hydrochloric acid: ferric chloride = 10:22) is used for wet etching to remove the transparent conductive layer outside the mask, so as to expose the second semiconductor layer, and then ICP etching is performed to further etch the surface of the epitaxial wafer downward by about 1 um, until the first semiconductor layer is exposed to form a mesa step. It should be noted that the thickness of the second semiconductor layer and the light-emitting layer is less than 1 um, and a small part of the first semiconductor layer will also be etched when the ICP etching is about 1 um. It is mainly used for etching to completely expose the first semiconductor layer. The cavity temperature in the ICP etching is 0-5℃, the corresponding etching gas is Cl2 (chlorine), BCl3 (boron trichloride), CF4 (carbon tetrafluoride) and the like, and the corresponding etching time is 100-2000 s. In the embodiment of the present application, the ICP etching of Cl2 is 900 s. Then the photoresist layer is removed, so as to expose the etched transparent conductive layer on the second semiconductor layer. It should be noted that after the mesa step is etched, electrodes are made on the first semiconductor layer and the transparent conductive layer respectively to obtain each LED chip. At this time, when the photoetching mask is performed, the distance between the single LED chips on the PCB board needs to be matched, so that the metal bonding layer on each LED chip in the subsequently manufactured LED chip group can be matched with each driving source on the PCB board.

[0069] Further, a photoetching operation as described above is further performed on the etched epitaxial wafer to form a special pattern mask of ISO, and then ICP etching of Cl2 is performed for 1650 s to continue etching the first semiconductor layer on the mesa step to form a cutting groove, and then a photoresist removing operation is performed. The cutting groove is located at the periphery of each LED chip, which is convenient for subsequent cutting operation and cutting alignment, so that the LED wafer formed by the epitaxial wafer can be cut to form a plurality of independent and dispersed LED chips, thereby avoiding the risk of cutting fracture that may be caused when no cutting groove is set.

[0070] Step S03: different-polarity electrode layers are respectively formed on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer, and an insulating reflective layer is formed on the epitaxial wafer to expose one of the electrode layers.

[0071] In the embodiment of the present application, the step of forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer respectively comprises:

[0072] forming a special pattern mask of the electrode layer on the surface of the epitaxial wafer by photolithography;

[0073] forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer by metal evaporation process, and performing a degumming operation.

[0074] Specifically, after the epitaxial wafer is treated by step S02, a special pattern mask of the electrode layer is formed on the surface of the epitaxial wafer by photolithography, and then electrode layers of different polarities are formed on the transparent conductive layer and the exposed first semiconductor layer by metal evaporation process, and then a degumming operation is performed. Specifically, a first-polarity electrode layer (i.e. an N electrode layer) is formed on the first semiconductor layer, and a second-polarity electrode layer (i.e. a P electrode layer) is formed on the transparent conductive layer. The metal evaporation process is first vacuumized, and after the vacuum degree reaches 1X10 -2 torr, the corresponding metal target is evaporated to evaporate the metal onto the surface of the epitaxial wafer, wherein the plating rate is 0.1-10A / s, and the metal composition of the electrode layer includes any one or a combination of Cr, Al, Ti, Pt, Ni, and Au. The specific combination is designed according to experiments and the required ability, and is not limited here.

[0075] Specifically, as an example of the present application, the metal composition and corresponding thickness of the electrode layer are shown in Table 1 below, that is, each metal is evaporated layer by layer according to Table 1 below, and the metal thickness unit is A (angstrom). That is, first evaporate Cr with a thickness of 50A, then evaporate Al with a thickness of 1200A, and so on, until finally evaporate Ti with a thickness of 50A.

[0076] Cr Al Ti Pt Ti Pt Au Pt Pt Ti 50 1200 1000 500 1000 500 9300 1100 1100 50

[0077] Table 1

[0078] Further, in the embodiment of the present application, the step of forming an insulating reflective layer on the epitaxial wafer and exposing an electrode layer of one polarity comprises:

[0079] sequentially depositing an insulating protective layer and a reflective layer on the epitaxial wafer; forming a special pattern mask of the insulating reflective layer on the surface of the epitaxial wafer by photolithography; exposing an electrode layer of one polarity by ICP etching, and performing a degumming operation.

[0080] Specifically, the insulating reflective layer includes an insulating protective layer and a reflective layer. After the electrode layer is deposited, an insulating protective layer with a thickness of 2000-8000 Å is first deposited, followed by a reflective layer with a thickness of 6000-60000 Å, thus forming the insulating reflective layer. The insulating protective layer can be a SiN layer or a SiO2 layer, and the reflective layer can be an Ag reflective layer or a DBR reflective layer (distributed Bragg reflection). This insulating reflective layer reflects the light emitted by the light-emitting layer in the epitaxial layer, allowing light to be emitted from the back side of the LED chip. Further, a special pattern mask for the insulating reflective layer is formed on the surface of the epitaxial wafer using photolithography. Then, a portion of the insulating reflective layer on the electrode layer is etched using ICP as described above, exposing one polarity of the electrode layer, followed by resist removal. Specifically, in this embodiment of the invention, the N-electrode layer is exposed; however, it is understood that in other embodiments of the invention, the P-electrode layer may also be exposed.

[0081] Step S04: A highly reflective metal layer is formed on each epitaxial wafer to connect at least two exposed electrode layers, so that the at least two connected LED chips can be finally combined to form an LED chip group.

[0082] It should be noted that the LED chip is only obtained in its entirety after electrode fabrication and grinding / cutting on the epitaxial wafer. Its overall structure can be found in [reference needed]. Figure 4 As shown, in this embodiment of the invention, the structure obtained after the above operations on the epitaxial wafer is described, so it is referred to as an LED chip. It is understood that the LED chip at this time is not a complete LED chip that has been fabricated. It still needs to be fabricated in various subsequent steps to obtain it. At the same time, the epitaxial wafers of different wavelength bands are finally formed into corresponding LED chips through electrode fabrication and other processes. For example, a red epitaxial wafer is obtained by fabricating an epitaxial layer on the substrate, and a red LED chip is obtained by fabricating the red epitaxial wafer through electrode fabrication and other processes.

[0083] At this time, refer to Figure 3 As shown, in step S03 above, the insulating reflective layer exposes one polarity of the electrode layer (N electrode layer). Therefore, when the metal is deposited onto the insulating reflective layer using a metal evaporation process, the metal also fills the exposed P electrode layer on the insulating reflective layer, thus ultimately forming a high-reflectivity metal layer. This high-reflectivity metal layer connects at least two exposed electrode layers, that is, it connects the electrode layers on at least two LED chips, such as... Figure 3As shown, in one embodiment of the present application, the high-reflective metal layer is connected to the electrode layer on the three LED chips. It should be noted that, as mentioned above, a wafer can be made with hundreds of thousands of LED chips, and therefore, in one embodiment of the present application, a wafer is coated with a large number of high-reflective metal layers, and each high-reflective metal layer is connected to at least two electrode layers. At this time, the N electrode layer (i.e. the electrode layer on the exposed first semiconductor layer) of the three LED chips of the same waveband (e.g. red LED chips on a red wafer) is connected by the high-reflective metal layer, thereby realizing a common cathode. At this time, the three red LED chips are connected by the high-reflective metal layer, and can be subsequently combined to form a red LED chip group. The LED chips of other wavebands are as described above. It should be noted that the number of LED chips connected by the high-reflective metal layer in each waveband LED chip group should be consistent. For example, if the number of red LED chips in a red LED chip group is three, then the number of green LED chips in a green LED chip group should also be three, and the number of blue LED chips in a blue LED chip group should also be three. It can be understood that, in other embodiments of the present application, the number of LED chips in an LED chip group is at least two, and can be four, six, or other numbers, which are not limited here. When the insulating reflective layer exposes the P electrode layer, the high-reflective metal layer is connected to the P electrode layer of each LED chip to form a common anode.

[0084] The high-reflective metal layer is a film layer structure composed of a metal with high reflectivity, and the metal composition of the high-reflective metal layer includes any one or a combination of Cr, Al, Ti, Pt, Ni, and Au. The specific combination is designed according to experiments and the required performance, which is not limited here. Further, the high-reflective metal layer in the embodiment of the present application combines the DBR reflective layer in the insulating reflective layer to form an ODR (Omni-Directional Reflector) structure, so as to improve the reflectivity at large angles, thereby further improving the brightness of the LED chip. At the same time, since the high-reflective metal layer has a large coverage area, it can also expand the chip current to reduce the chip voltage.

[0085] Step S05: forming a passivation layer on each wafer, and exposing the electrode layer of the other polarity and the high-reflective metal layer in one LED chip.

[0086] In one embodiment of the present application, step S05 specifically includes:

[0087] forming a special pattern mask of the high reflective metal layer on the high reflective metal layer by photoetching; etching the high reflective metal layer above the electrode layer of the other polarity to expose the insulating reflective layer and performing a de-gluing operation; depositing a passivation layer on the epitaxial wafer and forming a special pattern mask of the passivation layer by photoetching; etching the insulating reflective layer and the passivation layer above the electrode layer of the other polarity to expose the electrode layer, and etching the passivation layer above the high reflective metal layer in one of the LED chips to expose the high reflective metal layer.

[0088] Specifically, the high reflective metal layer above the P electrode layer is etched to expose the insulating reflective layer by mask, and then the passivation layer is deposited to fill the exposed insulating reflective layer, and then the insulating reflective layer and the passivation layer are locally etched to expose the P electrode layer by mask, and the passivation layer above the high reflective metal layer in one of the LED chips is etched to expose the high reflective metal layer, so that the metal bonding layer can be made on the P electrode layer and the high reflective metal layer subsequently. At this time, since the passivation layer is first deposited on the exposed insulating reflective layer, and then the passivation layer is locally etched, the metal bonding layer will not be in direct contact with the high reflective metal layer when the metal bonding layer is made subsequently due to the isolation and buffering of the passivation layer, thereby avoiding the occurrence of dangerous situations such as electric leakage.

[0089] It should be noted that in other embodiments of the present application, the insulating reflective layer and the high reflective metal layer above the P electrode layer can be etched to expose the P electrode layer first, and then the passivation layer is deposited, and then the passivation layer is directly etched to expose the P electrode layer, and the passivation layer above the high reflective metal layer in one of the LED chips is etched to expose the high reflective metal layer.

[0090] Step S06, forming a metal bonding layer on the exposed electrode layer of the other polarity and the high reflective metal layer in one of the LED chips, respectively.

[0091] In the embodiments of the present application, the above step S06 specifically includes:

[0092] forming a special pattern mask of the metal bonding layer on each LED chip of the LED chip group by photoetching; and forming a metal bonding layer by metal evaporation process on the exposed electrode layer of the other polarity and the high reflective metal layer in one of the LED chips, respectively, and performing a de-gluing operation.

[0093] Specifically, it is formed on the LED chip group formed after step S05, a photoetching operation is performed to form a special pattern mask of the metal bonding layer, and then a metal is evaporated on the other electrode layer (P electrode layer) in each LED chip and the high-reflective metal layer in one of the LED chips to form a metal bonding layer (i.e. PAD point) respectively by a metal evaporation process, and then a glue removing operation is performed. For example Figure 2 and Figure 3 As shown in FIG. 6, a negative metal bonding layer (N-type PAD point) is formed on the high-reflective metal layer of the edge LED chip in the LED chip group with three LED chips, and a positive metal bonding layer (P-type PAD point) is formed on the other electrode layer in each of the LED chips respectively.

[0094] Further, the metal composition of the metal bonding layer includes any one or a combination of Cr, Al, Ti, Pt, Ni, and Au, and the specific combination is designed according to experiments and the required ability, which is not limited here. Specifically, as an example of the present application, the metal composition and the corresponding thickness of the metal bonding layer are shown in Table 2 below, that is, the metal is evaporated layer by layer according to Table 2 below, and the unit of the metal thickness is A (angstrom), that is, Cr with a thickness of 16000 A is evaporated first, then Ti with a thickness of 1000 A is evaporated, and so on until Au (gold) with a thickness of 2000 A is evaporated finally.

[0095]

[0096]

[0097] Table 2

[0098] It should be noted that in the embodiments of the present application, the above steps S02-S06 are all formed by deposition, evaporation or etching through a photoetching mask method to form the above various structures, but it can be understood that in other embodiments of the present application, the deposition or evaporation can be directly performed without the photoetching mask method, and then the parts not needed are removed by laser melting and etching when the special pattern is needed, so as to achieve the same effect as the photoetching mask.

[0099] Step S07, grinding and thinning the substrate of the LED chip group and cutting along the cutting path of the peripheral LED chip in the LED chip group.

[0100] In the embodiment of the present application, after the metal bonding layer is evaporated on each LED chip in the LED chip group, the substrate of each LED chip in the LED chip group is thinned by grinding. The thickness of the epitaxial wafer after grinding is 150-300 um. In the conventional manufacturing process, the thickness of the sapphire substrate is relatively large, which causes light absorption and reduces the light brightness of the LED chip. The sapphire substrate is thinned by grinding to reduce light absorption and improve brightness. After the substrate is thinned by grinding, the subsequent cutting and sorting operations are facilitated.

[0101] Further, after the substrate of the LED chip group is ground, the cutting operation is performed to cut and separate each LED chip on the manufactured LED wafer. The cutting operation is performed along the cutting path on the peripheral LED chip in the LED chip group. In the embodiment of the present application, each LED chip group is obtained by cutting, and each LED chip group includes at least two LED chips. Compared with the prior art, the cutting operation is performed on the LED chip group instead of each LED chip, which effectively reduces the number of cutting operations and greatly saves the cutting time. When the number of LED chips in the LED chip group increases, the cutting time and number of cutting operations are significantly reduced, and the cutting efficiency is improved.

[0102] In step S08, the LED chip group of each waveband is tested, sorted, and packaged to form an LED display screen.

[0103] In the embodiment of the present application, after the cutting operation is completed to obtain each LED chip group, the LED chip group is tested to test the photoelectric properties and appearance state. After the test is completed, the LED chip groups of the same specification are sorted and packaged.

[0104] In the photoelectric property test of the LED chip formed on each epitaxial wafer, one probe is inserted into the negative metal bonding layer, and the other probe is inserted into one of the positive metal bonding layers. The corresponding LED chip is lit when the probe is inserted into any positive metal bonding layer, thereby realizing the photoelectric property test of the LED chip. Since the LED chip group has a common cathode through the high-reflectivity metal layer, the probe inserted into the negative metal bonding layer does not need to be moved during the chip test of the LED chip group. The other probe inserted into the positive metal bonding layer is moved, thereby reducing the number of probe movements during the test.

[0105] Further, since the prior art needs to sort and package each LED chip individually, as the size of the LED chip is reduced, the difficulty of sorting and packaging the LED chip is increased, but in the embodiment of the present application, the distance between the single LED chips on the PCB board is designed by using the photoetching mask during the manufacturing of the LED chip end, so that the multiple LED chips on the LED chip group can be sorted and packaged as a whole, thereby achieving the sorting and packaging of multiple LED chips at one time, which can be regarded as enlarging the size of the LED chip and reducing the difficulty of sorting and packaging; at the same time, since the sorting and packaging of multiple LED chips can be performed at one time, the efficiency of sorting and packaging is effectively improved.

[0106] At the same time, when the metal bonding layer is set, since the N electrode layer in each LED chip in each LED chip group is connected through the high-reflective metal layer, only one metal bonding layer is needed to complete the N-pole packaging of the LED chip group, and the metal bonding layer corresponding to the number of LED chips is needed to complete the P-pole packaging of the LED chip group, that is, only n+1 metal bonding layers are needed in one LED chip group, where n is the number of LED chips in the LED chip group, and the prior art needs 2n metal bonding layers. In the embodiment, as shown in Figure 2 and Figure 3 , only four metal bonding layers are needed for each LED chip group, and in the prior art, as shown in Figure 5 , six metal bonding layers are needed for three LED chips, so the number of metal bonding layers used in the packaging end can be reduced. At the same time, the use of the driving source corresponding to the metal bonding layer is also reduced during the packaging process, so the number of driving sources set on the PCB board is also reduced accordingly, which can also reduce the manufacturing difficulty of the PCB board. At the same time, since the voltage or current of each LED chip in the LED chip group can be kept consistent, the display of the LED display screen can be better controlled.

[0107] At the same time, the high-reflective metal layer combined with the DBR reflective layer in the above-mentioned insulating reflective layer forms an ODR (Omni-Directional Reflector) structure, which can improve the reflectivity at a large angle, thereby further improving the brightness of the LED chip; at the same time, since the coverage area of the high-reflective metal layer is large, the chip current can be expanded to reduce the chip voltage.

[0108] In summary, the method for manufacturing the LED display screen with small spacing and high brightness in the above-mentioned embodiments of the present application can realize the communication of the electrode layers of the same polarity of the at least two LED chips by setting the high-reflective metal layer to form the LED chip group, so that the cutting efficiency is improved by cutting the LED chip group instead of each LED chip. Meanwhile, the multiple LED chips on the LED chip group can be considered as a whole for sorting and packaging, so that the sorting and packaging of multiple LED chips can be realized at one time, the size of the LED chip is enlarged, and the sorting and packaging difficulty is reduced. Meanwhile, the sorting and packaging efficiency is effectively improved by sorting and packaging multiple LED chips at one time. When the metal bonding layer is set, one metal bonding layer is used to complete the packaging of one pole of the LED chip group, and the metal bonding layer corresponding to the number of LED chips is used to complete the packaging of the other pole of the LED chip group, so that the number of metal bonding layers used in the packaging end can be reduced. Meanwhile, the use of the driving source corresponding to the metal bonding layer is reduced in the packaging process, the number of driving sources set on the PCB is also reduced, and the manufacturing difficulty of the PCB is reduced. Meanwhile, the voltage or current of each LED chip in the LED chip group can be kept consistent, so that the display of the LED display screen can be better controlled. The high-reflective metal layer and the insulating reflective layer are combined to form the ODR structure, so that the reflectivity under a large angle can be improved, and the brightness of the LED chip is further improved. Since the high-reflective metal layer has a large coverage area, the chip current can be expanded to reduce the chip voltage, so that the problems of low cutting, sorting and packaging efficiency of the LED chip and insufficient brightness of the LED are solved.

[0109] Embodiment two

[0110] Please refer to Figures 2-4 , which is the LED display screen with small spacing in the second embodiment of the present application. For the convenience of description, only the parts related to the embodiments of the present application are shown. The LED display screen provided by the embodiments of the present application includes:

[0111] The LED chip groups of different wave bands arranged in sequence, which include the red LED chip group, the green LED chip group and the blue LED chip group;

[0112] The LED chip group is composed of at least two LED chips, which include the substrate 10, the epitaxial layer 11, the transparent conductive layer 12, the electrode layer 13, the insulating reflective layer 14, the high-reflective metal layer 15, the passivation layer 16 and the metal bonding layer 17 arranged on the substrate 10 in sequence;

[0113] The epitaxial layer 11 includes a first semiconductor layer 111, a light-emitting layer 112, and a second semiconductor layer 113 sequentially stacked on the substrate 10. A transparent conductive layer 12 is disposed on the second semiconductor layer 113. Electrode layers 13 are respectively disposed on the first semiconductor layer 111 and the transparent conductive layer 12. An insulating reflective layer 14 has an opening exposing the electrode layer 13. A high-reflectivity metal layer 15 is disposed on one of the openings of the exposed electrode layer 13, and the high-reflectivity metal layers 15 in each LED chip are interconnected. A passivation layer 16 is disposed on the high-reflectivity metal layer 15, and the high-reflectivity metal layer 15 and the passivation layer 16 have corresponding openings at the positions corresponding to the other opening of the electrode layer 13. A metal bonding layer 17 is disposed on the other opening of the exposed electrode layer 13, and a metal bonding layer 17 is also disposed on the high-reflectivity metal layer 15 of one of the LED chips in the LED chip group.

[0114] Among them, reference Figure 5 As shown, its LED display screen consists of several arrayed pixels. The specific number of pixels, both vertically and horizontally, is set according to the required pixel resolution of the LED display screen. Each pixel is composed of LED chips in three different wavelengths: blue, green, and red. Figure 5 As shown, a blue LED chip, a green LED chip, and a red LED chip are combined to form a pixel. The pixel spacing of each pixel is set according to actual usage requirements; in this embodiment, 390µm is used as an example. Furthermore, LED chips for different wavelengths all include the structure described above, and the epitaxial layer 11 only needs to be grown according to the required wavelength.

[0115] The substrate 10 is the substrate on which the epitaxial layer 11 is grown, and it serves to support and stabilize the substrate. The substrate 10 can be an insulating substrate or a conductive substrate, and it can be a planar substrate or a patterned substrate. The materials of the substrate 10 include, but are not limited to, sapphire, aluminum nitride, gallium nitride, silicon, and silicon carbide. In a specific embodiment of the present invention, the substrate 10 is a sapphire substrate 10.

[0116] Further, the substrate 10 is formed with an epitaxial layer 11, wherein the epitaxial layer 11 can be prepared by growing on the substrate 10 by a metal organic chemical vapor deposition (MOCVD) device, or can be bonded on the substrate 10 by a transparent bonding layer bonding method. As an example of the present application, the epitaxial layer 11 includes a first semiconductor layer 111, a light emitting layer 112 and a second semiconductor layer 113 sequentially arranged on the substrate 10, wherein the polarity of the first semiconductor layer 111 is opposite to the polarity of the second semiconductor layer 113. In the specific embodiment, the first semiconductor layer 111 is an N-type semiconductor layer, for example, an N-type gallium nitride (GaN) layer; correspondingly, the second semiconductor layer 113 is a P-type semiconductor layer, for example, a P-type gallium nitride layer. It is noted that the N-type semiconductor layer is formed by silicon doping or carbon doping, and the P-type semiconductor layer is formed by magnesium doping or zinc doping. It can be understood that in other embodiments of the present application, the first semiconductor layer 111 can also be a P-type semiconductor layer, and the second semiconductor layer 113 can also be an N-type semiconductor layer, which are made according to actual production conditions and needs to make corresponding epitaxial wafers.

[0117] Further, the light emitting layer 112 includes quantum well layers and quantum barrier layers alternately and periodically grown, wherein the quantum well layers and the quantum barrier layers are alternately and periodically grown, so that at least one recombination well can be formed in the light emitting layer 112, which can improve the light emitting efficiency of the light emitting diode chip. The light emitting layer 112 can be composed of gallium nitride materials, gallium arsenide materials, etc., and the element composition ratio of the semiconductor can be adjusted to emit a desired wavelength, such as ultraviolet, blue, red, infrared, etc.

[0118] Further, after the epitaxial layer 11 is prepared, a transparent conductive layer 12 is deposited by a magnetron sputtering target material bombardment method, at this time the transparent conductive layer 12 is arranged on the second semiconductor layer 113 (i.e. the P-type semiconductor layer), wherein the transparent conductive layer 12 is an ITO (indium tin oxide) transparent conductive layer, an FTO (fluorine-doped tin oxide) transparent conductive layer, a ZAO (aluminum-doped zinc oxide) transparent conductive layer or a Ni micro-mesh transparent conductive layer. In the specific embodiment of the present application, the transparent conductive layer 12 is an ITO transparent conductive layer, and the thickness of the transparent conductive layer 12 is 120-1200 A (angstrom), at this time, since the transparent conductive layer 12 is entirely laid on the second semiconductor layer 113, it is convenient for the diffusion of current and the formation of ohmic contact with the second semiconductor layer 113, and the transparent conductive layer 12 is transparent structure, which will not block the light emitted by the light emitting layer 112.

[0119] Further, after the transparent conductive layer 12 is made, the second semiconductor layer 113 and the light emitting layer 112 in one side of the epitaxial layer 11 are etched to expose the first semiconductor layer 111 by the wet etching and ICP etching process in the above method embodiments, so that a mesa step is formed by etching. Further, in the embodiments of the present application, the LED chips of the same wavelength are formed on the same substrate 10, that is, the epitaxial layer 11, the transparent conductive layer 12, the electrode layer 13, the insulating reflective layer 14, the high reflective metal layer 15, the passivation layer 16 and the metal bonding layer 17 are formed on the whole substrate 10, and then the cutting process is performed to cut the substrate 10, so that the LED chips are finally formed. Therefore, in order to facilitate the subsequent cutting operation and cutting alignment, a cutting path 17 is arranged at the boundary between the LED chips, and the first semiconductor layer 111 is further etched on the mesa step by etching process, so that a cutting path 17 is etched, which is shown in the following figure. Figure 2

[0120] Further, the electrode layer 13 with different polarities is formed on the transparent conductive layer 12 and the exposed first semiconductor layer 111 of each epitaxial wafer, that is, the electrode layer 13 is arranged on the first semiconductor layer 111 and the transparent conductive layer 12. At this time, the first polarity electrode layer (i.e. N electrode layer) is formed on the first semiconductor layer 111, and the second polarity electrode layer (i.e. P electrode layer) is formed on the transparent conductive layer 12.

[0121] Further, after the electrode layer 13 is made, the insulating reflective layer 14 is deposited by the photolithography and evaporation process in the above method embodiments, and the electrode layer 13 is exposed on the insulating reflective layer 14. The insulating reflective layer 14 includes an insulating protective layer and a reflective layer, and the insulating protective layer and the reflective layer are arranged from bottom to top. The insulating protective layer includes a SiN layer or a SiO2 layer, and the reflective layer includes an Ag reflective layer or a DBR reflective layer. The insulating reflective layer 14 is used to reflect the light emitted by the light emitting layer 112 in the epitaxial layer 11, so that the light is emitted from the back of the LED chip.

[0122] ​Furthermore, a high-reflectivity metal layer 15 is added to connect all the LED chips. This high-reflectivity metal layer 15 is positioned on one of the openings of the exposed electrode layer 13. Specifically, in this embodiment, the high-reflectivity metal layer 15 is positioned on the opening corresponding to the first polarity electrode layer (N electrode layer), allowing the high-reflectivity metal layer 15 to connect the first polarity electrode layers of each LED chip, thus achieving a common electrode. Simultaneously, the high-reflectivity metal layer 15, combined with the DBR reflective layer in the insulating reflective layer 14, forms an ODR structure, which improves reflectivity at large angles, thereby further increasing the brightness of the LED chip. Furthermore, due to the large coverage area of ​​the high-reflectivity metal layer, it can also expand the chip current, thereby reducing the chip voltage.

[0123] Furthermore, the passivation layer 16 is disposed on the high-reflectivity metal layer 15, and the high-reflectivity metal layer 15 and the passivation layer 16 have openings corresponding to the openings of the second polar electrode layer. Simultaneously, the passivation layer 16 covers the inner wall of the opening of the high-reflectivity metal layer 15. At this time, a negative electrode metal bonding layer (N-type PAD point) is disposed on the opening of the second polar electrode layer, that is, as shown... Figure 3 As shown, the bottom of the negative electrode metal bonding layer is in contact with the second polar electrode layer, while the lower sidewall of the negative electrode metal bonding layer is connected to the insulating reflective layer 14, and the middle and upper sidewalls of the negative electrode metal bonding layer are connected to the passivation layer 16. Since the passivation layer 16 is positioned between the negative electrode metal bonding layer and the high-reflectivity metal layer 15, it avoids the occurrence of dangerous situations such as leakage caused by direct contact between the metal bonding layer 17 and the high-reflectivity metal layer 15. Furthermore, a positive electrode metal bonding layer (P-type PAD point) is also provided on the high-reflectivity metal layer 15 of one of the LED chips in the LED chipset.

[0124] Furthermore, the metal composition of the electrode layer 13, the high-reflectivity metal layer 15, and the metal bonding layer 17 includes any one or more combinations of Cr, Al, Ti, Pt, Ni, and Au. Specifically, as an example of the present invention, the metal composition and corresponding thickness of the electrode layer 13 are shown in Table 1 of the aforementioned method embodiments, that is, the electrode layer 13 includes, from bottom to top, a Cr (chromium) layer, an Al (aluminum) layer, a Ti (titanium) layer, a Pt (platinum) layer, a Ti layer, a Pt layer, an Au (gold) layer, a Pt layer, a Pt layer, and a Ti layer. The metal composition and corresponding thickness of the metal bonding layer 17 are shown in Table 2 of the aforementioned method embodiments, that is, the metal bonding layer 17 includes, from bottom to top, an Al layer, a Ti layer, a Pt layer, a Ti layer, a Ni (nickel) layer, and an Au layer.

[0125] In summary, the LED display screen with small spacing and high brightness in the above-mentioned embodiments of the present application can realize the communication of each electrode layer of at least two LED chips with the same polarity by the high-reflective metal layer to form an LED chip group, so that the LED chip group is cut instead of each LED chip, thereby improving the cutting efficiency, and the multiple LED chips on the LED chip group can be regarded as a whole for sorting and packaging, so that the sorting and packaging of multiple LED chips can be realized at one time, the size of the LED chip is enlarged, and the sorting and packaging difficulty is reduced. At the same time, the sorting and packaging efficiency is effectively improved, and the number of metal bonding layers in the packaging end can be reduced by setting one metal bonding layer for one-pole packaging of the LED chip group and the metal bonding layer corresponding to the number of LED chips for the other-pole packaging of the LED chip group. At the same time, the use of the driving source corresponding to the metal bonding layer is reduced in the packaging process, so that the number of driving sources on the PCB is also reduced, and the manufacturing difficulty of the PCB is also reduced. At the same time, the voltage or current of each LED chip in the LED chip group can be kept consistent, so that the display of the LED display screen can be better controlled. The high-reflective metal layer and the insulating reflective layer form an ODR structure, so that the reflectivity at a large angle can be improved, thereby further improving the brightness of the LED chip. Since the high-reflective metal layer has a large coverage area, the chip current can be expanded to reduce the chip voltage, thereby solving the problems of low cutting, sorting and packaging efficiency of the LED chip and insufficient brightness of the LED.

[0126] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0127] The above-described embodiments only express several implementation manners of the present application, and the description is more specific and detailed, but it cannot be understood as a limitation on the scope of the patent of the present application. It should be noted that, for ordinary skilled persons in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A method for manufacturing a small-pitch, high-brightness LED display screen, characterized in that, The method includes: Epitaxial layers are grown on different substrates to obtain epitaxial wafers of different wavelengths, including red epitaxial wafers, green epitaxial wafers and blue epitaxial wafers; A transparent conductive layer is formed on the second semiconductor layer on the surface of each epitaxial wafer, and etching is performed on the transparent conductive layer to form a mesa step that exposes the first semiconductor layer and a cutting track for cutting; Electrode layers of different polarities are formed on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer, and an insulating reflective layer is formed on the epitaxial wafer, exposing one of the electrode layers of polarity. A highly reflective metal layer is formed on each epitaxial wafer to connect at least two exposed electrode layers, so that at least two connected LED chips can be ultimately combined to form an LED chip group. A passivation layer is formed on each epitaxial wafer, exposing an electrode layer of the other polarity and a highly reflective metal layer in one of the LED chips; Metal bonding layers are formed on the exposed electrode layer of the other polarity and the high-reflectivity metal layer in one of the LED chips, respectively; The substrate of the LED chipset is thinned by grinding and the cutting is performed along the cutting path of the LED chips on the periphery of the LED chipset. LED chipsets of various wavelengths are tested, sorted, and packaged sequentially to form an LED display screen. The step of forming a passivation layer on each epitaxial wafer and exposing an electrode layer of the other polarity and a highly reflective metal layer in one of the LED chips includes: A special pattern mask for forming a highly reflective metal layer is formed by photolithography on the highly reflective metal layer; The highly reflective metal layer above the electrode layer of the other polarity is etched until the insulating reflective layer is exposed, and then the adhesive is removed. A passivation layer is deposited on an epitaxial wafer, and a special pattern mask for the passivation layer is formed by photolithography on the passivation layer; The insulating reflective layer and passivation layer above the electrode layer of the other polarity are etched to expose the electrode layer, and the passivation layer above the high reflective metal layer in one of the LED chips is etched to expose the high reflective metal layer.

2. The method for manufacturing a small-pitch, high-brightness LED display screen according to claim 1, characterized in that, The step of etching on the transparent conductive layer to form a mesa step exposing the first semiconductor layer and a cutting path for cutting includes: A special pattern mask for mesa is formed by photolithography on a transparent conductive layer. The photolithography includes photoresist coating, exposure and development operations. The transparent conductive layer outside the mask is removed by wet etching, exposing the second semiconductor layer; Mesa steps are formed by ICP etching to expose the first semiconductor layer, followed by resist removal. A special pattern mask of ISO is formed on the surface of the epitaxial wafer by photolithography. Cutting paths are formed by ICP etching, followed by resist removal.

3. The method for manufacturing a small-pitch, high-brightness LED display screen according to claim 1, characterized in that, The step of forming electrode layers of different polarities on the transparent conductive layer and the exposed first semiconductor layer of each epitaxial wafer includes: A special pattern mask for forming an electrode layer is formed by photolithography on the surface of an epitaxial wafer; Metal is deposited onto a transparent conductive layer and the exposed first semiconductor layer using a metal evaporation process to form electrode layers of different polarities, and then the adhesive is removed.

4. The method for manufacturing a small-pitch, high-brightness LED display screen according to claim 1, characterized in that, The insulating reflective layer includes an insulating protective layer and a reflective layer; The step of forming an insulating reflective layer on the epitaxial wafer and exposing an electrode layer of one polarity includes: An insulating protective layer and a reflective layer are sequentially deposited on the epitaxial wafer; A special pattern mask is formed on the surface of an epitaxial wafer by photolithography to create an insulating reflective layer; The electrode layer of one polarity is exposed by ICP etching, followed by resist removal.

5. The method for manufacturing a small-pitch, high-brightness LED display screen according to claim 1, characterized in that, The step of forming metal bonding layers on the exposed electrode layer of the other polarity and the high-reflectivity metal layer in one of the LED chips includes: A special pattern mask is formed on each LED chip of the LED chipset by photolithography to create a metal bonding layer; Metal bonding layers are formed by depositing metal onto the electrode layer of the opposite polarity exposed on each LED chip and the high-reflectivity metal layer in one of the LED chips using a metal evaporation process, followed by a glue removal operation.

6. The method for manufacturing a small-pitch, high-brightness LED display screen according to any one of claims 2-5, characterized in that, The transparent conductive layer is an ITO transparent conductive layer, an FTO transparent conductive layer, a ZAO transparent conductive layer, or a Ni micro-mesh transparent conductive layer; The metal composition of the electrode layer, the high-reflectivity metal layer, and the metal bonding layer includes any one or more combinations of Cr, Al, Ti, Pt, Ni, and Au; The photoresist thickness corresponding to the photolithography is 2.5-10µm, the exposure dose is 150-1000mJ, and the development time is 50-250s.

7. A high-brightness LED display screen with small pitch, characterized in that, include: LED chip groups of different wavelengths are arranged in a sequential array, the LED chip groups including red LED chip groups, green LED chip groups and blue LED chip groups; The LED chip group consists of at least two LED chips. Each LED chip includes a substrate and an epitaxial layer, a transparent conductive layer, an electrode layer, an insulating reflective layer, a high reflective metal layer, a passivation layer, and a metal bonding layer that are sequentially stacked on the substrate. The epitaxial layer includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer sequentially stacked on the substrate. The transparent conductive layer is disposed on the second semiconductor layer. The electrode layers are respectively disposed on the first semiconductor layer and the transparent conductive layer. The insulating reflective layer has an opening exposing the electrode layer. The high-reflectivity metal layer is disposed on one of the openings exposing the electrode layer, and the high-reflectivity metal layers in each LED chip are interconnected. The passivation layer is disposed on the high-reflectivity metal layer, and the high-reflectivity metal layer and the passivation layer have corresponding openings at the positions corresponding to the other opening of the electrode layer. The metal bonding layer is disposed on the other opening exposing the electrode layer, and the metal bonding layer is also disposed on the high-reflectivity metal layer of one of the LED chips in the LED chip group.

8. The LED display screen for small-pitch high brightness according to claim 7, characterized in that, The metal components of the electrode layer, the high-reflectivity metal layer, and the metal bonding layer include any one or more combinations of Cr, Al, Ti, Pt, Ni, and Au.

9. The LED display screen for small-pitch high brightness according to claim 8, characterized in that, The insulating reflective layer includes an insulating protective layer and a reflective layer. The insulating protective layer includes a SiN layer or a SiO2 layer, and the reflective layer includes an Ag reflective layer or a DBR reflective layer.

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