Optical sensor device and method of manufacturing the same

Abstract

The present application provides a light sensor device capable of reducing dark current and improving sensitivity and a method for manufacturing the same. The light sensor device comprises a substrate (1-13), a germanium or germanium-silicon layer formed on the substrate (1-13), the germanium or germanium-silicon layer comprising an n-type germanium or germanium-silicon layer (1-2) and a p-type germanium or germanium-silicon layer (1-3), and a conductive layer consisting of a p-type silicon or silicon-germanium layer (1-4) formed on the top and side of the germanium or germanium-silicon layer. The method for manufacturing the light sensor device comprises providing a substrate (1-13), forming a germanium or germanium-silicon layer on the substrate (1-13), the germanium or germanium-silicon layer comprising an n-type germanium or germanium-silicon layer (1-2) and a p-type germanium or germanium-silicon layer (1-3), and forming a conductive layer consisting of a p-type silicon or silicon-germanium layer (1-4) formed on the top and side of the germanium or germanium-silicon layer.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to a light sensing function, and more particularly, to a light sensor device for an imaging apparatus having a time-of-flight (TOF) sensor and a method of manufacturing the light sensor device. BACKGROUND

[0002] Time-of-flight (TOF) sensors are used for various applications, such as face recognition of smartphones, object recognition for autonomous driving of cars, wide-area monitoring in darkness, healthcare, and gaming. The TOF sensor can be used as an input device for both stationary computing devices and portable computing devices. In the case of a TOF camera, it uses infrared light (laser invisible to the human eye) to acquire depth information, which is somewhat similar to the way bats perceive their surroundings. The sensor emits a light signal, which hits an object and returns to the sensor. Then, the time taken to receive the returned light is measured, and a depth mapping function is provided. This technology offers a huge advantage over other technologies because it can precisely measure distances in an entire scene using a single laser pulse.

[0003] There are two problems with the TOF sensor: low sensitivity and dark current, which cause measurement distance errors.

[0004] To improve sensitivity, a silicon-based germanium (Ge) photodiode structure is proposed instead of a silicon photodiode for a near-infrared (NIR) photodiode in a silicon (Si) photonic device. The sensitivity of the photodiode depends on the absorption rate of the photodiode material. In a photodiode with a thickness of 2 μm, the absorption rate of Ge is 90%, which is higher than that of Si (20%). Accordingly, the sensitivity of the Ge photodiode is improved by 4.5 times compared to the Si photodiode. Since the detection signal is clearly detected by distinguishing false signals (dark signals) and signals from low-reflective objects, the accuracy of the measurement distance is improved by using Ge.

[0005] Dark current is a signal in a dark situation. Even in the absence of a light signal, a small amount of current is generated from the photodiode due to the thermal generation of carriers. Ideally, the dark current is zero. However, there are many defects, especially on the surface of germanium, which cause the generation of dark current. One of the main defects is that Ge has many dangling bonds, and the other is a defect caused by the lattice constant (4%) mismatch between Si and Ge. They normally release electrons and move to the photodiode. This adversely affects the signal and causes measurement distance errors. This is a problem that arises in the application of a germanium photodiode in a product. SUMMARY

[0006] An object of the present application is to provide a photosensor device capable of reducing dark current and improving sensitivity and a method of manufacturing the same.

[0007] A first aspect provides a photosensor device, the photosensor device comprising:

[0008] a first substrate;

[0009] a germanium or germanium silicon layer formed on the first substrate, the germanium or germanium silicon layer including an n-type germanium or germanium silicon layer and a p-type germanium or germanium silicon layer;

[0010] a conductive layer consisting of a p-type silicon or silicon germanium layer, the conductive layer being formed on top and sides of the germanium or germanium silicon layer.

[0011] According to this implementation, a conductive layer consisting of a p-type silicon or silicon germanium layer is formed on top and sides of the germanium or germanium silicon layer. A p-type Si layer is prepared on top and sides of a Ge photodiode. Thus, defects of dangling bonds can be suppressed by bonding with Si atoms, thereby reducing dark current and improving accuracy of a measurement distance. In addition, high wavelength light (850 nm, 940 nm, and 1550 nm) can also be detected.

[0012] In addition, a metal electrode of high concentration ions does not need to be implanted on top of the Ge photodiode. This structure can reduce defects or damage on a surface of the Ge photodiode.

[0013] In connection with a possible implementation of the first aspect, the conductive layer is connected to another conductive layer of another photosensor device adjacent to the photosensor device.

[0014] According to this implementation, the conductive layer is connected to another conductive layer of another photosensor device adjacent to the photosensor device. Thus, the conductive layer covering a pixel array can be simply grounded.

[0015] In connection with a possible implementation of the first aspect, the photosensor device further comprises:

[0016] a first metal electrode connected to the conductive layer between the photosensor device and the other photosensor device.

[0017] According to this implementation, the first metal electrode is connected to the conductive layer in between the photo sensor device and the other photo sensor device. Therefore, there is no need to implant a metal electrode with high concentration of ions on top of the Ge layer. This structure can reduce the defects or damages on the surface of the Ge photodiode. Furthermore, using the metal electrode can further reduce the wire resistance of the photodiode to ground or power supply.

[0018] In conjunction with the first aspect, in a possible implementation, an insulating layer is formed between the first substrate and the germanium or silicon-germanium layer, and the first substrate and the germanium or silicon-germanium layer are connected through a metal region placed in the insulating layer.

[0019] According to this implementation, an insulating layer is formed between the first substrate and the germanium or silicon-germanium layer, and the first substrate and the germanium or silicon-germanium layer are connected through a metal region placed in the insulating layer. Therefore, the Ge photodiode and the silicon substrate can be independently prepared and combined with a chip-to-chip bonding technology.

[0020] In conjunction with the first aspect, in a possible implementation, the conductive layer has a flat layer formed on top of the germanium or silicon-germanium layer and extended such that the flat layer is connected to the other conductive layer of the other photo sensor device.

[0021] According to this implementation, the conductive layer has a flat layer formed on top of the germanium or silicon-germanium layer and extended such that the flat layer is connected to the other conductive layer of the other photo sensor device. Therefore, the wire resistance of the photodiode to ground or power supply can be further reduced.

[0022] In conjunction with the first aspect, in a possible implementation, the photo sensor device further includes:

[0023] a second metal electrode connected to the flat layer in between the photo sensor device and the other photo sensor device.

[0024] According to this implementation, the second metal electrode is connected to the flat layer in between the photo sensor device and the other photo sensor device. Therefore, there is no need to implant a metal electrode with high concentration of ions on top of the Ge layer. This structure can reduce the defects or damages on the surface of the Ge photodiode. Furthermore, using the metal electrode can further reduce the wire resistance of the photodiode to ground or power supply.

[0025] In conjunction with the first aspect, in a possible implementation, the upper side of the germanium or silicon-germanium layer does not form an additional metal electrode.

[0026] According to this implementation, since no additional metal electrode is formed on the upper side of the germanium or silicon germanium layer, there are no defects or damages on the surface of the Ge photodiode due to etching.

[0027] In connection with a possible implementation form of the first aspect, the electrically conductive layer and the germanium or silicon germanium layer are formed in a trench prepared in a second substrate.

[0028] According to this implementation, the electrically conductive layer and the germanium or silicon germanium layer are formed in a trench prepared in a second substrate. Thus, the Ge photodiode can be prepared in the second substrate independently of the first substrate.

[0029] A second aspect provides an imaging system, the imaging system comprising:

[0030] a transmitter unit for transmitting light to an object;

[0031] a receiver unit comprising the array of light sensor devices for outputting a signal in dependence on the received light reflected from the object;

[0032] a processing unit for processing the output signal.

[0033] According to this implementation, the imaging arrangement comprises an array of light sensor devices. Thus, defects of dangling bonds can be suppressed by bonding to Si atoms, thereby reducing dark current and improving accuracy of the measurement distance.

[0034] A third aspect provides a method of preparing a light sensor device, the method comprising:

[0035] providing a first substrate;

[0036] forming a germanium or silicon germanium layer on the first substrate, the germanium or silicon germanium layer comprising an n-type germanium or silicon germanium layer and a p-type germanium or silicon germanium layer;

[0037] forming an electrically conductive layer consisting of a p-type silicon or silicon germanium layer, the electrically conductive layer being formed on top of and on sides of the germanium or silicon germanium layer.

[0038] In connection with a possible implementation form of the third aspect, forming the electrically conductive layer comprises:

[0039] forming the electrically conductive layer to be connected to another electrically conductive layer of another light sensor device adjacent to the light sensor device.

[0040] In connection with a possible implementation form of the third aspect, the method further comprises:

[0041] forming a first metal electrode connected to the electrically conductive layer intermediate the light sensor device and the other light sensor device.

[0042] With reference to a possible implementation form of the third aspect, the method further comprises:

[0043] forming an insulating layer between the first substrate and the germanium or silicon-germanium layer, the first substrate and the germanium or silicon-germanium layer being connected by a metal region placed in the insulating layer.

[0044] With reference to a possible implementation form of the third aspect, forming the electrically conductive layer comprises:

[0045] forming the electrically conductive layer such that the electrically conductive layer has a flat layer formed on top of the germanium or silicon-germanium layer and extending such that the flat layer is connected to the other electrically conductive layer of the other photo sensor device.

[0046] With reference to a possible implementation form of the third aspect, the method further comprises:

[0047] forming a second metal electrode connected to the flat layer in between the photo sensor device and the other photo sensor device.

[0048] A fourth aspect provides a method of manufacturing a photo sensor device, the method comprising:

[0049] providing a first silicon substrate;

[0050] manufacturing a trench in a second silicon substrate;

[0051] forming an electrically conductive layer on the trench, the electrically conductive layer consisting of a p-type silicon or silicon-germanium layer;

[0052] forming a germanium or silicon-germanium layer in the trench such that the electrically conductive layer covers a top and a side of the germanium or silicon-germanium layer, wherein the germanium or silicon-germanium layer comprises an n-type germanium or silicon-germanium layer and a p-type germanium or silicon-germanium layer.

[0053] With reference to a possible implementation form of the fourth aspect, forming the electrically conductive layer comprises:

[0054] forming the electrically conductive layer to be connected to an other electrically conductive layer of an other photo sensor device adjacent to the photo sensor device.

[0055] With reference to a possible implementation form of the fourth aspect, the method further comprises:

[0056] forming a first metal electrode connected to the electrically conductive layer in between the photo sensor device and the other photo sensor device.

[0057] With reference to a possible implementation form of the fourth aspect, the method further comprises:

[0058] An insulating layer is formed between the first substrate and the germanium or germanium-silicon layer, the first substrate and the germanium or germanium-silicon layer being connected through a metal region disposed in the insulating layer.

[0059] In conjunction with one possible implementation of the fourth aspect, forming the conductive layer includes:

[0060] The conductive layer is formed such that it has a planarization layer, which is formed on top of and extends from the germanium or germanium-silicon layer, such that the planarization layer is connected to the other conductive layer of the other optical sensor device.

[0061] In conjunction with one possible implementation of the fourth aspect, the method further includes:

[0062] A second metal electrode is formed, which is connected to the planar layer between the optical sensor device and the other optical sensor device. Attached Figure Description

[0063] To more clearly illustrate the technical solutions in the embodiments of the present invention or the background art, the following briefly describes the accompanying drawings required to describe the embodiments of the present invention or the background art, wherein:

[0064] Figure 1 A schematic cross-sectional view of a Ge photodiode integrated with a Si optical waveguide is shown.

[0065] Figure 2 A schematic cross-sectional view of the pixel structure of the TOF sensor provided in the embodiment is shown;

[0066] Figure 3 A plan view of the TOF sensor is shown;

[0067] Figure 4 A diagram illustrating a method for fabricating a TOF sensor is shown.

[0068] Figure 5 A schematic cross-sectional view of the pixel structure of the TOF sensor provided in the embodiment is shown;

[0069] Figure 6 A plan view of the TOF sensor is shown;

[0070] Figure 7 A schematic cross-sectional view of the pixel structure of the TOF sensor provided in the embodiment is shown;

[0071] Figure 8 A diagram illustrating the method for fabricating a chip according to an embodiment is shown;

[0072] Figure 9 A diagram illustrating a method for fabricating a TOF sensor is shown.

[0073] Figure 10 A schematic cross-sectional view of a pixel structure of a TOF sensor provided by an embodiment is shown;

[0074] Figure 11 A diagram of a method of fabricating an on-chip provided by an embodiment is shown;

[0075] Figure 12 A diagram of a method of fabricating a TOF sensor is shown;

[0076] Figure 13 A schematic cross-sectional view of a pixel structure of a TOF sensor provided by an embodiment is shown;

[0077] Figure 14 A diagram of a method of fabricating a TOF sensor is shown;

[0078] Figure 15 A diagram of a method of fabricating a TOF sensor is shown;

[0079] Figure 16 A block diagram of a TOF system structure provided by an embodiment of the present application is shown;

[0080] Figure 17 A diagram of a technique of determining a feature of an object is shown. DETAILED DESCRIPTION

[0081] The terms used in the embodiments of the present application are only used to describe specific embodiments of the present application, and are not intended to limit the present application.

[0082] (First Embodiment)

[0083] First, the working principle of a Ge photodiode will be described. Figure 1 A schematic cross-sectional view of a Ge photodiode integrated with a Si optical waveguide is shown. A mesa-structured undoped Ge photodiode layer 18-6 is fabricated in a p+ or phosphorus-implanted n+ plate region of a silicon on insulator (SOI) layer 18-1. A Si layer 18-2 covers the top and sides of the Ge photodiode layer 18-6, and a metal electrode 18-3 is fabricated on the Ge photodiode layer 18-6. N- or p-type dopant ions are implanted in the Si cover layer 18-2 and near the surface of the Ge photodiode layer 18-6 to form n+ or p+ regions 18-5. A SiO2 mask 18-4 is formed on the Si layer 18-2, and the SiO2 mask 18-4 of the n+ or p+ regions 18-5 is etched. Furthermore, a metal electrode 18-3 is formed in the etched cavity on top of the n+ or p+ regions 18-5. Further, electrodes 18-7 are placed on the SOI layer 18-1 and on the sides of the SiO2 mask 18-4.

[0084] In this structure, (1) the Si layer covers the top and side of the Ge photodiode layer, and (2) the metal electrode is prepared on the Ge photodiode layer. According to the structure (1), defects of dangling bonds can be suppressed by bonding with Si atoms. However, according to the structure (2), the etching damages the surface of the Ge photodiode, resulting in more defects, i.e., dark current. Embodiments of the present application are provided to solve this dark current problem.

[0085] Figure 2 A schematic cross-sectional view of a pixel structure of a TOF sensor provided by a first embodiment of the present application is shown. The figure corresponds to a cross-section at the dotted line L shown in Figure 3 The TOF sensor is one example of a light sensor device. A Ge photodiode 1-1 of each pixel is formed on a Si substrate 1-13. The thickness of the Si substrate is about 3 μm. The Ge photodiode 1-1 is a stack of a p-Ge layer 1-3 and an n-Ge layer 1-2. The p-Ge layer 1-3 is doped with a p-dopant. For example, boron can be doped at a concentration of 10 17 / cm 3 The n-Ge layer 1-2 is doped with an n-dopant. For example, phosphorus can be doped at a concentration of 10 16 / cm 3 ~ 10 19 / cm 3 The thickness of the Ge photodiode 1-1 is designed to have a higher quantum efficiency. For example, the thickness is about 2 μm. The p-Si layer 1-4 is formed on the top and side of the Ge photodiode 1-1. The p-Si layer 1-4 is doped with a p-dopant. For example, boron can be doped at a concentration of 10 16 / cm 3 ~ 10 19 / cm 3 The thickness of the p-Si layer 1-4 is about 1 nm ~ 200 nm. The p-Si layer 1-4 is a buffer layer for suppressing dark current due to Ge surface defects, as shown by "A" in Figure 2 In addition, the p-Si layer 1-4 is also a conductive layer that connects to the GND (ground) and p-Si layer of an adjacent TOF pixel. This connection is shown by "B" in Figure 2

[0086] ​The p-Si layer 1-4 and the Si substrate 1-13 are insulated by the SiO2 layer 1-14. Additionally, an intermediate layer 1-5, a passivation layer 1-6, and a lens 1-7 are prepared on the p-Si layer 1-4. The intermediate layer 1-5 is a silicon oxide layer or a silicon nitride layer. The passivation layer 1-6 is a silicon nitride layer. If water penetrates into the Si substrate 1-13, a chemical reaction of silicon and water can cause a decrease in performance reliability. The passivation layer 1-6 is used to prevent water from penetrating into the Si substrate 1-13. The lens 1-7 is a transparent material (resin or silicon nitride) that focuses incident light on the Ge photodiode. In this figure, the lens 1-7 includes a flat portion 1-7a and a convex portion 1-7b. Figure 3 (a) shows a plan view of the TOF sensor shown in Figure 2 (b) shows a cross-sectional view of the TOF sensor in the plan x1 shown in Figure 3 (c) shows a bottom view of the TOF sensor shown in Figure 2 (d) shows a cross-sectional view of the TOF sensor in the plan x2 shown in Figure 3 (e) shows a cross-sectional view of the TOF sensor in the plan x3 shown in Figure 2 (f) shows a cross-sectional view of the TOF sensor in the plan x4 shown in

[0087] The Si substrate 1-13 has an n-type Si region 1-8, a p-type Si region 1-9, a p-type Si region 1-10, and a floating diffusion region 1-11. The n-type Si region 1-8 is used for electron transfer and is doped with n-dopants therein. For example, phosphorus can be doped at a concentration of 10 17 / cm 3 . The p-type Si region 1-9 is used to isolate the floating diffusion region 1-11 from the p-type Si region 1-10.

[0088] The p-type Si region 1-9 is doped with p-dopants. For example, boron can be doped at a concentration of 10 16 / cm 3 ~ 10 19 / cm 3 . The p-type Si region 1-10 can have a p+ doping and is doped with p-dopants (e.g., boron doped at a concentration of 10 18 / cm 3 . The floating diffusion region 1-11 can have an n+ doping and can be doped with n-dopants (e.g., phosphorus doped at a concentration of 10 16 / cm 3 ~ 10 19 / cm 3 .

[0089] Further, the n-type Si region 1-8 is used for a photoelectric conversion layer of a (photo)diode configured at each pixel between the p-type Si regions 1-9.

[0090] Below the substrate 1-13, two transfer gates 1-12 are prepared for each pixel for reading out the transferred electrons. The transfer gates 1-12 can transfer the generated electrons in the Ge photodiode 1-15 to the floating diffusion region 1-11 through the n-type Si region 1-8 and the p-type Si region 1-10.

[0091] Additionally, although the metal content and the wire are omitted in this figure, the metal content and the wire can also be prepared below the Si substrate 1-13. The metal content and the wire can transfer the generated electrons from the floating diffusion region 1-11 to a signal processor as a signal for calculating a measurement value.

[0092] The Ge photodiode 1-1 can be used to detect a light signal and convert the light signal to an electrical signal, which can be further processed by other circuits such as a signal processor. Specifically, the Ge photodiode 1-1 receives a light signal through the lens 1-7 and the passivation layer 1-6 and generates free carriers. The generated free carriers can drift or diffuse into the n-type Si region 1-8. Generally, a difference between the Fermi level of the p-type Si region 1-10 and the Fermi level of the n-type Si region 1-8 creates an electric field between the two regions, in which free electrons collected by the n-type Si region 1-8 from the Ge photodiode 1-1 drift through the electric field to a region below the p-type Si region 1-10.

[0093] The transfer gates 1-12 can be coupled to a voltage source. A control signal from the voltage source controls the flow of free electrons from the region below the p-type Si region 1-10 to the floating diffusion region 1-11. For example, if the voltage of the control signal exceeds a threshold voltage, the free electrons accumulated in the region below the p-type Si region 1-10 will drift to the floating diffusion region 1-11. A signal (free electrons) from the floating diffusion region 1-11 can be read by the signal processor.

[0094] Generally, a material absorbs light of various wavelengths to generate free carriers depending on the band gap associated with the material. For example, at room temperature, Si can have a band gap of 1.12 eV and Ge can have a band gap of 0.66 eV. Generally, a material with a lower band gap has a higher absorption coefficient at a particular wavelength. If the absorption coefficient of the material used for the photodiode is too low, the photodiode cannot efficiently convert the optical signal to an electrical signal. However, if the absorption coefficient of the material is too high, free carriers can be generated near the surface of the material which can recombine to reduce the photoconversion efficiency. In this sense, Si is not an efficient sensor material for NIR wavelengths (780 nm to 2500 nm) because of its large band gap. On the other hand, the absorption coefficient of Ge can be too high for shorter wavelengths (e.g., blue) where free carriers can recombine at its surface. A photodiode array with Ge can detect NIR light.

[0095] It should be noted that p-germanium-silicon (GeSi) layers can be used instead of the p-Si layers 1-4 as the conductive layers. Further, the n-Ge layers 1-2 can be replaced with n-GeSi layers. Further, the p-Ge layers 1-3 can be replaced with p-GeSi layers. In this document, the terms "germanium-silicon (GeSi)" and "silicon-germanium (SiGe)" can be used interchangeably.

[0096] In this document, the term "photodiode" can be used interchangeably as the term "photosensor".

[0097] Further, the Ge layers can be formed using full epitaxy, selective epitaxy, or other suitable techniques.

[0098] Further, in the case of germanium-silicon layers, a strained superlattice structure including multiple layers (e.g., alternating SiGe layers with different compositions) can be used to absorb or form quantum well structures. Germanium-silicon alloys can have a band gap between 0.66 eV and 1.12 eV depending on the composition, including all suitable combinations of Si and Ge compositions from 100% Ge to 90% or more Si.

[0099] In some implementations, the dopants can be selected from suitable materials. For example, n-type dopants can be selected from a group of phosphorus (P), arsenic (As), and antimony (Sb). In addition, p-type dopants can be selected from a group of boron (B), alminum (Al), gallium (Ga), and indium (In).

[0100] Next, a method of manufacturing a TOF sensor will be described with reference to Figure 4 A method of manufacturing a TOF sensor will be described. First, a Si substrate 1-13 is provided, and a dopant is doped therein to form the n-type Si region 1-8, the p-type Si region 1-9, the p-type Si region 1-10, and the floating diffusion region 1-11, as shown in (a). Under the Si substrate 1-13, the transfer gate 1-12 is coupled to the p-type Si region 1-10 and the floating diffusion region 1-11.

[0101] Then, the SiO2 layer 1-14 is deposited on the Si substrate by chemical vapor deposition (CVD), as shown in (b).

[0102] Then, resist coating is performed on the SiO2 layer 1-14, and is patterned to form a resist 4-1, as shown in (c). After the resist 4-1 is formed, the SiO2 layer 1-14 is etched to obtain an isolated SiO2 layer 1-14, as shown in (d); and the n-Ge layer 1-2 and the p-Ge layer 1-3 are deposited on the n-doped region 1-8 of the Si substrate 1-13 by CVD, as shown in (e). In the case of Ge, the stack is grown only in the n-doped region of the Si substrate 1-13. Therefore, the Ge photodiode 1-1 can be formed only in the n-type Si region 1-8.

[0103] After the Ge photodiode 1-1 is formed, the p-Si layer 1-4 is formed to cover the surface of the SiO2 layer 1-5, as shown in (f). Then, the SiO2 layer 1-5 is deposited on the p-Si layer, as shown in (g); and chemical mechanical polishing (CMP) is performed on the top of the SiO2 layer 1-5, as shown in (h). Finally, the passivation layer 1-6 and the lens 1-7 are stacked on the SiO2 layer 1-5 in sequence, as shown in (i).

[0104] (Second Embodiment)

[0105] The second embodiment of the present application will be described below. In this embodiment, a metal electrode is connected to a conductive layer in the middle of adjacent photo sensor devices.

[0106] Figure 5 A schematic cross-sectional view of a pixel structure of a TOF sensor provided by the second embodiment of the present application is shown. In the pixel structure, the layer structure from the transfer gate 1-12 to the p-Si layer 1-4 is the same as that of the first embodiment. The TOF sensor includes the Ge photodiode 1-1 on the Si substrate 1-13. In addition, the p-Si layer 1-4 is formed on the top and side of the Ge photodiode 1-1. The p-Si layer 1-4 is a buffer layer for suppressing the dark current caused by the surface defects of the Ge photodiode 1-1. Further, a metal electrode 5-1 is connected to the p-Si layer. The metal electrode 5-1 is a T-shaped electrode made of tungsten (W) and placed in the middle of one TOF sensor device and another TOF sensor device. The top of the metal electrode 5-1 is placed in the passivation layer 1-6, and its vertically elongated member 5-2 penetrates into the SiO2 layer 1-5.

[0107] Figure 6 A plan view of the TOF sensor is shown. The metal electrode 5-1 can be connected to a metal electrode 6-1 which extends in the horizontal direction in the boundary region of the TOF sensor.

[0108] According to this embodiment, the TOF sensor can increase the dark current for at least two reasons. First, the p-Si layer is prepared on the top and side of the Ge photodiode, so that the defects of dangling bonds can be suppressed by bonding Ge atoms and Si atoms. Second, the metal electrode is not formed on the upper side of the Ge layer. Since the metal electrode with high concentration of ions does not need to be implanted on the top of the Ge layer, there is no defect or damage on the surface of the Ge photodiode caused by etching.

[0109] Further, the metal electrode 1-5 can be connected to GND. Accordingly, compared with the first embodiment, the wire resistance from the Ge photodiode to GND or a power supply is further reduced. This embodiment can simultaneously achieve lower dark current and lower wire resistance.

[0110] Next, a method of manufacturing the TOF sensor will be described. The layer structure from the transfer gate 1-12 to the p-Si layer 1-4 can be prepared in the same way as Figure 4 (a) to Figure 4(h) The same method is prepared as described in connection with the first embodiment. Then, the SiO2layer 1-5 is etched so that a cavity penetrates into the SiO2layer 1-5 to reach the p-Si layer 1-4. Then, the vertical elongated member 5-2 of the metal electrode 5-1 is inserted into the cavity. Finally, the passivation layer 1-6 and the lens 1-7 are stacked on the SiO2layer in turn, as Figure 4 (i) is shown.

[0111] (Third embodiment)

[0112] The third embodiment of the present application will be described below. In this embodiment, the Ge photodiode is connected to the p-Si layer through a Si epitaxial layer.

[0113] Figure 7 A schematic cross-sectional view of a pixel structure of a TOF sensor provided by the third embodiment of the present application is shown. As shown in the figure, the TOF sensor is composed of an upper chip 7-1 and a lower chip 7-7. In the upper chip 7-1, layers of the p-Ge layer 1-3 and the n-Ge layer 1-2 are formed on a Si epitaxial layer 7-4 and a stacked metal region 7-3 composed of a tungsten layer and a copper (Cu) layer. A tungsten layer (thickness of about 50-100 nm) is formed on the lower side of the n-Ge layer 1-2. In addition, a copper (Cu) layer (thickness of about 100-300 nm) is formed. The lower chip 7-7 is composed of the transfer gate 1-12, the Si substrate 1-13, a Si epitaxial layer 7-5 and a stacked metal region 7-6 composed of a tungsten layer and a copper (Cu) layer. A tungsten layer (thickness of about 100-300 nm) is formed on the Si layer 1-8. In addition, a copper (Cu) layer (thickness of about 100-300 nm) is formed.

[0114] The upper chip 7-1 and the lower chip 7-7 are bonded by a bonding technique of the Cu side of the stacked metal region 7-3 of the upper chip 7-1 and the Cu side of the stacked metal region 7-6 of the lower chip 7-7. The Si epitaxial layer 7-4 is deposited by Si epitaxial growth, such as a Molecular Beam Epitaxy (MBE) growth technique or a metal organic chemical vapor deposition (MOCVD) epitaxial technique.

[0115] Other explanations are the same as the first embodiment.

[0116] Next, a method of fabricating an upper chip will be described in connection with the figures. First, a Si substrate (second substrate) 7-2 is provided, as shown in (a). Resist coating is performed on the lower surface of the Si substrate 7-2 to add a resist 8-1, as shown in (b). Then, Si etching is performed on the lower surface of the Si substrate 7-2 to fabricate a trench (cavity) 8-2, and the resist 8-1 is removed, as shown in (c). Then, the p-Si layer 1-4 is grown on the lower surface of the Si substrate 7-2, as shown in (d). Then, the p-Ge layer 1-3 and the n-Ge layer 1-2 are formed on the p-Si layer 7-1 by CVD or MOCVD, as shown in (e).

[0117] After the process shown in (e), the lower surface of the p-Si layer is covered by the p-Ge layer 1-3 and the n-Ge layer 1-2. In (f), Ge planarization is performed by CMP to expose the p-Si layer 1-4. In this way, the Ge photodiode 1-1 can be formed in the trench 8-2, such that the p-Si layer 1-4 covers the top and sides of the Ge photodiode 1-1.

[0118] In (g), a SiO2 layer 7-4 is grown by CVD. Then, resist coating is performed on the lower surface of the SiO2 layer to add a resist 8-3, as shown in (h). Etching is performed to remove the SiO2 layer at the middle position to form a cavity 8-4, and the resist 8-2 is removed, as shown in (i). Further, resist coating is performed on portions of the lower surface of the SiO2 layer 7-4 to add a resist 8-5, as shown in (j); and additional etching is performed to form a stepped cavity 8-6, as shown in (k). Herein, the stepped cavity 8-6 can be formed as a rectangle. Then, electroplating is performed to plate W and Cu on the entire lower surface, as shown in (l). Finally, CMP is performed on the Cu to form the stacked metal region 7-3, as shown in (m).

[0119] Figure 9 A method of fabricating a TOF sensor provided by this embodiment is shown. (a) shows the upper chip 7-1 of the Ge photodiode fabricated by the method described above. (b) shows the lower chip for signal processing, in which the SiO2 epitaxial layer 7-5 and the stacked metal region 7-6 are fabricated by the processes described in connection with (l) and (m) above. Figure 8 The upper chip 7-1 of the Ge photodiode fabricated by the method described above. (b) shows the lower chip for signal processing, in which the SiO2 epitaxial layer 7-5 and the stacked metal region 7-6 are fabricated by the processes described in connection with (l) and (m) above. Figure 8 (l) and Figure 8 (m) above.

[0120] In the figures, the upper chip 7-1 and the lower chip 7-7 are combined by chip-to-chip bonding, as shown in (c). Finally, the passivation layer 1-6 and the lens 1-7 are stacked on the Si substrate 7-2 in turn, as shown in (d).

[0121] (Fourth embodiment)

[0122] The fourth embodiment of the present application will be described below. In this embodiment, the p-Si layer has a flat surface across multiple TOF sensors.

[0123] Figure 10 A schematic cross-sectional view of a pixel structure of a TOF sensor provided by the fourth embodiment of the present application is shown. As shown in the figure, the TOF sensor is composed of an upper chip 10-2 and a lower chip 7-7. The upper chip 7-2 and the lower chip 7-7 are bonded by a bonding technique of the stacked metal region 7-3 of the upper chip 10-2 and the stacked metal region 10-6 of the lower chip 7-7.

[0124] Compared with the third embodiment, the TOF sensor provided by this embodiment does not have a metal electrode. Instead, the p-Si layer 1-4 of the upper chip 10-2 includes a top 10-1 having a flat shape extending in a horizontal direction across the multiple TOF sensors. In addition, the top 10-1 is connected to GND. Other explanations are the same as those of the third embodiment.

[0125] According to this embodiment, compared with the first embodiment, the wire resistance from the Ge photodiode to GND (or a power supply) is further reduced.

[0126] Next, a method of preparing an upper chip will be described in combination with the figures. First, the Si substrate 7-2 is provided, as shown in (a). Then, the Si substrate is doped by implanting p-type impurity ions, so that the top 10-1 is formed, as shown in 10-1. In one embodiment, the p-type impurity is implanted from the lower part of the Si substrate 7-2, as shown by the arrow in (b). Resist coating is performed on the lower surface of the Si substrate 7-2 to add resist 8-1, as shown in (c). Then, Si etching is performed on the lower surface of the Si substrate 7-2 to prepare a trench 8-2, and the resist 8-1 is removed, as shown in (d). Then, the p-Si layer 1-4 is grown on the lower surface of the Si substrate 7-2, as shown in (e). Then, the p-Ge layer 1-3 and the n-Ge layer 1-2 are formed on the p-Si layer 7-1 by CVD or MOCVD, as shown in (f).

[0127] After the process shown in (f), the lower surface of the p-Si layer is covered by the p-Ge layer 1-3 and the n-Ge layer 1-2. In (g), Ge planarization is performed by CMP to expose the p-Si layer 1-4. In (h), a SiO2 layer 7-4 is grown by CVD. Then, resist coating is performed on the lower surface of the SiO2 layer to add resist 8-3, as shown in (i). Etching is performed to remove the SiO2 layer 7-4 at the intermediate position to form a cavity 8-4, and the resist 8-2 is removed, as shown in (j). Further, resist coating is performed on portions of the lower surface of the SiO2 layer 7-4 to add resist 8-5, as shown in (k); and additional etching is performed to form a stepped cavity 8-6, as shown in (1). Then, electroplating is performed to plate W and Cu on the entire lower surface, as shown in (m). Finally, CMP is performed on the Cu to form the stacked metal region 7-3, as shown in (n).

[0128] Figure 12 A method for preparing a TOF sensor provided by this embodiment is shown. (a) shows the upper chip 10-2 of the Ge photodiode prepared by combining Figure 11 the SiO2 epitaxial layer 7-5 and the stacked metal region 7-6 by combining Figure 11 (m) and Figure 11 (n) described above.

[0129] In Figure 12 , the upper chip 10-2 and the lower chip 7-7 are combined by chip-to-chip bonding, as shown in (c). Finally, the passivation layer 1-6 and the lens 1-7 are stacked on the Si substrate 7-2 in sequence, as shown in (d).

[0130] (Fifth Embodiment)

[0131] The fifth embodiment of the present application will be described below. In this embodiment, a metal electrode is added at the intermediate position of the TOF sensor provided by the fourth embodiment.

[0132] Figure 13A schematic cross-sectional view of the pixel structure of the TOF sensor provided in the fifth embodiment of the present invention is shown. In this pixel structure, the layer structure from the transfer gate 1-12 to the top 10-1 is the same as in the fourth embodiment. The TOF sensor includes the Ge photodiode 1-1 on the Si substrate 1-13. Further, a metal electrode 13-1 is connected to the top 10-1 at the middle position of the TOF sensor. The top of the metal electrode 13-1 is placed in the passivation layer 1-6 and penetrates into the Si substrate 7-2. The lower edge of the metal electrode 13-1 is connected to the top 10-1. A plan view of the TOF sensor provided in this embodiment is shown below. Figure 6 As shown. Other explanations are the same as those in the fourth embodiment described.

[0133] According to this embodiment, compared with the first embodiment, the resistance of the wire from the Ge photodiode to GND (or power supply) is further reduced.

[0134] Figure 14 The method for fabricating a TOF sensor provided in this embodiment is illustrated. (a) It shows the method of combining... Figure 11 The upper chip 10-2 of the Ge photodiode is fabricated by the described method. (b) The lower chip 7-7 for signal processing is shown, wherein the SiO2 epitaxial layer 7-5 and the stacked metal region 7-6 are bonded together. Figure 11 (m) and Figure 11 (n) describes the process of preparation.

[0135] exist Figure 14 In step (c), the upper chip 10-2 and the lower chip 7-7 are assembled by chip-to-chip bonding. Then, the passivation layer 1-6 and the photoresist 14-1 are sequentially stacked on the SiO2 layer, as shown in (d). In (e), the Si substrate 7-2 is etched to form the cavity 14-2. Finally, the metal electrode 13-1 is inserted into the cavity 14-2, as shown in (f).

[0136] The preparation process continues until... Figure 15 In (a), an additional resist coating is applied to deposit resist 15-1. Then, the metal electrode 13-1 is etched to form a cavity 15-2, as shown in (b), thereby forming an isolated metal electrode 13-1. Finally, an additional passivation layer 1-6 and a lens 1-7 are sequentially stacked on the SiO2 layer, as shown in (c).

[0137] (Sixth Embodiment)

[0138] The following describes the specific process of calculating distance using a TOF sensor provided in the above embodiments.

[0139] In time-of-flight (TOF) applications, phase differences between emitted and detected light pulses can be used to determine depth information of a three-dimensional object. For example, a two-dimensional array of pixels can be used to reconstruct a three-dimensional image of a three-dimensional object, where each pixel can include one or more photodiodes for deriving phase information of the three-dimensional object. In some implementations, time-of-flight applications use light sources with wavelengths in the near-infrared (NIR) range. For example, light-emitting-diodes (LEDs) can have wavelengths of 850 nm, 940 nm, or 1550 nm. While some photodiodes can use Si as an absorption material, Si is an inefficient absorption material for NIR wavelengths. Specifically, photo-carriers can be generated deep within the Si substrate (e.g., greater than 10 pm in depth) and these photo-carriers can slowly drift and / or diffuse to the photodiode junction, resulting in reduced device bandwidth. Additionally, Ge has a higher absorption coefficient and higher mobility. The following equation represents the mobility p of Ge and Si e .

[0140] Ge: p = 0.39 m e / Vs 2 Si: p = 0.15 m e / Vs 2 .

[0141] Therefore, photodiode operation is typically controlled using small voltage swings to minimize power consumption.

[0142] Figure 16 A TOF system 16-4 for determining characteristics of a target object 16-7 is shown. The target object 16-7 can be a three-dimensional object. The TOF system 16-4 provided as an imaging system in this embodiment can include an emitter unit 16-1, a receiver unit 16-2, and a processing unit 16-3. Generally, the emitter unit 16-1 emits light 16-5 toward the target object 16-7. The emitter unit 16-1 can include one or more light sources, control circuitry, and / or optical elements. For example, the emitter unit 16-1 can include one or more NIR light sources or visible light LEDs, where the emitted light 16-5 can be collimated by a collimating lens for propagation in free space.

[0143] Generally, the receiver unit 16-2 receives reflected light 16-6 reflected from the target object 16-7. The receiver unit 16-2 can include one or more photodiodes, control circuitry, and / or optical elements. For example, the receiver unit 16-2 can include an image sensor, where the image sensor includes a plurality of pixels fabricated on a semiconductor substrate. Each pixel can include one or more multi-gate photodiodes for detecting the reflected light 16-6, where the reflected light 16-6 can be focused onto the photodiodes. Each photodiode can be a multi-gate photodiode as described herein.

[0144] Generally, the processing unit 16-3 processes the photo-carriers generated by the receiver unit 16-2 and determines a characteristic of the target object 16-7. The processing unit 16-3 can include control circuitry, one or more processors, and / or computer storage media that can store instructions for determining the characteristic of the target object 16-7. For example, the processing unit 16 includes readout circuit 1 16-8, readout circuit 2 16-9, and a processor 16-10 that can process information associated with the collected photo-carriers to determine the characteristic of the target object 16-7. In some implementations, the characteristic of the target object 16-7 can be depth information of the target object 16-7.

[0145] Figure 17 An example technique for determining a characteristic of the target object 16-7 is shown. The transmitter unit 16-1 can transmit light pulses modulated at a frequency fm, for example, with a 50% duty cycle. The receiver unit 16-2 can receive reflected light pulses with a phase shift of Φ. The multi-gate photodiodes are controlled such that readout circuit 1 reads collected charge Q1 in a phase that is synchronized with the transmitted light pulses, and readout circuit 2 reads collected charge Q2 in a phase that is opposite to the transmitted light pulses. In some implementations, the distance D between the TOF system 16-4 and the target object 16-7 can be derived using the following equation:

[0146] D = (c / (4*fm))*(Q2 / (Q1+Q2),

[0147] where c is the speed of light.

[0148] By using high sensitivity infrared light, embodiments of the present disclosure can be used for TOF sensors for smartphones (mainly for face recognition). This is applicable to high resolution TOF sensors with low dark current. Since Ge has a higher absorption coefficient than Si layers, Ge provides higher sensitivity than Si with the same pixel size.

[0149] Embodiments of the present application can be used for high wavelength TOF sensors with lower dark current, for example, wavelengths equal to 940 nm, 1550 nm. In particular, for high wavelengths, while TOF sensors using Si photodiodes have almost no quantum efficiency (QE) sensitivity, TOF sensors using Ge have said sensitivity (QE > 40%). High wavelength light is safer for the eyes.

[0150] To sum up, the above description is only an example of the technical solution of the present application, and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made without departing from the principle of the present application shall be included in the protection scope of the present application.

Claims

1. An optical sensor device, characterized by comprising: a first substrate; a layer of germanium or silicon-germanium formed on the first substrate, the layer of germanium or silicon-germanium comprising an n-type layer of germanium or silicon- germanium and a p-type layer of germanium or silicon-germanium; a conductive layer consisting of a layer of p-type silicon or silicon-germanium, the conductive layer being formed on top of and on sides of the layer of germanium or silicon- germanium.

2. The optical sensor device according to claim 1, characterized in that the conductive layer being connected to another conductive layer of another light sensor device adjacent to the light sensor device.

3. The optical sensor device according to claim 2, characterized in that further comprising: a first metal electrode connected to the conductive layer intermediate the light sensor device and the other light sensor device.

4. The optical sensor device according to claim 1, characterized in that an insulating layer is formed between the first substrate and the layer of germanium or silicon- germanium, the first substrate and the layer of germanium or silicon-germanium being connected by a metal region placed in the insulating layer.

5. The optical sensor device according to claim 2, characterized in that the conductive layer has a flat layer formed on top of the layer of germanium or silicon- germanium and extending such that the flat layer is connected to the other conductive layer of the other light sensor device.

6. The optical sensor device according to claim 5, characterized in that further comprising: a second metal electrode connected to the flat layer intermediate the light sensor device and the other light sensor device.

7. The light sensor device according to any one of claims 1 to 6, characterized in that, no additional metal electrode is formed on an upper side of the layer of germanium or silicon- germanium.

8. The light sensor device according to any one of claims 1 to 6, characterized in that, the conductive layer and the layer of germanium or silicon-germanium are formed in a trench prepared in a second substrate.

9. An imaging system characterized by, comprising: a transmitter unit for transmitting light towards an object; a receiver unit comprising a light sensor device according to any of claims 1 to 8 for outputting a signal in dependence on received light reflected from the object; a processing unit for processing the output signal.

10. The imaging system of claim 9, wherein, the receiver unit comprises a plurality of the light sensor devices in an array.

11. A method of manufacturing a light sensor device, characterized by the method comprising: providing a first substrate; forming a layer of germanium or silicon-germanium on the first substrate, the layer of germanium or silicon-germanium comprising an n-type layer of germanium or silicon- germanium and a p-type layer of germanium or silicon-germanium; forming a conductive layer consisting of a layer of p-type silicon or silicon-germanium, the conductive layer being formed on top of and on sides of the layer of germanium or silicon- germanium.

12. The method of claim 11, wherein, forming the conductive layer comprises: forming the conductive layer to be connected to another conductive layer of another light sensor device adjacent to the light sensor device.

13. The method of claim 12, wherein, further comprising: forming a first metal electrode connected to the conductive layer intermediate the light sensor device and the other light sensor device.

14. The method according to any one of claims 11 to 13, characterized in that, further comprising: forming an insulating layer between the first substrate and the layer of germanium or silicon- germanium, the first substrate and the layer of germanium or silicon-germanium being connected by a metal region placed in the insulating layer.

15. The method of claim 12, wherein, forming the conductive layer comprises: forming the conductive layer to have a flat layer formed on top of the layer of germanium or silicon- germanium and extending such that the flat layer is connected to the other conductive layer of the other light sensor device.

16. The method of claim 15, wherein, further comprising: forming a second metal electrode connected to the flat layer intermediate the light sensor device and the other light sensor device.

17. A method of manufacturing a light sensor device, characterized by comprising: providing a first silicon substrate; preparing a trench in a second silicon substrate; forming a conductive layer on the trench, the conductive layer consisting of a layer of p-type silicon or silicon-germanium; forming a germanium or silicon-germanium layer in the trench such that the conductive layer covers a top and sides of the germanium or silicon-germanium layer, wherein the germanium or silicon-germanium layer comprises an n-type germanium or silicon-germanium layer and a p-type germanium or silicon-germanium layer.

18. The method of claim 17, wherein, forming the conductive layer includes: forming the conductive layer to connect to another conductive layer of another photosensor device adjacent to the photosensor device.

19. The method of claim 18, wherein, further comprising: forming a first metal electrode connected to the conductive layer intermediate the photosensor device and the another photosensor device.

20. The method of any one of claims 17-19, wherein, further comprising: forming an insulating layer between the first silicon substrate and the germanium or silicon-germanium layer, the first silicon substrate and the germanium or silicon-germanium layer connected by a metal region disposed in the insulating layer.

21. The method of claim 18, wherein, forming the conductive layer includes: forming the conductive layer to have a planar layer formed on a top of the germanium or silicon-germanium layer and extending such that the planar layer connects to the another conductive layer of the another photosensor device.

22. The method of claim 21, wherein, further comprising: forming a second metal electrode connected to the planar layer intermediate the photosensor device and the another photosensor device.

Images