Starting Method, Device and Medium of PLC Embedded Software

Abstract

This application belongs to the technical field of programmable logic controllers, and specifically relates to a startup method, device, and medium for PLC embedded software. The method includes: S10, initializing the exception handling interrupt vector table; S20, initializing the peripherals and watchdog of the processor; S30, performing integrity verification on internal storage and external storage to obtain a verification result, and loading corresponding firmware programs based on the verification result; S40, loading the embedded control software of the programmable logic controller and authenticating the embedded control software; S50, loading the application program of the programmable logic controller based on the authentication result to start the programmable logic controller running. The startup method of the PLC embedded software in this application avoids the situation of hardware system failure when the watchdog is not initialized, and greatly improves the reliability of PLC firmware startup.

Description

Technical Field

[0001] This application belongs to the technical field of programmable logic controllers, and particularly relates to a method for starting a PLC embedded software. Background Art

[0002] A programmable logic controller (PLC) is a digital operation controller with a microprocessor for automation control, which can load control instructions into memory at any time for storage and execution. A programmable controller consists of functional units such as a CPU, instruction and data memory, input / output interfaces, power supply, digital-to-analog conversion, etc.

[0003] In the field of construction machinery, PLCs often work in harsh environments such as extremely low temperatures, high-voltage static electricity, and lightning surges. As a programmable electronic device with a high degree of software and hardware integration, the reliable startup of the on-board embedded firmware is the key to the normal operation of the PLC.

[0004] Currently, for PLCs in the field of construction machinery, during the power-on initialization stage, a power monitoring hardware watchdog or a software watchdog is usually used to prevent abnormal conditions in the PLC software system program by feeding the watchdog regularly. However, this method cannot handle abnormal conditions in the system before the watchdog is initialized and cannot ensure the reliable operation of the PLC. Summary of the Invention

[0005] (I) Technical Problems to be Solved

[0006] In view of the above-mentioned shortcomings and deficiencies of the prior art, this application provides a method, device, and medium for starting a PLC embedded software.

[0007] (II) Technical Solutions

[0008] To achieve the above object, this application adopts the following technical solutions:

[0009] In a first aspect, an embodiment of this application provides a method for starting a PLC embedded software, which is applied to a processor of a programmable logic controller. The method includes:

[0010] S10. Initialize the exception handling interrupt vector table;

[0011] S20. Initialize the peripherals and watchdog of the processor;

[0012] S30. Perform integrity verification on the internal storage and external storage to obtain a verification result, and load the corresponding firmware program based on the verification result;

[0013] S40. Load the embedded control software of the programmable logic controller and authenticate the embedded control software;

[0014] S50: Load the application program of the programmable logic controller based on the authentication result to start the programmable logic controller.

[0015] Optionally, after S20 and before S30, the following steps are further included:

[0016] Perform bit flip check on internal and external storage.

[0017] Optionally, the internal storage is a static random access memory, and the external storage is a synchronous dynamic random access memory.

[0018] Optionally, S30 includes:

[0019] Calculating the CRC32 checksum of the firmware program in the internal flash memory of the processor, and comparing the calculated checksum of the firmware program with the program checksum solidified in the processor;

[0020] If the verification is successful, the firmware program in the internal flash memory is loaded, otherwise:

[0021] Calculate the CRC32 check code of the backup firmware program in the external SPI FLASH of the processor, and compare the calculated check code of the backup firmware program with the program check code solidified in the processor;

[0022] If the verification is successful, the firmware program of the external SPI FLASH is loaded.

[0023] Optionally, authenticating the embedded control software includes:

[0024] Read the random number stored in the parameter storage area of ​​the previous power-on program, calculate the verification number by using a preset encryption algorithm, authenticate the verification number with the key stored in the parameter storage area of ​​the previous power-on program, and generate a new random number and key, which are stored in the parameter storage area.

[0025] Optionally, the watchdog includes a hardware watchdog and / or a software watchdog.

[0026] In a second aspect, an embodiment of the present application provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, the steps of the method for starting the PLC embedded software as described in any one of the first aspects above are implemented.

[0027] In a third aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the PLC embedded software startup method described in any one of the above first aspects are implemented.

[0028] (III) Beneficial effects

[0029] The beneficial effects of the present application are as follows: The present application proposes a method, device, and medium for starting a PLC embedded software. The method includes: S10. Initializing an exception handling interrupt vector table; S20. Initializing the peripherals and watchdog of the processor; S30. Performing an integrity check on internal storage and external storage to obtain a check result, and loading a corresponding firmware program based on the check result; S40. Loading the embedded control software of the programmable logic controller and authenticating the embedded control software; S50. Loading the application program of the programmable logic controller based on the authentication result to start the programmable logic controller to run. The PLC embedded software startup method of the present application avoids the situation of hardware system failure when the watchdog is not initialized, and can greatly improve the reliability of PLC firmware startup. Description of the drawings

[0030] The present application is described with the aid of the following drawings:

[0031] Figure 1 It is a schematic flowchart of the PLC embedded software startup method in an embodiment of the present application;

[0032] Figure 2 It is a schematic flowchart of the PLC embedded software startup method in another embodiment of the present application;

[0033] Figure 3 It is a schematic diagram of the architecture of an electronic device in still another embodiment of the present application. Detailed implementation manners

[0034] In order to better explain the present invention for easy understanding, the present invention will be described in detail below with reference to the drawings through specific implementation manners. It can be understood that the specific embodiments described below are only used to explain the related invention and do not limit the invention. In addition, it should be noted that, without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other; for the sake of description, only the parts related to the invention are shown in the drawings.

[0035] Embodiment 1

[0036] The execution entity of this embodiment can be a processor located in a Programmable Logic Controller (PLC). A PLC is a digital electronic device with a microprocessor and is a digital logic controller for automation control. It can load control instructions into the memory for storage and operation at any time. The programmable controller is modularly composed of an internal CPU, instruction and data memories, input / output units, power modules, digital-to-analog units, etc. The PLC can receive (input) and send (output) various types of electrical or electronic signals and use them to control or monitor almost all types of mechanical and electrical systems.

[0037] Figure 1 It is a schematic flowchart of the startup method of the PLC embedded software in an embodiment of the present application. As Figure 1 shown, the startup method of the PLC embedded software in this embodiment includes:

[0038] S10. Initialize the exception handling interrupt vector table;

[0039] S20. Initialize the peripherals and watchdog of the processor;

[0040] S30. Perform integrity verification on the internal storage and external storage to obtain a verification result, and load the corresponding firmware program based on the verification result;

[0041] S40. Load the embedded control software of the programmable logic controller and authenticate the embedded control software;

[0042] S50. Load the application program of the programmable logic controller based on the authentication result to start the operation of the programmable logic controller.

[0043] The startup method of the PLC embedded software in this embodiment avoids the failure of the hardware system when the watchdog is not initialized by adding a program exception interrupt handling routine; and by performing integrity verification on the unused program and variable spaces during the initialization stage, the reliability of the PLC firmware startup is greatly improved.

[0044] To better understand the present invention, the following expands on each step in this embodiment.

[0045] In S20 of this embodiment, the watchdog includes a hardware watchdog and / or a software watchdog. The peripherals of the processor include a timer, an analog peripheral, a keyboard control chip, and a liquid crystal display; among them, the analog peripherals include a digital-to-analog converter, an analog-to-digital converter, etc.

[0046] In this embodiment S30, the internal storage can be Static Random-Access Memory (SRAM), and the external storage can be synchronous dynamic random-access memory (SDRAM).

[0047] In this embodiment S40, authenticating the embedded control software includes:

[0048] Reading the random number stored by the previous power-on program in the parameter storage area, calculating the verification number by using a preset encryption algorithm, authenticating the verification number with the key stored by the previous power-on program in the parameter storage area, and generating a new random number and key, which are stored in the ferro parameter storage area.

[0049] Embodiment Two

[0050] After the PLC is powered on, during the operation of the system's bootloader and control program, by completing the internal initialization and verification in the method of this embodiment, the reliability of the PLC embedded software startup is improved. In this embodiment, the controller adopted by the PLC is a Microcontroller Unit (MCU). Figure 2 It is a schematic flowchart of the startup method of the PLC embedded software in another embodiment of this application. As Figure 2 shown, the startup method of the PLC embedded software in this embodiment includes:

[0051] S1. The MCU initializes the exception handling interrupt vector table to establish the mechanism process of exception handling;

[0052] S2. The system's bootloader initializes the basic peripherals of the MCU, initializes the hardware watchdog and software watchdog, and starts the cycle timing to feed the dog;

[0053] S3. If there is an exception interrupt, handle the exception; here, the exception refers to the processor exception triggered by external interference and other factors during the PLC startup. It is handled by adding the processor exception status discrimination in the program and resetting the processor;

[0054] S4. Judge whether the internal SRAM and external SDRAM are normal:

[0055] If not normal, return to step S1;

[0056] If normal, execute step S5;

[0057] S5. Perform bit flip type verification on the internal SRAM and external SDRAM;

[0058] Specifically, it includes: calculating the CRC32 check code of the firmware program of the MCU internal FLASH, comparing the calculated check code of the firmware program with the program check code solidified in the MCU, if normal, loading the firmware program of the internal FLASH to run, and executing step S6; if the check fails, then

[0059] Calculate the CRC32 checksum of the MCU external SPI FLASH backup firmware program, and compare the calculated checksum of the firmware program with the program checksum solidified in the MCU. If normal, load the external SPI FLASH firmware program to run and execute step S6; if the check fails, the startup fails and an abnormality is prompted;

[0060] Through bit-flip checking, the technical risk of reliable startup of PLC embedded system software caused by electronic component parameters offset in extreme environments is avoided, thereby improving the reliability of PLC embedded software startup in harsh environments.

[0061] S6, load the PLC embedded control software, the control program starts running and punches in for authentication;

[0062] Specifically, the PLC embedded control software punch card authentication is to read the random number stored at the punch card point of the previous power-on program, calculate the verification number by using a special encryption algorithm, authenticate the verification number with the key stored at the punch card point of the previous power-on program, and generate a new random number and key, which are stored in the iron parameter storage area;

[0063] S7, determine whether the clocking is normal: if normal, the startup ends; otherwise, stop feeding the dog and the system restarts.

[0064] After the startup is complete, load the PLC application program and complete the system power-on startup.

[0065] This embodiment provides a verification method for PLC embedded firmware from power-on to loading PLC control program and application program. By adding a program exception interrupt processing routine, the hardware system failure when the watchdog is not initialized is avoided; the integrity failure of the PLC firmware is avoided by redundancy and verification of the internal Flash program space of the MCU and the external SPI-Flash firmware; by authenticating the PLC firmware program, setting a PLC control program punch-in point at the entrance of the PLC control program, verifying the previous power-on random number program running key, and creating a new random number and running key, the PLC embedded firmware program is reliably started. At the same time, combined with traditional hardware and software watchdogs, the reliability of PLC firmware startup is greatly improved, and the probability of software startup out of control when the PLC device is powered on is reduced.

[0066] Embodiment 3

[0067] In a third aspect of the present application, an electronic device is provided through Embodiment 4, including: a memory, a processor, and a computer program stored on the memory and executable on the processor. When the computer program is executed by the processor, the steps of the PLC embedded software startup method described in any one of the above embodiments are implemented.

[0068] Figure 3 It is a schematic diagram of the architecture of the electronic device in another embodiment of the present application.

[0069] Figure 3 The illustrated electronic device may include: at least one processor 101, at least one memory 102, at least one network interface 104, and other user interfaces 103. Each component in the electronic device is coupled together through a bus system 105. It can be understood that the bus system 105 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 105 also includes a power bus, a control bus, and a status signal bus. However, for the sake of clear illustration, in Figure 3 all kinds of buses are labeled as the bus system 105.

[0070] Among them, the user interface 103 may include a display, a keyboard, or a pointing device (such as a mouse, a trackball, or a touchpad, etc.).

[0071] It can be understood that the memory 102 in this embodiment may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), sync link dynamic random access memory (SLDRAM), and direct rambus random access memory (DRRAM). The memory 62 described herein is intended to include but not be limited to these and any other suitable types of memory.

[0072] In some embodiments, the memory 102 stores the following elements, executable units, or data structures, or subsets thereof, or extended sets thereof: an operating system 1021 and an application program 1022.

[0073] Among them, the operating system 1021 includes various system programs, such as a framework layer, a core library layer, a driver layer, etc., for implementing various basic services and processing hardware-based tasks. The application program 1022 includes various application programs for implementing various application services. The program for implementing the method of the embodiment of the present invention may be included in the application program 1022.

[0074] In the embodiment of the present invention, the processor 101, by calling the program or instruction stored in the memory 102, specifically, the program or instruction stored in the application program 1022, the processor 101 is used to execute the method steps provided in the first aspect.

[0075] The method disclosed in the embodiments of the present invention above can be applied to or implemented by the processor 101. The processor 101 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the integrated logic circuit in the hardware of the processor 101 or instructions in the form of software. The above-mentioned processor 101 may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field-programmable gate array or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute each method, step and logic block diagram disclosed in the embodiments of the present invention. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The steps of the method disclosed in combination with the embodiments of the present invention can be directly embodied as being executed and completed by the hardware decoding processor, or executed and completed by a combination of the hardware and software units in the decoding processor. The software unit may be located in a mature storage medium in the art such as random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, register, etc. This storage medium is located in the memory 102, and the processor 101 reads the information in the memory 102 and combines its hardware to complete the steps of the above method.

[0076] In addition, in combination with the above-mentioned PLC embedded software startup method in the embodiments, the embodiments of the present invention can provide a computer-readable storage medium. A computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, it implements any one of the PLC embedded software startup methods in the above method embodiments.

[0077] It should be noted that in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in the claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present invention can be implemented by means of hardware including several different elements and by means of a suitably programmed computer. The use of the words first, second, third, etc. is only for convenience of expression and does not denote any order. These words can be understood as part of the element name.

[0078] In addition, it should be noted that in the description of this specification, the descriptions of terms such as "one embodiment", "some embodiments", "embodiment", "example", "specific example" or "some examples" mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0079] Although the preferred embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications after learning the basic creative concepts. Therefore, the claims should be construed to include the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0080] Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention should also include these modifications and variations.

Claims

1. A method for starting PLC embedded software, It is characterized in that Applied in a processor of a programmable logic controller, the method comprises: S10, initialize the exception handling interrupt vector table; S20, initializing the peripherals and watchdog of the processor; S30, performing integrity check on the internal storage and the external storage to obtain a check result, and loading a corresponding firmware program based on the check result; S40, loading the embedded control software of the programmable logic controller, and authenticating the embedded control software; S50, loading the application program of the programmable logic controller based on the authentication result to start the operation of the programmable logic controller; Among them, S30 includes: Calculating the CRC32 checksum of the firmware program in the internal flash memory of the processor, and comparing the calculated checksum of the firmware program with the program checksum solidified in the processor; If the verification is successful, the firmware program in the internal flash memory is loaded, otherwise: Calculate the CRC32 check code of the backup firmware program in the external SPI FLASH of the processor, and compare the calculated check code of the backup firmware program with the program check code solidified in the processor; If the verification is successful, the firmware program of the external SPI FLASH is loaded; And, authenticating the embedded control software includes: Read the random number stored in the parameter storage area of ​​the previous power-on program, calculate the verification number by using a preset encryption algorithm, authenticate the verification number with the key stored in the parameter storage area of ​​the previous power-on program, and generate a new random number and key, which are stored in the parameter storage area.

2. The method for starting the PLC embedded software according to claim 1, It is characterized in that After S20 and before S30, it also includes: Perform bit flip check on internal and external storage.

3. The method for starting the PLC embedded software according to claim 1, It is characterized in that The internal storage is a static random access memory, and the external storage is a synchronous dynamic random access memory.

4. The method for starting the PLC embedded software according to claim 1, It is characterized in that The watchdog includes a hardware watchdog and / or a software watchdog.

5. An electronic device, It is characterized in that include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, the steps of the method for starting the PLC embedded software as described in any one of claims 1 to 4 are implemented.

6. A computer-readable storage medium, It is characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for starting the PLC embedded software as described in any one of claims 1 to 4 are implemented.

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