A three-dimensional stacking structure of radio frequency circuit and manufacturing method thereof
By first completing the sintering and cavity processing of the multi-layer co-fired ceramic substrate in the RF circuit, and then using microspheres to realize signal interconnection between the adapter plate and the multi-layer co-fired ceramic substrate, the problems of high-density integration and signal transmission efficiency in the three-dimensional stacking structure of the RF circuit are solved, and high-quality RF circuit integration and signal transmission are achieved.
Patent Information
- Application Number
- CN202210649622.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-19
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2042-05-19
AI Technical Summary
The existing three-dimensional stacking structure of RF circuits is difficult to achieve high-density integration on the interconnection interface between the adapter board and the multi-layer co-fired ceramic, which limits the flexibility of chip selection and the efficiency of signal transmission.
By first completing the sintering of the multi-layer co-fired ceramic substrate, then processing cavity grooves of different depths, and using microspheres between the adapter plate and the multi-layer co-fired ceramic substrate to achieve signal interconnection, ensuring the planarity and position accuracy of the cavity grooves, and meeting the integration needs of microspheres below 100μm in diameter.
It realizes high-density integration of RF circuits, improves chip selection flexibility and signal transmission efficiency, and meets the RF circuit's demand for high-quality signal transmission and low profile thickness.
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Figure CN115064503B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of radio frequency circuit integration technology, and in particular to a radio frequency circuit three-dimensional stacking structure and a manufacturing method thereof. Background Art
[0002] In order to meet the development needs of multifunctional, miniaturized, and lightweight electronic information equipment, RF circuits require three-dimensional stacking to effectively improve space utilization. The RF microsystem integration technology disclosed in Chinese patent CN107359156B and others uses a silicon-based adapter board to reduce the through hole and line width to the order of 10μm, achieving high-density stacking of RF circuits. In order to solve the packaging structure strength and reliability problems of RF circuits, Chinese patent CN112420679A proposes integrating a high-density stacking unit composed of adapter boards such as silicon / glass onto a multi-layer co-fired ceramic substrate, and utilizing the multi-layer wiring capabilities of the co-fired ceramic substrate to improve the structural strength of the package while completing complex RF routing. In this stacking structure, the interconnection interface between the high-density adapter board and the multi-layer co-fired ceramic can only be arranged with a micro-bump array, which makes it difficult to integrate chips, limiting the further improvement of integration density.
[0003] The difficulty of integrating chips between the adapter plate and the multilayer co-fired ceramic is that the thickness of the RF chip is about 100μm. In the case where the multilayer co-fired ceramic substrate does not have a cavity groove, microspheres with a diameter of at least 200μm are required to provide sufficient installation space for the RF chip. At this time, the diameter of the coaxial structure that transmits a single RF signal between the adapter plate and the multilayer co-fired ceramic is about 0.9-1.2mm, which occupies a very large integration area and limits the flexibility of circuit design. If the multilayer co-fired ceramic has a cavity groove, the diameter of the microsphere can be reduced to less than 100μm, and the diameter of the coaxial interconnection structure can be less than 0.5mm, greatly improving the flexibility of wiring. However, the existing multilayer co-fired ceramic cavity groove processing process generally involves processing the cavity groove structure of a single layer of ceramic first, and then sintering the layers. Due to the existence of multiple cavity groove structures of different depths, the flatness of the substrate decreases after sintering, and the local warping deformation increases. The position accuracy of the circuit pattern and the flatness of the substrate are difficult to adapt to the integration requirements of microspheres with a diameter of less than 200μm. If the cavity is processed after circuit sintering, the cavity depth consistency is poor due to the limitation of processing accuracy, making it difficult to provide a structurally stable dielectric cavity for the RF chip installed with the active surface facing the cavity, thus limiting the flexibility of chip selection. The existing technology has not yet provided a solution to these problems. Summary of the invention
[0004] The present invention aims to provide a three-dimensional stacked structure of a radio frequency circuit and a manufacturing method thereof to solve the above-mentioned problems.
[0005] The present invention provides a method for manufacturing a three-dimensional stacked structure of a radio frequency circuit, the manufacturing method comprising:
[0006] S10, processing multi-layer co-fired ceramic substrate:
[0007] S11, sintering the low dielectric constant ceramic and high dielectric constant ceramic layers that have completed through-hole metal filling and graphic printing but have not been processed into cavities to form a multi-layer co-fired ceramic substrate; the lower layers of the multi-layer co-fired ceramic substrate are high dielectric constant ceramics, and the upper layers are low dielectric constant ceramics; the cavities include a first cavity for providing an installation space for a chip mounted on the signal hole on the lower surface of the adapter board, a second cavity for providing an installation space for a flip chip on the lower surface of the adapter board, and a third cavity for mounting a chip mounted on the signal hole on the upper surface of the multi-layer co-fired ceramic substrate; the graphic printing includes setting a whole metal layer at the bottom of the first cavity; the through-hole metal filling includes setting a circle of metallized shielding holes around the first cavity inside the side wall of the first cavity;
[0008] S12, processing a plurality of cavities with different depths on a multilayer co-fired ceramic substrate;
[0009] S13, processing a metal pad at the bottom of the third cavity;
[0010] S20, solder the chip on the lower surface of the adapter board and pre-place the microspheres:
[0011] S21, providing a processed adapter board and chips; the chips include a plurality of flip chips and chips with signal holes mounted on them;
[0012] S22, soldering the flip chip and the signal hole mounted chip on the lower surface of the adapter board;
[0013] S23, implanting microspheres on the lower surface of the adapter plate;
[0014] S30, adapter plate and multi-layer co-fired ceramic substrate stacking:
[0015] S31, welding the flip chip in the third cavity;
[0016] S32, welding the adapter plate to the upper surface of the multilayer co-fired ceramic substrate through microball welding;
[0017] S33, soldering the flip chip and / or the chip with the signal hole on the upper surface of the adapter board.
[0018] In some preferred embodiments, the dielectric constant of the low dielectric constant ceramic is ≤6, and the dielectric constant of the high dielectric constant ceramic is >7.
[0019] In some preferred embodiments, the thickness of each layer of low dielectric constant ceramic is ≤100μm; the diameter of the metallized hole set in the low dielectric constant ceramic is ≤70μm; the thickness of each layer of high dielectric constant ceramic is ≥100μm; the diameter of the metallized hole set in the high dielectric constant ceramic is 100-150μm.
[0020] In some preferred embodiments, the depth tolerance of the first cavity is controlled as a negative tolerance, and the negative tolerance is 0--0.02mm; the depth tolerance of the second cavity and the third cavity is controlled as a positive tolerance, and the positive tolerance is 0-+0.02mm;
[0021] The depth of the cavity is less than 1 / 2 of the depth of the multi-layer co-fired ceramic substrate, and the plane distance between adjacent cavities is not less than 0.5mm; the four corners of the cavity are rounded, and the margin between the side wall of the cavity and the pad on the upper surface of the multi-layer co-fired ceramic substrate is not less than 0.2mm; the cavity is a straight cavity with vertical side walls or a stepped cavity with a larger top and a smaller bottom.
[0022] In some preferred embodiments, in step S12, a plurality of cavities with different depths are processed on the multi-layer co-fired ceramic substrate by using a precision CNC milling process or a laser subtractive process.
[0023] In some preferred embodiments, in step S13, a laser micro-cladding process is used to process a metal pad at the bottom of the third cavity.
[0024] In some preferred embodiments, the flip chip is a flip chip with pre-set micro-bumps, and the micro-bump material is Au or Au80Sn20 alloy;
[0025] The signal hole front-mounted chip is a signal hole front-mounted chip that has completed back-side interconnection solder processing, and the back-side interconnection solder is Au80Sn20 alloy.
[0026] In some preferred embodiments, the microsphere material is Au or Pb90Sn10 alloy, and the diameter is ≤100 μm.
[0027] In some preferred embodiments, the distance between the center of the metallized shielding hole and the inner wall of the first cavity is ≥ 2.5 times the aperture of the metallized shielding hole.
[0028] The present invention also provides a three-dimensional stacked structure of a radio frequency circuit, comprising a transfer board, a multi-layer co-fired ceramic substrate and a chip; the lower layers of the multi-layer co-fired ceramic substrate are high dielectric constant ceramics, and the upper layers are low dielectric constant ceramics; the chip comprises a plurality of flip chips and a signal hole positive chip;
[0029] Signal interconnection is achieved between the adapter board and the multi-layer co-fired ceramic substrate through microspheres; a plurality of cavities of different depths are arranged on the interconnected surface of the multi-layer co-fired ceramic substrate and the adapter board; the cavities include a first cavity for providing an installation space for a chip mounted on the signal hole on the lower surface of the adapter board, a second cavity for providing an installation space for a flip chip on the lower surface of the adapter board, and a third cavity for mounting a chip mounted on the signal hole on the upper surface of the multi-layer co-fired ceramic substrate; a whole metal ground layer is arranged at the bottom of the first cavity, and a circle of metallized shielding holes is arranged around the cavity inside the side wall of the first cavity, and the metallized shielding holes are interconnected with the whole metal ground layer; a metal pad is arranged at the bottom of the third cavity.
[0030] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:
[0031] The present invention completes the sintering of the multi-layer co-fired ceramic substrate first, and then processes cavities of different depths, thereby ensuring the flatness and graphic position accuracy of the multi-cavity and multi-layer co-fired ceramic substrate, and meeting the integration requirements of microspheres with a diameter of less than 100 μm.
[0032] The present invention uses heterogeneous sintering combined with post-sintering processing of the cavity groove, so that the signal hole installed on the lower surface of the adapter plate is directly attached to the chip dielectric cavity structure (first cavity groove) including: air, low dielectric constant ceramics and a whole metal layer arranged below the low dielectric constant ceramics. Since the distance from the whole metal layer to the substrate surface is determined by the sintering process, the consistency is good; the low dielectric constant ceramics of 0 to 50 μm have little effect on the transmission of radio frequency signals; thus, a dielectric cavity with a stable structure is obtained, which meets the working requirements of the radio frequency chip.
[0033] The present invention meets the requirement of the signal hole facing chip for a stable dielectric cavity structure by adopting low dielectric constant ceramics; and meets the requirement of wiring density by adopting high dielectric constant ceramics so that the RF strip line in the multi-layer wiring structure still maintains a relatively thin line width.
[0034] The present invention completes the processing of the circuit in the cavity of the multi-layer co-fired ceramic substrate through a laser processing technology, meeting the demand for chip integration in the cavity.
[0035] Through the above measures, in the three-dimensional stacking structure of the RF circuit of the present invention, the RF chip can be integrated on both sides of the high-density adapter board and in the cavity of the multi-layer co-fired ceramic substrate by flip-chip or signal hole bonding, realizing 2-3 layers of chip stacking, which can better adapt to the RF circuit's requirements for high-density integration, high-quality signal transmission and low profile thickness. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.
[0037] Figure 1 The present invention is a flow chart of a manufacturing process of a multilayer co-fired ceramic substrate in a method for manufacturing a three-dimensional stacked structure of a radio frequency circuit.
[0038] Figure 2 The present invention is a flow chart of welding chips on the lower surface of an adapter plate and implanting balls in the method for manufacturing a three-dimensional stacked structure of a radio frequency circuit of the present invention.
[0039] Figure 3 The present invention is a flow chart of a stacking process of an adapter plate and a multi-layer co-fired ceramic substrate in a method for manufacturing a three-dimensional stacked structure of a radio frequency circuit.
[0040] Figure 4 It is a cross-sectional schematic diagram of the three-dimensional stacked structure of the radio frequency circuit of the present invention.
[0041] Icons: 1- low dielectric constant ceramics, 2- high dielectric constant ceramics, 3- first cavity, 4- second cavity, 5- third cavity, 6- metal pad, 7- multilayer co-fired ceramic substrate, 8- adapter board, 9- flip chip, 10- signal hole front-mounted chip, 11- metallized shielding hole, 12- whole surface metal layer, 13- metallized hole, 14- microball. DETAILED DESCRIPTION
[0042] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.
[0043] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0044] Example
[0045] like Figure 1 , Figure 2 , Figure 3As shown, this embodiment provides a method for manufacturing a three-dimensional stacked structure of a radio frequency circuit, comprising:
[0046] S10, such as Figure 1 As shown, processing of multi-layer co-fired ceramic substrate 7:
[0047] S11, stacking and sintering the low dielectric constant ceramic 1 and the high dielectric constant ceramic 2 which have completed the through-hole metal filling and graphic printing but have not been processed into the cavity, to form a multilayer co-fired ceramic substrate 7; the lower layers of the multilayer co-fired ceramic substrate 7 are high dielectric constant ceramics 2, and the upper layers are low dielectric constant ceramics 1; the cavity includes a first cavity 3 for providing an installation space for the signal hole positive chip 10 on the lower surface of the adapter board 8, a second cavity 4 for providing an installation space for the flip chip 9 on the lower surface of the adapter board, and a third cavity 5 for installing the signal hole positive chip 10 on the upper surface of the multilayer co-fired ceramic substrate 7; the graphic printing includes setting a whole metal layer 12 at the bottom of the first cavity 3; the through-hole metal filling includes setting a circle of metallized shielding holes 11 around the first cavity 3 inside the side wall of the first cavity 3;
[0048] In some preferred embodiments, the dielectric constant of the low dielectric constant ceramic 1 is ≤6, and the dielectric constant of the high dielectric constant ceramic 2 is >7.
[0049] In some preferred embodiments, the thickness of each layer of low dielectric constant ceramic 1 is ≤100 μm; the diameter of the metallized hole 13 set in the low dielectric constant ceramic 1 is ≤70 μm; the thickness of each layer of high dielectric constant ceramic 2 is ≥100 μm; the diameter of the metallized hole 13 set in the high dielectric constant ceramic 2 is 100-150 μm.
[0050] S12, using a precision CNC milling process or a laser subtractive process to process a plurality of cavities of different depths on the multilayer co-fired ceramic substrate 7, namely, a first cavity 3, a second cavity 4 and a third cavity 5;
[0051] In some preferred embodiments, the depth tolerance of the first cavity 3 is controlled as a negative tolerance, and the negative tolerance is 0 to -0.02 mm; the depth tolerance of the second cavity 4 and the third cavity 5 is controlled as a positive tolerance, and the positive tolerance is 0 to +0.02 mm; the depth of the cavity is less than 1 / 2 of the depth of the multilayer co-fired ceramic substrate 7, and the plane distance between adjacent cavities is not less than 0.5 mm; the four corners of the cavity are all rounded, and the margin between the side wall of the cavity and the pad on the upper surface of the multilayer co-fired ceramic substrate 7 is not less than 0.2 mm; the cavity is a straight cavity with vertical side walls or a stepped cavity with a larger top and a smaller bottom.
[0052] S13, processing a metal pad 6 at the bottom of the third cavity 5 by using a laser micro-cladding process;
[0053] In some preferred embodiments, the distance between the center of the metallized shielding hole 11 and the inner wall of the first cavity 3 is ≥ 2.5 times the aperture of the metallized shielding hole 11 .
[0054] S20, such as Figure 2 As shown, the chip on the lower surface of the adapter plate 8 is welded and the microspheres 14 are pre-set:
[0055] S21, providing a processed transfer board 8 and a chip; the chip includes a plurality of flip chips 9 and a signal hole mounted chip 10; wherein:
[0056] The flip chip 9 is a flip chip 9 with micro-bumps pre-set, and the micro-bump material is Au or Au80Sn20 alloy;
[0057] The signal hole front-mounted chip 10 is a signal hole front-mounted chip 10 that has completed back-side interconnection solder processing, and the back-side interconnection solder is Au80Sn20 alloy.
[0058] S22, welding the flip chip 9 and the signal hole mounted chip 10 on the lower surface of the adapter plate 8 by using a hot pressing welding process or an ultrasonic hot pressing welding process;
[0059] S23, implanting microspheres 14 on the lower surface of the adapter plate 8; in some preferred embodiments, the microspheres 14 are made of Au or Pb90Sn10 alloy, with a diameter of ≤100 μm.
[0060] S30, such as Figure 3 As shown, the adapter plate 8 is stacked with the multi-layer co-fired ceramic substrate 7:
[0061] S31, welding the flip chip 9 in the third cavity 5;
[0062] S32 , welding the adapter plate 8 to the upper surface of the multi-layer co-fired ceramic substrate 7 through the microballs 14 .
[0063] S33 , soldering the flip chip 9 and / or the signal hole mounted chip 10 on the upper surface of the adapter board 8 .
[0064] A radio frequency circuit three-dimensional stacking structure can be manufactured by the above-mentioned method for manufacturing the radio frequency circuit three-dimensional stacking structure; Figure 4 As shown, the three-dimensional stacked structure of the radio frequency circuit includes a transfer board 8, a multi-layer co-fired ceramic substrate 7 and a chip; the lower layers of the multi-layer co-fired ceramic substrate 7 are high dielectric constant ceramics 2, and the upper layers are low dielectric constant ceramics 1; the chip includes a number of flip chips 9 and a signal hole positive chip 10;
[0065] Signal interconnection is achieved between the adapter board 8 and the multi-layer co-fired ceramic substrate 7 through microspheres 14; a plurality of cavities of different depths are arranged on the interconnected surface of the multi-layer co-fired ceramic substrate 7 and the adapter board 8; the cavities include a first cavity 3 for providing an installation space for a chip 10 having a signal hole on the lower surface of the adapter board 8, a second cavity 4 for providing an installation space for a flip chip 9 on the lower surface of the adapter board 8, and a third cavity 5 for installing the chip 10 having a signal hole on the upper surface of the multi-layer co-fired ceramic substrate 7; a whole metal layer 12 is arranged at the bottom of the first cavity, and a circle of metallized shielding holes 11 are arranged around the cavity inside the side wall of the first cavity, and the metallized shielding holes 11 are interconnected with the whole metal layer 12; a metal pad 6 is arranged at the bottom of the second cavity.
[0066] Example:
[0067] A method for manufacturing a three-dimensional stacked structure of a radio frequency circuit, comprising:
[0068] S10, such as Figure 1 As shown, processing of a multi-layer co-fired ceramic substrate 7:
[0069] S11, stack and sinter the low dielectric constant ceramic 1 and the high dielectric constant ceramic 2 which have completed the through-hole metal filling and graphic printing but have not been processed into the cavity to form a multilayer co-fired ceramic substrate 7; the lower three layers (3rd to 5th layers) of the multilayer co-fired ceramic substrate 7 are high dielectric constant ceramic 2, and the upper two layers (1st to 2nd layers) are low dielectric constant ceramic 1; the dielectric constant of the low dielectric constant ceramic 1 is 5.7, the thickness of each layer of the low dielectric constant ceramic 1 is 50-80μm, and the diameter of the metallized hole 13 arranged in the low dielectric constant ceramic 1 is 50μm; the dielectric constant of the high dielectric constant ceramic 2 is 7.8, the thickness of each layer of the high dielectric constant ceramic 2 is ≥100μm; the diameter of the metallized hole 13 arranged in the high dielectric constant ceramic 2 is 100-150μm. The cavity comprises a first cavity 3 for providing an installation space for a chip 10 mounted on the signal hole on the lower surface of the adapter board 8, a second cavity 4 for providing an installation space for a flip chip 9 on the lower surface of the adapter board, and a third cavity 5 for mounting the chip 10 mounted on the upper surface of the multilayer co-fired ceramic substrate 7; the graphic printing comprises setting a whole metal layer 12 at the bottom of the first cavity 3; the through-hole metal filling comprises setting a circle of metallized shielding holes 11 around the first cavity 3 inside the side wall of the first cavity 3, and the metallized shielding holes 11 are interconnected with the whole metal layer 12; the distance between the center of the metallized shielding hole 11 and the inner wall of the first cavity is ≥125μm;
[0070] S12, machining a plurality of cavities of different depths on the multilayer co-fired ceramic substrate 7 using a precision CNC milling process or a laser subtractive process;
[0071] The depth tolerance of the first cavity 3 is controlled as a negative tolerance, and the negative tolerance is 0 to -0.02mm; the depth tolerance of the second cavity 4 and the third cavity 5 is controlled as a positive tolerance, and the positive tolerance is 0 to +0.02mm; the cavity depth (the depth of the first cavity 3, and the sum of the depths of the second cavity 4 and the third cavity 5) is less than 1 / 2 of the depth of the multilayer co-fired ceramic substrate 7, and the plane distance between adjacent cavities (between the first cavity 3 and the second cavity 4) is not less than 0.5mm; the four corners of the cavity are all rounded, and the margin between the cavity side wall and the pad on the upper surface of the multilayer co-fired ceramic substrate 7 is not less than 0.2mm; the first cavity 3 that provides an installation space for the signal hole chip 10 on the lower surface of the adapter board 8 is a straight cavity with vertical side walls; the second cavity 4 and the third cavity 5 that provide an installation space for the flip chip 9 on the lower surface of the adapter board 8 form a stepped cavity that is larger at the top and smaller at the bottom.
[0072] S13, using laser micro-cladding technology to process a metal pad 6 at the bottom of the second cavity 5; the material of the metal pad 6 is Au.
[0073] S20, such as Figure 2 As shown, the chip on the lower surface of the adapter plate 8 is welded and the microspheres 14 are pre-set:
[0074] S21, providing a processed adapter plate 8 and a chip; the chip includes:
[0075] A flip chip 9 with micro-bumps pre-set is completed, wherein the micro-bump material is Au;
[0076] The chip 10 is mounted on the signal hole after the back-side interconnection solder processing is completed, and the back-side interconnection solder is Au80Sn20 alloy.
[0077] S22, solder the flip chip 9 and the signal hole mounted chip 10 on the lower surface of the adapter board 8; the lower surface of the adapter board 8 is the surface facing the multi-layer co-fired ceramic substrate 7 in the three-dimensional stacking structure, and when soldering the chips, the lower surface of the adapter board 8 faces upward; use ultrasonic hot pressing welding process to solder the flip chip 9, and use hot pressing welding process to solder the signal hole mounted chip 10.
[0078] S23, implanting microspheres 14 on the lower surface of the adapter plate 8; the microspheres 14 are made of Au and have a diameter of ≤100 μm.
[0079] S30, such as Figure 3 As shown, the adapter plate 8 is stacked with the multi-layer co-fired ceramic substrate 7:
[0080] S31, welding the flip chip 9 in the third cavity 5 using an ultrasonic thermocompression welding process;
[0081] S32, using ultrasonic hot pressing process to weld the adapter plate 8 to the upper surface of the multi-layer co-fired ceramic substrate 7 through the microballs 14.
[0082] S33 , welding the flip chip 9 and the signal hole mounted chip 10 on the upper surface of the adapter board 8 .
[0083] Thus, we get Figure 4 The three-dimensional stacked structure of the radio frequency circuit shown includes a transfer board 8, a multi-layer co-fired ceramic substrate 7 and a chip; the lower layers of the multi-layer co-fired ceramic substrate 7 are high dielectric constant ceramics 2, and the upper layers are low dielectric constant ceramics 1; the chip includes a plurality of flip chips 9 and a signal hole positive chip 10;
[0084] Signal interconnection is achieved between the adapter board 8 and the multilayer co-fired ceramic substrate 7 through microspheres 14; a plurality of cavities of different depths are arranged on the interconnected surface of the multilayer co-fired ceramic substrate 7 and the adapter board 8; the cavities include a first cavity 3 for providing an installation space for a chip 10 having a signal hole on the lower surface of the adapter board 8, a second cavity 4 for providing an installation space for a flip chip 9 on the lower surface of the adapter board, and a third cavity 5 for installing the chip 10 having a signal hole on the upper surface of the multilayer co-fired ceramic substrate 7; a whole metal layer 12 is arranged at the bottom of the first cavity 3; a circle of metallized shielding holes 11 is arranged around the first cavity 3 inside the side wall of the first cavity 3, and the metallized shielding holes 11 are interconnected with the whole metal layer 12; the distance between the center of the metallized shielding hole 11 and the inner wall of the first cavity is ≥125μm; a metal pad 6 is arranged at the bottom of the second cavity 5.
[0085] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A method for manufacturing a three-dimensional stacked structure of a radio frequency circuit, characterized in that: The manufacturing method comprises: S10, processing multi-layer co-fired ceramic substrate: S11, sintering the low dielectric constant ceramic and high dielectric constant ceramic layers that have completed through-hole metal filling and graphic printing but have not been processed to form a multi-layer co-fired ceramic substrate, wherein the dielectric constant of the low dielectric constant ceramic is ≤6, and the dielectric constant of the high dielectric constant ceramic is >7; the lower layers of the multi-layer co-fired ceramic substrate are high dielectric constant ceramics, and the upper layers are low dielectric constant ceramics; the cavity grooves include a first cavity groove for providing an installation space for a chip mounted on the signal hole on the lower surface of the adapter board, a second cavity groove for providing an installation space for a flip chip on the lower surface of the adapter board, and a third cavity groove for mounting a chip mounted on the signal hole on the upper surface of the multi-layer co-fired ceramic substrate, the second cavity groove and the third cavity groove forming a stepped cavity with a larger top and a smaller bottom; the graphic printing includes setting a whole metal layer at the bottom of the first cavity groove; the through-hole metal filling includes setting a circle of metallized shielding holes around the first cavity groove inside the side wall; S12, processing a plurality of cavities with different depths on a multilayer co-fired ceramic substrate; S13, processing a metal pad at the bottom of the third cavity; S20, solder the chip on the lower surface of the adapter board and pre-place the microspheres: S21, providing a processed adapter board and chips; the chips include a plurality of flip chips and chips with signal holes mounted on them; S22, soldering the flip chip and the signal hole mounted chip on the lower surface of the adapter board; S23, implanting microspheres on the lower surface of the adapter plate; S30, adapter plate and multi-layer co-fired ceramic substrate stacking: S31, welding the flip chip in the third cavity; S32, welding the adapter plate to the upper surface of the multilayer co-fired ceramic substrate through microball welding; S33, soldering the flip chip and / or the chip with the signal hole on the upper surface of the adapter board.
2. The method for manufacturing a three-dimensional stacked structure of a radio frequency circuit according to claim 1, characterized in that: The thickness of each layer of low dielectric constant ceramic is ≤100μm; the diameter of the metallized hole set in the low dielectric constant ceramic is ≤70μm; the thickness of each layer of high dielectric constant ceramic is ≥100μm; the diameter of the metallized hole set in the high dielectric constant ceramic is 100-150μm.
3. The method for manufacturing a three-dimensional stacked structure of a radio frequency circuit according to claim 1, characterized in that: The depth tolerance of the first cavity is controlled as a negative tolerance, and the negative tolerance is 0--0.02mm; the depth tolerance of the second cavity and the third cavity is controlled as a positive tolerance, and the positive tolerance is 0-+0.02mm; The depth of the cavity is less than 1 / 2 of the depth of the multi-layer co-fired ceramic substrate, and the plane distance between adjacent cavities is not less than 0.5mm; the four corners of the cavity are rounded, and the margin between the side wall of the cavity and the pad on the upper surface of the multi-layer co-fired ceramic substrate is not less than 0.2mm; the cavity is a straight cavity with vertical side walls or a stepped cavity with a larger top and a smaller bottom.
4. The method for manufacturing a three-dimensional stacked structure of a radio frequency circuit according to claim 1, characterized in that: In step S12, a plurality of cavities with different depths are processed on the multi-layer co-fired ceramic substrate by using a precision CNC milling process or a laser subtractive process.
5. The method for manufacturing a three-dimensional stacked structure of a radio frequency circuit according to claim 1, characterized in that: In step S13, a laser micro-cladding process is used to process a metal pad at the bottom of the third cavity.
6. The method for manufacturing a three-dimensional stacked structure of a radio frequency circuit according to claim 1, characterized in that: The flip chip is a flip chip with micro-bumps pre-set, and the micro-bump material is Au or Au80Sn20 alloy; The signal hole front-mounted chip is a signal hole front-mounted chip that has completed back-side interconnection solder processing, and the back-side interconnection solder is Au80Sn20 alloy.
7. The method for manufacturing a three-dimensional stacked structure of a radio frequency circuit according to claim 1, characterized in that: The microsphere material is Au or Pb90Sn10 alloy, and the diameter is ≤100 μm.
8. The method for manufacturing a three-dimensional stacked structure of a radio frequency circuit according to claim 1, characterized in that: The distance between the center of the metallized shielding hole and the inner wall of the first cavity is ≥2.5 times the aperture of the metallized shielding hole.
9. A three-dimensional stacked structure of a radio frequency circuit, characterized in that: It includes a transfer board, a multi-layer co-fired ceramic substrate and a chip; the lower layers of the multi-layer co-fired ceramic substrate are high dielectric constant ceramics, and the upper layers are low dielectric constant ceramics, the dielectric constant of the low dielectric constant ceramics is ≤6, and the dielectric constant of the high dielectric constant ceramics is >7; the chip includes a number of flip chips and signal hole positive chips; Signal interconnection is achieved between the adapter board and the multi-layer co-fired ceramic substrate through microspheres; a plurality of cavities of different depths are arranged on the interconnected surface of the multi-layer co-fired ceramic substrate and the adapter board; the cavities include a first cavity for providing an installation space for a chip with a signal hole attached to the lower surface of the adapter board, a second cavity for providing an installation space for a flip chip on the lower surface of the adapter board, and a third cavity for installing a chip with a signal hole attached to the upper surface of the multi-layer co-fired ceramic substrate, the second cavity and the third cavity forming a stepped cavity with a larger top and a smaller bottom; a whole metal stratum is arranged at the bottom of the first cavity, and a circle of metallized shielding holes is arranged around the cavity inside the side wall of the first cavity, and the metallized shielding holes are interconnected with the whole metal stratum; a metal pad is arranged at the bottom of the third cavity; a flip chip and / or a chip with a signal hole attached is welded on the upper surface of the adapter board, and a flip chip and a chip with a signal hole attached are welded on the lower surface of the adapter board.
Citation Information
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