Overlay mark, position deviation detection method and device, and method for manufacturing semiconductor device

Abstract

An embodiment provides an overlay mark that is not affected by a process and can perform detection with good accuracy. An overlay mark of an embodiment has a first step portion and a second step portion. The first step portion includes a plurality of first steps that are stepped down from a surface of a substrate or a layer formed on the substrate in a first direction. The second step portion is separated from the first step portion and is configured rotationally symmetrically with respect to the first step portion, and includes a plurality of second steps that are stepped down from the surface in a second direction different from the first direction and have the same number as the plurality of first steps.

Description

[0001] Related applications

[0002] This application enjoys priority based on Japanese Patent Application No. 2021-038418 (filed on March 10, 2021). This application incorporates the entire contents of that basic application by reference. Technical Field

[0003] The embodiments of the present invention relate to overlapping marking, position deviation detection methods and apparatus, and methods for manufacturing semiconductor devices. Background Technology

[0004] For example, in semiconductor devices such as semiconductor memories, three-dimensional structures are used for high-density integration. Therefore, several layers are overlapped on a semiconductor substrate such as a silicon wafer, and accurate alignment between adjacent layers becomes crucial. Overlap marks are used for high-precision alignment, but sometimes the overlap marks themselves are affected by the multiple processes performed during the formation of a layer, making it difficult to detect overlap marks with good accuracy. Summary of the Invention

[0005] The problem to be solved by the present invention is to provide an overlapping mark that is not easily affected by the process and can be detected with high accuracy.

[0006] One embodiment of the overlapping mark has a first step difference portion and a second step difference portion. The first step difference portion includes a plurality of first steps that descend in a stepwise manner along a first direction from the surface of the substrate or a layer formed on the substrate. The second step difference portion is separated from the first step difference portion and is arranged rotationally symmetrically with respect to the first step difference portion, and includes a plurality of second steps that descend in a stepwise manner along a second direction different from the first direction from the surface, and the number of second steps is the same as the number of the plurality of first steps. Attached Figure Description

[0007] Figures 1A to 1C This is a schematic diagram illustrating the overlapping marks used to explain this embodiment.

[0008] Figure 2 This is a flowchart illustrating the manufacturing method of the semiconductor device according to this embodiment.

[0009] Figure 3A , Figure 3B This is a schematic diagram illustrating the principle of the steps performed in the manufacturing method of the semiconductor device in this embodiment.

[0010] Figure 4A , Figure 4B This is a schematic diagram illustrating the principle of the steps performed in the manufacturing method of the semiconductor device in this embodiment.

[0011] Figure 5A , Figure 5B This is a schematic diagram illustrating the principle of the steps performed in the manufacturing method of the semiconductor device in this embodiment.

[0012] Figures 6A to 6D This is a schematic diagram used to illustrate the overlapping markings of the comparative examples.

[0013] Figure 7A , Figure 7B This is a schematic diagram illustrating the effect of the overlapping markings in this embodiment.

[0014] Figures 8A to 8C This is a cross-sectional view schematically illustrating the method for forming overlapping marks in this embodiment.

[0015] Figure 9A , Figure 9B This is a cross-sectional view schematically illustrating the method for forming overlapping marks in this embodiment.

[0016] Figure 10A , Figure 10B This is a schematic diagram showing the alignment device of the second embodiment.

[0017] Figure 11A , Figure 11B This is a top view showing a variation of the overlapping markings according to the first embodiment. Detailed Implementation

[0018] Hereinafter, non-limiting exemplary embodiments of the present invention will be described with reference to the accompanying drawings. In all the drawings, the same or corresponding components or parts are labeled with the same or corresponding reference numerals, and repeated descriptions are omitted. Furthermore, the drawings are not intended to show relative proportions between components or parts, or between the thicknesses of various layers; therefore, specific thicknesses and dimensions can be determined by those skilled in the art by referring to the following non-limiting embodiments.

[0019] (First Implementation)

[0020] First, refer to Figures 1A to 1C arrive Figure 5A , Figure 5B The overlapping mark of the first embodiment and the manufacturing method of the semiconductor device using the overlapping mark will be described. Figures 1A to 1C This is a schematic diagram illustrating the overlapping marks used to explain this embodiment. Figure 2 This is a flowchart illustrating a method for manufacturing a semiconductor device according to this embodiment. From... Figure 3A , Figures 3B to 5A , Figure 5B It is a schematic diagram used to illustrate the principle of the steps performed in this manufacturing method.

[0021] Figure 1AThis is a top view that roughly represents the injection area. As shown, the injection area SR may include, for example, six semiconductor chip areas TR. Additionally, in the illustrated example, eight overlay marks OM (hereinafter simply referred to as marks OM) are arranged around the injection area SR, for example, along the dicing line (also called the cut area). These marks OM are provided to detect positional deviations between layers of the semiconductor device formed on the semiconductor substrate.

[0022] In this embodiment, such as Figure 1B and Figure 1C As shown, the marking OM has two columns of step marks (step portions) MS1 and MS2 arranged separately along the x-axis and extending along the y-axis on the surface of the substrate S. Figure 1C As shown, step difference marker MS1 has eight steps S1 to S8 that descend in a stepped manner from the surface of substrate S along the + direction of the x-axis in the figure. On the other hand, step difference marker MS2 has eight steps S1 to S8 that descend in a stepped manner from the surface of substrate S along the - direction of the x-axis. That is, the steps S1 to S8 of step difference marker MS1 and the steps S1 to S8 of step difference marker MS2 descend in opposite directions along the x-axis. In addition, step difference markers MS1 and MS2 are separated in the y-axis direction. Therefore, step difference markers MS1 and MS2 are arranged rotationally symmetrically (more specifically, point-symmetrically) about any point within the region RMA. Furthermore, in Figure 1B In the diagram, for convenience, the deeper the order from S1 to S8, the darker the gray is used to represent it.

[0023] Furthermore, the width (length in the x-axis direction) of each step S1 to S8 in the step difference markers MS1 and MS2, although depending on the manufactured semiconductor device, can be, for example, 1 to 2 μm, and the height (length in the y-axis direction) can be, for example, around 50 nm. The marker OM can have a rectangular shape, with one side length, for example, 25 μm to 35 μm.

[0024] In this embodiment, a region RMA is provided between the step marks MS1 and MS2, and a resist mark RM can be formed there. The resist mark RM can be formed on the region RMA by photoresist and can have multiple stripes St extending in the y-axis direction and arranged in the x-axis. The resist mark RM is formed together with a photoresist mask, which is a mask for the layer subsequently formed on the substrate S. The step marks MS1 and MS2 are formed when the layer below the layer is formed. That is, the resist mark RM is not formed when the layer below is formed, but when the layer above the layer below is formed.

[0025] Next, refer to Figures 2 to 5A , Figure 5BThe manufacturing method of the semiconductor device using the OM marking of this embodiment will be described. Figure 2 This is a flowchart illustrating the manufacturing method of this embodiment. Figure 3A , Figure 3B This is a schematic diagram illustrating the laser scanning of the OM mark performed in this manufacturing method. Figure 4A , Figure 4B This is a schematic diagram illustrating the signal obtained through laser scanning and its processing. Figure 5A , Figure 5B This is a schematic diagram illustrating the positional deviation determination performed in this manufacturing method. In the following explanation, it is first assumed that a lower layer is formed after the formation of the marker OM, with the silicon oxide film SO exposed on the outermost surface. That is, the step marks MS1 and MS2 of the marker OM are buried by the silicon oxide film SO.

[0026] First, in step S11, a photoresist film is formed on the substrate S on which the lower layer is formed. The photoresist film is patterned to form an etching mask (not shown) for the layer to be formed subsequently. The etching mask can be formed by exposing the photoresist film using a photomask. Alternatively, the etching mask can be formed by patterning the photoresist film using a nanoimprint template. When the etching mask is formed, the resist mark RM is also formed in the resist mark region RMA of the mark OM. In addition, if an anti-reflective film or the like is formed as its base layer before the photoresist film is formed, it is preferable to remove the anti-reflective film or the like after the etching mask and the resist mark RM are formed.

[0027] Next, the depth information of the step difference markers MS1 and MS2 of marker OM is obtained. Specifically, in step S12, as follows... Figure 3A As shown, firstly, a scanning laser is applied to the step difference marker MS1 of the marker OM. Specifically, as shown, a laser IL is emitted from the emission unit EMT of the sensor CSR towards the step difference marker MS1, and the reflected light RL from the point irradiated by the laser IL is received by the light receiving unit RCV. As the sensor CSR moves along the step difference marker MS1, it is sequentially irradiated by the laser IL from step S1 to step S8, and the reflected light RL from each step S1 to S8 is detected.

[0028] Here, as the order increases from S1 to S8, the absorption of the silicon oxide film SO in both the laser IL and the reflected light RL increases, thus reducing the intensity of the reflected light RL. Therefore, as... Figure 3BAs shown in the graph representing the relationship between the illumination position of the laser IL and the light intensity of the reflected light RL, the light intensity of the reflected light RL decreases in stages relative to the horizontal axis (according to the movement distance of the sensor CSR). This staged decrease reflects the depths of each step S1 to S8 of the step difference marker MS1 of the marker OM; therefore, the depth information of the step difference marker MS1 is obtained. Next, the laser is scanned onto the step difference marker MS2, and the depth information of the step difference marker MS2 is obtained similarly.

[0029] Next, in step S13, based on the depth information obtained in step S12, the positions of steps S1 to S8 of the step difference marker MS1 are detected. That is, as shown... Figure 4A As shown, when the intensity of the reflected light RL is differentiated relative to the x-axis, the differential value changes drastically, resulting in a maximum value LMV. The positions of these maximum values ​​LMV correspond to the edges of orders S1 to S8, respectively. Therefore, as... Figure 4B As shown, the positions P1 to P8 of the edges of steps S1 to S8 are detected. The same detection is performed on the step difference marker MS2 (step S13) to detect the positions of the edges of steps S1 to S8 of the step difference marker MS2.

[0030] Next, in step S14, based on the positions P1 to P8 of the edges of each step difference marker MS1 from S1 to S8 detected in step S13, the rotation centers of step difference markers MS1 and MS2 are determined. Specifically, as follows... Figure 5A As shown, connect two intersection points with line segment L1, for example: the intersection point CP between the edge of step difference marker MS1 opposite to step difference marker MS2 and the edge P1 of step S1, and the same intersection point between the edge of step difference marker MS2 opposite to step difference marker MS1 and the edge P1 of step S1. Perform the same connection process for the remaining steps of step difference markers MS1 and MS2, and find the intersection point C1 of these line segments. This point corresponds to the rotation center of step difference markers MS1 and MS2 (hereinafter sometimes referred to as the rotation center C1).

[0031] In addition, the center of rotation can also be based on Figure 4A The CVL curve shown is obtained. Specifically, when the CVL curves are rotated 180° at any point along the coordinate system (x-axis, y-axis) for the step difference markers MS1 and MS2 respectively, the point where the CVL curves of the two curves overlap is determined as the center of rotation. Alternatively, a (stepped) reflected light intensity curve (e.g., refer to...) can also be used. Figure 3B , Figure 4A , Figure 4B () to replace the curve CVL.

[0032] Next, in step S15, the centroid C2 of the resist mark RM is determined. Next, in step S16, the difference (deviation) between the rotation center C1 of the step marks MS1 and MS2 and the centroid of the resist mark RM is determined. Then, in step S17, it is determined whether the difference converges within a reference range. If it is determined that the difference converges within the reference range (step S17: Yes), etching using the etching mask formed in step S11 is performed. On the other hand, if it is determined that the difference does not converge within the reference range (step S17: No), the resist mask is removed, and an etching mask is formed again in step S11. Then, the steps after step S12 are repeated until it is determined in step S17 that the difference converges within the reference range. When it is determined that the difference converges within the reference range (step S17: Yes), etching using the etching mask is performed, and the semiconductor device manufacturing method of this embodiment ends. Additionally, this manufacturing method includes a method for detecting interlayer positional deviations in a semiconductor device. That is, the above steps S11 to S17 can be implemented as a position deviation detection method.

[0033] Next, referring to a comparative example, the effects of the marking OM in this embodiment and the manufacturing method of the semiconductor device using the marking OM will be explained. Figures 6A to 6D This is a schematic cross-sectional view of the comparative example's overlay mark OMC (referred to as mark OMC). As shown, in the comparative example's mark OMC, unlike the mark OM in the embodiment, four recesses of approximately the same depth are periodically formed. Depending on the semiconductor device being manufactured, after forming the mark OMC on a substrate S serving as a base layer, a thin film SO containing, for example, silicon oxide is sometimes deposited on that base layer. In this case, for example, as... Figure 6A As shown, particulate PCL may adhere to the SO film during deposition and be introduced into the SO film. In this case, as the deposition of the SO film progresses, defects such as convex BMPs may sometimes appear on the surface of the SO film, reflecting its shape. These defect BMPs can potentially have adverse effects on subsequent processes such as photolithography. Therefore, after the deposition of the SO film, such as... Figure 6B As shown, SO is sometimes removed by planarizing the surface of the thin film using chemical mechanical planarization (CMP).

[0034] In the case of the OMC marking in the comparative example, when the amount of grinding caused by planarization accidentally increases, the corner at the upper end of the OMC marking may sometimes be cut off. Specifically, the corner opposite to the direction of movement of the pad in the CMP device is particularly prone to being cut off, such as... Figure 6C As shown, a tilted surface SE may sometimes occur at the corner. Since the OMC marker is detected from above, for example, by an image sensor, if a tilted surface SE occurs, then... Figure 6DAs shown, the boundaries of the recesses of the OMC mark may become blurred. Therefore, it may be difficult to detect the OMC mark with good accuracy.

[0035] In contrast, the marker OM in this embodiment has step markers MS1 and MS2, which are formed in the substrate layer and have steps S1 to S8 that descend in opposite directions. In this case, assuming as Figure 7A The planarization of the thin film SO is shown in the figure. Figure 7B As shown, even if the upper end is shaved off, creating a sloping surface SE, the steps S1 to S8 located deeper than it are hardly shaved off. That is, almost no sloping surfaces are generated at the edges of each step S1 to S8. Then, each step S1 to S8 is scanned with a laser using a sensor CSR to detect the position of the edges of each step S1 to S8 of the step difference marks MS1 and MS2. Therefore, the mark OM can be detected with good accuracy without being affected by planarization. Thus, the rotation center C1 of the step difference marks MS1 and MS2 can be detected with good accuracy, and it can also be determined with good accuracy whether their centroids and the centroid C2 of the resist mark RM converge within the reference range. As a result, the possibility of etching under conditions where significant positional deviations occur between layers is reduced, and consequently, the positional deviations between layers are reduced. As described above, the effects of the mark OM of this embodiment and the manufacturing method of the semiconductor device using the mark OM can be understood.

[0036] Next, refer to Figures 8A to 8C as well as Figure 9A , Figure 9B The method for forming the step difference marker MS1 (MS2) is explained. Figures 8A to 8C as well as Figure 9A , Figure 9B This is a schematic cross-sectional view illustrating each step of the method for forming the step mark MS1. Here, we take the case where the step mark MS1 is formed on a substrate S, which serves as the base layer, as an example. First, as... Figure 8A As shown, a resist film RF is formed on a substrate S, and a template TP is pressed onto the resist film RF. The template TP has eight steps corresponding to steps S1 to S8 of the step difference mark MS1. When the resist film RF is irradiated with ultraviolet light via the template TP pressed onto the resist film RF, the resist film RF cures. Thereafter, as... Figure 8B As shown, when the template TP is peeled off from the resist film RF, a patterned resist film RF with a stepped pattern is obtained. Then, in the lowest step of the patterned resist film RF, the resist remaining on the surface of the substrate S with a specified residual film thickness (RLT) is removed, exposing the surface of the substrate S.

[0037] Next, as Figure 8CAs shown, a patterned resist film RF is used as a mask to etch the substrate S, for example, using plasma. In this etching, etching begins from the surface of the substrate S exposed in the lowest step (step surface) of the resist film RF. As etching proceeds, the resist film RF gradually thins, thus... Figure 9A As shown, in the 2nd, 3rd, ... lower levels of the resist film RF, the surface of the substrate S is sequentially exposed, and the exposed surfaces are etched sequentially. After the surface of the substrate S is exposed in the highest level of the resist film RF and etching begins from that exposed surface, the etching ends after a predetermined time. Because the levels of the resist film RF disappear sequentially, the surface of the substrate S is locally exposed, and it is gradually etched from the exposed surface. Therefore, the longer the exposure time, the deeper the etching. Thus, as... Figure 9B As shown, a stepped structure is formed on the substrate S, thereby obtaining the step difference mark MS1. Here, the template TP can have 8 steps corresponding to the step difference mark MS2, thus, the step difference mark MS2 can be obtained together with the step difference mark MS1.

[0038] (Second Implementation)

[0039] Next, refer to Figure 10A , Figure 10B The position deviation detection device of the second embodiment will be described. Figure 10A This is a schematic top view of the position deviation detection device 10 according to this embodiment. Figure 10B This is a schematic side view of the position deviation detection device 10. (As shown) Figure 10A and Figure 10B As shown, the position deviation detection device 10 has a worktable 10T for holding containers FOUP1 to FOUP4 (Front Opening Unified Pods) for storing substrates such as semiconductor wafers. Containers FOUP1 to FOUP4 placed on the worktable 10T are hermetically connected to the main body 10M of the position deviation detection device 10. A handling robot 10R, a support platform 10S, a drive unit 10D, and a sensor CSR are disposed within the main body 10M.

[0040] The handling robot 10R has, for example, an arm 10A with a gripper at its front end. Using the arm 10A, the handling robot 10R removes a substrate, such as a semiconductor wafer, from any of the containers FOUP1 to FOUP4 and transfers the substrate to a support table 10S. Additionally, the transfer robot 10R receives the substrate from the support table 10S and moves it back into its original container. The support table 10S may have a holding mechanism, such as an electrostatic chuck, that electrostatically supports the substrate on its surface, thereby reliably fixing the substrate to the surface of the support table 10S. Furthermore, the support table 10S may have support pins (not shown) protruding from its surface. This allows for the transfer of substrates between the arm 10A of the handling robot 10R and the support table 10S. A drive unit 10D drives the support table 10S in both the vertical and horizontal directions. The drive unit 10D may include, for example, an encoder, thereby enabling the support table 10S, and even the substrate supported on the support table 10S, to move with high precision and high speed. Therefore, the depth information of the aforementioned step markers MS1 and MS2 can be obtained with good accuracy and reliability.

[0041] The control unit 10C can be implemented as a computer including a CPU (Central Processing Unit), ROM (Read Only Memory), and RAM (Random Access Memory). Alternatively, the control unit 10C can be implemented using hardware such as Application-Specific Integrated Circuits (ASICs), Programmable Gate Arrays (PGAs), and Field-Programmable Gate Arrays (FPGAs). The control unit 10C controls the handling robot 10R, the drive unit 10D, and the sensor CSR, etc., according to a predetermined processing program. Specifically, the processing program includes a set of instructions that cause the position deviation detection device 10 to implement the aforementioned semiconductor device manufacturing method or position deviation detection method. That is, the control unit 10C is configured to implement the semiconductor device manufacturing method or position deviation detection method by controlling each part of the position deviation detection device 10 based on the processing program. Furthermore, the processing program and various associated data can be downloaded to the control unit 10C via wired or wireless means from non-transitory computer-readable storage media such as hard disk drives (HDDs), semiconductor memories, or servers.

[0042] The position deviation detection device 10 configured as described above can preferably be used to implement the semiconductor device manufacturing method or the position deviation detection method, and thus the position deviation detection device 10 can achieve the effects of these methods.

[0043] (Modified Example)

[0044] Hereinafter, a variation of the marking OM in the above-described embodiment will be described. Figure 11AThis is a top view showing the overlay mark of Variation 1. As shown, the overlay mark OM1 (referred to as mark OM1) is equivalent to the so-called Advanced Imaging Measurement (AIM) mark. Figure 11A The marker OM1 shown has step markers MS1 (MS2) at its four corners. As shown, adjacent step markers MS1 and MS2 have a quadruple symmetry relationship, and the two step markers MS1 (MS2) on the diagonal have a point symmetry relationship. Therefore, depth information about each step marker MS1 or MS2 (steps S1 to S8) can be obtained, and based on this, the position information of the edges of each step S1 to S8 can be obtained, and the rotation center can be determined. Since each step S1 to S8 descends in a stepwise manner, it is not easily affected by flattening caused by, for example, CMP. Therefore, the marker OM1 in the modified example can also achieve the effect of the marker OM in the embodiment. In addition, an area for forming resist markers RM is ensured inside the step markers MS1 and MS2. Here, the four resist markers RM are arranged in a rotationally symmetrical manner.

[0045] Figure 11B This is a top view showing the overlay mark of Variation Example 2. As shown, the overlay mark OM2 (referred to as mark OM2) is equivalent to a so-called bar-in-bar (BIB) mark. In mark OM2, steps S1, S2, S3, and S4 descending in a stepped manner along arrow SDX form one step difference mark, and steps S1, S2, S3, and S4 descending in a stepped manner along arrow SDY form other step difference marks. Since steps S1 to S4 are arranged along mutually intersecting directions (SDX and SDY directions), the two step difference marks are arranged rotationally symmetrically. Depth information of steps S1 to S4 is obtained by scanning, for example, a laser (IL) along arrow SDX. Similarly, depth information of steps S1 to S4 is obtained by scanning, for example, a laser (IL) along arrow SDY. Furthermore, the rotation center of the two step difference marks can be determined based on the depth information. Specifically, for example, by rotating the reflected light intensity curves of both by 90° around an arbitrary point in the coordinate system, the point can be used as the rotation center when the two curves overlap. In marker OM2, each order S1 to S4 also decreases stepwise, thus making it less susceptible to flattening effects such as CMP. Therefore, the modified marker OM2 can also achieve the effects of the marker OM in the implementation.

[0046] (Other variations)

[0047] Although the example given is a mark OM formed on substrate S, the mark OM can also be formed in any step of the semiconductor device manufacturing process on an insulating layer such as a silicon oxide layer or a silicon nitride layer, or a conductive layer such as a metal or polysilicon layer that is exposed during that step.

[0048] Furthermore, while the example shown illustrates forming the mark OM around the injection area (cut line), the mark OM can also be formed inside the semiconductor chip area within the injection area. This allows for the detection of minute positional deviations between layers regarding element elements within the semiconductor chip area, such as vias or memory pillars.

[0049] Furthermore, although the step difference markers MS1 and MS2 each have eight steps S1 to S8, the number of steps is not limited to eight. It can be appropriately determined based on the position of the marker OM to be formed, the size of the marker OM that can be formed at that position, and the resolution of the sensor CSR used.

[0050] Furthermore, although in the above embodiment, depth information is obtained based on the intensity of the reflected light RL detected by the sensor CSR, a time-of-flight (TOF) type sensor can be used instead of the sensor CSR. Therefore, by converting the time from when the laser is emitted to when it is reflected back by each of the S1 to S8 steps, depth information can be obtained without relying on the intensity of the reflected light RL.

[0051] While several embodiments of the invention have been described, these embodiments are provided by way of example and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included within the scope and spirit of the invention, and are included within the scope of the invention as set forth in the claims and its equivalents.

[0052] Explanation of reference numerals in the attached figures

[0053] OM, OM1, OM2…coverage markings; SR…injection area; TR…semiconductor chip area; MS1, MS2…step difference markings (step difference section); S1 to S8…steps; RM…resist markings; RMA…area; St…stripes; CSR…sensor; EMT…ejection section; RCV…light receiving section; IL…laser; RL…reflected light; P1 to P8…position; CP…intersection; C1…rotation center; C2…center of gravity; SO…film; SE…tilted surface; RF…resist film; TP…template; S…substrate; 10…position deviation detection device; 10A…arm; 10M…main body; 10R…transfer robot; 10S…support platform; 10D…drive unit; FOUP1 to FOUP4…containers.

Claims

1. A method for detecting position deviation, wherein, An overlap mark is formed on a substrate or a layer formed on the substrate. The overlap mark includes a first step difference portion, a second step difference portion, and a region. The first step difference portion includes a plurality of first steps that descend in a step manner from the surface of the substrate or the layer formed on the substrate along a first direction. The second step difference portion is separated from the first step difference portion and is rotationally symmetrically arranged relative to the first step difference portion. The second step difference portion includes a plurality of second steps that descend in a step manner from the surface along a second direction different from the first direction and are the same number as the plurality of first steps. The region is a region in which a pattern formed by a photoresist should be disposed between the first step difference portion and the second step difference portion. The first step difference portion and the second step difference portion are separated in a direction that intersects the first direction and the second direction. The pattern is formed in the area; Obtain the first depth information of the plurality of first-order units; Obtain the second depth information of the multiple second-order units; Based on the first depth information and the second depth information, the rotation centers of the first step difference portion and the second step difference portion are determined; Determine the centroid of the pattern disposed in the region; as well as The deviation between the rotation center and the center of gravity is detected.

2. The position deviation detection method according to claim 1, wherein, The first depth information is obtained by irradiating the first step difference region with a laser. The second depth information is obtained by irradiating the second step difference region with a laser.

3. The position deviation detection method according to claim 2, wherein, Based on the first depth information, the first position information of each of the plurality of first-order orders is obtained. Based on the second depth information, the second position information of each of the plurality of second-order levels is obtained. Based on the first position information and the second position information, the rotation centers of the first step difference portion and the second step difference portion are determined.

4. The position deviation detection method according to claim 3, wherein, The first depth information and the second depth information are represented by the relationship between the position of the point irradiated by the laser and the intensity of the reflected light from that point. The first location information and the second location information are derived based on the relationship.

5. The position deviation detection method according to claim 1, wherein, The first direction and the second direction are opposite to each other.

6. The position deviation detection method according to claim 1, wherein, Between the first step difference portion and the second step difference portion, which are separated along the intersection direction, a region is formed in which a pattern formed by a resist should be configured.

7. The position deviation detection method according to claim 1, wherein, The overlapping markings are formed around the injection area for forming the semiconductor chip.

8. The position deviation detection method according to claim 1, wherein, The overlapping markings are formed in the injection area for forming the semiconductor chip.

9. A position deviation detection device, comprising: The substrate holding section holds the substrate, which is the object for position deviation detection; The driving unit moves the substrate holding unit in at least two dimensions; The sensor includes: an emitting portion that emits laser light from the substrate held by the substrate holding portion, and a light receiving portion that receives reflected light from the laser light; and The control unit controls at least the drive unit and the sensor. The control unit is configured as follows: The overlapping marks and patterns are processed, wherein the overlapping marks include a first step difference portion, a second step difference portion, and a region. The first step difference portion includes a plurality of first steps that descend in a stepwise manner along a first direction from the surface of the substrate or a layer formed on the substrate. The second step difference portion is separated from the first step difference portion and is arranged rotationally symmetrically relative to the first step difference portion. The second step difference portion includes a plurality of second steps that descend in a stepwise manner along a second direction different from the first direction from the surface, and the number of second steps is the same as the number of the plurality of first steps. The region is the area where the pattern formed by the resist should be disposed between the first step difference portion and the second step difference portion. The pattern is formed in the region. The first step difference portion and the second step difference portion are separated in a direction intersecting the first direction and the second direction. The process is as follows: Obtain the first depth information of the multiple first-order units. Obtain the second depth information of the multiple second-order levels. Based on the first depth information and the second depth information, the rotation centers of the first step difference portion and the second step difference portion are determined. Determine the centroid of the pattern disposed in the region. The deviation between the rotation center and the center of gravity is detected.

10. A method for manufacturing a semiconductor device, wherein, An overlap mark is formed on a substrate or a layer formed on the substrate. The overlap mark includes a first step difference portion, a second step difference portion, and a region. The first step difference portion includes a plurality of first steps that descend in a step manner from the surface of the substrate or the layer formed on the substrate along a first direction. The second step difference portion is separated from the first step difference portion and is rotationally symmetrically arranged relative to the first step difference portion. The second step difference portion includes a plurality of second steps that descend in a step manner from the surface along a second direction different from the first direction and are the same number as the plurality of first steps. The region is a region in which a pattern formed by a photoresist should be disposed between the first step difference portion and the second step difference portion. The first step difference portion and the second step difference portion are separated in a direction intersecting the first direction and the second direction. An etching mask is formed on the surface, and the pattern is formed in the area; Obtain the first depth information of the plurality of first-order units; Obtain the second depth information of the multiple second-order units; Based on the first depth information and the second depth information, the rotation centers of the first step difference portion and the second step difference portion are determined; Determine the centroid of the pattern disposed in the region; Detect the deviation between the rotation center and the center of gravity; Determine whether the deviation is within the reference range; If the etching is determined to be within the range of the reference, the etching mask is used for etching; as well as If it is determined that the etching mask and the pattern are not within the range of the reference, the etching mask and the pattern are reformulated.

11. The method of manufacturing a semiconductor device according to claim 10, wherein, The first depth information is obtained by irradiating the first step difference region with a laser. The second depth information is obtained by irradiating the second step difference region with a laser.

12. The method of manufacturing a semiconductor device according to claim 11, wherein, Based on the first depth information, the first position information of each of the plurality of first-order orders is obtained. Based on the second depth information, the second position information of each of the plurality of second-order levels is obtained. Based on the first position information and the second position information, the rotation centers of the first step difference portion and the second step difference portion are determined.

13. The method for manufacturing a semiconductor device according to claim 12, wherein, The first depth information and the second depth information are represented by the relationship between the position of the point irradiated by the laser and the intensity of the reflected light from that point. The first location information and the second location information are derived based on the relationship.

14. The method of manufacturing a semiconductor device according to claim 10, wherein, The first direction and the second direction are opposite to each other.

15. The method of manufacturing a semiconductor device according to claim 10, wherein, Between the first step difference portion and the second step difference portion, which are separated along the intersection direction, a region is formed in which a pattern formed by a resist should be configured.

16. The method of manufacturing a semiconductor device according to claim 10, wherein, The overlapping markings are formed around the injection area for forming the semiconductor chip.

17. The method of manufacturing a semiconductor device according to claim 10, wherein, The overlapping markings are formed in the injection area for forming the semiconductor chip.

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