A noise suppression method, device and electronic equipment of a totem pole PFC circuit

Abstract

A method, device and electronic equipment for noise suppression of a totem-pole PFC circuit, when the input AC power of the totem-pole PFC circuit is switched at a zero-crossing point, a control totem-pole PFC circuit power frequency switch is turned on once, the PFC inductor in the totem-pole PFC circuit is discharged, and a common-mode current is generated when various parasitic capacitors in the totem-pole PFC circuit are charged and discharged. After turning off the power frequency switch for a period of time, the power frequency switch is turned on again, and the high-frequency switch is turned on. At this time, the PFC inductor in the totem-pole PFC circuit charges to generate a differential-mode current. The charging and discharging time of the parasitic capacitor in the totem-pole PFC circuit is staggered with the energy storage time of the PFC inductor L, so as to avoid the superposition of the parasitic capacitor charging and discharging current and the PFC inductor L energy storage current, thereby reducing the impact current of the totem-pole PFC circuit. When the impact current is reduced, the switch trigger overcurrent protection mechanism is not triggered, and the totem-pole PFC circuit can work normally.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electric energy conversion, and in particular to a noise suppression method and device for totem pole PFC circuit and electronic equipment. BACKGROUND

[0002] The power factor refers to the relationship between the effective power and the total power consumption (apparent power), that is, the ratio of the effective power to the total power consumption, and is one of the important indicators for measuring the performance of power consumption devices such as components and electronic devices. Therefore, the value of the power factor can be used to determine the degree of effective use of the power of the power consumption device, and the greater the value of the power factor, the higher the power utilization rate of the power consumption device and the better the performance.

[0003] Power factor correction (PFC) is a common technology in the field of power supply. The existing PFC circuit has problems such as low efficiency, low switching frequency, and large size of magnetic components. Therefore, the totem pole PFC circuit is proposed in the prior art to solve the problems of the existing PFC circuit. However, when the input AC of the totem pole PFC circuit switches from the positive half cycle to the negative half cycle or from the negative half cycle to the positive half cycle, the impact current generated will trigger the overcurrent protection mechanism of the switch in the totem pole PFC circuit, and the switch will be in an off state, resulting in abnormal operation of the totem pole PFC circuit. SUMMARY

[0004] In order to solve the above problems, the embodiments of the present application provide a noise suppression method and device for totem pole PFC circuit and electronic equipment. When the input AC of the totem pole PFC circuit is switched at the zero crossing point, the line frequency switch in the totem pole PFC circuit is turned on first, the PFC inductor in the totem pole PFC circuit is discharged, and the common mode current is generated when the various parasitic capacitors in the totem pole PFC circuit are charged and discharged. After turning off the line frequency switch for a period of time, the line frequency switch is turned on again, and the high frequency switch is turned on. At this time, the PFC inductor in the totem pole PFC circuit charges to generate a differential mode current. The charging and discharging time of the parasitic capacitor in the totem pole PFC circuit is staggered with the energy storage time of the PFC inductor L, so as to avoid the superposition of the parasitic capacitor charging and discharging current and the PFC inductor L energy storage current, thereby reducing the impact current of the totem pole PFC circuit.

[0005] To this end, the embodiments of the present application adopt the following technical solutions:

[0006] In a first aspect, the application provides a method for suppressing noise of a Totem PFC circuit, the method is executed by a controller and comprises: sampling an alternating current at an input end of the Totem PFC circuit; determining a voltage zero-crossing switching of the alternating current at the input end, and sending a control signal to the third switch or the fourth switch at the voltage zero-crossing switching, the voltage zero-crossing switching is a switching of the voltage of the alternating current from a positive half cycle to a negative half cycle or from a negative half cycle to a positive half cycle, the third switch is a switch that allows the PFC inductor in the Totem PFC circuit to charge and discharge when the voltage of the alternating current is in the negative half cycle, the fourth switch is a switch that allows the PFC inductor to charge and discharge when the voltage of the alternating current is in the positive half cycle, and the control signal is used to allow the third switch or the fourth switch to be in a conduction state; stopping sending the control signal to the third switch or the fourth switch after a conduction setting time; and sending the control signal to the third switch or the fourth switch after a disconnection setting time.

[0007] In this embodiment, when the input alternating current of the Totem PFC circuit is switched at the zero-crossing point, the third switch or the fourth switch as the power frequency switch is turned on to allow the PFC inductor in the Totem PFC circuit to discharge, and the common-mode current is generated when various parasitic capacitances in the Totem PFC circuit charge and discharge. The third switch or the fourth switch is turned off after the conduction setting time. The third switch or the fourth switch is turned on again after the disconnection setting time to allow the PFC inductor in the Totem PFC circuit to charge to generate the differential-mode current. The application avoids the superposition of the common-mode current and the differential-mode current in the Totem PFC circuit by staggering the charging and discharging time of the parasitic capacitance in the Totem PFC circuit and the energy storage time of the PFC inductor L, which can reduce the impact current of the Totem PFC circuit. When the impact current is reduced, the switch will not trigger the overcurrent protection mechanism, and the Totem PFC circuit can work normally.

[0008] In one embodiment, after the determination of the voltage zero-crossing switching of the input alternating current and the sending of the control signal to the third switch, the method further comprises: sending the control signal to the second switch, the second switch being a switch that allows the PFC inductor to discharge when the voltage of the alternating current is in the negative half cycle or a switch that allows the PFC inductor to charge when the voltage of the alternating current is in the positive half cycle; or after the determination of the voltage zero-crossing switching of the input alternating current and the sending of the control signal to the fourth switch, the method further comprises: sending the control signal to the first switch, the first switch being a switch that allows the PFC inductor to charge when the voltage of the alternating current is in the negative half cycle or a switch that allows the PFC inductor to discharge when the voltage of the alternating current is in the positive half cycle.

[0009] In the embodiment, when the third switch or the fourth switch is turned on for the first time, the first switch or the second switch can be turned on to discharge the PFC inductor in the totem-pole PFC circuit, and the current generated by the discharge of the PFC inductor can charge and discharge various parasitic capacitors in the totem-pole PFC circuit, so as to generate common-mode current in the various parasitic capacitors in the totem-pole PFC circuit.

[0010] In an embodiment, after the control signal is sent to the third switch after the open setting time, the method further includes: sending the control signal to the first switch; or, after the control signal is sent to the fourth switch after the open setting time, the method further includes: sending the control signal to the second switch.

[0011] In the embodiment, when the third switch or the fourth switch is turned on for the second time, the second switch or the first switch can be turned on to charge the PFC inductor in the totem-pole PFC circuit, so as to generate differential-mode current in the PFC inductor in the totem-pole PFC circuit.

[0012] In an embodiment, the third switch and the fourth switch each include a MOS transistor, and before or after the control signal is sent to the third switch or the fourth switch when the voltage of the alternating current at the input end is determined to be switched at zero, the method further includes: increasing the resistance of the gate of the MOS transistor in the third switch or the MOS transistor in the fourth switch.

[0013] In the embodiment, if the third switch and the fourth switch are composed of MOS transistors, in order to reduce the impact current in the totem-pole PFC circuit, the drive resistance of the gate of the MOS transistor in the third switch and the fourth switch can be increased, and the turn-on speed of the common-mode current in the third switch or the fourth switch can be reduced, so as to stagger the common-mode current in the common-mode current loop with the common-mode current in other common-mode current loops, thereby reducing the impact current in the totem-pole PFC circuit.

[0014] In a second aspect, the embodiments of the present application provide a noise suppression device of a Totem PFC circuit, comprising: a Totem PFC circuit, an input voltage detection unit, and a control unit; the input voltage detection unit is configured to sample alternating current at an input end of the Totem PFC circuit and input a voltage of the alternating current to the control unit; the control unit is configured to determine, when the voltage of the alternating current at the input end is over-zero switched, send a control signal to the third switch or the fourth switch, the over-zero switching is switching of the voltage of the alternating current from a positive half cycle to a negative half cycle or from a negative half cycle to a positive half cycle, the third switch is a switch allowing the PFC inductor in the Totem PFC circuit to charge and discharge when the voltage of the alternating current is in the negative half cycle, the fourth switch is a switch allowing the PFC inductor to charge and discharge when the voltage of the alternating current is in the positive half cycle, and the control signal is configured to allow the third switch or the fourth switch to be in a conduction state; after a conduction setting time, stop sending the control signal to the third switch or the fourth switch; and after a disconnection setting time, send the control signal to the third switch or the fourth switch.

[0015] In an embodiment, the control unit is further configured to, after determining that the voltage of the input alternating current is over-zero switched and sending the control signal to the third switch, send the control signal to a second switch, the second switch being a switch allowing the PFC inductor to discharge when the voltage of the alternating current is in the negative half cycle or allowing the PFC inductor to charge when the voltage of the alternating current is in the positive half cycle; or, after determining that the voltage of the input alternating current is over-zero switched and sending the control signal to the fourth switch, send the control signal to a first switch, the first switch being a switch allowing the PFC inductor to charge when the voltage of the alternating current is in the negative half cycle or allowing the PFC inductor to discharge when the voltage of the alternating current is in the positive half cycle.

[0016] In an embodiment, the control unit is further configured to, after sending the control signal to the third switch after the disconnection setting time, send the control signal to the first switch; or, after sending the control signal to the fourth switch after the disconnection setting time, send the control signal to the second switch.

[0017] In an embodiment, the third switch and the fourth switch each comprise a MOS transistor, and the control unit is further configured to increase the resistance of the gate of the MOS transistor in the third switch or the MOS transistor in the fourth switch.

[0018] In a third aspect, the embodiments of the present application provide an electronic device, which comprises the noise suppression apparatus of the totem-pole PFC circuit as various possible implementations of the second aspect. The electronic device can be a base station, a charging pile, a switch, an electric vehicle, etc., which are not limited herein. BRIEF DESCRIPTION OF DRAWINGS

[0019] The drawings needed to be used in the embodiments or the prior art description are briefly introduced as follows.

[0020] Figure 1 FIG. 1 is a structural schematic diagram of a totem-pole PFC circuit in the prior art;

[0021] FIG. 2(a) is a schematic diagram of current flow direction in another totem-pole PFC circuit in the prior art;

[0022] FIG. 2(b) is a schematic diagram of current flow direction in another totem-pole PFC circuit in the prior art;

[0023] FIG. 2(c) is a schematic diagram of current flow direction when the input voltage is in the stage of switching from the negative half cycle to the positive half cycle in a totem-pole PFC circuit in the prior art;

[0024] FIG. 2(d) is a schematic diagram of current flow direction when the input voltage is in the stage of switching from the positive half cycle to the negative half cycle in a totem-pole PFC circuit in the prior art;

[0025] Figure 3 FIG. 3 is a structural schematic diagram of the noise suppression apparatus of the totem-pole PFC circuit provided in the embodiments of the present application;

[0026] Figure 4 FIG. 4 is a simulation diagram of the control unit sending control signals to each switch when the input voltage is in the stage of switching from the negative half cycle to the positive half cycle in the totem-pole PFC circuit provided in the embodiments of the present application;

[0027] FIG. 5(a) is a schematic diagram of current flow direction in the first control stage when the input voltage is in the stage of switching from the positive half cycle to the negative half cycle in the totem-pole PFC circuit provided in the embodiments of the present application;

[0028] FIG. 5(b) is a schematic diagram of current flow direction in the second control stage when the input voltage is in the stage of switching from the positive half cycle to the negative half cycle in the totem-pole PFC circuit provided in the embodiments of the present application;

[0029] FIG. 5(c) is a schematic diagram of current flow direction in the first control stage when the input voltage is in the stage of switching from the negative half cycle to the positive half cycle in the totem-pole PFC circuit provided in the embodiments of the present application;

[0030] Figure 5(d) is a schematic diagram of the current flow direction in the second control stage when the input voltage is in the negative half-cycle and switches to the positive half-cycle stage in the totem pole PFC circuit provided in the embodiment of this application.

[0031] Figure 6 This is a flowchart illustrating a noise suppression method for a totem pole PFC circuit provided in an embodiment of this application. Detailed Implementation

[0032] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0033] In this article, the term "and / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. The symbol " / " in this article indicates that the related objects are in an "or" relationship; for example, A / B means A or B.

[0034] The terms "first" and "second," etc., used in the specification and claims herein are used to distinguish different objects, not to describe a specific order of objects. For example, "first response message" and "second response message," etc., are used to distinguish different response messages, not to describe a specific order of response messages.

[0035] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0036] In the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more, for example, multiple processing units means two or more processing units, multiple elements means two or more elements, etc.

[0037] Figure 1 This is a schematic diagram of a totem-pole PFC circuit in the prior art. Figure 1 As shown, the totem pole PFC circuit includes input terminal 1, input terminal 2, PFC inductor L, common mode inductor Lcmc, switch S1, switch S2, switch S3, switch S4, and filter capacitor C. OUT, a parasitic capacitance Cp1 of the switch S1, a parasitic capacitance Cp2 of the switch S2, a parasitic capacitance Cp3 of the switch S3, a parasitic capacitance Cp4 of the switch S4, a ground X capacitance Cx1, a ground X capacitance Cx2, a ground Y capacitance Cy1, a ground Y capacitance Cy2, a ground equivalent capacitance Cpg, an output terminal 3 and an output terminal 4.

[0038] The input terminal 1 and the input terminal 2 can be electrically connected with an external power supply. The output terminal 3 and the output terminal 4 can be electrically connected with a plurality of loads. The switch S1 and the switch S2 are connected in series and are electrically connected between the output terminal 3 and the output terminal 4. The switch S3 and the switch S4 are connected in series and are electrically connected between the output terminal 3 and the output terminal 4. The filter capacitance C OUT is electrically connected between the output terminal 3 and the output terminal 4. The input terminal 1 is electrically connected on a node SW1 between the switch S1 and the switch S2 through the common mode inductor Lcmc and the PFC inductor L. The input terminal 2 is electrically connected on a node SW2 between the switch S3 and the switch S4 through the common mode inductor Lcmc.

[0039] One end of the ground equivalent capacitance Cpg is electrically connected between the switch S2 and the output terminal 4, and the other end is grounded. One end of the ground Y capacitance Cy1 is electrically connected on the input terminal 1, and the other end is electrically connected on the ground end of the ground equivalent capacitance Cpg. One end of the ground Y capacitance Cy2 is electrically connected on the input terminal 2, and the other end is electrically connected on the ground end of the ground equivalent capacitance Cpg. The ground X capacitance Cx1 and the ground X capacitance Cx2 are respectively electrically connected between the output terminal 1 and the input terminal 2 and are respectively on two sides of the common mode inductor Lcmc.

[0040] As shown in FIG. 2(a), the input voltage V AC of the Totem PFC circuit is in the negative half cycle, and V AC .<0>. That is, the input terminal 1 is negative, and the input terminal 2 is positive. At this time, the switch S3 in the Totem PFC circuit is turned on, and the switch S4 is turned off. The switch S1 as the main switch is turned on to charge the PFC inductor L. The switch S2 as the auxiliary switch is turned on to discharge the PFC inductor L. The current in the Totem PFC circuit flows through the devices in turn: the input terminal 2 → the common mode inductor Lcmc → the node SW2 → the switch S3 → the switch S1 (or the output terminal 3 → the output terminal 4 → the switch S2) → the node SW1 → the PFC inductor L → the common mode inductor Lcmc → the input terminal 1. At this time, the voltage V SW2 at the node SW2 is equal to the output voltage V OUT .

[0041] As shown in FIG. 2(b), the input voltage V AC of the Totem PFC circuit is in the positive half cycle, and V AC> 0. That is, input 1 is positive and input 2 is negative. At this time, switch S4 in the totem pole PFC circuit is turned on and switch S3 is turned off. Switch S2 is turned on as a main switch to charge the PFC inductor L. Switch S1 is turned on as a sub switch to discharge the PFC inductor L. The current in the totem pole PFC circuit flows through the devices in the following order: input 1 → common mode inductor Lcmc → PFC inductor L → node SW1 → switch S2 (or switch S1 → output 3 → output 4) → switch S4 → node SW2 → common mode inductor Lcmc → input 2. At this time, the voltage V SW2 at node SW2 is equal to the output voltage 0 V.

[0042] The input voltage V AC of the totem pole PFC circuit is in the positive half cycle and switches to the negative half cycle. At this time, the voltage V SW2 at node SW2 changes from 0 V to V OUT (or from V OUT to 0 V). During this short transition, an impulse current is generated in the totem pole PFC circuit.

[0043] As shown in FIG. 2(c), the input voltage V AC of the totem pole PFC circuit is in the negative half cycle and switches to the positive half cycle. That is, the case where input 1 is negative and input 2 is positive changes to the case where input 1 is positive and input 2 is negative. The impulse current generated by the totem pole PFC circuit charges the parasitic capacitance Cp4 of switch S4 and the parasitic capacitance Cpg of the equivalent capacitor to ground after passing through the PFC inductor L and switch S2. The current generated by discharging the Y capacitors to ground Cy1 and Cy2 flows into the PFC inductor L. Therefore, the impulse current includes two parts, one part being the common mode current passing through the equivalent capacitor to ground Cpg, the Y capacitor to ground Cy1 and the Y capacitor to ground Cy2, and the other part being the differential mode current passing through the parasitic capacitance Cp4 of switch S4.

[0044] As shown in FIG. 2(d), the input voltage V AC of the totem pole PFC circuit is in the positive half cycle and switches to the negative half cycle. That is, the case where input 1 is positive and input 2 is negative changes to the case where input 1 is negative and input 2 is positive. The impulse current generated by the totem pole PFC circuit charges the parasitic capacitance Cp3 of switch S3 after passing through node SW2. The current generated by discharging the Y capacitors to ground Cy1 and Cy2 charges the equivalent capacitor to ground Cpg. The impulse current includes two parts, one part being the common mode current passing through the Y capacitor to ground Cy1, the Y capacitor to ground Cy2 and the equivalent capacitor to ground Cpg, and the other part being the differential mode current passing through the parasitic capacitance Cp3 of switch S3.

[0045] In existing totem-pole PFC circuits, common-mode and differential-mode currents are generated simultaneously, resulting in a relatively large inrush current. This can damage components within the totem-pole PFC circuit and reduce its reliability. Furthermore, the input voltage V of the totem-pole PFC circuit... AC When a zero-crossing switch occurs, the inrush current generated by the conduction of switch S3 will trigger the overcurrent protection mechanism of switch S3 in the totem-pole PFC circuit, causing switch S3 to be in the off state and resulting in abnormal operation of the totem-pole PFC circuit. The input of the totem-pole PFC circuit receives alternating current. The zero-crossing switch occurs when the voltage changes from the positive half-cycle to the negative half-cycle, or vice versa.

[0046] To address the shortcomings of existing totem-pole PFC circuits, this application proposes a noise suppression method and device for totem-pole PFC circuits. When the input AC power of the totem-pole PFC circuit is at a zero-crossing switching point, the power frequency switch controlling the totem-pole PFC circuit is turned on once, causing the PFC inductor in the totem-pole PFC circuit to discharge. The charging and discharging of various parasitic capacitors in the totem-pole PFC circuit generates common-mode current. After the power frequency switch is turned off for a period of time, it is turned on again, and the high-frequency switch is also turned on. At this time, the PFC inductor in the totem-pole PFC circuit charges, generating differential-mode current. In this application, by staggering the charging and discharging time of the parasitic capacitors in the totem-pole PFC circuit with the energy storage time of the PFC inductor L, the superposition of the parasitic capacitor charging and discharging current and the energy storage current of the PFC inductor L is avoided, thus reducing the inrush current of the totem-pole PFC circuit. When the inrush current is reduced, the switch will not trigger the overcurrent protection mechanism, and the totem-pole PFC circuit can operate normally.

[0047] Figure 3 This is a schematic diagram of the structure of a noise suppression device for a totem pole PFC circuit provided in an embodiment of this application. Figure 3 As shown, the noise suppression device 300 of the totem-pole PFC circuit includes a totem-pole PFC circuit 310, an input voltage detection unit 320, an output voltage detection unit 330, a detection circuit 340, and a control unit 350. The totem-pole PFC circuit 310 converts the input AC power into DC power. The input voltage detection unit 320 is coupled to the input terminal of the totem-pole PFC circuit 310 and is used to detect the input voltage V of the totem-pole PFC circuit 310. AC The voltage value is detected and the detection result is sent to the control unit 350. The output voltage detection unit 330 is coupled to the output terminal of the totem pole PFC circuit 310 and is used to detect the voltage V output by the totem pole PFC circuit 310. OUTThe detection circuit 340 is electrically connected to the totem pole PFC circuit 310 at the input end, and is electrically connected to the control unit 350 at the output end, for sending the voltage value at the node SW1 in the totem pole PFC circuit 310 to the control unit 350. The output end of the control unit 350 is electrically connected to each switch in the totem pole PFC circuit 310, for generating a control signal according to the detection result of the input voltage detection unit 320, the detection result of the output voltage detection unit 330, the voltage value at the node SW1 input by the detection circuit 340, and the current value of the resistor R, and sending the control signal to each switch in the totem pole PFC circuit 310.

[0048] As shown in Figure 3 , the totem pole PFC circuit 310 includes an input end 1, an input end 2, a switch S1, a switch S2, a switch S3, a switch S4, a diode D1, a diode D2, a PFC inductor L, a resistor R, a filter capacitor C OUT , an output end 3, and an output end 4. The input end 1 and the input end 2 can be electrically connected to an external power supply to receive an electrical signal input by the external power supply. The input end 1 and the input end 2 can also be electrically connected to the input voltage detection unit 320. The input voltage detection unit 320 can detect the voltage value of the input voltage V AC through the input end 1 and the input end 2. The switch S1 and the switch S2 are connected in series and are electrically connected between the output end 3 and the output end 4. The switch S3 and the switch S4 are connected in series and are electrically connected between the output end 3 and the output end 4. The diode D1 and the diode D2 are connected in series and are electrically connected between the output end 3 and the output end 4. The filter capacitor C OUT is electrically connected between the output end 3 and the output end 4. The input end 1 is electrically connected to a node between the diode D1 and the diode D2. The input end 2 is electrically connected to a node SW2 between the switch S3 and the switch S4. One end of the PFC inductor L is electrically connected to the node between the diode D1 and the diode D2, and the other end is electrically connected to a node SW1 between the switch S1 and the switch S2. The PFC inductor L can cooperate with other elements to reduce the phase difference between the fundamental current and the voltage of the alternating current input, and has the functions of a rectifier and a filter. The output end 3 and the output end 4 can be electrically connected to a plurality of loads to provide electrical energy to each load. The output end 3 and the output end 4 can also be electrically connected to the output voltage detection unit 330. The output voltage detection unit 330 can detect the voltage value of the input voltage V OUT through the output end 3 and the output end 4.

[0049] In the present application, the totem pole PFC circuit 310 generates a parasitic capacitance when working normally. For ease of understanding, the parasitic capacitance can be equivalent to an equivalent ground capacitance Cpg, a ground Y-capacitor Cy1 and a ground Y-capacitor Cy2. As shown in Figure 3 the equivalent ground capacitance Cpg has one end electrically connected between the switch S2 and the output terminal 4 and the other end grounded. The ground Y-capacitor Cy1 has one end electrically connected to the input terminal 1 and the other end electrically connected to the ground end of the equivalent ground capacitance Cpg. The ground Y-capacitor Cy2 has one end electrically connected to the input terminal 2 and the other end electrically connected to the ground end of the equivalent ground capacitance Cpg.

[0050] The totem pole PFC circuit adopted in the present application is not limited to the structure shown in Figure 3 the present application is only used as an example for description and is not limited.

[0051] The switches S1, S2, S3 and S4 are generally selected from metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs) and diodes. Taking MOS transistors as an example, the gate self-boosting circuits (not shown in the figure) of each MOS transistor are electrically connected. The output terminal of the control unit 350 is electrically connected to the self-boosting circuit. The control unit 350 can send a pulse width modulation (PWM) signal to the self-boosting circuit to discharge the self-boosting capacitor in the self-boosting circuit, input current to the gate of the MOS transistor, and make the MOS transistor in a conducting state. In the present application, the switches S1, S2, S3 and S4 each include a MOS transistor and a diode. One end of the diode is electrically connected to the source of the MOS transistor, and the other end of the diode is electrically connected to the drain of the MOS transistor. The current direction of the MOS transistor is opposite to that of the diode.

[0052] As shown in Figure 3As shown, in switch S1, the current direction of diode is "input 1 → switch S1", and the current direction of MOS transistor is "switch S1 → input 1". In switch S2, the current direction of diode is "switch S2 → input 1", and the current direction of MOS transistor is "input 1 → switch S2". In switch S3, the current direction of diode is "input 2 → switch S3", and the current direction of MOS transistor is "switch S3 → input 2". In switch S4, the current direction of diode is "switch S4 → input 2", and the current direction of MOS transistor is "input 2 → switch S4".

[0053] In this application, the control unit 350 can control the MOS transistors in switches S1, S2, S3 and S4 to be in the on or off state respectively, so that the totem pole PFC circuit 310 can realize four working modes similar to Figures 2(a)-2(d)

[0054] In one embodiment, the input voltage V AC of the totem pole PFC circuit is in the positive half cycle, and V AC > 0. That is, input 1 is positive, and input 2 is negative. At this time, the MOS transistor in switch S4 is turned on. When the PFC inductor L is charged, the MOS transistor in switch S1 is turned off, and the MOS transistor in switch S2 is turned on. The current in the totem pole PFC circuit 510 flows through the devices in turn: input 1 → PFC inductor L → switch S2 → switch S4 → input 2.

[0055] In one embodiment, the input voltage V AC of the totem pole PFC circuit is in the positive half cycle, and V AC > 0. That is, input 1 is positive, and input 2 is negative. At this time, the MOS transistor in switch S4 is turned on. When the PFC inductor L is discharged, the MOS transistor in switch S1 is turned on, and the MOS transistor in switch S2 is turned off. The current in the totem pole PFC circuit 510 flows through the devices in turn: input 1 → PFC inductor L → switch S1 → output 3 → output 4 → switch S4 → input 2.

[0056] In one embodiment, the input voltage V AC of the totem pole PFC circuit is in the negative half cycle, and V AC < 0. That is, input 1 is negative. At this time, the MOS transistor in switch S3 is turned on. When the PFC inductor L is charged, the MOS transistor in switch S1 is turned on, and the MOS transistor in switch S2 is turned off. The current in the totem pole PFC circuit 510 flows through the devices in turn: input 2 → switch S3 → switch S1 → PFC inductor L → input 1.

[0057] ​In one embodiment, the input voltage V AC is in the negative half cycle, V AC <0. That is, the input terminal 1 is negative. At this time, the MOS transistor in the switch S3 is turned on. When the PFC inductor L discharges, the switch S1 in the totem-pole PFC circuit is turned off, and the switch S2 is turned on. The current in the totem-pole PFC circuit flows through the input terminal 2→the switch S3→the output terminal 3→the output terminal 4→the switch S2→the PFC inductor L→the input terminal 1 in turn.

[0058] The input voltage V AC is in the positive half cycle and switches to the negative half cycle phase, the control unit 350 sends the waveform simulation of the PWM signal to the switches S1, S2, S3 and S4 as shown in Figure 4 .

[0059] In the embodiments of the present application, the control unit 350 is divided into two control phases according to the time sequence of generating the common-mode current and the differential-mode current in the totem-pole PFC circuit 310. In the first control phase, the control unit 350 sends the PWM S3 signal to the switch S3 to make the switch S3 in the on state, and after the on setting time TSPWM_PRE_ON, stops sending the PWM S3 signal to the switch S3 to make the switch S3 in the off state. The on setting time TSPWM_PRE_ON is generally the voltage stabilization time of the bridge arm of the switch S3 and the switch S4.

[0060] As shown in Fig. 5(a), in the first control phase, the switch S3 in the totem-pole PFC circuit is turned on. The control unit 350 temporarily makes the switch S1 not conductive, and makes the switch S2 conductive. At this time, the PFC inductor L in the totem-pole PFC circuit discharges. The impact current generated by the discharge of the PFC inductor L in the totem-pole PFC circuit flows back to the input terminal 1 through the ground Y capacitors Cy1 and Cy2, the ground equivalent capacitor Cpg, the parasitic capacitor Cp2 in the switch S2, and the PFC inductor L in turn, forming the first common-mode current loop. The impact current generated by the discharge of the PFC inductor L in the totem-pole PFC circuit charges the parasitic capacitor Cp4 of the switch S4, and flows back to the input terminal 1 through the parasitic capacitor Cp4 of the switch S4, the parasitic capacitor Cp2 in the switch S2, and the PFC inductor L, forming the second common-mode current loop.

[0061] In the second common-mode current loop, the turn-on speed of the common-mode current is related to the turn-on speed of the switch S4, that is, the voltage V SW2 at the node SW2 changes from 0V to V OUTThe speed of the current. In order to reduce the impact current in the Totem PFC circuit 310, the driving resistance of the gate of the switch S3 can be increased. When the driving resistance of the gate of the switch S3 is increased, the conduction speed of the common-mode current in the second common-mode current loop can be reduced, so that the common-mode current in the second common-mode current loop is staggered with the common-mode current in the first common-mode current loop, and the impact current in the Totem PFC circuit 310 is reduced.

[0062] In the second control stage, after the control unit 350 stops sending the PWM S3 signal to the switch S3, the control unit 350 sends the PWM S3 signal to the switch S3 again by setting the time TQPWM_ON_DLY, so that the switch S3 is in the conduction state. When the control unit 350 sends the PWM S3 signal to the switch S3 again, the control unit 350 also sends the PWM S1 signal to the switch S1, so that the switch S3 and the switch S1 are both in the conduction state.

[0063] As shown in FIG. 5(b), in the second control stage, after the voltage of the relevant capacitor in the Totem PFC circuit 310 reaches stability, the control unit 350 delays for the time TQPWM_ON_DLY and then turns on the switch S3 in the Totem PFC circuit. The control unit 350 controls the switch S1 to be turned on and charges the PFC inductor L. At this time, the PFC inductor L in the Totem PFC circuit 310 generates a differential-mode current during the charging process. The differential-mode current in the Totem PFC circuit 310 flows through the devices in turn: the input end 2→the node SW2→the switch S3→the switch S1→the node SW1→the PFC inductor L→the input end 1. The delay time TQPWM_ON_DLY is generally the dead time of the conduction time and the off time of the switch S3 or the switch S4.

[0064] In the embodiment of the present application, the input voltage V AC When the input voltage V AC When the zero-crossing switching occurs, the control unit 350 turns on the switch S3. The control unit 350 first controls the switch S1 to be not turned on and controls the switch S2 to be turned on. During the charging and discharging process of each parasitic capacitor in the Totem PFC circuit, a common-mode current is generated. After the voltage of each parasitic capacitor in the Totem PFC circuit reaches stability, the control unit 350 controls the switch S1 to be turned on, and a differential-mode current is generated in the Totem PFC circuit 310 during the charging process of the PFC inductor L. The control unit 350 delays for a time to turn on the switch S1, so that the time when the common-mode current is generated in the Totem PFC circuit is staggered with the time when the differential-mode current is generated, and the impact current in the Totem PFC circuit is reduced.

[0065] Once the voltages of the parasitic capacitors in the totem pole PFC circuit stabilize, the control unit 350 controls switch S3 to disconnect for a set period of time. After the set period of disconnection, the control unit 350 controls switch S3 to turn on again. During the second turn-on, the control unit 350 can shield the noise generated by switch S3 during the first turn-on, preventing excessive inrush current from triggering the overcurrent protection mechanism and causing switch S3 to be in the off state, thus preventing abnormal operation of the totem pole PFC circuit.

[0066] The input voltage V of the totem pole PFC circuit 310 AC During the transition from the negative half-cycle to the positive half-cycle, in the first control phase, the control unit 350 sends a PWM S4 signal to switch S4, putting switch S4 in the on state. After the set on time TSPWM_PRE_ON of switch S4, the control unit 350 stops sending the PWM S3 signal to switch S4, putting switch S4 in the off state.

[0067] As shown in Figure 5(c), in the first control phase, switch S4 in the totem-pole PFC circuit is turned on. Control unit 350 temporarily de-energizes switch S2 and turns on switch S1. At this time, the PFC inductor L in the totem-pole PFC circuit discharges. The surge current generated by the discharge of the PFC inductor L flows sequentially through the PFC inductor L, the parasitic capacitance Cp2 in switch S2, the equivalent capacitance to ground Cpg, the Y-capacitor to ground Cy1, and the Y-capacitor to ground Cy2, returning to input terminal 2 to form the first common-mode current loop. The surge current generated by the discharge of the PFC inductor L in the totem-pole PFC circuit charges the parasitic capacitance Cp4 of switch S4, and flows back to input terminal 2 through the PFC inductor L, the parasitic capacitance Cp2 in switch S2, and the parasitic capacitance Cp4 of switch S4, forming the second common-mode current loop.

[0068] In the second common-mode current loop, the conduction speed of the common-mode current is related to the conduction speed of switch S4, which is also the voltage V at node SW2. SW2 From V OUT The speed at which the voltage changes to 0V. To reduce the inrush current in the totem-pole PFC circuit 310, the drive resistance of the gate of switch S4 can be increased. When the drive resistance of the gate of switch S4 increases, the conduction speed of the common-mode current in the second common-mode current loop can be reduced, allowing the common-mode current in the second common-mode current loop to be staggered from the common-mode current in the first common-mode current loop, thereby reducing the inrush current in the totem-pole PFC circuit 310.

[0069] In the second control stage, after the control unit 350 stops sending the PWM S4 signal to the switch S4, the control unit 350 sends the PWM S4 signal to the switch S4 again by setting the time TQPWM_ON_DLY, so that the switch S4 is in the on state. When the control unit 350 sends the PWM S4 signal to the switch S4 again, the control unit 350 also sends the PWM S2 signal to the switch S2, so that the switch S4 and the switch S2 are both in the on state.

[0070] As shown in FIG. 5(d), in the second control stage, after the voltage of the relevant capacitor in the totem-pole PFC circuit 310 reaches stability, the control unit 350 delays for the time TQPWM_ON_DLY and then turns on the switch S4 in the totem-pole PFC circuit. The control unit 350 controls the switch S2 to be on and charges the PFC inductor L. At this time, the PFC inductor L in the totem-pole PFC circuit 310 generates a differential mode current during the charging process. The differential mode current in the totem-pole PFC circuit 310 flows through the devices in the following order: the input end 1→the node SW1→the switch S2→the switch S4→the node SW2→the input end 2.

[0071] In the embodiment of the present application, the input voltage V AC When the input voltage V AC When the zero-crossing switching occurs, the switch S4 is turned on. The control unit 350 first controls the switch S2 to be off and controls the switch S1 to be on. During the charging and discharging processes of the various parasitic capacitors in the totem-pole PFC circuit, a common mode current is generated. After the voltage of each parasitic capacitor in the totem-pole PFC circuit reaches stability, the control unit 350 controls the switch S2 to be on, and a differential mode current is generated in the totem-pole PFC circuit 310 during the charging process of the PFC inductor L. The control unit 350 delays for the time TQPWM_ON_DLY to turn on the switch S2, so that the time when the common mode current is generated in the totem-pole PFC circuit is staggered with the time when the differential mode current is generated, thereby reducing the impact current in the totem-pole PFC circuit.

[0072] After the voltage of each parasitic capacitor in the totem-pole PFC circuit reaches stability, the control unit 350 controls the switch S4 to be off for a set time period. After the control unit 350 is off for the set time, the control unit 350 controls the switch S4 to be on again. In the second on process, the control unit 350 can shield the noise generated by the switch S4 in the first on process, so as to avoid that the impact current generated by the switch S4 in the first on process is too large, the switch S4 triggers the overcurrent protection mechanism, the switch S4 is in the off state, and the totem-pole PFC circuit works abnormally.

[0073] Figure 6 FIG. 6 is a flowchart of a noise suppression method for a totem-pole PFC circuit according to an embodiment of the present application. As shown in FIG. 6, the noise suppression method includes the following steps. Figure 6As shown, the method of controlling the totem-pole PFC circuit is performed by the control unit 350 described above, and the control unit 350 performs the steps as follows:

[0074] Step S601, receiving the input voltage V AC and determining whether the input voltage V AC is in the positive half cycle. If yes, step S607 is performed, and if no, step S602 is performed.

[0075] Step S602, sending a control signal to the switch S3.

[0076] Specifically, the control unit 350 receives the input voltage V AC through the input voltage detection unit 320. If the input voltage V AC at the current time is in the negative half cycle, the control unit 350 sends a control signal to the switch S3 to make the switch S3 in the on state, so that the control unit 350 controls the switch S1 and the switch S2 to charge and discharge the PFC inductor.

[0077] In one example, if the PFC inductor is charged, the MOS transistor in the switch S1 is on, and the MOS transistor in the switch S2 is off. The current in the totem-pole PFC circuit 510 flows through the devices in the following order: the input terminal 2→the switch S3→the switch S1→the PFC inductor L→the input terminal 1.

[0078] In one example, if the PFC inductor L is discharged, the switch S1 in the totem-pole PFC circuit is off, and the switch S2 is on. The current in the totem-pole PFC circuit flows through the devices in the following order: the input terminal 2→the switch S3→the output terminal 3→the output terminal 4→the switch S2→the PFC inductor L→the input terminal 1.

[0079] Step S603, determining whether the input voltage V AC is in the positive half cycle. If yes, step S604 is performed, and if no, step S602 is performed.

[0080] Step S604, sending a control signal to the switch S4.

[0081] Step S605, stopping sending the control signal to the switch S4 after the switch S4 is on for a set time.

[0082] Specifically, the control unit 350 constantly detects the input voltage V AC . If the input voltage V AC switches from the negative half cycle to the positive half cycle, the control unit 350 sends a control signal to the switch S4 to make the switch S4 in the on state. The control unit 350 temporarily makes the switch S2 not on and makes the switch S1 on. At this time, the PFC inductor L in the totem-pole PFC circuit is discharged.

[0083] The impulse current generated by the discharging of the PFC inductor L in the Totem-Pole PFC circuit flows through the PFC inductor L, the parasitic capacitor Cp2 in the switch S2, the equivalent capacitor Cpg to ground, the Y capacitor Cy1 to ground and the Y capacitor Cy2 to ground in turn, and returns to the input terminal 2, forming a first common-mode current loop. The impulse current generated by the discharging of the PFC inductor L in the Totem-Pole PFC circuit charges the parasitic capacitor Cp4 of the switch S4, and flows through the PFC inductor L, the parasitic capacitor Cp2 in the switch S2 and the parasitic capacitor Cp4 of the switch S4, and returns to the input terminal 2, forming a second common-mode current loop.

[0084] In the second common-mode current loop, the turn-on speed of the common-mode current is related to the turn-on speed of the switch S4, and the turn-on speed of the common-mode current is the speed at which the voltage V SW2 at the node SW2 changes from V OUT to 0V. In order to reduce the impulse current in the Totem-Pole PFC circuit 310, the driving resistance of the gate of the switch S4 can be increased. When the driving resistance of the gate of the switch S4 is increased, the turn-on speed of the common-mode current in the second common-mode current loop can be reduced, so that the common-mode current in the second common-mode current loop is staggered with the common-mode current in the first common-mode current loop, and the impulse current in the Totem-Pole PFC circuit 310 is reduced.

[0085] In step S606, after the set time is turned off, a control signal is sent to the switch S4 and a control signal is sent to the switch S2.

[0086] Specifically, after the voltages of the related capacitors in the Totem-Pole PFC circuit 310 reach stability, the control unit 350 delays for a set time TQPWM_ON_DLY and then sends the PWM S4 signal to the switch S4 again, so that the switch S4 is in the on state. When the control unit 350 sends the PWM S4 signal to the switch S4 again, it also sends the PWM S2 signal to the switch S2, so that the switch S4 and the switch S2 are both in the on state. At this time, the PFC inductor L in the Totem-Pole PFC circuit 310 generates a differential-mode current during the charging process. The devices through which the differential-mode current in the Totem-Pole PFC circuit 310 flows in turn are: the input terminal 1→the node SW1→the switch S2→the switch S4→the node SW2→the input terminal 2.

[0087] The input voltage V AC of the Totem-Pole PFC circuit 310 is in the negative half cycle and switches to the positive half cycle stage. When the input voltage V ACWhen the zero-crossing switching occurs, the control unit 350 turns on the switch S4. The control unit 350 first controls the switch S2 to be non-conductive and controls the switch S1 to be conductive. During the charging and discharging of the parasitic capacitances in the Totem-Pole PFC circuit, common-mode current is generated. After the voltages of the parasitic capacitances in the Totem-Pole PFC circuit reach stability, the control unit 350 controls the switch S2 to be conductive. During the charging of the PFC inductor L, differential-mode current is generated in the Totem-Pole PFC circuit 310. The control unit 350 controls the switch S2 to be conductive after a delay setting time, so that the time for generating the common-mode current and the time for generating the differential-mode current in the Totem-Pole PFC circuit are staggered, thereby reducing the impact current in the Totem-Pole PFC circuit.

[0088] After the voltages of the parasitic capacitances in the Totem-Pole PFC circuit reach stability, the control unit 350 controls the switch S4 to be non-conductive for a setting time period. After the setting time, the control unit 350 controls the switch S4 to be conductive again. In the second conduction, the control unit 350 can shield the noise generated by the switch S4 in the first conduction, so as to avoid that the impact current generated by the switch S4 in the first conduction is too large, the switch S4 triggers the overcurrent protection mechanism, the switch S4 is in the off state, and the Totem-Pole PFC circuit works abnormally.

[0089] Step S607: sending a control signal to the switch S4.

[0090] Specifically, if the input voltage V AC During the positive half cycle, the control unit 350 sends a control signal to the switch S4 to make the switch S4 in the conductive state, so that the control unit 350 controls the switch S1 and the switch S2 to charge and discharge the PFC inductor.

[0091] In an example, if the PFC inductor is charged, the MOS transistor in the switch S1 is turned off, and the MOS transistor in the switch S2 is turned on. The current in the Totem-Pole PFC circuit 510 flows through the devices in sequence: the input end 1→the PFC inductor L→the switch S2→the switch S4→the input end 2.

[0092] In an example, if the PFC inductor L is discharged, the MOS transistor in the switch S1 is turned on, and the MOS transistor in the switch S2 is turned off. The current in the Totem-Pole PFC circuit 510 flows through the devices in sequence: the input end 1→the PFC inductor L→the switch S1→the output end 3→the output end 4→the switch S4→the input end 2.

[0093] Step S608: determining whether the input voltage V AC is in the negative half cycle. If yes, step S609 is performed, and if no, step S607 is performed.

[0094] Step S609: sending a control signal to the switch S3.

[0095] Step S610, after the on-set time, stop sending control signal to switch S3.

[0096] Specifically, the control unit 350 constantly detects the input voltage V AC If the input voltage V AC Switching from the positive half cycle to the negative half cycle stage, the control unit 350 sends a control signal to switch S3, so that switch S3 is in the on state. The control unit 350 temporarily makes switch S1 not conductive, and makes switch S2 conductive. At this time, the PFC inductor L in the totem pole PFC circuit discharges.

[0097] The impact current generated by the discharge of the PFC inductor L in the totem pole PFC circuit flows back to the input terminal 1 through the ground Y capacitor Cy1 and the ground Y capacitor Cy2, the ground equivalent capacitor Cpg, the parasitic capacitor Cp2 in switch S2, and the PFC inductor L in turn, forming the first common-mode current loop. The impact current generated by the discharge of the PFC inductor L in the totem pole PFC circuit charges the parasitic capacitor Cp4 of switch S4, and flows back to the input terminal 1 through the parasitic capacitor Cp4 of switch S4, the parasitic capacitor Cp2 in switch S2, and the PFC inductor L, forming the second common-mode current loop.

[0098] In the second common-mode current loop, the turn-on speed of the common-mode current is related to the turn-on speed of switch S4, that is, the voltage V SW2 Changes from 0V to V OUT Speed. In order to reduce the impact current in the totem pole PFC circuit 310, the drive resistance of the gate of switch S3 can be increased. When the drive resistance of the gate of switch S3 is increased, the turn-on speed of the common-mode current in the second common-mode current loop can be reduced, so that the common-mode current in the second common-mode current loop is staggered with the common-mode current in the first common-mode current loop, and the impact current in the totem pole PFC circuit 310 is reduced.

[0099] Step S611, after the off-set time, send control signal to switch S3 and send control signal to switch S1.

[0100] Specifically, after the voltage of the relevant capacitor in the totem-pole PFC circuit 310 reaches stability, the control unit 350 delays for a set time TQPWM_ON_DLY and then sends the PWM S3 signal to the switch S3 again, so that the switch S3 is in the on state. When the control unit 350 sends the PWM S3 signal to the switch S3 again, the control unit 350 also sends the PWM S1 signal to the switch S1, so that the switch S3 and the switch S1 are both in the on state. At this time, the PFC inductor L in the totem-pole PFC circuit 310 generates a differential mode current in the charging process. The differential mode current in the totem-pole PFC circuit 310 sequentially flows through the input end 2→ the node SW2→ the switch S3→ the switch S1→ the node SW1→ the PFC inductor L→ the input end 1.

[0101] The input voltage V AC Switches from the positive half cycle to the negative half cycle stage. When the input voltage V AC When zero-crossing switching occurs, the control unit 350 turns on the switch S3. The control unit 350 first controls the switch S1 to be off and controls the switch S2 to be on. In the charging and discharging process of each parasitic capacitor in the totem-pole PFC circuit, a common mode current is generated. When the voltage of each parasitic capacitor in the totem-pole PFC circuit reaches stability, the control unit 350 controls the switch S1 to be on, and a differential mode current is generated in the totem-pole PFC circuit 310 in the charging process of the PFC inductor L. The control unit 350 controls the switch S1 to be on by delaying for a set time, so that the time when the common mode current is generated in the totem-pole PFC circuit and the time when the differential mode current is generated are staggered, thereby reducing the impact current in the totem-pole PFC circuit.

[0102] When the voltage of each parasitic capacitor in the totem-pole PFC circuit reaches stability, the control unit 350 controls the switch S3 to be off for a set time period. After the control unit 350 is off for the set time, the control unit 350 controls the switch S3 to be on again. In the second on process, the control unit 350 can shield the noise generated by the switch S3 in the first on process, so as to avoid that the impact current generated by the switch S3 in the first on process is too large, the switch S3 triggers an overcurrent protection mechanism, the switch S3 is in the off state, and the totem-pole PFC circuit works abnormally.

[0103] The electronic device provided in the embodiments of the present application includes the noise suppression device of the totem-pole PFC circuit. The noise suppression device of the totem-pole PFC circuit can be, for example, Figures 3-6 the noise suppression device of the totem-pole PFC circuit described in the corresponding protection scheme. Since the electronic device includes the noise suppression device of the totem-pole PFC circuit, the electronic device has all or at least part of the advantages of the noise suppression device of the totem-pole PFC circuit. The electronic device can be a base station, a charging pile, a switch, an electric vehicle, and the like, which are not limited herein.

[0104] In the description of the specification, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0105] Finally, it should be pointed out that the above embodiments are only used to illustrate the technical solutions of the present application, and are not limiting; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for some technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions in the embodiments of the present application.

Claims

1. A method of noise rejection for a totem-pole PFC circuit, comprising: The method is executed by a controller and includes: sampling AC power at an input end of a totem pole PFC circuit; determining when voltage zero-crossing of the AC power at the input end occurs, and sending a control signal to a third switch or a fourth switch, the voltage zero-crossing being when voltage of the AC power switches from a positive half cycle to a negative half cycle or from a negative half cycle to a positive half cycle, the third switch being a switch that allows a PFC inductor in the totem pole PFC circuit to charge and discharge when the voltage of the AC power is in a negative half cycle, the fourth switch being a switch that allows the PFC inductor to charge and discharge when the voltage of the AC power is in a positive half cycle, the control signal being used to allow the third switch or the fourth switch to be in a conducting state, causing common mode current to be generated by a parasitic capacitor in the totem pole PFC circuit; after a conducting set time, stopping sending the control signal to the third switch or the fourth switch; after a turn-off set time, sending the control signal to the third switch or the fourth switch, causing differential mode current to be generated by the PFC inductor in the totem pole PFC circuit.

2. The method of claim 1, wherein, after the determining when voltage zero-crossing of the AC power at the input end occurs, sending the control signal to the third switch, further comprising: sending the control signal to a second switch, the second switch being a switch that allows the PFC inductor to discharge when the voltage of the AC power is in a negative half cycle or allows the PFC inductor to charge when the voltage of the AC power is in a positive half cycle; or, after the determining when voltage zero-crossing of the input AC power occurs, sending the control signal to the fourth switch, further comprising: sending the control signal to a first switch, the first switch being a switch that allows the PFC inductor to charge when the voltage of the AC power is in a negative half cycle or allows the PFC inductor to discharge when the voltage of the AC power is in a positive half cycle.

3. The method of claim 2, wherein, after the sending the control signal to the third switch after the turn-off set time, further comprising: sending the control signal to the first switch; or, after the sending the control signal to the fourth switch after the turn-off set time, further comprising: sending the control signal to the second switch.

4. The method according to any one of claims 1 to 3, characterized in that, the third switch and the fourth switch each include a MOS transistor, before or after the determining when voltage zero-crossing of the AC power at the input end occurs, sending the control signal to the third switch or the fourth switch, further comprising: increasing resistance of a gate of the MOS transistor in the third switch or the MOS transistor in the fourth switch.

5. A noise suppression apparatus for totem-pole PFC circuitry, comprising: comprising: a totem pole PFC circuit, an input voltage detection unit, and a control unit, the input voltage detection unit is configured to sample AC power at an input end of the totem pole PFC circuit and input voltage of the AC power to the control unit; The control unit is configured to determine a voltage zero-crossing of the AC power at the input end, and send a control signal to the third switch or the fourth switch when the voltage zero-crossing occurs, the voltage zero-crossing is a voltage of the AC power switching from a positive half cycle to a negative half cycle or from a negative half cycle to a positive half cycle, the third switch is a switch allowing the PFC inductor in the totem pole PFC circuit to charge and discharge when the voltage of the AC power is in the negative half cycle, the fourth switch is a switch allowing the PFC inductor to charge and discharge when the voltage of the AC power is in the positive half cycle, and the control signal is configured to allow the third switch or the fourth switch to be in a conducting state, so that a common mode current is generated by a parasitic capacitor in the totem pole PFC circuit; After a conducting setting time, the sending of the control signal to the third switch or the fourth switch is stopped; After a turn-off setting time, the control signal is sent to the third switch or the fourth switch, so that a differential mode current is generated by the PFC inductor in the totem pole PFC circuit.

6. The apparatus of claim 5, wherein, The control unit is further configured to, after the control signal is sent to the third switch when the voltage zero-crossing of the AC power at the input end is determined, send the control signal to the second switch, the second switch is a switch allowing the PFC inductor to discharge when the voltage of the AC power is in the negative half cycle, or a switch allowing the PFC inductor to charge when the voltage of the AC power is in the positive half cycle; Or, After the control signal is sent to the fourth switch when the voltage zero-crossing of the AC power is determined, the control signal is sent to the first switch, the first switch is a switch allowing the PFC inductor to charge when the voltage of the AC power is in the negative half cycle, or a switch allowing the PFC inductor to discharge when the voltage of the AC power is in the positive half cycle.

7. The apparatus of claim 6, wherein, The control unit is further configured to, after the control signal is sent to the third switch after the turn-off setting time, send the control signal to the first switch; or After the control signal is sent to the fourth switch after the turn-off setting time, the control signal is sent to the second switch.

8. The apparatus of any one of claims 5-7, wherein, The third switch and the fourth switch each include a MOS transistor, The control unit is further configured to increase a resistance of a gate of the MOS transistor in the third switch or the MOS transistor in the fourth switch.

9. An electronic device, comprising: The totem pole PFC circuit includes: At least one noise suppression device of the totem pole PFC circuit according to claims 5-8.

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