Power modules, power systems, vehicles and photovoltaic systems

Abstract

The present application provides a power module, a power system, a vehicle and a photovoltaic system, wherein the power module includes a first metal-clad substrate, a plurality of chips and a first connecting piece, wherein the first electrode of each chip is electrically connected to the first metal layer of the first metal-clad substrate, the first connecting piece includes a first main body and a plurality of first contact parts, the second electrode of each chip in the plurality of chips is in contact with at least one first contact part, and a portion of the first main body is provided between at least one pair of adjacent first contact parts. In the present application, the current flowing out of the chip can flow directly into the first main body through the first contact part, thereby reducing the current flow path, and the chips are connected in parallel through the first connecting piece, thereby reducing the parasitic inductance of the power module and improving the current sharing of the power module.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a power module, a power system, a vehicle and a photovoltaic system. Background Art

[0002] With the development of power electronics technology, power modules have attracted more and more attention. The electrical connection of semiconductor chips in power modules is mainly achieved by aluminum wire welding technology, which connects the gate and source of semiconductor chips to the copper layer on the surface of the substrate through aluminum wires. However, when more chips are arranged in the power module, the number of aluminum wires will increase accordingly. More aluminum wires will increase the parasitic inductance of the power module. When multiple chips are connected in parallel, multiple aluminum wire connections will cause uneven currents between the multiple parallel chips. Uneven currents will cause uneven heat generation of the parallel chips. Local heating will seriously affect the performance of the chip, and thus the performance of the power module. Summary of the invention

[0003] The present application provides a power module that can reduce parasitic inductance and improve current sharing.

[0004] In a first aspect, the present application provides a power module, the power module comprising a first metal-clad substrate, a plurality of chips and a first connecting piece, the first metal-clad substrate comprising a first insulating substrate and a first metal layer located on one side of the first insulating substrate, the first metal layer comprising a first surface facing away from the first insulating substrate; the chip comprising a first electrode and a second electrode, the plurality of chips being located on a side of the first metal layer away from the first insulating substrate, and the first electrode of each of the plurality of chips being electrically connected to the first metal layer, at least two of the plurality of chips being arranged at intervals along a first direction, and at least two of the plurality of chips being arranged at intervals along a second direction, the second direction being parallel to the first surface and intersecting with the first direction; the first connecting piece being located on a side of the plurality of chips away from the first insulating substrate, the first connecting piece comprising a first main body portion and a plurality of first contact portions, the second electrode of each of the plurality of chips being in contact with at least one of the first contact portions, and a portion of the first main body portion being provided between at least one pair of adjacent first contact portions; the first main body portion being arranged at an insulating interval from the first metal layer.

[0005] Among them, the power module includes a plurality of chips arranged along a first direction and along a second direction, and the plurality of chips are connected in parallel through a first connecting piece. Generally, multiple chips connected in parallel will generate inductance. In the present application, a portion of the first main body is provided between at least one pair of adjacent first contact portions. Since the flow path of the first main body is wider than the flow path of the current in the first contact portion, the current flowing out of the second electrode of the chip directly flows into the first main body, thereby strengthening the connectivity between the plurality of chips arranged in the first direction and the second direction, improving the consistency of parasitic parameters between the parallel chips, and further optimizing the dynamic current sharing between the plurality of parallel chips; and the first connecting piece can also increase the structural reliability of the interconnection of the plurality of chips along the first direction and the second direction, and ensure the stability of current transmission.

[0006] In a possible implementation, along the thickness direction of the chip, the first main body is isolated from the second electrode of the chip, the first connecting sheet includes one or more grooves, the grooves protrude from the first main body toward the first surface, and the bottom of the grooves is the first contact portion. The first main body is isolated from the second electrode of the chip, and the grooves protrude from the first main body toward the first surface, so that the first main body is above the second electrode of the chip to improve the electrical insulation between the first main body and the first metal layer.

[0007] In a possible implementation, the first connecting sheet includes one or more bent structures, and the bent structure includes the first contact portion that contacts the second electrode of the chip. The bent structure refers to a structure that bends toward the first surface, and one end of the bent structure away from the first main body protrudes toward the first surface. The first contact portion is the protruding portion, and the first contact portion contacts the second electrode, so that the first main body is located above the second electrode to improve the electrical insulation between the first main body and the first metal layer.

[0008] In a possible implementation, the first connecting piece is an integrally formed structure. The integrally formed structure can improve the smoothness of current flow, reduce current flow resistance, improve current sharing and reduce inductance, and can also improve the reliability of the first connecting piece.

[0009] In a possible implementation, part of the first main body is provided between each pair of adjacent first contact portions, so that each first contact portion is directly connected to the first main body portion, so that the current flowing out of the second electrode of each chip is directly connected to the first main body portion through the first contact portion, thereby strengthening the connectivity between the multiple chips arranged in the first direction and the second direction, improving the consistency of parasitic parameters between parallel chips, and further optimizing the dynamic current sharing between the multiple parallel chips.

[0010] In a possible implementation, the first contact portions are distributed at the edge of the first main body. The edge of the first main body has a large distribution area, and more first contact portions can be distributed, and more chips can be connected in parallel, thereby improving the power density of the power module.

[0011] In a possible implementation, the power module includes two first chip subgroups arranged at intervals along a first direction, the first chip subgroup includes at least two chips arranged at intervals along a second direction, the first main body includes a first trunk and a plurality of first branches, the first trunk extends along the second direction, the first branches are located on both sides of the first trunk along the first direction and are connected to the first trunk; in the first direction, the first trunk is located between two adjacent first chip subgroups, in the second direction, the first branch is located between two adjacent first contact portions, and the first branch is connected to two adjacent first contact portions along the second direction, and the first trunk is electrically connected to the second metal layer. In this implementation, two first chip subgroups are included, each of which has at least two chips, and the first connecting piece connects the chips in the two first chip subgroups to connect the chips in the two first chip subgroups in parallel. Among them, the first branch connects the first contact portions on the two adjacent chips arranged along the second direction, and at least part of the current from the two first contact portions can be merged into the first trunk through the first branch. The first branch is directly connected between the two first contact portions, which can shorten the parallel path of the two adjacent chips and improve the current sharing.

[0012] In a possible implementation, at least part of the first contact portions are spaced apart from the first trunk. For example, the first contact portions on the chips at both ends of the first chip subgroup may be spaced apart from the first trunk, which can reduce the weight of the first connecting sheet.

[0013] In a possible implementation, the power module further includes a second metal layer, the first metal layer and the second metal layer are located on the same side of the first insulating substrate, and the first metal layer and the second metal layer are arranged at an interval in their orthographic projections on the first insulating substrate, and the first connecting piece further includes a second contact portion, and the second contact portion is electrically connected to the second metal layer. The current after converging in the first main body can flow into the second metal layer through the second contact portion. The current flow direction is: input end, first metal layer, first electrode of the chip, second electrode of the chip, first contact portion, first main body, second contact portion, and second metal layer.

[0014] In a possible implementation, the first contact portion adjacent to the second contact portion is also connected to the second contact portion, so that the current flowing out of the first contact portion directly flows into the second contact portion without taking a detour, thereby reducing current resistance and shortening the current flow path, thereby reducing inductance.

[0015] In a possible implementation, the first contact portion adjacent to the second contact portion is also connected to the first trunk. The first contact portion is connected to the first trunk with no gap therebetween, so that the current flowing out of the first contact portion can flow directly into the first trunk without taking a detour, thereby reducing current resistance and shortening the current flow path, thereby reducing inductance. In this embodiment, the first contact portion is connected to both the second contact portion and the first trunk, further reducing inductance and improving current sharing.

[0016] In a possible implementation, the first contact portion, the second contact portion and the first main body are an integrally formed structure. The second contact portion is a groove or a bent structure of the first connecting piece protruding from the first main body to the second metal layer. The integrally formed structure improves the reliability of the first connecting piece and reduces the current flow resistance between the first contact portion, the second contact portion and the first main body, thereby reducing the inductance and improving the current sharing.

[0017] In a possible implementation, the first connecting sheet is an integrally formed rectangular sheet structure. The first contact portion is a groove or a bent structure protruding from the first main body portion toward the chip, and the second contact portion is a groove or a bent structure protruding from the first main body portion toward the second metal layer. The integrally formed rectangular sheet structure can make the chips in the two first chip subgroups more closely arranged, improve the current sharing between the parallel chips, and effectively reduce parasitic inductance.

[0018] In a possible implementation, the power module includes two groups of chipsets arranged in series, namely a first chipset and a second chipset, the first chipset is located on a side of the first metal layer away from the first insulating substrate, and the second chipset is located on a side of the second metal layer away from the first insulating substrate, the power module also includes a second connecting piece, the second connecting piece is located on a side of the second chipset away from the first insulating substrate, and multiple chips in the second chipset are connected in parallel through the second connecting piece. The two groups of chipsets arranged in series can improve the power density of the power module.

[0019] In a possible implementation, the power module further includes a second metal-clad substrate and electronic components, the second metal-clad substrate is located on the first surface, the electronic components are located on a side of the second metal-clad substrate away from the first metal-clad substrate, and are electrically connected to the second metal-clad substrate.

[0020] Since the size of electronic components is generally small, if the electronic components are directly welded on the first metal-clad substrate, it is necessary to open an insulating groove on the metal layer of the first metal-clad substrate to electrically connect the two electrodes of the electronic components to the metal layers on both sides of the insulating groove. Opening an insulating groove on the first metal-clad substrate will reduce the layout space of the chip, and the first metal-clad substrate is provided with a large number of chips. Etching a groove in the metal layer on the first metal-clad substrate may damage the pre-arranged chips or other electronic devices. In this implementation, the electronic components are transferred through the second metal-clad substrate, so that the electronic component welding process is simple. Compared with directly welding the electronic components on the metal layer of the first metal-clad substrate, the step of opening an insulating groove on the metal layer of the first metal-clad substrate can be saved, making the circuit design on the first metal-clad substrate simpler. The insulating groove can be pre-arranged on the second metal-clad substrate according to the size of the electronic components and the position of the two electrodes of the electronic components. The insulating groove is etched on the second metal-clad substrate without affecting the performance of the chip on the first metal-clad substrate, and then the electronic components are electrically connected to the second metal-clad substrate.

[0021] In a possible implementation, the chip further includes a third electrode, the electronic component is a gate resistor, the second metal-clad substrate is located on the first surface, the second metal-clad substrate includes a fourth electrode and a fifth electrode arranged with an insulating interval, two ends of the gate resistor are electrically connected to the fourth electrode and the fifth electrode respectively, the fourth electrode is used to receive a driving current, and the fifth electrode is electrically connected to the third electrode of the chip through a first conductive line. The second metal-clad substrate is used to transfer the gate resistor, so that the gate resistor welding process is simple.

[0022] In a possible implementation, in the first metal-clad substrate, the first metal layer is connected to the first insulating substrate through a metal welding layer; the second metal-clad substrate also includes a second insulating substrate, and the fourth electrode and the fifth electrode are attached to the surface of the second insulating substrate.

[0023] In the first metal-clad substrate, along the third direction, the first insulating substrate has two metal layers on the side facing the chip, and the two metal layers are a metal welding layer and a first metal layer. If the electronic components are directly welded on the first metal-clad substrate, since the electronic components need to pass current, two sixth electrodes and seventh electrodes with insulating intervals need to be set on the first metal-clad substrate, and part of the fourth metal layer and part of the metal welding layer between the sixth electrode and the seventh electrode need to be removed through an etching process. The larger the etching size along the third direction, the larger the aperture of the second groove, or the larger the size between the sixth electrode and the seventh electrode, while the electronic components (such as gate resistors) are smaller in size and cannot be welded on the sixth electrode and the seventh electrode, or the welding reliability will be poor. Based on this, electronic components are transferred through the second metal-clad substrate, wherein the metal on the second metal-clad substrate is directly bonded to the second insulating substrate, so that the formed fourth electrode and fifth electrode are also directly attached to the surface of the second insulating substrate, and there is no metal welding layer between the fourth electrode and the fifth electrode and the second insulating substrate. When etching and grooves to form the fourth electrode and the fifth electrode, there is no need to etch the metal welding layer, so that the size between the fourth electrode and the fifth electrode can be controlled to be smaller, which is conducive to welding electronic components (such as gate resistors).

[0024] In one embodiment, the first metal-clad substrate is an active metal welding substrate. An active metal welding substrate refers to a metal layer such as a copper layer or an aluminum layer welded on the two side surfaces of an insulating substrate by metal solder, wherein the first metal layer, the second metal layer, the first end metal layer, the terminal metal layer and other circuits required by the power module can be formed by etching the copper layer. The material of the first insulating substrate in the first metal-clad substrate can be iN or AlN, so that the welding reliability of the first insulating substrate and the metal plates on both sides is stronger, and it has good thermal conductivity, which can improve the heat dissipation effect of the power module.

[0025] In one embodiment, the second metal-clad substrate is a copper-clad ceramic substrate. The second insulating substrate is an Al2O3 ceramic substrate or an AlN ceramic substrate, and the metal layer (e.g., copper foil) is directly bonded to the second insulating substrate at a high temperature. Exemplarily, the copper foil is directly bonded to the Al2O3 ceramic substrate at a high temperature, and then the copper foil is formed into a fourth electrode and a fifth electrode as required, and there is no other metal layer between the copper foil and the Al2O3 ceramic substrate, so that the spacing between the fourth electrode and the fifth electrode can be smaller, which is conducive to welding the gate resistor.

[0026] In a possible implementation, in the first metal-clad substrate, the thickness of the first metal layer and the second metal layer is greater than or equal to 0.6 mm. When the thickness of the first metal layer is within the above range, the first metal layer has a higher power density and can quickly transmit current to multiple chips in parallel. When the thickness of the second metal layer is within the above range, the thermal conductivity of the first metal-clad substrate can also be provided, thereby improving the heat dissipation effect of the power module, so that the second metal layer has a higher power density and can quickly transmit current to multiple chips in parallel in the second chip group. The greater the thickness of the first metal layer and the second metal layer, the better the heat dissipation effect and the greater the power density. However, the thicker the first metal layer and the second metal layer, the larger the size of the insulating groove will be when etching the insulating groove. Since the size of the electronic components (such as the gate resistor) is small, welding the electronic components across the groove and the two electrodes will increase the process difficulty. Based on this, when improving the power density of the power module, the process difficulty of welding the electronic components can be reduced by setting the second metal-clad substrate.

[0027] In a possible implementation, the first metal-clad substrate is an insulating metal substrate. The insulating metal substrate includes an insulating resin layer and metal layers located on both sides of the insulating resin layer, wherein the metal layer on one side is etched into a required circuit according to electrical interconnection requirements, including forming a first metal layer and a second metal layer. When the thickness of the metal layer is greater than or equal to 0.6 mm, the power module has a higher power density, and the second metal-clad substrate can be provided to transfer electronic components to reduce the process difficulty of welding electronic components.

[0028] In a possible implementation, the electronic component is a thermistor, the second metal-clad substrate is located on a side of the first metal layer away from the first insulating substrate and is disposed adjacent to the chip, and the thermistor is used to monitor the temperature of the chip. The second metal-clad substrate of the transfer thermistor and the chip are located on the first metal layer, which can improve the accuracy of detecting the chip temperature.

[0029] In a possible implementation, the power module further includes a heat sink, which is located on a side of the first metal-clad substrate away from the chip, and a plurality of spaced support components are provided between the heat sink and the first metal-clad substrate. In order to improve the heat dissipation effect, the heat sink can be welded to the side of the first metal-clad substrate away from the chip by a seventh solder. Compared with the method of bonding the heat sink to the first metal-clad substrate by using thermally conductive silicone, the thermal conductivity of the welding material is better than that of the thermally conductive silicone by welding. Generally, when welding the heat sink and the first metal-clad substrate, the heat sink and the first metal-clad substrate need to apply pressure, wherein the support component can prevent the seventh solder between the first metal-clad substrate and the heat sink from being squeezed out due to the pressure, and the seventh solder is too thin, resulting in failure. Before welding, the support component can be bonded to the surface of the heat sink facing the first metal-clad substrate, or the support component can be bonded to the surface of the first metal-clad substrate facing the heat sink. The support component can be a metal wire or a metal strip. The support component can also be used to control the thickness of the seventh solder. The thickness of the support component can be designed according to needs so that the seventh solder meets the needs.

[0030] In a possible implementation, the support assembly includes two support bars arranged in parallel, and the support bar includes at least two support segments, and two adjacent support segments are arranged along the extension direction of the support bar and are spaced apart. When the seventh solder is filled between the two support bars arranged in parallel, the seventh solder is not easily squeezed out during pressurized welding, but bubbles will be generated during high-temperature welding, and bubbles that do not overflow will form pores in the welding layer, affecting welding reliability. By spacing the support segments, the overflow of bubbles can be promoted and the pores can be reduced. In addition, the two support bars arranged in parallel can be used to enhance the support strength of the first metal-clad substrate and the radiator.

[0031] In the second aspect, the present application provides a power supply system, which includes a power supply, an electrical device, and a power module as described in any of the above items, wherein the power supply is connected to the input end of the power module, and the electrical device is connected to the output end of the power module, and the power module is used to convert the direct current output by the power supply into alternating current, and transmit the alternating current to the electrical device. Among them, the power module is a semiconductor device that converts the voltage, current, frequency, etc. of the direct current output by the power supply, and is the core device of the power conversion of the power supply system. For example, the power supply system can be used as the core device of the motor control unit of an electric vehicle to convert direct current to alternating current, as the battery of an electric vehicle to output direct current, or to convert direct current into alternating current required for vehicle operation, etc.

[0032] In a third aspect, the present application provides a vehicle, the vehicle comprising a vehicle body and a power supply system as described above, the power supply system being mounted on the vehicle body. In some embodiments, the power supply system comprises an inverter, the inverter being provided with a power module and a control circuit, the control circuit being electrically connected to the power module, and the control circuit being able to control the performance parameters of the alternating current output by the power module to the motor according to the needs of the vehicle, such as voltage, current, frequency, etc.

[0033] In a fourth aspect, the present application provides a photovoltaic system, characterized in that it comprises a photovoltaic component and a power module as described in any one of the above items, the photovoltaic component is electrically connected to the power module, and the direct current generated by the photovoltaic component is converted into alternating current through the power module. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments of the present application will be described below.

[0035] Figure 1 is a schematic diagram of the structure of a power supply system provided by an embodiment of the present application;

[0036] Figure 2 is a structural schematic diagram of a vehicle provided by an embodiment of the present application;

[0037] Figure 3 is a schematic structural diagram of a photovoltaic system provided in one embodiment of the present application;

[0038] Figure 4 is a schematic diagram of the structure of a power module provided in one embodiment of the present application;

[0039] Figure 5 is a cross-sectional view of a power module provided in one embodiment of the present application;

[0040] Figure 6 is a cross-sectional view of a chip and a first metal-clad substrate in a power module provided in an embodiment of the present application;

[0041] Figure 7 is a schematic structural diagram of a power module provided by an embodiment of the present application without the first connecting piece;

[0042] Figure 8 is a schematic structural diagram of a first connecting sheet provided in one embodiment of the present application;

[0043] Fig. 9 is a schematic structural diagram of a first connecting sheet provided in one embodiment of the present application;

[0044] Fig.10 is a schematic structural diagram of a first connecting sheet provided in one embodiment of the present application;

[0045] Fig.11 is a schematic structural diagram of a first connecting sheet provided in one embodiment of the present application;

[0046] Fig.12 is a schematic diagram of the structure of a power module provided in one embodiment of the present application;

[0047] Fig.13 is a schematic structural diagram of a second connecting piece provided in one embodiment of the present application;

[0048] Fig.14 is a schematic diagram of the structure of a power module provided in one embodiment of the present application;

[0049] Fig.15 is a schematic diagram of the structure of a power module provided in one embodiment of the present application;

[0050] Fig.16 This application Fig.15 A partial enlarged view of the middle M part;

[0051] Fig.17 is a partial cross-sectional view of a power module provided in one embodiment of the present application;

[0052] Fig.18 It is a schematic structural diagram of a second metal-clad substrate and a first metal-clad substrate in a power module provided in an embodiment of the present application;

[0053] Fig.19 This is a schematic diagram of a structure in which a gate resistor is directly welded to a first metal-clad substrate according to an embodiment of the present application;

[0054] Fig. 20 This application Fig.15 A partial enlarged view of the N part;

[0055] Fig.21 is a partial cross-sectional view of a power module provided in one embodiment of the present application;

[0056] Fig. 22 This is a schematic diagram of a structure in which a thermistor is directly welded to a first metal-clad substrate according to an embodiment of the present application;

[0057] Fig.23a is a structural schematic diagram of a radiator and a support assembly provided in one embodiment of the present application;

[0058] Figure 23b is a structural schematic diagram of a radiator and a support assembly provided in one embodiment of the present application;

[0059] Fig.24 is a 3D-x-ray image of a welding surface between a heat sink and a first metal-clad substrate in a power module provided by an embodiment of the present application;

[0060] Fig.25 is a flow chart of a method for preparing a power module provided in one embodiment of the present application;

[0061] Fig.26 This is a schematic diagram of a process of mounting a chip on a first metal-clad substrate provided by an embodiment of the present application;

[0062] Fig. 27 This is a schematic diagram of a process of mounting a chip on a first metal-clad substrate provided by an embodiment of the present application;

[0063] Fig.28 It is a schematic diagram of the structure of a pressure head and a chip provided in an embodiment of the present application;

[0064] Fig.29 It is a structural schematic diagram of a welding fixture and a power module provided in one embodiment of the present application;

[0065] Fig.30 It is a schematic diagram of the structure of a power module provided in one embodiment of the present application. DETAILED DESCRIPTION

[0066] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0067] In this document, the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0068] In addition, in this article, directional terms such as "upper" and "lower" are defined relative to the orientation of the structure schematically placed in the drawings. It should be understood that these directional terms are relative concepts. They are used for relative description and clarification, and they can change accordingly according to the change of the orientation of the structure.

[0069] For ease of understanding, the English abbreviations and related technical terms involved in the embodiments of the present application are explained and described below.

[0070] MOSFET: Metal-Oxide-Semiconductor Field-Effect Transistor, metal-oxide semiconductor field effect transistor.

[0071] IGBT: Insulated Gate Bipolar Transistor, insulated gate bipolar transistor.

[0072] The present application provides a power module, comprising a first metal-clad substrate, a plurality of chips and a first connecting piece, wherein the first metal-clad substrate comprises a first insulating substrate and a first metal layer located on one side of the first insulating substrate, wherein the first metal layer comprises a first surface facing away from the first insulating substrate; the chip comprises a first electrode and a second electrode, the plurality of chips are located on a side of the first metal layer away from the first insulating substrate, and the first electrode of each of the plurality of chips is electrically connected to the first metal layer, at least two of the plurality of chips are arranged at intervals along a first direction, and at least two of the plurality of chips are arranged at intervals along a second direction, wherein the second direction is parallel to the first surface and intersects with the first direction; the first connecting piece is located on a side of the plurality of chips away from the first insulating substrate, wherein the first connecting piece comprises a first main body portion and a plurality of first contact portions, wherein the second electrode of each of the plurality of chips is in contact with at least one of the first contact portions, a portion of the first main body portion is provided between at least one pair of adjacent first contact portions, and the first main body portion is arranged at an insulating interval from the first metal layer. The first connecting piece arranges part of the first main body between the first contact parts connected to the chip so that the current flowing out from the second electrode of the chip can directly flow into the first main body through the first contact part, thereby reducing the current flow path. By connecting the chips in parallel through the first connecting piece, the winding length when the chips are interconnected can be reduced, thereby reducing the parasitic inductance of the power module; and the first connecting piece can be connected to each chip, and the flow path of the first connecting piece is wide, with less current flow resistance, which can improve the current balance between the chips of the power module.

[0073] See also Figure 1 In one embodiment of the present application, a power supply system 1 is provided. The power supply system 1 includes a power module 10, a power supply 11, and an electric device 12. The power supply 11 is connected to an input terminal 101 of the power module 10, and the electric device 12 is connected to an output terminal 102 of the power module 10. The power module 10 is used to convert the direct current output by the power supply 11 into alternating current, and transmit the alternating current to the electric device 12. Among them, the power module 10 is a semiconductor device that converts the voltage, current, frequency, etc. of the direct current output by the power supply 11, and is a core device for power conversion of the power supply system 1. For example, the power supply system 1 can be used as a core device for converting direct current to alternating current in a motor control unit of an electric vehicle, as a battery of an electric vehicle to output direct current, or to convert direct current into alternating current required for vehicle operation.

[0074] See also Figure 2 , Figure 2A vehicle 2 is provided for one embodiment of the present application. The vehicle 2 includes a vehicle body 21 and a power supply system 1 as described above. The power supply system 1 is installed on the vehicle body 21. The power supply system 1 provides a power source for the vehicle 2. The power supply system 1 in the present application has a high power density and can be applied in the vehicle 2 to improve the power performance of the vehicle 2. The vehicle 2 includes a car (such as Figure 2 As shown), in other embodiments, the vehicle 2 includes an electric vehicle or a special operation vehicle, the electric vehicle includes a two-wheeled, three-wheeled or four-wheeled electric vehicle, and the special operation vehicle includes various vehicles with specific functions, such as engineering rescue vehicles, water trucks, sewage suction trucks, cement mixers, cranes, and medical vehicles. In this embodiment, the power supply 11 is a battery in the vehicle 2, and the power-consuming device 12 is a motor in the vehicle 2. In some embodiments, the power supply system 1 includes an inverter (not shown in the figure), and the inverter is provided with a power module 10 and a control circuit (not shown in the figure). The control circuit is electrically connected to the power module 10, and the control circuit can control the performance parameters of the alternating current output by the power module 10 to the motor according to the needs of the vehicle 2, such as voltage, current, frequency, frequency, etc.

[0075] See also Figure 3 The power module 10 of the present application can also be used in a photovoltaic system 3. Figure 3 The photovoltaic system 3 provided in one embodiment of the present application includes a photovoltaic module 31 and a power module 10. The photovoltaic module 31 is electrically connected to the power module 10, and the direct current generated by the photovoltaic module 31 is converted into alternating current by the power module 10. The alternating current output by the power module 10 is transmitted to power-consuming equipment, such as base stations, data centers, etc.

[0076] The photovoltaic assembly 31 includes at least one photovoltaic panel 32, and the photovoltaic panel 32 is connected to the power module 10. In one embodiment, the photovoltaic assembly 31 includes a plurality of photovoltaic panels 32 connected in series, and the DC power of the plurality of photovoltaic panels 32 is collected in series and connected to the power module 10 through a connector. In some embodiments, the photovoltaic system 3 includes an inverter (not shown in the figure), and the inverter is provided with a power module 10 and a control circuit (not shown in the figure), and the control circuit is electrically connected to the power module 10. The control circuit can control the performance parameters of the AC power output by the power module 10 according to the needs of the electrical equipment, such as voltage, current, frequency, etc.

[0077] The power module 10 provided in the present application will be described in detail below with reference to the accompanying drawings and specific implementations.

[0078] See also Figure 4 and Figure 5 , Figure 4 This is a schematic diagram of the structure of a power module 10 provided in one embodiment of the present application. Figure 5The power module 10 is a cross-sectional view of a power module 10 provided in one embodiment of the present application. The power module 10 includes a first metal-clad substrate 100, a plurality of chips 200, and a first connecting piece 300, wherein the first metal-clad substrate 100 includes a first insulating substrate 110 and a first metal layer 120 and a second metal layer 130 located on the same side of the first insulating substrate 110, the first metal layer 120 and the second metal layer 130 are located on the same side of the first insulating substrate 110, and the first metal layer 120 and the second metal layer 130 are insulated and spaced apart, wherein the first metal layer 120 includes a first surface 121 facing away from the first insulating substrate 110.

[0079] The chip 200 includes a first electrode 210 and a second electrode 220 (eg Figure 6 As shown in FIG. 1 ), the plurality of chips 200 are located on a side of the first metal layer 120 away from the first insulating substrate 110, and the first electrode 210 of each of the plurality of chips 200 is electrically connected to the first metal layer 120, and at least two of the plurality of chips 200 are arranged at intervals along the first direction X (as shown in FIG. Figure 4 As shown), at least two chips 200 of the plurality of chips 200 are arranged at intervals along the second direction Y, and the second direction Y and the first direction X are both parallel to the first surface 121 and intersect each other.

[0080] The first connecting piece 300 is located on a side of the plurality of chips 200 away from the first insulating substrate 110, and the first connecting piece 300 includes a first main body 310 and a plurality of first contact parts 320. The first contact parts 320 are electrically connected to the first main body 310, the second electrode 220 of each chip 200 in the plurality of chips 200 is in contact with at least one first contact part 320, and at least one pair of adjacent first contact parts 320 has a portion of the first main body 310 between them; the first main body 310 is insulated and spaced apart from the first metal layer 120.

[0081] Among them, the first metal-clad substrate 100 includes a first insulating substrate 110 and metal layers located on both sides of the first insulating substrate 110. The metal layers on both sides are insulated by the first insulating substrate 110, and the metal layers located on the same side of the first insulating substrate 110 include the first metal layer 120 and the second metal layer 130.

[0082] The first metal layer 120 and the second metal layer 130 are located on the same side of the first insulating substrate 110, and the first metal layer 120 and the second metal layer 130 are spaced apart from each other in the orthographic projections on the first insulating substrate 110, so that the first metal layer 120 and the second metal layer 130 are spaced apart in an insulated manner. Exemplarily, the first metal layer 120 and the second metal layer 130 may be spaced apart by the first groove 105 to be insulated (e.g., Figure 4As shown in the figure), the current transmission between the first metal layer 120 and the second metal layer 130 is blocked; for example, in order to better insulate the first metal layer 120 and the second metal layer 130, an insulating medium can be filled in the first groove 105. The first main body 310 is also electrically connected to the second metal layer 130, so as to transmit the current collected by the first main body 310 to the second metal layer 130, or to transmit the current in the second metal layer 130 to the chip 200 through the first connecting sheet 300.

[0083] The size and location of the first metal layer 120 and the second metal layer 130 can be set as needed. In this embodiment, a plurality of chips 200 are arranged on the first metal layer 120. Generally, the first metal layer 120 has a large area and occupies most of the area of ​​the first metal-clad substrate 100. The second metal layer 130 is used to connect the connection terminals of the power module 10. The second metal layer 130 can be arranged at the edge of the first metal-clad substrate 100.

[0084] See also Figure 6 , wherein the chip 200 includes a first electrode 210, a second electrode 220, a third electrode 230 and a chip body 240, wherein the first electrode 210, the second electrode 220 and the third electrode 230 are located on the chip body 240. When the chip 200 is a MOSFET, the first electrode 210 of the chip 200 is the drain of the MOSFET, the second electrode 220 of the chip 200 is the source of the MOSFET, and the third electrode 230 of the chip 200 is the gate of the MOSFET. When the chip 200 is an IGBT, the first electrode 210 of the chip 200 is the collector of the IGBT, the second electrode 220 of the chip 200 is the emitter of the IGBT, and the third electrode 230 of the chip 200 is the gate of the IGBT. Taking the chip 200 as a MOSFET as an example, when the third electrode 230 (gate) receives a driving signal, the first electrode 210 (drain) and the second electrode 220 (source) are controlled to be conductive. In the present application, the first electrode 210 of the chip 200 is electrically connected to the first metal layer 120, so that the current of the first metal layer 120 can be transmitted to the inside of the chip body 240 through the first electrode 210, and transmitted to the second electrode 220. In this embodiment, the first electrode 210 is located on the surface of the chip body 240 adjacent to the first metal layer 120, and the second electrode 220 is located on the surface of the chip body 240 away from the first metal layer 120, wherein the third electrode 230 and the second electrode 220 are arranged on a side of the chip body 240 away from the first metal layer 120, wherein the third electrode 230 and the second electrode 220 are arranged at an insulating interval.

[0085] In one embodiment, the material of the chip body 240 is SIC (silicon carbide), which can increase the operating frequency of the chip 200, and can reduce the volume of the chip 200 while meeting the same operating frequency, so that more space can be reserved on the first metal-clad substrate 100 for installing electronic components of the power module 10, such as thermistors, gate resistors, etc., and the higher the operating frequency of the chip 200, the smaller the volume of the peripheral electronic components of the power module 10, such as capacitors and coils. However, the higher the operating frequency of the chip 200, the better the power, and the poor control of the current sharing between multiple chips 200 in the power module 10, which has the risk of causing the power module 10 to fail. For this reason, the first connecting piece 300 capable of improving the current sharing of the power module 10 is provided in the present application.

[0086] Please continue reading Figure 4 The first connecting piece 300 in the present application includes a first main body 310 and a plurality of first contact parts 320 electrically connected to the first main body 310. The plurality of chips 200 in the power module 10 are connected in parallel through the first connecting piece 300. A pair of adjacent first contact parts 320 refers to two adjacent first contact parts 320. A portion of the first main body 310 is provided between at least one pair of adjacent first contact parts 320, so that the current flowing out of the first contact parts 320 can flow directly into the first main body 310, reducing the current flow path to reduce the inductance. In one embodiment, a portion of the first main body 310 is provided between each pair of adjacent first contact parts 320, so that the current flowing out of each first contact part 320 can flow directly into the first main body 310, further reducing the current flow path to reduce the inductance.

[0087] In a specific embodiment, a portion of the first main body 310 is provided between two first contact portions 320 arranged along the first direction X, so that the current flowing out of the two first contact portions 320 arranged along the first direction X can be directly merged into the first main body 310, thereby reducing the current flow path. Exemplarily, the second electrode of the chip 200a contacts the first contact portion 320a, and the second electrode of the chip 200b contacts the first contact portion 320b. The first contact portion 320a and the first contact portion 320b are a pair of adjacent first contact portions, and a portion of the first main body 310 is provided between the first contact portion 320a and the first contact portion 320b, so that the current flowing out of the chip 200a can be directly merged into the first main body 310 through the first contact portion 320a, and the current flowing out of the chip 200b can be directly merged into the first main body 310 through the first contact portion 320b, thereby reducing the current flow paths of the chips 200a and 200b.

[0088] A portion of the first main body 310 is provided between the two first contact portions 320 arranged along the second direction Y, so that the current flowing out of the two first contact portions 320 arranged along the second direction Y can be directly merged into the first main body 310, thereby reducing the current flow path. Exemplarily, the second electrode of the chip 200a contacts the first contact portion 320a, and the second electrode of the chip 200c contacts the first contact portion 320c. The first contact portion 320a and the first contact portion 320c are a pair of adjacent first contact portions, and a portion of the first main body 310 is provided between the first contact portion 320a and the first contact portion 320c, so that the current flowing out of the chip 200a can be directly merged into the first main body 310 through the first contact portion 320a, and the current flowing out of the chip 200c can be directly merged into the first main body 310 through the first contact portion 320c, thereby reducing the current flow paths of the chips 200a and 200c.

[0089] Since the first main body 310 has a wider flow path, when the current flowing out of each chip 200 is directly merged into the first main body 310, the flow path is short, which can reduce parasitic inductance. Each chip 200 is connected in parallel on the first connecting piece 300, so that the chips 200 are distributed in a concentrated manner, which can improve the current uniformity between the chips 200.

[0090] In this embodiment, the power module 10 further includes an input terminal 101 and an output terminal 102 (eg Figure 4 As shown in FIG. 1 , the input terminal 101 is used to input current, and the input terminal 101 is electrically connected to the first metal layer 120. When the input terminal 101 inputs current as required, the current flows into the chip 200 through the first metal layer 120. After the current in the chip 200 flows from the first electrode 210 to the second electrode 220, the first contact portion 320 is used to converge the current of the second electrode 220 to the first main body portion 310. The first main body portion 310 is used to transmit the converged current to the second metal layer 130, and flows into the output terminal 102 through the second metal layer 130, and flows out of the power module 10 through the output terminal 102. The current flow direction is: input terminal 101, first metal layer 120, first electrode 210 of chip 200, second electrode 220 of chip 200, first contact portion 320, first main body portion 310, second metal layer 130, and output terminal 102.

[0091] If the first main body 310 is not provided, the current of each chip 200 is directly connected to the second metal layer 130 through the first contact part 320. It is necessary to increase the length of each first contact part 320 to connect the first contact part 320 to the second metal layer 130. Increasing the length of each first contact part 320 increases the wiring of multiple first contact parts 320, which will enhance the parasitic inductance. Multiple chips 200 connected in parallel can only be connected together through the second metal layer 130, which makes the parasitic parameters of the multiple chips 200 less consistent and the current sharing of each chip 200 is not good. If aluminum wire is used to connect the first contact part 320 and the second metal layer 130, the parasitic inductance of the aluminum wire is stronger, and the current sharing of multiple chips 200 in parallel is worse. If the same connecting piece is used to connect two or more chips 200 along the second direction Y, and the connecting piece is connected to the second metal layer 130, the parasitic inductance can be reduced compared to the method of connecting with aluminum wires. However, each chip 200 is connected to a different position of the connecting piece, and each chip 200 is at a different distance from the second metal layer 130. The current flowing out of the chip 200 farthest from the second metal layer 130 also needs to flow through part of the connecting piece on the adjacent chip 200 along the second direction Y, which increases the current flow resistance of the chip 200 adjacent to the second metal layer 130, and also increases the parasitic inductance. Moreover, the current equalization between the parallel chips 200 will also deteriorate.

[0092] In the present application, the current does not need to flow through the first contact portion 320 on the second electrode 220 of each chip 200. Since the flow path of the first main body 310 is wider than the flow path of the current in the first contact portion 320, the current flowing out of the second electrode 220 of each chip 200 is directly merged into the first main body 310, thereby strengthening the connectivity between the multiple chips 200 arranged in the first direction X and the second direction Y, improving the consistency of parasitic parameters between the parallel chips 200, and thus optimizing the dynamic current sharing between the multiple parallel chips 200; and the first connecting sheet 300 can also increase the structural reliability of the interconnection of the multiple chips 200 along the first direction X and the second direction Y, and ensure the stability of current transmission.

[0093] In order to save space in the power module 10 and make the arrangement of components on the power module 10 more concise, in this embodiment, the first direction X is the length direction of the power module 10, and the second direction Y is the width direction of the power module 10. In some embodiments, the first direction X is the width direction of the power module 10, and the second direction Y is the length direction of the power module 10. In order to adapt to the arrangement of components in the power module 10, in some embodiments, the first direction X intersects with the width direction of the power module 10, and the second direction Y intersects with the length direction of the power module 10.

[0094] Please continue reading Figure 4In a possible implementation, along the thickness direction of the chip 200, the first main body 310 is isolated from the second electrode 220 of the chip 200, and the first connecting sheet 300 includes one or more grooves 301, the grooves 301 protrude from the first main body 310 toward the first surface 121, and the bottom of the grooves 301 is the first contact portion 320. The thickness direction of the chip 200 is the third direction Z, and the third direction Z is perpendicular to the first direction X and the second direction Y. The first main body 310 is isolated from the second electrode 220 of the chip 200, and the grooves 301 protrude from the first main body 310 toward the first surface 121, so that the first main body 310 is above the second electrode 220 of the chip 200, so as to improve the electrical insulation between the first main body 310 and the first metal layer 120. In one embodiment, the first contact portion 320 can be the bottom of the groove 301.

[0095] It is worth noting that, in one possible implementation, the peripheral wall of the groove may be complete, that is, the cross section of the peripheral wall of the groove may be a complete annular structure. In another possible implementation, the peripheral wall of the groove may also be incomplete, that is, the cross section of the peripheral wall of the groove may be an open structure, such as Figure 4 As shown in the first contact portion 320a or 320b, the specific implementation form of the first contact portion 320a or 320b is a groove, but the cross-section of the peripheral wall of the groove is a U-shaped structure. It should be known that when the cross-section of the peripheral wall of the groove is an open structure, the open structure can also be L-shaped or V-shaped.

[0096] In a possible implementation, along the thickness direction of the chip 200, the first main body 310 is isolated from the second electrode 220 of the chip 200, and the first connecting sheet 300 includes one or more bending structures 302, and the bending structure 302 includes a first contact portion 320 in contact with the second electrode 220 of the chip 200. The bending structure 302 refers to a structure bent toward the first surface 121, and one end of the bending structure 302 away from the first main body 310 protrudes toward the first surface 121, and the first contact portion 320 is the protruding portion. The first contact portion 320 contacts the second electrode 220, so that the first main body 310 is located above the second electrode 220, so as to improve the electrical insulation between the first main body 310 and the first metal layer 120. In one embodiment, the first contact portion 320 may be entirely the portion of the bending structure 302 in contact with the second electrode 220 of the chip 200. In one embodiment, part of the first contact portion 320 may be the bottom of the groove 301 , and part of the first contact portion 320 may be the portion where the bent structure 302 contacts the second electrode 220 of the chip 200 .

[0097] In a possible implementation, the first contact portions 320 are distributed at the edge of the first main body 310. The edge of the first main body 310 has a large distribution area, and more first contact portions 320 can be distributed, and more chips 200 can be connected in parallel, thereby improving the power density of the power module 10.

[0098] Please combine Figure 4 , Figure 7 and Figure 8 , Figure 7 for Figure 4 The structural diagram in which the first connecting sheet 300 is removed, Figure 8 FIG. 1 is a schematic diagram of the structure of the first connecting sheet 300. In a possible implementation, the power module 10 includes two first chip subgroups 203 (eg, Figure 7 As shown), the first chip subgroup 203 includes at least two chips 200 arranged in a spaced relationship along the second direction Y, and the first main body 310 includes a first trunk 311 and a plurality of first branches 312 (as shown in FIG. 1 ). Figure 8 As shown), the first trunk 311 extends along the second direction Y, and the first branches 312 are located on both sides of the first trunk 311 along the first direction X and are connected to the first trunk 311; in the first direction X, the first trunk 311 is located between two adjacent first chip sub-groups 203, and in the second direction Y, the first branch 312 is located between two adjacent first contact portions 320, and the first branch 312 is connected to the two adjacent first contact portions 320 along the second direction Y, and the first trunk 311 is electrically connected to the second metal layer 130.

[0099] exist Figure 4 and Figure 7 In the illustrated embodiment, two first chip subgroups 203 are included, each of which has three chips 200, and a first connecting sheet 300 connects the chips 200 in the two first chip subgroups 203 to connect the chips 200 in the two first chip subgroups 203 in parallel. The first branch 312 connects the first contact portions 320 on two adjacent chips 200 arranged along the second direction Y, and at least part of the current from the two first contact portions 320 can be merged into the first trunk 311 through the first branch 312. The first branch 312 is directly connected between the two first contact portions 320, which can shorten the parallel path of the two adjacent chips 200 and improve the current sharing.

[0100] In one embodiment, at least part of the first contact portion 320 is spaced apart from the first trunk 311. For example, the first contact portions 320 on the chips 200 at both ends of the first chipset 203 may be spaced apart from the first trunk 311 to reduce the weight of the first connecting sheet 300.

[0101] Please continue reading Figure 4In one embodiment, the first connecting piece 300 further includes a second contact portion 330, which is located on a side of the second metal layer 130 away from the first insulating substrate 110 and is electrically connected to the second metal layer 130. In the second direction Y, the second contact portion 330 is located at one end of the first main body 310 and is connected to the first main body 310. Specifically, the second contact portion 330 is located at one end of the first trunk 311 (such as Figure 8 ), wherein the input terminal 101 is located on the side of the first trunk 311 away from the second contact portion 330. In one embodiment, the second contact portion 330 is connected to the second metal layer 130 by welding. The current after the first main body 310 converges can flow into the second metal layer 130 through the second contact portion 330. The current flow direction is: input terminal 101, first metal layer 120, first electrode 210 of chip 200, second electrode 220 of chip 200, first contact portion 320, first main body 310, second contact portion 330, second metal layer 130.

[0102] exist Figure 4 In order to realize specific design requirements of the circuit in the power module 10 , the first contact portion 320 c adjacent to the second contact portion 330 may be spaced apart from the first trunk 311 .

[0103] See also Fig. 9 In a possible implementation, the first contact portion 320c adjacent to the second contact portion 330 is also connected to the second contact portion 330. This allows the current flowing out of the first contact portion 320c to flow directly into the second contact portion 330 without taking a detour, thereby reducing current resistance and shortening the current flow path, thereby reducing inductance. Fig. 9 In the illustrated embodiment, the first contact portion 320 c is separated from the first trunk 311 by a gap J.

[0104] See also Fig.10 In a possible implementation, the first contact portion 320c adjacent to the second contact portion 330 is also connected to the first trunk 311. The first contact portion 320c is connected to the first trunk 311, and there is no gap between the two, so that the current flowing out of the first contact portion 320c can directly flow into the first trunk 311 without taking a detour, thereby reducing current resistance and shortening the current flow path, thereby reducing inductance. In this embodiment, the first contact portion 320c is connected to the second contact portion 330 and the first trunk 311, further reducing inductance and improving current sharing.

[0105] Please continue reading Figure 8In a possible implementation, the first contact portion 320 , the second contact portion 330 and the first main body portion 310 are an integrally formed structure, the first contact portion 320 protrudes from the first main body portion 310 toward the chip 200 , and the second contact portion 330 protrudes from the first main body portion 310 toward the second metal layer 130 .

[0106] In this embodiment, the first connecting piece 300 is an integrally formed structure, a portion of the first connecting piece 300 located on the side of the chip 200 away from the first insulating substrate 110 is protruded toward the chip 200 to form a first contact portion 320, a portion of the first connecting piece 300 located on the side of the second metal layer 130 away from the first insulating substrate 110 is protruded toward the first insulating substrate 110 to form a second contact portion 330, and a portion of the first connecting piece 300 other than the first contact portion 320 and the second contact portion 330 is a first main body 310. In this embodiment, the first contact portion 320, the second contact portion 330 and the first main body 310 are an integrally formed structure, and the first contact portion 320, the second contact portion 330 and the first main body 310 can be formed by a stamping process or a die-casting process. Compared with using other components to connect the first contact portion 320, the second contact portion 330 and the first main body portion 310 to form the first connecting piece 300, the first contact portion 320, the second contact portion 330 and the first main body portion 310 are an integrated structure, which can improve the smoothness of current flow, reduce current flow resistance, improve current equalization and reduce inductance, and on the other hand, improve the reliability of the first connecting piece 300.

[0107] See also Fig.11 In a possible implementation, the first connecting sheet 300 is an integrally formed rectangular sheet structure, the first contact portion 320 is a groove or a bent structure protruding from the first main body portion 310 toward the chip 200, and the second contact portion 330 is a groove or a bent structure protruding from the first main body portion 310 toward the second metal layer 130. The integrally formed rectangular sheet structure can make the chips 200 in the two first chip subgroups 203 more closely arranged, improve the current sharing between the parallel chips 200, and effectively reduce parasitic inductance.

[0108] See also Fig.12 In a possible implementation, the power module 10 includes two groups of chipsets arranged in series, namely a first chipset 201 and a second chipset 202. The first chipset 201 is located on a side of the first metal layer 120 away from the first insulating substrate 110, and the second chipset 202 is located on a side of the second metal layer 130 away from the first insulating substrate 110. The power module 10 also includes a second connecting piece 400, which is located on a side of the second chipset 202 away from the first insulating substrate 110. The multiple chips 200 in the second chipset 202 are connected in parallel through the second connecting piece 400.

[0109] like Fig.13 As shown, the second connection sheet 400 includes a second connection body 410 and a plurality of third connection structures 420 and a fourth connection structure 430 electrically connected to the second connection body 410, the plurality of third connection structures 420 are electrically connected to the plurality of chips 200 in the second chip group 202, part of the second connection body 410 is located between two third connection structures 420 arranged along the first direction X, part of the second connection body 410 is located between two third connection structures 420 arranged along the second direction Y, the second connection body 410 is insulated and spaced from the second metal layer 130, and the fourth connection structure 430 is electrically connected to the output end 102 of the power module 10. In this embodiment, the second connection sheet 400 is arranged in the opposite direction to the first connection sheet 300, and the output end 102 and the input end 101 are located at the same end of the power module 10. In this embodiment, the second connecting body 410 includes a second trunk and a second branch, wherein the structure of the second trunk and the second branch in the second connecting piece 400 is the same as the structure of the first connecting piece 300, wherein the various achievable methods of the above-mentioned first connecting piece 300 are also applicable to the second connecting piece 400, which will not be repeated here.

[0110] In this embodiment, the power module 10 further includes a first end metal layer 140, the first end metal layer 140 is insulated from the first metal layer 120 and the second metal layer 130, and the fourth connection structure 430 is electrically connected to the output end 102 through the first end metal layer 140. The fourth connection structure 430 is fixedly connected to the first end metal layer 140, and the first end metal layer 140 is connected to the output end 102.

[0111] In this embodiment, when the input terminal 101 inputs current, the current flows in the following directions: the input terminal 101, the first metal layer 120, the first chipset 201, the first connection sheet 300, the second metal layer 130, the second chipset 202, the second connection sheet 400, the first end metal layer 140, and the output terminal. The chips 200 in the first chipset 201 are connected in parallel through the first connection sheet 300, and the chips 200 in the second chipset 202 are connected in parallel through the second connection sheet 400.

[0112] In some implementations, the power module 10 can be configured with the number of chipsets as required, and the number of chips 200 in each chipset can be configured, and the manner in which the chipsets are connected in series or in parallel can be configured as required.

[0113] See also Fig.14In a possible implementation, the power module 10 includes two groups of chipsets arranged in series, namely, a first chipset 201 and a second chipset 202. The first chipset 201 is located on a side of the first metal layer 120 away from the first insulating substrate 110, and the second chipset 202 is located on a side of the second metal layer 130 away from the first insulating substrate 110. The power module 10 also includes a first connecting piece 300 and a second connecting piece 400. The first connecting piece 300 is located on a side of the first chipset 201 away from the first insulating substrate 110. Multiple chips 200 in the first chipset 201 are connected in parallel through the first connecting piece 300. The second connecting piece 400 is located on a side of the second chipset 202 away from the first insulating substrate 110. Multiple chips 200 in the second chipset 202 are connected in parallel through the second connecting piece 400. In this embodiment, the structure of the first connecting piece 300 is as follows: Fig.11 The structure of the first connecting piece 300 is shown, wherein the second connecting piece 400 has the same structure as the first connecting piece 300 .

[0114] This application is for the purpose of explaining Fig.12 The first connecting piece 300, the second connecting piece 400 and Fig.14 The structural excellence of the first connecting piece 300 and the second connecting piece 400 in the embodiment shown in the figure is Fig.12 and Fig.14 The implementation shown in the figure is simulated and tested, and it is found that Fig.14 The parasitic inductance of the power module 10 shown is less than Fig.12 The parasitic inductance of the power module 10 shown in this specification, Fig.14 The first connecting sheet 300 and the second connecting sheet 400 in the embodiment are formed in an integral rectangular sheet structure, which can effectively improve the current sharing between the parallel chips 200 and effectively reduce the parasitic inductance. Fig.12 In the embodiment shown in the figure, a simulation test is performed by connecting the chips 200 in parallel with conductive wires. Fig.12 The illustrated implementation can effectively improve the current sharing between the parallel chips 200 and can effectively reduce the parasitic inductance.

[0115] Please continue reading Figure 5In one embodiment, the first contact portion 320 can be soldered to the second electrode 220 of the chip 200 through the first solder S1, and the second contact portion 330 can be soldered to the second metal layer 130 through the second solder S2. The first solder S1 and the second solder S2 can be selected from at least one of tin solder and lead solder, wherein the tin solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-reinforced, SnSb10, and the materials of the first solder S1 and the second solder S2 can be selected as needed, and the first solder S1 and the second solder S2 can be the same or different. Among them, SnSb5 refers to the Sb element with a weight percentage of 5% in the Sn element, SnSb8 refers to the Sb element with a weight percentage of 8% in the Sn element, and SnSb10 refers to the Sb element with a weight percentage of 10% in the Sn element. The SAC in SAC306 represents the three metal elements Sn, Ag, and Cu, indicating that this product is composed of three metal components: Sn (tin), Ag (silver), and Cu (copper). Among them, 3 represents 3% Ag, and 05 represents 0.5% Cu. SAC multi-component strengthening also includes other metal components in the three metal components of Sn (tin), Ag (silver), and Cu (copper) to enhance the reliability of the solder.

[0116] Please continue reading Figure 5 In a possible implementation, the chip 200 is connected to the first metal layer 120 through a sintered material SJ. Exemplarily, the sintered material SJ can be formed of a silver paste, a copper paste or a silver film. In a specific embodiment, the silver paste can include at least one of a micrometer silver paste (Micrometer silver particle paste) and a nanometer silver paste (Nanometersilver particle paste). Among them, the micrometer silver paste refers to a silver paste made of micrometer silver particles and an organic solvent, which is low in cost and safe. Generally, it is sintered under pressure, and the sintered material SJ has a high density, the interface of the bonded body is firmly bonded, and the bonding reliability is high.

[0117] Optionally, in order to improve the reliability of sintering bonding and reduce the cost, the sintering material SJ of the present application can be formed by using micrometer silver particle paste.

[0118] In order to improve the reliability of sintering bonding, the elastic modulus, thermal expansion coefficient (CTE), etc. of the sintering material SJ can be adjusted by adding materials to the sintering material SJ. Exemplarily, the sintering material SJ includes a main material and a filler filled in the main material; wherein the main material includes at least one of silver paste, copper paste or silver film, the filler is formed of a material having good bonding properties with the main material, and the thermal expansion coefficient of the filler is less than the thermal expansion coefficient of the main material, thereby improving the sintering bonding reliability.

[0119] Taking the main material as micron silver paste as an example, fillers are added to the micron silver paste to reduce the thermal expansion coefficient of the micron silver paste, reduce the bonding stress, and thus improve the bonding reliability of silver sintering. Exemplarily, the filler may include at least one of nickel (Ni), Ni alloy, copper (Cu), copper-plated nickel, titanium (Ti), Ti alloy, iron (Fe), Fe alloy, Kovar (Kovar, iron-nickel-cobalt alloy 4J29) and SiC powder, etc., which are not limited here.

[0120] The present application does not limit the shape of the filler. For example, the length of the filler can be controlled between 20 μm and 100 μm, and the size of the filler in the vertical length direction can be controlled between 20 nm and 30 μm. The cross section along the length direction can be circular, elliptical, polygonal, etc.

[0121] In the present application, the first metal layer 120 is generally copper. When the sintering material SJ is a silver paste or a silver film, in order to improve the bonding performance between the sintering material SJ and the first metal layer 120, the first metal layer 120 can be silver-plated at the sintering location, that is, the first metal layer 120 is covered with a silver-plated layer in the area corresponding to the sintering material. Exemplarily, the thickness of the silver-plated layer can be controlled between 0.1 μm and 30 μm. If the bonding performance of the sintering material SJ itself and the first metal-clad substrate is relatively good, silver plating is not required. For example, when the sintering material is a copper paste, the first metal-clad substrate 100 does not need to be silver-plated at the sintering location.

[0122] Please combine Figure 5 , Fig.15 and Fig.16 , Fig.15 is a schematic diagram of the structure of a power module 10 provided in one embodiment of the present application, Fig.16 yes Fig.15 In a possible implementation, the power module 10 further includes a second metal-clad substrate 500 and an electronic component 600 (eg Fig.16As shown in FIG. 1 , the second metal-clad substrate 500 is located on the surface of the metal layer of the first metal-clad substrate 100, and the electronic component 600 is located on the side of the second metal-clad substrate 500 away from the first metal-clad substrate 100 and is electrically connected to the second metal-clad substrate 500. The metal layer of the first metal-clad substrate 100 includes the first metal layer 120, the second metal layer 130 or other metal layers. The second metal-clad substrate 500 may be located on the surface of the first metal layer 120 or the second metal layer 130. Fig.16 In the embodiment shown, the electronic component 600 is located on the first surface 121 of the first metal layer 120. In some embodiments, the electronic component 600 is located on the second metal layer 130. It should be noted that in order to show the structural relationship between the second metal-clad substrate 500 and the electronic component 600, Fig.15 The structure of the first connecting piece 300 is simplified. Fig.15 The structure of the first connecting sheet 300 is for illustration only. For the structure of the first connecting sheet 300 and the connection relationship between the first connecting sheet 300 and the chip 200, please refer to FIGS. 3 to 4. Fig.14 Related descriptions of the diagrams.

[0123] Since the size of the electronic component 600 is generally small, if the electronic component 600 is directly soldered on the first metal-clad substrate 100, it is necessary to open an insulating groove on the metal layer of the first metal-clad substrate 100 to electrically connect the two electrodes of the electronic component 600 to the metal layers on both sides of the insulating groove. Opening the insulating groove on the first metal-clad substrate 100 will reduce the layout space of the chip 200, and the first metal-clad substrate 100 is provided with a large number of chips 200. Etching grooves in the metal layer on the first metal-clad substrate 100 may damage the pre-arranged chips 200 or other electronic components. In the present embodiment, the electronic component 600 is transferred through the second metal-clad substrate 500, so that the welding process of the electronic component 600 is simple. Compared with directly welding the electronic component 600 on the metal layer of the first metal-clad substrate 100, the step of opening an insulating groove on the metal layer of the first metal-clad substrate 100 can be saved, so that the circuit design on the first metal-clad substrate 100 is simpler. The insulating groove can be pre-provided on the second metal-clad substrate 500 according to the size of the electronic component 600 and the position of the two electrodes of the electronic component 600. The insulating groove can be etched on the second metal-clad substrate 500 without affecting the performance of the chip 200 on the first metal-clad substrate 100, and then the electronic component 600 is electrically connected to the second metal-clad substrate 500.

[0124] The second metal-clad substrate 500 includes a second insulating substrate 510 and metal layers located on both sides of the second insulating substrate 510 , and the electronic component 600 is electrically connected to the metal layer on one side of the second insulating substrate 510 .

[0125] In a possible implementation, the electronic component 600 is a gate resistor 610 (eg Fig.16 As shown, the second metal-clad substrate 500 is located on the first surface 121, and the second metal-clad substrate 500 includes a fourth electrode 520 and a fifth electrode 530 arranged with an insulating interval, and the two ends of the gate resistor 610 are electrically connected to the fourth electrode 520 and the fifth electrode 530 respectively, the fourth electrode 520 is used to receive the driving current, and the fifth electrode 530 is electrically connected to the third electrode 230 of the chip 200 through the first conductive line 710. The second metal-clad substrate 500 is used to transfer the gate resistor 610, so that the process of welding the gate resistor 610 is simple.

[0126] The fourth electrode 520 and the fifth electrode 530 are partial metal layers on the second insulating substrate 510 , and the insulating portion between the fourth electrode 520 and the fifth electrode 530 is set according to the size of the gate resistor 610 , so that the fourth electrode 520 and the fifth electrode 530 are insulated.

[0127] Exemplarily, there is a fourth groove 550 between the fourth electrode 520 and the fifth electrode 530, and the fourth electrode 520 and the fifth electrode 530 are insulated and spaced apart by the fourth groove 550. The fourth electrode 520, the fifth electrode 530 and the fourth groove 550 can be formed by an etching process through a metal layer on a surface of one side of the second metal-clad substrate 500.

[0128] In this embodiment, the power module 10 further includes a second conductive wire 720 and a first connection terminal 731 (eg Fig.15 As shown), the fourth electrode 520 is connected to the first connection terminal 731 through the second conductive line 720, and the external control circuit sends a driving current to the first connection terminal 731. After the fourth electrode 520 receives the driving current, please combine Fig.15 and Fig.16 , the driving current flows into the third electrode 230 of the chip 200 through the first connection terminal 731, the second conductive line 720, the fourth electrode 520, the gate resistor 610, the fifth electrode 530 and the first conductive line 710 in sequence, wherein the third electrode 230 may be a gate or a grid. After receiving the driving current, the third electrode 230 can drive the first electrode 210 and the second electrode 220 to conduct. The gate resistor 610 is used to improve the switching performance of the chip 200 and can suppress the high-frequency oscillation generated when multiple chips 200 are connected in parallel. The first conductive line 710 is a transmission line, such as an aluminum wire, a copper wire, etc.

[0129] See also Fig.17 The second metal-clad substrate 500 further includes a third metal layer 540 located on a side of the second insulating substrate 510 away from the fourth electrode 520 and the fifth electrode 530, and the third metal layer 540 is soldered to the first metal layer 120 on the surface of the first metal-clad substrate 100 through a third solder S3. The third solder S3 can be selected from at least one of tin solder and lead solder, wherein the tin solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-reinforced, SnSb10, wherein the third solder S3 can be the same as or different from the first solder S1, and the third solder S3 can be the same as or different from the second solder S2.

[0130] Among them, the gate resistor 610 can be soldered on the fourth electrode 520 and the fifth electrode 530 through the fourth solder S4, wherein the fourth solder S4 can be selected from at least one of tin solder and lead solder, wherein the tin solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-reinforcement, SnSb10, wherein the fourth solder S4 and the first solder S1 can be the same or different, and the third solder S3 and the second solder S2 can be the same or different.

[0131] The first connection terminal 731 can be soldered on the terminal metal layer 1010 at the edge of the first metal-clad substrate 100 through the eighth solder S8. The eighth solder S8 can be selected from at least one of tin solder and lead solder, wherein the tin solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-reinforced, and SnSb10.

[0132] In one embodiment, when there is one gate resistor 610 and one second metal-clad substrate 500, the third electrodes 230 of the plurality of chips 200 in the first chip group 201 are electrically connected to the gate resistor 610 of the same second metal-clad substrate 500 through a conductive wire. That is, one gate resistor 610 controls the conduction or cutoff of the first electrodes 210 and the second electrodes 220 in the plurality of chips 200.

[0133] In one embodiment, when there are multiple gate resistors 610 and multiple second metal-clad substrates 500, and each gate resistor 610 is disposed on the second metal-clad substrate 500, the third electrode 230 of each chip 200 is electrically connected to the gate resistor 610 of one of the second metal-clad substrates 500 through a conductive wire. That is, one gate resistor 610 controls the conduction or cutoff of the first electrode 210 and the second electrode 220 in one chip 200.

[0134] In this embodiment, the chip 200 is located on the first metal layer 120 , and the second metal-clad substrate 500 is welded on the surface of the first metal layer 120 , so that the components can be distributed more compactly. In some embodiments, the second metal-clad substrate 500 can also be welded on the surface of the second metal layer 130 .

[0135] See also Fig.18 , Fig.18 Schematic diagram of the structure of the first metal-clad substrate 100 and the second metal-clad substrate 500. In a possible implementation, in the first metal-clad substrate 100, the first metal layer 120 and the second metal layer 130 are connected to the first insulating substrate 110 through the metal welding layer SH; in the second metal-clad substrate 500, the fourth electrode 520 and the fifth electrode 530 are attached to the surface of the second insulating substrate 510.

[0136] In this embodiment, in the first metal-clad substrate 100, along the third direction Z, the first insulating substrate 110 has two metal layers on the side facing the chip 200, and the two metal layers are the metal welding layer SH and the first metal layer 120. If the electronic component 600 is directly welded on the first metal-clad substrate 100, since the electronic component 600 needs to pass current, two sixth electrodes 103 and seventh electrodes 104 with insulating spacing need to be provided on the first metal-clad substrate 100, see Fig.19For example, a portion is etched in the first metal layer 120 as the fourth metal layer 150, and the fourth metal layer 150 is insulated and spaced apart from other portions of the first metal layer 120. A second groove 151 is etched on the fourth metal layer 150 to form the sixth electrode 103 and the seventh electrode 104. At this time, part of the fourth metal layer 150 and part of the metal welding layer SH between the sixth electrode 103 and the seventh electrode 104 need to be removed through an etching process. A larger etching size along the third direction Z will increase the aperture of the second groove 151, or in other words, the larger the size between the sixth electrode 103 and the seventh electrode 104, while the size of the electronic component 600 (such as the gate resistor 610) is small and cannot be welded to the sixth electrode 103 and the seventh electrode 104, or the welding reliability will be poor. Based on this, in the present embodiment, the electronic component 600 is transferred via the second metal-clad substrate 500, wherein the metal on the second metal-clad substrate 500 is directly bonded to the second insulating substrate 510, so that the formed fourth electrode 520 and the fifth electrode 530 are also directly attached to the surface of the second insulating substrate 510, and there is no metal welding layer between the fourth electrode 520 and the fifth electrode 530 and the second insulating substrate 510. When etching and grooves to form the fourth electrode 520 and the fifth electrode 530, there is no need to etch the metal welding layer, so that the size between the fourth electrode 520 and the fifth electrode 530 can be controlled to be smaller, which is conducive to welding the electronic component 600 (such as the gate resistor 610).

[0137] In one embodiment, the first metal-clad substrate 100 is an active metal welding substrate. An active metal welding substrate refers to a metal layer such as a copper layer or an aluminum layer welded on the two side surfaces of an insulating substrate by metal solder, wherein the first metal layer 120, the second metal layer 130, the first end metal layer 140, the terminal metal layer 1010 and other circuits required by the power module 10 can be formed by etching the copper layer. The material of the first insulating substrate 110 in the first metal-clad substrate 100 can be Si3N4 or AlN, so that the first insulating substrate 110 has a stronger welding reliability with the metal plates on both sides, and has good thermal conductivity, which can improve the heat dissipation effect of the power module 10.

[0138] In one embodiment, the second metal-clad substrate 500 is a copper-clad ceramic substrate. The second insulating substrate 510 is an Al2O3 ceramic substrate or an AlN ceramic substrate, and the metal layer (such as copper foil) is directly bonded to the second insulating substrate 510 at a high temperature. Exemplarily, the copper foil is directly bonded to the Al2O3 ceramic substrate at a high temperature, and then the copper foil is formed into the fourth electrode 520 and the fifth electrode 530 as required. There is no other metal layer between the copper foil and the Al2O3 ceramic substrate, so that the spacing between the fourth electrode 520 and the fifth electrode 530 can be small, which is conducive to welding the gate resistor 610.

[0139] In a possible implementation, in the first metal-clad substrate 100, the thickness of the first metal layer 120 and the second metal layer 130 is greater than or equal to 0.6 mm. When the thickness of the first metal layer 120 is within the above range, the first metal layer 120 has a higher power density and can quickly transmit current to the multiple chips 200 connected in parallel. When the thickness of the second metal layer 130 is within the above range, the thermal conductivity of the first metal-clad substrate 100 can be provided, thereby improving the heat dissipation effect of the power module 10, so that the second metal layer 130 has a higher power density and can quickly transmit current to the multiple chips 200 connected in parallel in the second chip group 202. The greater the thickness of the first metal layer 120 and the second metal layer 130, the better the heat dissipation effect and the greater the power density. However, the thicker the first metal layer 120 and the second metal layer 130 are, the larger the size of the insulating groove will be when etching the insulating groove. Since the electronic component 600 (such as the gate resistor 610) is small in size, welding the electronic component 600 to the two electrodes across the groove will increase the process difficulty. Based on this, when improving the power density of the power module 10, the second metal layer-clad substrate 500 can be provided to reduce the process difficulty of welding the electronic component 600.

[0140] Exemplarily, the thickness of the first metal layer 120 and the second metal layer 130 is greater than or equal to 0.8 mm.

[0141] Exemplarily, the thickness of the first metal layer 120 and the second metal layer 130 is greater than or equal to 1.2 mm.

[0142] In a possible implementation, the first metal-clad substrate 100 is an insulating metal substrate. The insulating metal substrate includes an insulating resin layer and metal layers located on both sides of the insulating resin layer, wherein the metal layer on one side is etched into a required circuit according to electrical interconnection requirements, including forming a first metal layer 120 and a second metal layer 130. When the thickness of the metal layer is greater than or equal to 0.6 mm, the power module 10 has a higher power density, and the second metal-clad substrate 500 can be provided to transfer the electronic components 600 to reduce the process difficulty of welding the electronic components 600.

[0143] Please continue reading Fig.15 In a possible implementation, the power module 10 includes two second metal-clad substrates, wherein one second metal-clad substrate 500 is used to weld the gate resistor 610, and the other second metal-clad substrate 500a is used to weld the thermistor 620. In some implementations, only one second metal-clad substrate may be used to weld the thermistor 620.

[0144] Please combine Fig. 20 and Fig.21 , Fig. 20 for Fig.15 A partial enlarged view of part N in the figure. Fig.21 is a cross-sectional view of a portion of the power module 10 including a thermistor 620. In this embodiment, the electronic component 600 is a thermistor 620, the second metal-clad substrate 500a is located on a side of the second metal layer 130 away from the first insulating substrate 110, and is disposed adjacent to the chip 200 disposed on the second metal layer 130, and the thermistor 620 is used to monitor the temperature of the chip 200. In some embodiments, the electronic component 600 is a thermistor 620, the second metal-clad substrate 500a is located on a side of the first metal layer 120 away from the first insulating substrate 110, and is disposed adjacent to the chip 200 disposed on the first metal layer 120, and the thermistor 620 is used to monitor the temperature of the chip 200. That is, the second metal-clad substrate 500 used to transfer the thermistor 620 is located on the same metal layer as the chip 200, for example, both are located on the first metal layer 120, or both are located on the second metal layer 130. In other embodiments, the second metal-clad substrate 500 of the transfer thermistor 620 and the chip 200 are both disposed on other metal layers according to the design requirements of the power module 10 .

[0145] See also Fig. 20 and Fig.21 In this embodiment, the second metal-clad substrate 500a includes a fourth electrode 520a and a fifth electrode 530a provided with an insulating space, and both ends of the thermistor 620 are electrically connected to the fourth electrode 520a and the fifth electrode 530a, respectively. The power module 10 also includes a second connection terminal 732 and a third connection terminal 733 (such as Fig. 20 As shown in FIG. 1 ), the fourth electrode 520a and the fifth electrode 530a are electrically connected to the second connection terminal 732 and the third connection terminal 733 respectively, and the second connection terminal 732 and the third connection terminal 733 are connected to the external control circuit, and the temperature of the chip 200 is monitored through the thermistor 620. The thermistor 620 can be a negative temperature coefficient thermistor or a positive temperature coefficient thermistor. The second connection terminal 732 and the third connection terminal 733 can be welded on the terminal metal layer, and the terminal metal layer under each connection terminal is set at an insulating interval.

[0146] In this embodiment, the power module 10 further includes a third conductive wire 170 and a fourth conductive wire 180, the fourth electrode 520a and the second connection terminal 732 are connected via the third conductive wire 170, and the fifth electrode 530a and the third connection terminal 733 are connected via the fourth conductive wire 180. The third conductive wire 170 and the fourth conductive wire 180 may be aluminum wires or copper wires.

[0147] In this embodiment, the thermistor 620 is disposed on the second metal-clad substrate 500a, and the second metal-clad substrate 500a is disposed on the second metal layer 130, and the thermistor 620 is disposed adjacent to the chip 200, so that the temperature measurement is more accurate. If the thermistor 620 is directly welded on the second metal layer 130, the thermistor 620 needs to be welded in the groove between the second metal layer 130 and other metal layers. Fig. 22 , exemplarily, the power module 10 further includes a second end metal layer 160, a third groove 106 is provided between the second metal layer 130 and the second end metal layer 160, both ends of the thermistor 620 are arranged on the second metal layer 130 and the second end metal layer 160, only one end of the thermistor 620 is connected to the second metal layer 130, the chip 200 is located on the second metal layer 130, when the chip 200 generates heat after operation, the temperature of the chip 200 is directly transmitted to the second metal layer 130, so that the temperature of the second metal layer 130 is close to the temperature of the chip 200, when only one end of the thermistor 620 is connected to the second metal layer 130, the temperature of the second metal layer 130 is close to the temperature of the chip 200, When the second metal layer 130 is connected, and the other end of the thermistor 620 is connected to the second end metal layer 160, the second end metal layer 160 and the second metal layer 130 are separated by the third groove 106, so that the heat of the second metal layer 130 cannot be transferred to the second end metal layer 160, and the temperature difference between the second end metal layer 160 and the second metal layer 130 is large, so that the temperature of one end of the thermistor 620 connected to the second end metal layer 160 is lower than the temperature of one end of the thermistor 620 connected to the second metal layer 130, so that the overall temperature monitoring accuracy of the thermistor 620 with respect to the chip 200 is deteriorated. In this embodiment, the second metal-clad substrate 500a is located in the second metal layer 130, and the thermistor 620 is welded on the second metal-clad substrate 500a (such as Fig.21 As shown in FIG. 1 , the temperatures of the two ends of the thermistor 620 are close to each other, and the second metal-clad substrate 500a is disposed on the first metal layer 120 and adjacent to the chip 200, so that the monitoring accuracy of the temperature of the chip 200 can be improved.

[0148] It should be understood that when the second metal-clad substrate 500 for transferring the thermistor 620 and the chip 200 are both located on the first metal layer 120 , the monitoring accuracy of the temperature of the chip 200 can also be improved.

[0149] Among them, the thermistor 620 can be soldered on the fourth electrode 520a and the fifth electrode 530a through the fifth solder S5, wherein the fifth solder S5 can be selected from at least one of tin solder and lead solder, wherein the tin solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-reinforcement, SnSb10, wherein the fifth solder S5 can be the same or different from the first solder S1, and the fifth solder S5 can be the same or different from the second solder S2.

[0150] Among them, the second metal-clad substrate 500a can be welded on the surface of the first metal layer 120 away from the first insulating substrate 110 through the sixth solder S6, wherein the sixth solder S6 can be selected from at least one of tin solder and lead solder, wherein the tin solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-reinforced, SnSb10, wherein the sixth solder S6 may be the same or different from the first solder S1, and the sixth solder S6 may be the same or different from the second solder S2.

[0151] In this embodiment, the first metal-clad substrate 100 is an active metal soldering substrate or an insulating metal substrate, and the second metal-clad substrate 500a is a copper-clad ceramic substrate.

[0152] In some embodiments, the metal layer on the second metal-clad substrate 500 can be used as a signal routing, which is beneficial to improving the flexibility of the circuit distribution of the power module 10. Part of the circuit can be made of the metal layer on the first metal-clad substrate 100, and part of the circuit can be made of the metal layer on the second metal-clad substrate 500, making the circuit distribution more flexible.

[0153] Please continue reading Figure 5 In a possible implementation, the power module 10 further includes a heat sink 800, which is located on a side of the first metal-clad substrate 100 away from the chip 200, and a plurality of spaced support assemblies 900 are provided between the heat sink 800 and the first metal-clad substrate 100. The heat sink 800 may be a water-cooled heat sink, which is not limited here, and is used to dissipate heat from the power module 10 and improve the power density of the power module 10. In this embodiment, in order to improve the heat dissipation effect, the heat sink 800 may be welded to a side of the first metal-clad substrate 100 away from the chip 200 by a seventh solder S7. Compared with the method of bonding the heat sink 800 to the first metal-clad substrate 100 by using thermally conductive silicone, the thermal conductivity of the welding material is better than that of the thermally conductive silicone by welding.

[0154] The first metal-clad substrate 100 includes a fifth metal layer 190 located on a side of the first insulating substrate 110 away from the first metal layer 120, and the heat sink 800 is soldered to the fifth metal layer 190 through a seventh solder S7. The heat sink 800 includes a heat sink bottom plate 810 and a heat sink cover plate 820, and heat sink teeth 811 are provided on the heat sink bottom plate 810, and channels are formed between the heat sink teeth 811, and cooling medium can flow through the channel to achieve heat dissipation through the cooling medium.

[0155] Generally, when welding the heat sink 800 and the first metal-clad substrate 100, the heat sink 800 and the first metal-clad substrate 100 need to apply pressure, wherein the support assembly 900 can prevent the seventh solder S7 between the first metal-clad substrate 100 and the heat sink 800 from being squeezed out due to the pressure applied during welding, and the thickness of the seventh solder S7 is too thin, resulting in failure. Before welding, the support assembly 900 can be bonded to the surface of the heat sink 800 facing the first metal-clad substrate 100, or the support assembly 900 can be bonded to the surface of the first metal-clad substrate 100 facing the heat sink 800. The support assembly 900 can be a metal wire or a metal strip. The support assembly 900 can also be used to control the thickness of the seventh solder S7, and the thickness of the support assembly 900 can be designed as needed so that the seventh solder S7 meets the demand.

[0156] See also Fig.23a In a possible implementation, the support assembly 900 includes two support bars 910 arranged in parallel, and the support bar 910 includes at least two support segments 911, and two adjacent support segments 911 are arranged along the extension direction of the support bar 910 and are arranged at intervals. When the seventh solder S7 is filled between the two parallel support bars 910, the seventh solder S7 is not easily squeezed out during pressurized welding, but bubbles will be generated during high-temperature welding, and bubbles that do not overflow will form pores in the welding layer, affecting welding reliability. By arranging the support segments 911 at intervals, the overflow of bubbles can be promoted and the pores can be reduced. In addition, the two parallel support bars 910 can be used to enhance the support strength of the first metal-clad substrate 100 and the radiator 800.

[0157] See also Figure 23b In some embodiments, the support component 900 may be formed by stamping the surface of the heat sink 800 facing the first metal-clad substrate 100, wherein the support component is in the shape of a boss, such as Figure 23b As shown in 900a in FIG. 1 ; or the support assembly is in the form of dots, such as Figure 23b As shown in 900b; or the support assembly is crater-shaped, such as Figure 23b900c in FIG. In other embodiments, the support assembly 900 may also be in other shapes. In some embodiments, the boss-shaped, dot-shaped, or volcano-shaped support assembly 900 on the surface of the heat sink 800 may be one or more combinations. In some embodiments, the boss-shaped, dot-shaped, or volcano-shaped support assembly 900 may be one or more, respectively, and may be specifically set as needed.

[0158] See also Fig.24 , Fig.24 3D-x-ray image of the welding surface between the heat sink 800 and the first metal-clad substrate 100 in the power module 10 provided in one embodiment of the present application, wherein Fig.24 Figure (a) is a 3D-x-ray image of the welding surface between the seventh solder S7 and the first metal-clad substrate 100. Fig.24 Figure (b) is a 3D-x-ray image of the soldering surface between the seventh solder S7 and the heat sink 800. Fig.23a The support assembly 900 in the embodiment shown in the figure uses SnSb5 solder as the seventh solder S7 to connect the heat sink 800 to the first metal-clad substrate 100, and the power module 10 is subjected to a temperature shock test, wherein the temperature shock test conditions are: keep at -40°C (low temperature) for 15 minutes, keep at 125°C (high temperature) for 15 minutes, one low temperature and one high temperature count as one cycle, and 1000 cycles are performed. Fig.24 As can be seen in the figure, the edge corner area does not appear white, indicating that the welding surface between the seventh solder S7 and the heat sink 800 is not peeled off, and the welding surface between the seventh solder S7 and the first metal-clad substrate 100 is not peeled off, indicating that the use of Fig.23a The support assembly 900 shown can improve the soldering reliability between the heat sink 800 and the first metal-clad substrate 100 .

[0159] In one embodiment, the seventh solder S7 is selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-reinforced, lead-based high temperature solder, SnSb10, peritectic Sn-Sb, and Sn-Sb-X, wherein the lead-based high temperature solder refers to a solder with a lead content greater than or equal to 85%, which requires a higher temperature to melt, and Sn-Sb-X refers to other elements doped in Sn and Sb, such as nickel, bismuth, and copper. During welding, the welding temperature can be set according to the specific material of the seventh solder S7. For example, when using lead-based high temperature solder, the welding temperature can be set to a value greater than or equal to 300°C; for another example, when using SAC305, the welding temperature can be set to 260°C.

[0160] In some embodiments, in order to save welding time and welding process, each component in the power module 10 and the heat sink 800 are welded by a single reflow soldering process; or by two reflow soldering processes, the first reflow soldering process is used to weld each component on the first metal-clad substrate 100, and the second reflow soldering process is used to weld the heat sink 800 on the side of the first metal-clad substrate 100 away from the chip 200. The components include the first connecting piece 300, the second connecting piece 400, the thermistor 620, the gate resistor 610, and the connecting terminals.

[0161] Please continue reading Figure 5 , exemplarily, when the solder material used by the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, the seventh solder S7, and the eighth solder S8 is selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, and SAC multi-reinforced solders, since SnSb5, SnSb8, SnSbAg, SAC305, and SAC multi-reinforced solders are medium-temperature solders, and the maximum temperature that the thermistor 620 can withstand is 260°C, the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, the seventh solder S7, and the eighth solder S8 can be completed through a single reflow soldering process, and the temperature of the reflow soldering process is set to 260°C.

[0162] Exemplarily, when the solder material used by the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, and the eighth solder S8 is selected from at least one of SnSb5, SAC305, and SAC multi-reinforced, and the solder material used by the seventh solder S7 is selected from at least one of lead-based high-temperature solder, SnSb10, peritectic Sn-Sb, and Sn-Sb-X, since the seventh solder S7 is a high-temperature solder, it needs to be melted at a higher temperature to achieve welding, and the maximum welding temperature resistance of each component is low. For example, the maximum welding temperature resistance of the thermistor 620 is 260°C, and at this time, two reflow soldering processes are required. The temperature of the first reflow soldering process is set to 300°C (or greater than 300°C), the seventh solder S7 is soldered, the heat sink 800 is soldered to the side of the first metal-clad substrate 100 away from the chip 200, and then the second reflow soldering process is performed. The temperature of the second reflow soldering process is set to 260°C. At this time, the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, and the eighth solder S8 are soldered, and the first connecting piece 300, the thermistor 620, the gate resistor 610, the first connecting terminal 731 and other components corresponding to each solder are soldered to the first metal-clad substrate 100.

[0163] Exemplarily, when the solder material used by the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, the seventh solder S7, and the eighth solder S8 is selected from at least one of lead-based high-temperature solder, SnSb10, hyperperitectic Sn-Sb, and Sn-Sb-X, the thermistor 620 can select a thermistor with a maximum welding temperature resistance greater than 300°C, so that the power module 10 can be soldered through a single reflow soldering process.

[0164] Exemplarily, when the solder material used by the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, and the eighth solder S8 is selected from at least one of Sn-Sb-X, SnSb5, SnSb8, SnSbAg, SAC305, and SAC multi-reinforcement, and the seventh solder S7 uses lead-based high-temperature solder, SnSb10, and peritectic Sn-Sb, since the welding temperature of the seventh solder S7 is greater than the welding temperature of the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, and the eighth solder S8, two reflow soldering processes can be used to complete the process. In this embodiment, the temperature setting of the two reflow soldering processes is greater than or equal to 300°C, but the temperatures of the two reflow soldering processes are different. The temperature of the seventh solder S7 during soldering is greater than the temperatures of the first solder S1 , the second solder S2 , the third solder S3 , the fourth solder S4 , the fifth solder S5 , the sixth solder S6 , and the eighth solder S8 during soldering.

[0165] In some embodiments, in order to increase the soldering reliability between the first metal clad substrate 100 and the heat sink 800 , or to increase the soldering reliability of various components on the first metal clad substrate 100 , solder may be selected according to the materials of various surfaces that are inconvenient to solder.

[0166] See also Fig.25 In one embodiment, the present application further provides a method for preparing a power module 10, comprising steps S100, S200, S300 and S400. The detailed steps are as follows.

[0167] In step S100 , a chip 200 is mounted on one side of the first metal-clad substrate 100 by means of a sintering material SJ.

[0168] Exemplarily, the first metal-clad substrate 100 is an active metal layer substrate, including a first insulating substrate 110 and a copper layer welded on one side of the first insulating substrate 110, wherein the first insulating substrate 110 is a SiN ceramic substrate, the copper layer has a thickness of 0.8 mm, and the copper layer is etched as needed to form a first metal layer 120, a second metal layer 130, a first end metal layer 140, etc. In some embodiments, the thickness of the copper layer can be set as needed.

[0169] Optionally, the first metal-clad substrate 100 may also be an insulating metal substrate.

[0170] In chip 200 (such as Figure 6 As shown), the first electrode 210 is located on the side of the chip body 240 facing the first metal layer 120, wherein the first electrode 210 includes Ti / Ni / Au, where Ti / Ni / Au means that Ti, Ni, and Au are sequentially welded on one side of the chip body 240 (as shown). Figure 6 As shown). Optionally, the first electrode 210 may also be one of Ti / Ni / Ag, Ti / NiV / Ag, Ti / NiV / Au, Ni(P) / Pd / Au, Ni(P) / Pd / Ag, Ni(P) / Au or Ni(P) / Ag, wherein Ni(P) represents the addition of P element to Ni element, and NiV refers to an alloy of Ni element and V element. Optionally, the second electrode 220 is one of Ti / Ni / Au, Ti / Ni / Ag, Ti / NiV / Ag, Ti / NiV / Au, Ni(P) / Pd / Au, Ni(P) / Pd / Ag, Ni(P) / Au or Ni(P) / Ag.

[0171] Optionally, in order to improve the electrical performance of the chip 200 , a NiSi layer may be further provided between the first electrode 210 and the chip body 240 .

[0172] For example, when the sintering material SJ is copper paste or silver paste, please refer to Fig.26 The chip 200 can be mounted on the first metal-clad substrate 100 by the following steps:

[0173] Step S101a: printing a sintered material SJ on the first metal-clad substrate.

[0174] In specific implementation, Fig.26 As shown in step a and step b, the sintering material SJ (silver paste) can be printed on the sintering area corresponding to the first metal-clad substrate 100 by a scraper 42 using a steel mesh 41 printing process or a screen printing process. Since the steel mesh 41 printing process is low in cost and simple to manufacture compared to the screen printing process, the present application optionally uses a steel mesh printing process to print the copper paste or silver paste on the sintering area corresponding to the first metal-clad substrate 100.

[0175] In one embodiment, the side of the opening 43 of the steel mesh 41 can be set to be narrow at the top and wide at the bottom, an inclined surface or an inclined curved surface, so that the thickness of the sintered material at the edge of the opening 43 is thinner, so as to reduce the edge protrusion of the sintered material SJ after printing, improve the printing quality, and reduce the stress risk of the chip 200. If the edge of the opening 43 is set to be the same thickness as the middle part, the sintered material SJ filled at the edge of the opening 43 is thicker. When the steel mesh is taken out after printing is completed, the steel mesh will pull up the sintered material adjacent to the edge of the opening, causing the edge of the sintered material SJ to protrude. If the edge of the opening 43 is set to be narrow at the top and wide at the bottom, the sintered material SJ filled at the edge of the opening 43 is reduced, and the problem of protruding edges of the sintered material SJ can be avoided.

[0176] For example, the thickness of the printed copper paste or silver paste can be controlled between 30 μm and 160 μm, which can be specifically designed according to the actual product and is not limited here.

[0177] In one embodiment, the area of ​​the printed copper paste or silver paste can be set to be larger than the area of ​​the corresponding sintering area on the chip 200 to absorb the alignment error between the chip 200 and the sintering material SJ. The boundary of the copper paste or silver paste can extend outward by 20μm to 300μm from the target boundary (the boundary of the sintering area of ​​the chip in an ideal state).

[0178] Step S102a, pre-drying the printed sintered material SJ.

[0179] In a specific implementation, the printed copper paste or silver paste is pre-dried to prevent the sintered material from collapsing during pressurized sintering.

[0180] For example, Fig.26 As shown in step c, the sintering material SJ (copper paste or silver paste) printed on the first metal-clad substrate 100 may be pre-dried at a temperature of 100° C. to 180° C. for 5 to 40 minutes in a N 2 atmosphere.

[0181] Step S103a: mount the chip 200 on the sintered material SJ of the first metal-clad substrate 100 and apply pressure.

[0182] In specific implementation, Fig.26 As shown in step d, the chip 200 can be first vacuum-adsorbed by the metal suction nozzle 44 to lift up the chip 200, and then the sintered material SJ (copper paste or silver paste) can be aligned through the image recognition system, and then the chip 200 can be fixed on the dried sintered material SJ (copper paste or silver paste) and pressurized.

[0183] Exemplarily, the chip 200 mounting conditions may be: temperature controlled at 100°C to 180°C, pressure controlled at 0.1MPa to 10MPa, and time controlled at 10ms to 999ms. That is, a pressure of 0.1MPa to 10MPa is applied to the chip 200 mounted on the first metal-clad substrate 100 for at least 10ms at a temperature of 100°C to 180°C.

[0184] In some embodiments, silver film may be used as the sintering material.

[0185] For example, when the sintering material SJ is a silver film SJ01, please refer to Fig. 27 The chip 200 can be mounted on the first metal-clad substrate 100 by the following steps:

[0186] Step S101b: adhering a silver film SJ01 to the side of the chip 200 facing the first metal-clad substrate 100 .

[0187] In specific implementation, Fig. 27 As shown in step a, the chip 200 can be adsorbed by a metal suction nozzle 44, and the temperature of the metal suction nozzle 44 is 80°C to 200°C. Then the chip 200 is pressed on a large piece of silver film SJ01, and a pressure of 0.1MPa to 5MPa is applied for a pressing time of 1ms to 10000ms. In this way, the silver film SJ01 under the chip 200 is compressed and semi-sintered, and adheres to the chip 200. There is a silver film support layer 45 under the silver film SJ01. After the chip 200 is attached to the silver film SJ01, the silver film support layer 45 is removed, and then the silver film SJ01 is attached to the first metal layer 120 or the second metal layer 130 of the first metal-clad substrate 100.

[0188] In one embodiment, the surface of the first metal-clad substrate 100 may be bare copper or silver-plated. In order to enhance the bonding strength, silver-plated is generally used, and the thickness of the silver-plated layer is about 0.1-30 um, and then a silver film is attached to the silver-plated layer.

[0189] Step S102b: mounting the chip 200 with the silver film SJ01 on the first metal-clad substrate 100 and applying pressure.

[0190] In a specific embodiment, Fig. 27 As shown in step b, the chip 200 can be first sucked up by vacuum adsorption, and then the first metal-clad substrate 100 is aligned by an image recognition system, and then the chip 200 adhered with the silver film SJ01 is fixed on the first metal-clad substrate 100 and pressurized.

[0191] Exemplarily, the chip 200 mounting conditions may be: temperature controlled at 100°C to 180°C, pressure controlled at 0.1MPa to 10MPa, and time controlled at 10ms to 999ms. That is, a pressure of 0.1MPa to 10MPa is applied to the chip 200 mounted on the first metal-clad substrate 100 for at least 10ms at a temperature of 100°C to 180°C.

[0192] See also Fig.28 In one embodiment, the second electrode 220 and the third electrode 230 in the chip 200 are lower than the portion of the chip body 240 around the second electrode 220 and the third electrode 230, so that a pressure-resistant ring 241 higher than the second electrode 220 and the third electrode 230 is formed around the second electrode 220 and the third electrode 230, wherein the pressure-resistant ring 241 is a portion of the chip body 240, the material of the pressure-resistant ring 241 is SiC, and the height of the pressure-resistant ring 241 is 10 μm higher than the height of the second electrode 220 and the third electrode 230, so that when the chip 200 is pressurized, the pressure head 46 contacts the pressure-resistant ring 241 without crushing the second electrode 220 and the third electrode 230.

[0193] When the chip 200 is mounted, step S104 is executed.

[0194] Step S104 , performing pressure sintering on the chip 200 mounted on the first metal-clad substrate 100 .

[0195] Pressure sintering refers to applying pressure to the body to be joined at high temperature, thereby increasing the density of the body to be sintered, promoting atomic diffusion between sintered material particles and at the interface between the sintered material and the body to be joined, and enhancing bonding strength and bonding reliability. The present application does not limit the pressure sintering process used, and it can be any known method.

[0196] In specific implementation, Fig.26 Step e in Fig. 27 As shown in step c, a pressure head 46 can be used to perform pressure sintering on the chip 200 mounted on the first metal-clad substrate 100. Taking the pressure head area of ​​50mm*50mm as an example, the parallelism of the pressure head 46 can be set to ≤5μm to reduce the warping of the product after sintering.

[0197] Exemplarily, the sintering conditions for pressure sintering are: the sintering temperature is controlled at 200° C. to 300° C., the applied pressure is controlled at 5 MPa to 30 MPa, and the sintering time is controlled at 1 min to 10 min.

[0198] In a specific implementation, the pressure sintering process can be carried out in an air environment. To prevent product oxidation, the chip 200 mounted on the first metal-clad substrate 100 is pressure sintered in a protective atmosphere or a vacuum environment. The protective atmosphere can be a reducing atmosphere or an inert atmosphere. Exemplarily, the protective atmosphere can be N2, a mixed gas of N2 and H2, Ar or He, etc., which is not limited here.

[0199] To prevent the chip 200 from being damaged by the pressure head 46 during the sintering process, Fig. 27 The c step and Fig.26 As shown in step e, when the chip 200 mounted on the first metal-clad substrate 100 is subjected to pressure sintering, a removable stress relief film 47 can be placed between the chip 200 and the pressure head 46. Thus, during the pressure sintering, the stress relief film 47 can prevent the pressure head 46 from making direct contact with the chip 200 and reduce the damage caused by the pressure head 46 to the chip 200 caused by stress concentration. After the pressure sintering is completed, the stress relief film 47 can be removed.

[0200] For example, the thickness of the stress relaxation film 47 may be set to be 50 μm to 90 μm, which is not limited here.

[0201] For example, the stress relaxation film 47 may be made of an organic film such as a Teflon film, which is not limited here.

[0202] Step S105, cooling the product after pressure sintering.

[0203] In one embodiment, after sintering is completed, the product can be cooled in a protective atmosphere and under pressure to control the warpage of the sintered product. Fig.26 The f step and Fig. 27 As shown in step d in the figure, to enhance cooling, cooling can be performed by circulating cooling water 48 or by using nitrogen gas for cooling.

[0204] In step S200 , various components and the heat sink 800 are welded on one side of the first metal-clad substrate 100 .

[0205] Before soldering the power module 10, each component and the corresponding solder are attached to a preset position, and the heat sink 800 is set at the bottom of the first metal-clad substrate 100. Fig.29, the welding fixture 1100 can be used to position the components of the power module 10 and the heat sink 800, wherein the components include the first connecting piece 300, the second connecting piece 400, the thermistor 620, the gate resistor 610 or the lead frame 1000, wherein the lead frame 1000 is used to be cut to form connecting terminals as needed, such as the first connecting terminal 731, the second connecting terminal 732 and the third connecting terminal 733, etc. After the welding is completed, the lead frame 1000 is cut off from the excess part as needed to form the first connecting terminal 731, the second connecting terminal 732 and the third connecting terminal 733. Fig.29 It is only for illustration and does not represent the structure of the power module 10 and the structural shape of the welding fixture in the specific embodiment.

[0206] Among them, the welding jig 1100 includes an upper jig 1101 and a lower jig 1102, and the upper jig 1101 and the lower jig 1102 have positioning holes. The first metal-clad substrate 100 and the lead frame 1000 with the chip 200 mounted, the electronic components 600 and the corresponding solder are placed between the upper jig 1101 and the lower jig 1102, and positioned as needed. In order to adjust the warping of the first metal-clad substrate and to ensure the warping of the lead frame 1000 during reflow soldering, the upper jig 1101 and the lower jig 1102 are tightened by bolts. Exemplarily, a spring groove and a high-temperature spring can be set on the upper pressure plate, and the first metal-clad substrate 100 and the lead frame 1000 can be flattened by the spring force. After the product and the reflow soldering jig 1100 are fixedly installed, they are placed in a vacuum reflow furnace for reflow soldering. The bottom return pipe has an opening position so that the heat dissipation teeth 811 on the heat sink base plate 810 of the heat sink 800 can be placed.

[0207] In one embodiment, in order to prevent the solder between the first metal-clad substrate 100 and the heat sink 800 from being squeezed out during reflow soldering due to the applied pressure, and the solder thickness is too thin, resulting in failure, a support component 900 is pre-implanted on the soldering surface of the heat sink 800 by ultrasonic wave. Exemplarily, the support component 900 is a metal wire, such as a copper wire or an aluminum wire. Fig.23a As shown, these metal line segments can be used to support the first metal-clad substrate 100 and also promote the escape of bubbles during reflow soldering, thereby avoiding the generation of pores that affect soldering reliability.

[0208] In one embodiment, the heat sink 800, thermistor 620, gate resistor 610, second metal-clad substrate 500 and lead frame 1000 may be configured with solder materials to achieve one-time reflow soldering or multiple reflow soldering, which may be configured specifically as required. The corresponding solders may be in the form of solder sheets or solder paste.

[0209] In one embodiment, when the solder is a solder sheet, formic acid vapor is used for vacuum reflow, and a chip mounter is used to place the solder sheet in the corresponding position. Then, the second metal-clad substrate 500, thermistor 620, gate resistor 610, first connecting piece 300, and lead frame 1000 are placed on the corresponding solder sheet using the chip mounter. Gate resistor 610 and thermistor 620 can be soldered on the second metal-clad substrate 500, or the second metal-clad substrate 500 can be placed on the solder sheet on the first metal-clad substrate 100.

[0210] In one embodiment, when the solder is solder paste, the solder paste is applied to the position to be soldered by 3D printing or dispensing, and the second metal-clad substrate 500, thermistor 620, gate resistor 610, first connecting piece 300, and lead frame 1000 are placed on the corresponding solder paste by a patch device. The fixing bolts are tightened and placed in a vacuum reflow furnace for soldering.

[0211] Step S300: forming conductive lines between components as needed.

[0212] The internal interconnection in the power module 10 is realized by conductive wires, wherein the conductive wires are aluminum wires or copper wires. For example, the fourth electrode 520a in the second metal-clad substrate 500a below the thermistor 620 is connected to the second connection terminal 732 by a third conductive wire 170 (e.g. Fig. 20 As shown in FIG. 1 ), the fifth electrode 530a and the third connection terminal 733 are connected via a fourth conductive line 180. For another example, the fourth electrode 520 in the second metal-clad substrate 500 below the gate resistor 610 and the first connection terminal 731 are connected via a second conductive line 720 (as shown in FIG. 1 ). Fig.16 shown).

[0213] In one embodiment, when the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, the seventh solder S7, and the eighth solder S8 are solder sheets, since the solder sheets are in a solid state, during reflow soldering in step S200, the product surface is relatively clean and does not require cleaning, and conductive lines can be directly formed.

[0214] In one embodiment, when the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, the seventh solder S7, and the eighth solder S8 contain solder paste, since the solder paste is in a solid state, during the reflow soldering in step S200, the solder paste will splash onto the surface of the product or the first metal layer 120, the second metal layer 130 and other metal layers, causing each electronic component 600, other parts, or the first metal layer 120, the second metal layer 130 and other metal layers to have solder paste, organic matter in the solder paste, or flux, which needs to be cleaned before forming a conductive line.

[0215] Step S400: forming a plastic encapsulation layer 1200 on the first metal-clad substrate 100 and the components.

[0216] After completing step S300, the product is placed in a plastic encapsulation mold for plastic encapsulation, and the first metal-clad substrate 100 and the electronic components 600 are sealed between the plastic encapsulation layer 1200 and the heat sink 800 (eg, Fig.30 shown).

[0217] In order to increase the bonding property between the plastic encapsulation layer 1200 and the first metal-clad substrate 100, the electronic components 600 and other components in the power module 10, and the reflow soldering surface, an interfacial stress relaxant is used to enhance the bonding strength of the plastic encapsulation layer 1200. The interfacial bonding enhancer can be an organic substance, which can be sprayed or immersed, and a stress relaxation film is formed after drying. An organic substance containing copper can also be formed on the surface of the metal layer (e.g., copper layer) of the first metal-clad substrate 100, and the organic substance increases the bonding strength between the plastic encapsulation layer 1200 and the metal copper layer.

[0218] In some embodiments, appropriate module molding can be achieved by selecting and optimizing appropriate materials for the molding layer 1200 and improving the molding interface.

[0219] In order to prevent delamination between the molding compound and the molding interface and improve the reliability of the power module, the molding compound uses a low modulus molding compound. Exemplarily, the molding compound can be formed of a material with an elastic modulus between 0.5 GPa and 20 GPa, such as epoxy molding compound, etc., which is not limited here.

[0220] In some embodiments, the preparation method of the power module 10 further includes, after the plastic encapsulation is completed, cutting the lead frame 1000 to form corresponding connection terminals, such as a first connection terminal, a second connection terminal, and a third connection terminal, and electroplating the connection terminals to prevent corrosion of the connection terminals and increase installation performance and welding wettability.

[0221] Please continue reading Fig.30 In some embodiments, the heat sink 800 includes a heat sink base plate 810 and a heat sink cover plate 820. The heat sink base plate 810 can be pre-welded on the side of the first metal-clad substrate 100 away from the chip 200. After the plastic sealing step is completed, the heat sink cover plate 820 is sealed on the heat sink base plate 810 through a sealing ring 830. A channel is formed between the heat sink base plate 810 and the heat sink cover plate 820 for the cooling medium to flow.

[0222] In some embodiments, the heat sink cover plate 820 and the heat sink bottom plate 810 may be welded by solder to form a hermetic weld between the heat sink cover plate 820 and the heat sink bottom plate 810 .

[0223] The power module, power supply system, vehicle and photovoltaic system provided in the embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and embodiments of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. For general technicians in this field, according to the idea of ​​the present application, there will be changes in the specific embodiments and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A power module, characterized in that: The power module comprises: A first metal-clad substrate, comprising a first insulating substrate and a first metal layer located on one side of the first insulating substrate, wherein the first metal layer comprises a first surface facing away from the first insulating substrate; A plurality of chips, each chip comprising a first electrode and a second electrode, the plurality of chips being located on a side of the first metal layer away from the first insulating substrate, and the first electrode of each of the plurality of chips being electrically connected to the first metal layer; A first connecting piece is located on a side of the plurality of chips away from the first insulating substrate, the first connecting piece comprises a first main body and a plurality of first contact parts, the second electrode of each of the plurality of chips is in contact with at least one of the first contact parts, and at least one pair of adjacent first contact parts has a portion of the first main body between them; the first main body is insulated and spaced apart from the first metal layer; A second metal-clad substrate and an electronic component, wherein the second metal-clad substrate is located on the first surface, the electronic component is located on a side of the second metal-clad substrate away from the first metal-clad substrate and is electrically connected to the second metal-clad substrate, the second metal-clad substrate is provided with an insulating groove, and two electrodes of the electronic component are electrically connected to the metal layers on both sides of the insulating groove respectively.

2. The power module according to claim 1, characterized in that: The distance between the second metal-clad substrate and one of the chips is greater than the width of the insulating trench.

3. The power module according to claim 1, characterized in that: The distance between the second metal-clad substrate and one of the chips is smaller than the width of the one chip.

4. The power module according to claim 1, characterized in that: The second metal-clad substrate includes a second insulating substrate and metal layers located on both sides of the second insulating substrate, the metal layer on one side of the second insulating substrate includes the insulating groove, and the two electrodes of the electronic component are electrically connected to the metal layers on both sides of the insulating groove on the one side of the second insulating substrate.

5. The power module according to claim 4, characterized in that: The second metal-clad substrate further includes a third metal layer located on a side of the second insulating substrate away from the insulating groove, and the third metal layer is welded to the first metal layer on the surface of the first metal-clad substrate through a third solder.

6. The power module according to claim 1, characterized in that: At least two chips among the plurality of chips are arranged at intervals along a first direction, and at least two chips among the plurality of chips are arranged at intervals along a second direction, wherein the second direction and the first direction are both parallel to and intersect the first surface; Along the thickness direction of the chip, the first main body is isolated from the second electrode of the chip, the first connecting sheet includes one or more grooves, the grooves protrude from the first main body toward the first surface, and the bottom of the grooves is the first contact portion; The first connecting sheet includes one or more bent structures, and the bent structure includes the first contact portion contacting the second electrode of the chip; A portion of the first main body portion is disposed between each pair of adjacent first contact portions; The first contact portion is disposed at an edge of the first main body portion.

7. The power module according to any one of claims 1 to 6, characterized in that: The power module further includes a second metal layer, the first metal layer and the second metal layer are located on the same side of the first insulating substrate, and the first metal layer and the second metal layer are spaced apart in their orthographic projections on the first insulating substrate, and the first connecting piece is also electrically connected to the second metal layer.

8. The power module according to any one of claims 1 to 6, characterized in that: The chip also includes a third electrode, the electronic component is a gate resistor, the second metal-clad substrate is located on the first surface, the second metal-clad substrate includes a fourth electrode and a fifth electrode arranged with an insulating interval, the two ends of the gate resistor are electrically connected to the fourth electrode and the fifth electrode respectively, the fourth electrode is used to receive a driving current, and the fifth electrode is electrically connected to the third electrode of the chip through a first conductive line.

9. The power module according to claim 8, characterized in that: In the first metal-clad substrate, the first metal layer is connected to the first insulating substrate through a metal welding layer; the second metal-clad substrate further includes a second insulating substrate, and the fourth electrode and the fifth electrode are attached to the surface of the second insulating substrate.

10. The power module according to any one of claims 1 to 6, characterized in that: The electronic component is a thermistor. The second metal-clad substrate is located on a side of the first metal layer away from the first insulating substrate and is disposed adjacent to the chip. The thermistor is used to monitor the temperature of the chip.

11. The power module according to any one of claims 1 to 6, characterized in that: The power module further includes a heat sink, which is located on a side of the first metal-clad substrate away from the chip, and a plurality of spaced-apart supporting components are provided between the heat sink and the first metal-clad substrate.

12. The power module according to claim 11, characterized in that: The support assembly includes two support bars arranged in parallel, and the support bar includes at least two support segments, and two adjacent support segments are arranged along the extension direction of the support bar and are spaced apart.

13. A power supply system, characterized in that: The power supply system includes a power supply, an electrical device, and a power module as described in any one of claims 1 to 12, wherein the power supply is connected to an input end of the power module, the electrical device is connected to an output end of the power module, and the power module is used to convert direct current output by the power supply into alternating current and transmit the alternating current to the electrical device.

14. A vehicle, characterized in that: The vehicle includes a vehicle body and the power supply system according to claim 13, wherein the power supply system is mounted on the vehicle body.

15. A photovoltaic system, characterized in that: It comprises a photovoltaic component and a power module as claimed in any one of claims 1 to 12, wherein the photovoltaic component is electrically connected to the power module, and the direct current generated by the photovoltaic component is converted into alternating current through the power module.

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