Data processing method, processing chip, module control board and video processing equipment

Abstract

The present invention discloses a data processing method, processing chip, module control board, and video processing device. The method comprises: obtaining decoded raw image data and sending the raw image data to a memory for caching; reading the cached raw image data from the memory; performing image data processing on the raw image data within a target time interval to obtain target image data, wherein the length of the target time interval is the frame interval length of the raw image data; and sending the target image data directly to a constant current source driver chip within the target time interval. The present invention solves the technical problem of high latency caused by the need to cache multiple frames of images between acquiring a video source and outputting data in a module control board.

Description

Technical Field

[0001] The present invention relates to the field of display devices, and in particular to a data processing method, a processing chip, a module control board, and a video processing device. Background Art

[0002] In the related art, the image data stream provided to the LED display device needs to undergo some processing in advance. Starting from obtaining data from the video source, the entire data processing flow includes: 1. Obtaining the original video stream from the video source (computer graphics card, etc.); 2. The video access board performs HDMI decoding on the original video stream; 3. The decoded video stream is given to the signal distribution board, which performs image cutting to obtain the module control board corresponding to each module of the large display screen; 4. After the module control board obtains the cut original video stream, it processes the original video stream, generates a control constant current source drive signal and drives the LED; 5. The constant current source drives the LED module to display the video.

[0003] In the above process, the video stream is transmitted without delay during processing on the video access board and signal distribution board. However, once the data enters the module control board, it processes each frame of the original video stream, resulting in a longer delay between the video stream entering the module control board and the video stream exiting the module control board.

[0004] To address the above-mentioned problems, no effective solutions have been proposed so far. Summary of the Invention

[0005] Embodiments of the present invention provide a data processing method, a processing chip, a module control board, and a video processing device to at least solve the technical problem of high delay caused by the need to cache multiple frames of images from acquiring a video source to outputting data in the module control board.

[0006] According to one aspect of an embodiment of the present invention, a data processing method is provided, comprising: obtaining decoded original image data and sending the original image data to a memory for caching; reading the cached original image data from the memory; performing image data processing on the original image data within a target time interval to obtain target image data, wherein the length of the target time interval is the frame interval length of the original image data; and sending the target image data directly to a constant current source driver chip within the target time interval.

[0007] Optionally, performing image data processing on the original image data within a target time interval to obtain target image data includes: reading image processing parameters corresponding to the original image data from the memory within a first duration of the target time interval; and processing the original image data based on the image processing parameters within a second duration of the target time interval to obtain the target image data, wherein the sum of the first duration, the second duration and the sending duration is not greater than the frame interval duration, and the sending duration is the duration required to send the target image data directly to the constant current source driver chip.

[0008] Optionally, reading the image processing parameters corresponding to the original image data from the memory includes: determining the correspondence between the channels of the constant current source driver chip and the original image data; based on the correspondence, reading one group of target parameters in the image processing parameters each time, and reading multiple groups of target parameters from the memory in sequence until all the image processing parameters are read, wherein the image processing parameters are divided into the multiple groups of target parameters according to the correspondence.

[0009] Optionally, processing the original image data based on the image processing parameters to obtain the target image data includes: determining, based on the corresponding relationship, multiple groups of data to be processed in the original image data corresponding to multiple groups of target parameters respectively; using the multiple groups of target parameters to respectively process the corresponding multiple groups of data to be processed to obtain multiple groups of target data; and determining the target image data based on the multiple groups of target data.

[0010] Optionally, the image processing parameters include at least one of the following: a gamma operation parameter, a correction operation parameter, a color gamut operation parameter, and a brightness operation parameter.

[0011] According to another aspect of an embodiment of the present invention, a data processing device is also provided, including: an acquisition module for acquiring decoded original image data and sending the original image data to a memory for caching; a reading module for reading the cached original image data from the memory; a processing module for performing image data processing on the original image data within a target time interval to obtain target image data, wherein the length of the target time interval is the frame interval length of the original image data; and a sending module for sending the target image data directly to a constant current source driver chip within the target time interval.

[0012] According to another aspect of an embodiment of the present invention, a processing chip is further provided. The processing chip is an FPGA chip. The FPGA chip is used to execute a program. When the program is running, any one of the above-mentioned data processing methods is executed.

[0013] According to another aspect of an embodiment of the present invention, a module control board is further provided. The module control board includes: the above-mentioned FPGA chip and SDRAM memory, wherein the SDRAM memory is used to cache the original image data.

[0014] According to another aspect of an embodiment of the present invention, a computer-readable storage medium is further provided, wherein the computer-readable storage medium includes a stored program, wherein when the program is run, the device where the computer-readable storage medium is located is controlled to execute any one of the above-mentioned data processing methods.

[0015] According to yet another aspect of an embodiment of the present invention, a computer device is provided. The computer device includes a processor, and the processor is configured to run a program. When the program is run, any one of the above-mentioned data processing methods is executed.

[0016] In an embodiment of the present invention, by reducing the number of times data is cached in the memory before and after processing the original image data, the purpose of reducing the time required for the entire process of the module control board to process the original image data is achieved, thereby achieving the technical effect of reducing the video delay caused by the module control board processing the original image data of the video stream, and further solving the technical problem of high delay caused by the need to cache multiple frames of images from obtaining the video source to outputting data in the module control board. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0018] Figure 1 A hardware structure block diagram of a computer terminal for implementing a data processing method is shown;

[0019] Figure 2 is a flow chart of a data processing method provided according to an embodiment of the present invention;

[0020] Figure 3 is a structural block diagram of a data processing device provided according to an embodiment of the present invention;

[0021] Figure 4 is a structural block diagram of a processing chip provided according to an embodiment of the present invention;

[0022] Figure 5 4 is a structural block diagram of a module control board provided according to an embodiment of the present invention. DETAILED DESCRIPTION

[0023] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0024] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0025] First, some nouns or terms that appear in the description of the embodiments of this application are subject to the following interpretations:

[0026] FPGA chip, Field Programmable Gate Array (FPGA for short), is a semi-custom circuit in the field of application-specific integrated circuits.

[0027] SDRAM memory, synchronous dynamic random-access memory (SDRAM for short), is a dynamic random-access memory with a synchronous interface that can be synchronized with the computer's system bus.

[0028] According to an embodiment of the present invention, an embodiment of a method for data processing is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0029] The method embodiment provided in the first embodiment of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Figure 1 FIG1 shows a hardware structure block diagram of a computer terminal for implementing a data processing method. Figure 1As shown, the computer terminal 10 may include one or more (illustrated as 102a, 102b, ..., 102n in the figure) processors (the processor may include but is not limited to a microprocessor MCU or a programmable logic device FPGA and other processing devices), a memory 104 for storing data. In addition, it may also include: a display, an input / output interface (I / O interface), a universal serial bus (USB) port (which may be included as one of the ports of the BUS bus), a network interface, a power supply and / or a camera. It will be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above electronic device. Figure 1 More or fewer components than shown, or with Figure 1 Different configurations shown.

[0030] It should be noted that the one or more processors and / or other data processing circuits described above may generally be referred to herein as "data processing circuitry." The data processing circuitry may be embodied in whole or in part as software, hardware, firmware, or any other combination thereof. Furthermore, the data processing circuitry may be a single, independent processing module, or may be incorporated in whole or in part into any of the other components of the computer terminal 10. As described in the embodiments of the present application, the data processing circuitry serves as a processor control (e.g., selection of a variable resistor terminal path connected to an interface).

[0031] The memory 104 can be used to store software programs and modules of application software, such as the program instructions / data storage device corresponding to the data processing method in the embodiments of the present invention. The processor executes the software programs and modules stored in the memory 104 to execute various functional applications and data processing, that is, to implement the data processing method of the application described above. The memory 104 may include a high-speed random access memory and may also include a computer-readable memory, such as one or more magnetic storage devices, flash memory, or other computer-readable solid-state memory. In some embodiments, the memory 104 may further include a memory remotely located relative to the processor, and such remote memory may be connected to the computer terminal 10 via a network. Examples of such networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0032] The display may be, for example, a touch screen liquid crystal display (LCD) that enables a user to interact with a user interface of the computer terminal 10 .

[0033] The image data stream provided to the LED display device needs to undergo some processing in advance, starting from obtaining data from the video source. The entire data processing flow includes: 1. Obtaining the original video stream from the video source (computer graphics card, etc.); 2. The video access board performs HDMI decoding on the original video stream; 3. The decoded video stream is given to the signal distribution board, which performs image cutting to obtain the module control board corresponding to each module of the large display screen; 4. After the module control board obtains the cut original video stream, it processes the original video stream, generates a control constant current source drive signal and drives the LED; 5. The constant current source drives the LED module to display the video.

[0034] In the above process, the video stream is transmitted without delay during processing by the video access board and the signal distribution board. When the data enters the module control board, the module control board needs to process each frame of the original video stream. After the data processing is completed, the processed image data needs to be sent to the constant current source chip. The image data processing and sending of the image data to the constant current source chip both take up processing time. The above process as a whole takes a long time and exceeds the single frame time of a frame of image. Therefore, the entire work of processing and sending data cannot be completed within one frame time. In addition, the working principle of the module control board does not support continuous processing of data streams between each two-frame time window. As a result, the module control board needs to first cache the processed image data in the memory, and then read the processed image data from the memory in the next frame time window and send it to the constant current source driver chip. Obviously, the above processing process in the module control board requires multiple data caching, and there is a long delay between the video streams entering the module control board and the video streams outputting the module control board. For example, there is at least a two-frame delay, which includes one frame of time taken by the module control board to process the image data and one frame of time taken to send the processed image data to the constant current source driver chip.

[0035] Figure 2 FIG1 is a flow chart of a data processing method according to an embodiment of the present invention, which can be applied to a module control board to reduce the delay of the module control board in processing video streams. Figure 2 As shown, the method includes the following steps:

[0036] Step S202 obtains the decoded raw image data and sends it to memory for caching. The decoded raw image data can be the segmented video stream data provided by the signal distribution board to the module control board, or it can be the video stream data provided directly to the module control board by the video access board. In this embodiment, the raw image data can be a single frame of the video stream. This description of the processing flow for a single frame illustrates how the module control board processes the entire video stream and reduces latency.

[0037] Step S204: read the cached original image data from the memory.

[0038] Since the module control board needs to cache the original image data to the memory first, then obtain the cached original image data from the memory, and then process the data, there will inevitably be a delay of the frame length of one frame of image in the module control board.

[0039] Step S206: Perform image data processing on the original image data within a target time interval to obtain target image data, where the target time interval is equal to the frame interval of the original image data. As an optional embodiment, the image processing performed on the original image data may include at least one of the following: gamma calculation, correction calculation, color gamut calculation, and brightness calculation.

[0040] Step S208 : sending the target image data directly to the constant current source driver chip within the target time interval.

[0041] In the prior art, after caching one frame of image data, the module control board will continue to cache the next frame of image data. At the same time, it will read the cached frame of data from the memory to process the image data. After the data processing is completed, the processed image data is written back to the memory. Then, within the time corresponding to the next frame of image, the constant current source driver software module in the module control board sends the processed image data to the constant current source, driving the LED display device to display the image. Obviously, this process requires executing two data access operations in the module control board, resulting in a delay of at least two frames of image time between the video stream data entering the module control board and flowing out of the module control board.

[0042] In steps S206 to S208, after the module control board processes the raw image data, it no longer stores it in the memory. Instead, it limits the image data processing time of the raw image data and the target image data transmission time to within the target time interval by means of the task execution time, that is, it ensures that the processing time of a single frame of image is no longer than the frame interval time of the raw image data. Therefore, the module control board no longer needs to store the processed data in the memory, and no longer needs to read the processed data from the memory within the next frame interval time window. Instead, the target image data can be directly sent to the constant current source driver chip within the target time interval. By improving the process steps, the data can be sent to the constant current source driver chip immediately after obtaining the target image data, without having to wait for the next frame time window by putting the data into the cache before sending the data to the constant current source driver chip. As a result, there is only a one-frame image delay between the raw image data flowing into the module control board and the target image data flowing out of the module control board, which greatly reduces the image delay caused by the module control board processing the image.

[0043] Through the above steps, by reducing the number of times data is cached in the memory before and after processing the original image data, the purpose of reducing the time required for the entire process of the module control board to process the original image data is achieved, thereby achieving the technical effect of reducing the video delay caused by the module control board processing the original image data of the video stream, and further solving the technical problem of high delay caused by the need to cache multiple frames of images from obtaining the video source to outputting data in the module control board.

[0044] As an optional embodiment, image data processing is performed on the original image data to obtain target image data in the following manner: within a first duration of the target time interval, image processing parameters corresponding to the original image data are read from a memory; within a second duration of the target time interval, the original image data is processed based on the image processing parameters to obtain target image data, wherein the sum of the first duration, the second duration, and the sending duration is not greater than the frame interval duration, and the sending duration is the duration required to directly send the target image data to the constant current source driver chip. Optionally, the image processing parameters include at least one of the following: gamma operation parameters, correction operation parameters, color gamut operation parameters, and brightness operation parameters.

[0045] Optionally, in order to limit the process of reading image processing parameters corresponding to the original image data from the memory to within the first time length, technical means can be used to speed up the reading process of the image processing parameters. For example, the image processing parameters can be simplified, and multiple pixels in the area share a set of image processing parameters to reduce the amount of data transmission, thereby ensuring that the image processing parameters can be read within the first time length. For another example, the efficiency of reading image processing parameters can be improved, and multiple parameters in the image processing parameters can be read each time, instead of only reading one parameter in the image processing parameters each time, thereby reducing the number of parameter readings and improving the reading efficiency, thereby ensuring that the image processing parameters can be read within the first time length.

[0046] Accordingly, the process of processing the original image data based on the image processing parameters can be limited to the second time length by speeding up the processing speed of the original image data, ensuring that the sum of the first time length and the second time length does not take up too much time, so that the remaining time within the target time interval can support sending the processed target image data to the constant current source driver chip, and there is no need to cache the target image data into the memory and then send it to the constant current source driver chip within the next frame time window, thereby achieving the technical effect of reducing the time delay in the module control board.

[0047] It should be noted that the above-mentioned gamma operation parameters, correction operation parameters, color gamut operation parameters, and brightness operation parameters are used to perform image processing on the original image data. For example, multiplying the pixel data in the original image by the color gamut operation parameters can obtain pixel data after color gamut correction.

[0048] As an optional embodiment, the image processing parameters corresponding to the original image data can be read from the memory in the following manner: determine the correspondence between the channels of the constant current source driver chip and the original image data; based on the correspondence, read a group of target parameters in the image processing parameters each time, and read multiple groups of target parameters from the memory in sequence until all the image processing parameters are read, wherein the image processing parameters are divided into multiple groups of target parameters according to the correspondence.

[0049] It should be noted that there is a correspondence between the channels of the constant current source driver chip and the pixels in the raw image data, with at least one channel corresponding to each pixel. Therefore, based on this correspondence, the relationship between the channel arrangement on the constant current source driver chip and the pixel arrangement in the raw image data can be determined, thereby achieving grouped correspondence between channels and pixels. Image processing parameters can be stored according to the channel arrangement of the constant current source driver chip. Therefore, based on this correspondence, the image processing parameters or raw image data can be extracted from memory in groups without causing data confusion.

[0050] In the prior art, the process of reading image processing parameters from the memory adopts single-point reading. For example, one parameter is read from the image processing parameters each time, and the parameter is used to process a pixel point in the original image data, and then the next parameter is read to continue processing the next pixel point. This process requires reading the image processing parameters multiple times, which consumes a lot of time, resulting in the inability to complete the image processing of the entire original image data within one frame time of the original image data. Therefore, two frames of image time are required to process the original image data, and the processed target image data is cached in the memory, waiting for the time window of the next frame to be sent to the constant current source driver chip, which leads to a delay of at least two frames of image time in the module control board due to processing of the image data.

[0051] This optional embodiment reduces the overall reading time of the image processing parameters, speeds up the reading speed, and saves reading time by reading a set of target parameters from the memory each time, each set of target parameters including multiple image processing parameters, so that the module control board can complete image data processing within one frame of image time. Therefore, the processed target image data can be directly sent to the constant current source driver chip without the need to cache the data in the memory. Therefore, based on the method provided in this optional embodiment, the delay between the video data streams before and after the module control board can be reduced to one frame time.

[0052] As an optional embodiment, the original image data is processed based on the image processing parameters to obtain the target image data. The following method can be adopted: based on the corresponding relationship, multiple groups of to-be-processed data corresponding to the multiple groups of target parameters are determined in the original image data; the corresponding multiple groups of to-be-processed data are processed using the multiple groups of target parameters to obtain multiple groups of target data; and the target image data is determined based on the multiple groups of target data.

[0053] In the prior art, the process of reading the cached original image data from the memory adopts single-point reading. For example, each time the data of one pixel is read from the cached original image data, the image data of the pixel is processed based on the image processing parameters corresponding to the pixel, and then the data of the next pixel is read and the processing of the next pixel is continued. This process requires reading the original image data from the memory multiple times, which consumes a lot of time, resulting in the inability to complete the image processing of the entire original image data within one frame of the original image data. Therefore, two frames of image time are required to process the original image data, and the processed target image data is cached in the memory, waiting for the time window of the next frame to be sent to the constant current source driver chip, which leads to a delay of at least two frames of image time in the module control board due to the processing of the image data.

[0054] This optional embodiment reduces the overall reading time of the cached original image data by reading a group of data to be processed from the memory each time, and each group of data to be processed includes data of multiple pixels, thereby speeding up the reading speed and saving reading time, so that the module control board can complete the processing of the image data within one frame of image time. Therefore, the module control board can directly send the processed target image data to the constant current source driver chip without the need to cache the data in the memory. Therefore, based on the method provided in this optional embodiment, the delay between the video data streams before and after the module control board can be reduced to one frame time.

[0055] According to an embodiment of the present invention, a data processing device for implementing the above data processing method is also provided. Figure 3 is a structural block diagram of a data processing device provided according to an embodiment of the present invention, such as Figure 3 As shown, the data processing device includes: an acquisition module 32, a reading module 34, a processing module 36 and a sending module 38. The data processing device is described below.

[0056] An acquisition module 32 is used to acquire the decoded original image data and send the original image data to a memory for caching;

[0057] A reading module 34, connected to the acquisition module 32, for reading the cached original image data from the memory;

[0058] The processing module 36 is connected to the reading module 34 and is used to process the original image data within a target time interval to obtain target image data, wherein the length of the target time interval is the frame interval length of the original image data;

[0059] The sending module 38 is connected to the processing module 36 and is used to send the target image data directly to the constant current source driver chip within a target time interval.

[0060] It should be noted that the acquisition module 32, reading module 34, processing module 36, and sending module 38 correspond to steps S202 to S208 in the embodiment. The examples and application scenarios implemented by these modules and corresponding steps are the same, but are not limited to the contents disclosed in the above embodiment. It should be noted that the above modules, as part of the device, can be run in the computer terminal 10 provided in the embodiment.

[0061] According to an embodiment of the present invention, a processing chip for implementing the above data processing method is also provided. Figure 4 is a structural block diagram of a processing chip provided according to an embodiment of the present invention, such as Figure 4 As shown, the processing chip can be an FPGA chip located in the module control board, and is used to run a program to execute the above-mentioned data processing method to process the decoded raw image data transmitted by the signal distribution board. Optionally, the raw image data input to the processing chip 40 can come from other hardware devices in addition to the signal distribution board, as long as it is decoded video image data.

[0062] According to an embodiment of the present invention, a module control board is also provided. Figure 5 is a structural block diagram of a module control board according to an embodiment of the present invention, such as Figure 5 As shown, the module control board 50 includes a processing chip 40 and an SDRAM memory 52. The processing chip is used to run a program to execute the data processing method provided in the above embodiment, and the SDRAM memory 52 is used to cache original image data and image processing parameters.

[0063] An embodiment of the present invention may provide a video processing device. Optionally, in this embodiment, the video processing device may be located in at least one of a plurality of network devices in a computer network. The video processing device includes a memory and a processor.

[0064] Among them, the memory can be used to store software programs and modules, such as the program instructions / modules corresponding to the data processing method and device in the embodiments of the present invention. The processor executes various functional applications and data processing by running the software programs and modules stored in the memory, that is, implementing the above-mentioned data processing method. The memory may include a high-speed random access memory, and may also include a computer-readable memory, such as one or more magnetic storage devices, flash memory, or other computer-readable solid-state memory. In some instances, the memory may further include a memory remotely located relative to the processor, and these remote memories may be connected to the computer terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0065] The processor can call the information and application stored in the memory through the transmission device to perform the following steps: obtain the decoded original image data and send the original image data to the memory for caching; read the cached original image data from the memory; perform image data processing on the original image data within a target time interval to obtain target image data, wherein the length of the target time interval is the frame interval length of the original image data; within the target time interval, send the target image data directly to the constant current source driver chip.

[0066] Optionally, the processor can also execute by calling the information and application stored in the memory: the image data processing of the original image data within the target time interval to obtain the target image data, including: within the first duration of the target time interval, reading the image processing parameters corresponding to the original image data from the memory; within the second duration of the target time interval, processing the original image data based on the image processing parameters to obtain the target image data, wherein the sum of the first duration, the second duration and the sending duration is not greater than the frame interval duration, and the sending duration is the duration required to send the target image data directly to the constant current source driver chip.

[0067] Optionally, the processor can also execute by calling the information and application stored in the memory: reading the image processing parameters corresponding to the original image data from the memory, including: determining the correspondence between the channel of the constant current source driver chip and the original image data; based on the correspondence, reading a group of target parameters in the image processing parameters each time, and reading multiple groups of target parameters from the memory in sequence until all the image processing parameters are read, wherein the image processing parameters are divided into multiple groups of target parameters according to the correspondence.

[0068] Optionally, the processor can also execute by calling the information and application stored in the memory: processing the original image data based on the image processing parameters to obtain target image data, including: determining, based on the correspondence relationship, multiple groups of to-be-processed data corresponding to the multiple groups of target parameters in the original image data; using the multiple groups of target parameters to respectively process the corresponding multiple groups of to-be-processed data to obtain multiple groups of target data; and determining the target image data based on the multiple groups of target data.

[0069] Optionally, the processor may also execute by calling information and application programs stored in the memory: the image processing parameters include at least one of the following: gamma operation parameters, correction operation parameters, color gamut operation parameters, and brightness operation parameters.

[0070] An embodiment of the present invention provides a data processing solution. By reducing the number of times data is cached in memory before and after processing raw image data, the time required for the entire process of processing raw image data by the module control board is reduced, thereby achieving the technical effect of reducing the video latency caused by the module control board processing raw image data of the video stream. This further solves the technical problem of high latency caused by the module control board needing to cache multiple frames of images between acquiring the video source and outputting the data.

[0071] A person skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing the hardware related to the terminal device through a program, and the program can be stored in a computer-readable storage medium, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0072] The embodiment of the present invention further provides a computer-readable storage medium. Optionally, in this embodiment, the computer-readable storage medium can be used to store program codes executed by the data processing method provided in the embodiment.

[0073] Optionally, in this embodiment, the computer-readable storage medium may be located in any computer terminal in a computer terminal group in a computer network, or in any mobile terminal in a mobile terminal group.

[0074] Optionally, in this embodiment, the computer-readable storage medium is configured to store program code for executing the following steps: obtaining decoded original image data and sending the original image data to a memory for caching; reading the cached original image data from the memory; performing image data processing on the original image data within a target time interval to obtain target image data, wherein the length of the target time interval is the frame interval length of the original image data; and sending the target image data directly to the constant current source driver chip within the target time interval.

[0075] Optionally, in this embodiment, a computer-readable storage medium is configured to store program codes for executing the following steps: performing image data processing on the original image data within a target time interval to obtain target image data, including: reading image processing parameters corresponding to the original image data from the memory within a first duration of the target time interval; processing the original image data based on the image processing parameters within a second duration of the target time interval to obtain the target image data, wherein the sum of the first duration, the second duration and the sending duration is not greater than the frame interval duration, and the sending duration is the duration required to send the target image data directly to the constant current source driver chip.

[0076] Optionally, in this embodiment, the computer-readable storage medium is configured to store program code for executing the following steps: reading image processing parameters corresponding to the original image data from the memory, including: determining the correspondence between the channels of the constant current source driver chip and the original image data; based on the correspondence, reading one set of target parameters in the image processing parameters each time, and reading multiple sets of target parameters from the memory in sequence until all the image processing parameters are read, wherein the image processing parameters are divided into multiple sets of target parameters according to the correspondence.

[0077] Optionally, in this embodiment, the computer-readable storage medium is configured to store program code for executing the following steps: processing the original image data based on image processing parameters to obtain target image data, including: determining, based on the correspondence relationship, multiple groups of to-be-processed data in the original image data corresponding to the multiple groups of target parameters; using the multiple groups of target parameters to respectively process the corresponding multiple groups of to-be-processed data to obtain multiple groups of target data; and determining the target image data based on the multiple groups of target data.

[0078] Optionally, in this embodiment, the computer-readable storage medium is configured to store program code for executing the following steps: the image processing parameters include at least one of the following: gamma operation parameters, correction operation parameters, color gamut operation parameters, and brightness operation parameters.

[0079] The serial numbers of the above embodiments of the present invention are for description only and do not represent the advantages or disadvantages of the embodiments.

[0080] In the above embodiments of the present invention, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0081] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only exemplary. For example, the division of units can be a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0082] Units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple units. Some or all of the units may be selected to achieve the purpose of the present embodiment according to actual needs.

[0083] In addition, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0084] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server or network device, etc.) to execute all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disk or optical disk, etc. Various media that can store program codes.

[0085] The above are only preferred embodiments of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A data processing method, applied to a processing chip of a module control board, characterized in that: include: Obtaining decoded original image data and sending the original image data to a memory for caching; Reading the cached original image data from the memory; Performing image data processing on the original image data within a target time interval to obtain target image data, wherein the length of the target time interval is the frame interval length of the original image data; within the target time interval, directly sending the target image data to the constant current source driver chip; The performing image data processing on the original image data within the target time interval to obtain the target image data includes: reading image processing parameters corresponding to the original image data from the memory within a first duration of the target time interval; and processing the original image data based on the image processing parameters within a second duration of the target time interval to obtain the target image data, wherein the sum of the first duration, the second duration, and the sending duration is no greater than the frame interval duration, and the sending duration is the duration required to directly send the target image data to the constant current source driver chip; The step of reading the image processing parameters corresponding to the original image data from the memory within a first duration of the target time interval comprises: reading a plurality of the image processing parameters from the memory each time until the image processing parameters are read, such that a total reading time is within the first duration; The method of processing the original image data based on the image processing parameters to obtain the target image data within the second time period of the target time interval includes: reading multiple pixel point data in the original image data from the memory each time and processing the data based on the corresponding image processing parameters until the original image data is read, so that the total time for reading and processing is within the second time period.

2. The method according to claim 1, characterized in that The reading of the image processing parameters corresponding to the original image data from the memory includes: Determining a correspondence between a channel of the constant current source driver chip and the original image data; Based on the corresponding relationship, a plurality of groups of target parameters are read from the memory in sequence by reading one group of target parameters in the image processing parameters each time until all the image processing parameters are read, wherein the image processing parameters are divided into the plurality of groups of target parameters according to the corresponding relationship.

3. The method according to claim 2, characterized in that The processing of the original image data based on the image processing parameters to obtain the target image data includes: Based on the corresponding relationship, determining a plurality of groups of data to be processed in the original image data corresponding to the plurality of groups of target parameters respectively; Using the multiple sets of target parameters to process the corresponding multiple sets of data to be processed respectively to obtain multiple sets of target data; The target image data is determined based on the multiple sets of target data.

4. The method according to claim 1, wherein The image processing parameters include at least one of the following: a gamma operation parameter, a correction operation parameter, a color gamut operation parameter, and a brightness operation parameter.

5. A data processing device, characterized in that: include: An acquisition module is used to acquire the decoded original image data and send the original image data to a memory for caching; A reading module, configured to read the cached original image data from the memory; a processing module, configured to perform image data processing on the original image data within a target time interval to obtain target image data, wherein the length of the target time interval is the frame interval length of the original image data; A sending module, configured to send the target image data directly to the constant current source driver chip within the target time interval; The processing module is further configured to read image processing parameters corresponding to the original image data from the memory within a first duration of the target time interval; and process the original image data based on the image processing parameters within a second duration of the target time interval to obtain the target image data, wherein the sum of the first duration, the second duration, and the sending duration is no greater than the frame interval duration, and the sending duration is the duration required to directly send the target image data to the constant current source driver chip; The processing module is further configured to read multiple parameters of the image processing parameters from the memory each time until the image processing parameters are read, so that the total reading time is within the first time length; The processing module is also used to read multiple pixel point data in the original image data from the memory each time and process them based on corresponding image processing parameters until the original image data is read, so that the total time for reading and processing is within the second time length.

6. A processing chip, characterized in that: The processing chip is an FPGA chip, and the FPGA chip is used to execute a program. When the program is running, the data processing method according to any one of claims 1 to 4 is executed.

7. A module control board, characterized in that: The module control board includes: the FPGA chip according to claim 6 and SDRAM memory, wherein the SDRAM memory is used to cache the original image data.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium includes a stored program, wherein when the program is executed, the device where the computer-readable storage medium is located is controlled to execute the data processing method according to any one of claims 1 to 4.

9. A video processing device, characterized in that: The video processing device includes a processor, and the processor is used to run a program, wherein the program executes the data processing method according to any one of claims 1 to 4 when running.

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