Local active matrix architecture

Abstract

A partial active matrix display panel, circuit, and operating method are described. In one embodiment, the partial active matrix display panel includes a pixel driver chip array, a thin film transistor layer electrically contacting the pixel driver chip array, and a light emitting diode array electrically connected to the thin film transistor layer.

Description

[0001] Related patent applications

[0002] This patent application claims priority from European patent application No. EP20159853.9, filed on February 27, 2020, which is incorporated herein by reference. Background Art Technical Field

[0003] The embodiments described herein relate to display systems and, more particularly, to partial active matrix displays and methods of operation. Background Art

[0005] Display panels are used in a variety of electronic devices. Common display panel types include active-matrix display panels, where each pixel element, such as a light-emitting diode (LED), can be driven individually to display a frame of data, and passive-matrix display panels, where rows and columns of pixel elements can be driven in a frame of data. The frame rate can be associated with display artifacts and can be set at a specific level based on the display application.

[0006] Conventional organic light-emitting diode (OLED) or liquid crystal display (LCD) technology features a thin-film transistor (TFT) substrate. Recently, proposals have been made to replace the TFT substrate with an array of pixel driver chips (also called micro driver chips or microcontroller chips) bonded to the substrate, integrating an array of micro-LEDs (μLEDs) with the pixel driver chip array, where each pixel driver chip is used to switch and drive a corresponding number of micro-LEDs. Such micro-LED displays can be arranged for either active-matrix addressing or passive-matrix addressing.

[0007] In one implementation described in U.S. Patent Publication No. 2019 / 0347985, a local passive matrix (LPM) display includes an arrangement of pixel driver chips and LEDs, in which each pixel driver chip is coupled to an LPM group of LEDs arranged in display rows and columns. In operation, a global data signal is transmitted to the pixel driver chip, and each display row of LEDs in the LPM group is driven by the pixel driver chip, one display row at a time. Summary of the Invention

[0008] A local active matrix architecture including a display panel stack, circuits, and operating methods are described. In one embodiment, the local active matrix display panel includes an array of pixel driver chips, a thin film transistor layer above and in electrical contact with the pixel driver chip array, and an array of light emitting diodes on the thin film transistor layer. Each pixel driver chip can be electrically connected to a corresponding matrix of LEDs and a corresponding local pixel circuit matrix in the TFT layer. In operation, the pixel driver chips provide local matrix digital drive capabilities, while the TFT layer provides sample-hold and current source capabilities per sub-pixel. This arrangement can maximize the emission duty cycle regardless of the size of the LED matrix and can facilitate operation of the display panel at a high multiplexing ratio. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a generalized circuit diagram of an active matrix architecture.

[0010] Figure 2 It is a generalized circuit diagram of a local passive matrix architecture.

[0011] Figure 3 is a generalized circuit diagram of a local active matrix architecture according to one embodiment.

[0012] Figures 4A-4C is a schematic top layout view of a display system according to an embodiment.

[0013] Figure 5 is a schematic top layout view of a display panel and a close-up generalized circuit diagram of local sub-pixel circuitry according to one embodiment.

[0014] Figure 6 is a circuit diagram of a local sub-pixel circuit according to one embodiment.

[0015] Figure 7 is a schematic cross-sectional side view illustration of a portion of a partial active matrix stack according to one embodiment.

[0016] Figure 8 is a flow chart of a method of manufacturing a partial passive matrix display panel according to one embodiment.

[0017] Figure 9 is an isometric view of a mobile phone according to one embodiment.

[0018] Figure 10 is an isometric view of a tablet computing device according to one embodiment.

[0019] Figure 11 is an isometric view of a wearable device according to one embodiment.

[0020] Figure 12is an isometric view of a laptop computer according to one embodiment.

[0021] Figure 13 is a system diagram of a portable electronic device according to one embodiment. DETAILED DESCRIPTION

[0022] The embodiment describes a local active matrix (LAM) display configuration and operating method. The local active matrix (LAM) architecture according to the embodiment can combine the features of both active matrix architecture and passive matrix architecture. More specifically, the LAM display configuration may include a pixel driver chip array primarily for providing digital functions and an overlay TFT array including local sub-pixel circuits for providing analog functions. In operation, LAM addressing includes active matrix drive with local updates. Therefore, the pixel driver chip can be updated with multiplexing and row sharing, while the mostly passive TFT overlay is set according to the current value of the LED drive and is always turned on until it is reprogrammed. In an alternative configuration, the pixel driver chip array is placed on a TFT substrate, which can perform the same mostly passive functions.

[0023] In various embodiments, description is made with reference to the accompanying drawings. However, certain embodiments may be practiced without one or more of these specific details or in combination with other known methods and constructions. In the following description, many specific details such as specific configurations, dimensions, and processes are shown to provide a thorough understanding of the embodiments. In other cases, well-known semiconductor processes and manufacturing techniques are not described in particular detail to avoid unnecessarily obscuring the embodiments. References to "one embodiment" throughout the specification refer to specific features, structures, constructions, or characteristics described in conjunction with the embodiments being included in at least one embodiment. Therefore, the phrase "in one embodiment" appearing in multiple places throughout the specification does not necessarily refer to the same embodiment. In addition, specific features, structures, constructions, or characteristics may be combined in one or more embodiments in any appropriate manner.

[0024] As used herein, the terms "on," "over," "to," "between," and "on" may refer to the relative position of one layer with respect to other layers. A layer that is "on," "over," or "on" another layer, or bonded "to," or "in contact with" another layer may be directly in contact with the other layer or may have one or more intervening layers. A layer that is "between" multiple layers may be directly in contact with the multiple layers or may have one or more intervening layers.

[0025] Figure 1is a generalized circuit diagram of a local passive matrix (LPM) architecture. As shown in the exemplary layout, a current source (i) is provided to each column of LEDs 150, where grayscale modulation can be performed using pulse width modulation with a constant current. In operation, sequential emission of each row is achieved through multiplexing, such that only one row is selected for emission at a time. Therefore, the emission current to a display row is disconnected before being applied to the next display row. It has been observed that sharing the LPM emission duty cycle between display rows (e.g., driving one display row at a time) results in a reduced emission time relationship based on the number of rows driven by the same pixel driver chip 102. Furthermore, it has been observed that this reduced emission time due to row sharing can affect peak display brightness. This can be compensated to some extent by increasing the current range required to drive the LEDs. However, this can result in the LEDs operating at suboptimal efficiency (e.g., within their characteristic internal quantum efficiency curve) and reduced lifetime. Therefore, for a given frame rate, and particularly at high frame rates, scaling the LPM multiplexing ratio (i.e., the number of rows that can be driven by the pixel driver chip or the matrix size) can be constrained.

[0026] Figure 2 is a generalized circuit diagram of an active matrix (AM) architecture. As shown in the exemplary layout, each LED 150 has its own dedicated current source, i1, i2, i3, etc. It has been observed that the area required to drive the electronics associated with an AM display panel with a high pixel density can be cost-prohibitive. In addition, the number of drive electronics (such as row drivers, column drivers, multiplexers, etc.) can increase the border area around the display. Although AM digital backplanes are possible, AM backplanes are typically similar, using a large number of digital-to-analog converters (DACs) to generate the analog current levels used to drive the LEDs, where the grayscale is typically modulated using amplitude modulation.

[0027] Figure 3 is a generalized circuit diagram of a local active matrix (LAM) architecture according to one embodiment. Compared to LPM addressing, the LAM architecture and addressing scheme according to the embodiment achieves digital drive at a higher multiplexing ratio and has reduced power consumption and complexity of AM addressing. LAM decouples emission time from program time, allowing the desired display brightness to be achieved with optimal LED efficiency and drive current. Therefore, at any given frame rate (e.g., required by display artifact performance), LAM can allow for a larger LED matrix size or multiplexing ratio while keeping pixel driver chip size and cost down.

[0028] In operation, pulse width modulation can be used to modulate grayscale. As shown, the corresponding local sub-pixel circuit 130 is located between each LED 150 and the pixel driver chip 102. For example, the local sub-pixel circuit 130 can be located in a thin-film transistor (TFT) stack between the pixel driver chip and the display effect layer (e.g., OLED, μLED). The TFT stack provides sample-hold and current source capabilities for each sub-pixel. The pixel driver chip provides local matrix digital drive capabilities. This arrangement allows for a 100% emission duty cycle, regardless of the size of the LED matrix corresponding to the number (and rows) of LEDs connected to a single pixel driver chip 102. Therefore, this allows operation with a high multiplexing ratio. Compared to LPM, this arrangement can also reduce drive current. For example, scaling LPM to a larger matrix size may require increased drive current to achieve the necessary brightness. This can be problematic for matching micro-LED efficiency curves and OLED service life. LAM addressing allows for lower drive currents and is therefore suitable for both μLEDs and OLEDs. In addition, the LAM arrangement is compatible with reduced borders along the edges of the display panel, the availability of cutouts, and alternative backplane shapes.

[0029] Now refer to Figure 4A , a schematic top layout view diagram of a display system according to one embodiment is provided. As shown, the display system 100 includes a display panel 110, which includes an array of pixel driver chips 102 and an array of LEDs 150 dispersed within the display area of the display panel 110. The LEDs 150 can be arranged in an array of pixels 152, wherein each pixel 152 includes a plurality of sub-pixels 154. Each sub-pixel can be designed to emit a different color. In an exemplary arrangement, the sub-pixels 154 are arranged with red, green, and blue (RGB) emission LEDs 150, but other arrangements are also possible. In one embodiment, each sub-pixel 154 includes a pair of redundant LEDs 150, which include a main LED and a redundant LED, which can be driven due to defects or missing main LEDs or circuits. The display area can be considered to be the area in the pixel array that includes the LEDs 150.

[0030] The control circuit 104 may be coupled to the display panel 110 to provide various control signals, video signals, and power supply voltages to the display panel 110. The control circuit 140 may include a timing controller (TCON). For example, the control circuit 104 may be placed on a chip on a film, a flexible circuit, or the like. Additional system components 106 may be coupled to the control circuit 104 or directly coupled to the display panel 110. For example, the additional system components 106 may include a host system on a chip (SOC), a power management integrated circuit (PMIC), a level shifter, a touch screen controller, additional passive components, and the like.

[0031] Figure 4A The specific display panel 110 shown in FIG. 1 can be characterized as a tiled display comprising multiple tiles 112. The arrangement of the pixel driver chips 102 according to the embodiment can eliminate the need for driver protrusions on the edges of the display panel. As a result, the display panel can have a reduced or zero border outside the display area. This configuration can facilitate the formation of display panels with curved edges and cutouts 120. Furthermore, this configuration can facilitate modular arrangements of the display tiles 112, including miniature arrangements. Generally speaking, the control circuit 104 can be coupled to the edges of the display panel 110. Global signal lines and / or power lines of bus columns 114 can extend from the control circuit 104 to provide global signals to the display panel. For example, the global signal lines can include at least a data clock line and a transmit clock line. The global signal lines are coupled to multiple "hybrid" pixel driver chips 102H and collectively form the backbone of the display or display tile 104. The corresponding backbone hybrid pixel driver chip receives the global signal and then transmits the manipulated signal to the row signal lines 116 of its corresponding row, which are connected to other pixel driver chips 102 in the same row. For example, the global data clock signal and the emission clock signal may be converted into manipulated signals and transmitted along the manipulated data clock line and the manipulated emission clock line to a row of pixel driver chips 110. For example, the manipulated signals may include only necessary information for the pixel driver chips of a particular row.

[0032] The tile-based display panel according to the embodiment may have display tiles 112 in various arrangements. For example, the display tiles 112 may be arranged side by side (horizontally), stacked (vertically), both, and arranged in other configurations. In addition, the global signal lines of the bus columns 114 may be aligned and connected to the stacked display tiles 112. The bus columns 118 and data lines 118 may extend from the control circuit 104 to the display panel. A column driver may optionally be located on the display panel 110 to buffer the global signal lines and / or data lines 118 in the bus columns 114. Each tile 112 may include global signal lines of one or more bus columns 114, multiple rows of row function signal lines 116, and multiple rows of pixel driver chips 102, wherein each row of pixel driver chips 102 is connected to the row function signal lines 116 of the corresponding row. In addition, each pixel driver chip 102 is connected to the corresponding matrix 156 of the LED 150.

[0033] like Figure 4AAs shown, each row of pixel driver chips 102 includes a group of trunk hybrid pixel driver chips 102H and a group of LED-driven pixel driver chips 102D. The routing selection of the bus column 114 and the trunk hybrid pixel driver chip 102H can form the backbone of the block 112. Each of the trunk hybrid pixel driver chip 102H and the LED-driven pixel driver chip 102D can be a hybrid pixel driver chip, but is configured differently for different functions. Alternatively, the chips 102H and 102D can have different internal circuits. The trunk hybrid pixel driver chip 102H and the LED-driven pixel driver chip 102D can also be connected in different ways. According to the embodiment, each of the trunk hybrid pixel driver chip 102H and the LED-driven pixel driver chip 102D is connected to the corresponding matrix 156 of the LED 150 via a TFT local sub-pixel circuit.

[0034] Now refer to Figure 4B , shows an alternative display system 100 including a column driver 122 and a row driver 124 that may be disposed on or connected to an edge of a display panel 110. The column driver 122 may, for example, buffer global data signals before transmitting to the data lines 118. The row driver 124 may, for example, buffer global row function signals before transmitting to a plurality of rows of pixel driver chips 102.

[0035] Now refer to Figure 4C , shows another alternative display system 100 including a distributed row driver 125. Figure 4C The embodiment shown in is similar to Figure 4B In the embodiments shown in FIG, in these embodiments, the row drivers are instead distributed row drivers 125 that are distributed or embedded throughout the display area rather than along the edge of the display panel 110. Similar to FIG. Figure 4A-4B , optionally including a column driver 122.

[0036] like Figures 4A-4C As shown, the local active matrix architecture according to the embodiment is compatible with a variety of arrangements of pixel driver chiplets 102 and includes various levels of global signal buffering that are traditionally separated into row drivers and column drivers.

[0037] Now refer to Figure 5 , provides a schematic top layout view of a display panel 110 and a close-up generalized circuit diagram of a local sub-pixel circuit 130 according to one embodiment. As shown, the local pixel circuit matrix 160 is connected to the corresponding pixel driver chip 102. Each local pixel circuit matrix 160 and local sub-pixel circuit 130 can be primarily located in the TFT layer 230 (which can include multiple layers) above the pixel driver chip 102, as shown in FIG. Figure 7 shown. Specifically, Figure 5The local pixel circuit matrix 160 in FIG. 1 shows local circuits connected to a single pixel driver chip 102 that controls the pixel matrix. Thus, as shown, the TFT layer may include an array of local pixel circuit matrices 160 corresponding to the local pixel circuit matrices 160. Figures 4A-4C A matrix 156 of LEDs 150 is depicted.

[0038] As shown in the close-up diagram, each local sub-pixel circuit 130 may include a memory unit 135 coupled to a local emission data line 134 from the pixel driver chip 102 and a local scan line 132 from the pixel driver chip 102. In one embodiment, the memory unit 135 includes a switch 140 such as a thin film transistor and a storage device 142 such as a capacitor. The local emission data line 134 may be coupled to multiple (rows) of local sub-pixel circuits 130 within the local pixel circuit matrix 160. The local scan line 132 may be coupled to multiple (columns) of local sub-pixel circuits 130 within the local pixel circuit matrix 160. Therefore, each local pixel circuit matrix 160 may include multiple columns of local emission data lines 134 and multiple rows of local scan lines 132.

[0039] Still refer to Figure 5According to an embodiment, each local pixel circuit matrix 160 may include a power grid formed by a high-voltage power line 136 and a low-voltage power line 138. As shown, each local sub-pixel circuit includes a high-voltage power line (e.g., Vdd) 136 and a low-voltage power line (e.g., Vss) 138 coupled to an LED 150. More specifically, the high-voltage power line 136 may be connected to a first source / drain terminal of a driver transistor 144, with the LED 150 connected to the other source / drain terminal, and the memory cell 135 connected to the gate of the driver transistor 144. In one embodiment, the high-voltage power line 136 and the low-voltage power line 138 are coupled to output terminals of the pixel driver chip 102. In addition, the input terminals of the pixel driver chip 102 may be coupled to global power lines such as those included in bus columns 114 and row signal lines 116, or global power lines distributed throughout the display panel similar to global data lines 118. In one embodiment, the power grid for the local pixel circuit matrix is completely contained within the local pixel circuit matrix 160 and connected to the corresponding pixel driver chip 102. In this configuration, the pixel driver chip 102 receives a global power input and can regulate the local power lines (high voltage power line 136, low voltage power line 138) for the local active matrix (i.e., the local pixel circuit matrix 160). According to some embodiments, the pixel driver chip 102 may be responsible for providing all relevant power and addressing signals to the "independent" local active matrix. In an alternative arrangement, the high voltage power line 136 and / or the low voltage power line 138 may be coupled to the global power line. In such an alternative configuration, a global reference voltage (Vref) line distributed, for example, through the trunk or otherwise, may be used to globally generate pixel current.

[0040] In one embodiment, a method of operating a LAM display panel includes receiving a global data signal (e.g., a digital data signal) at a pixel driver chip 102 in an array of pixel driver chips dispersed within a display area of a display panel 110. For example, the global reference voltage line can be located at an input terminal coupled to a global data line 118 or passing through a backbone, row signal line 116, or the like. A first subpixel memory cell 135 is then programmed with first local emission data from the pixel driver chip 102, wherein the first subpixel memory cell 135 is located within a first local subpixel circuit 130 external to the pixel driver chip 102. Light is then emitted from a first LED 150 within the first local subpixel circuit 130. In one embodiment, programming the first subpixel memory cell 135 with the local emission data includes sending a column data signal (e.g., along a local data line 134) and a row scan signal (e.g., along a local scan line 132) from the pixel driver chip 102 to a switch 140 (e.g., a transistor) within the first subpixel memory cell 135.

[0041] The LAM addressing scheme according to embodiments may include programming of sub-pixel memory cells one row at a time. Figure 3 , the first (top) row of local sub-pixel circuits 130 and corresponding memory cells can be programmed, followed by the second (middle) row, then the third (bottom) row, and so on. Furthermore, all columns within the same row are programmed simultaneously. It should be understood that the current sharing and multiplexing shown in the LAM addressing scheme is actually the programming current, and not the LED-driving current as described and shown for LPM and AM addressing. Instead, the LED-driving current is provided by the power grid (high-voltage power line 136 and / or low-voltage power line 138) as it relates to the programmed memory cells 135. Compared to the LED-driving current, a lower current can be used to turn on switch 140, potentially reducing the required power. This reduces the peak current supplied to LED 150 and allows the LAM architecture and addressing scheme to be used for micro-LEDs as well as OLEDs. Furthermore, during programming, row sharing is involved. Once a memory cell 135 is programmed, the charge storage device 142 (capacitor) turns on the drive transistor 144, which remains on until the memory cell 135 is reprogrammed. Thus, the time sharing of the current source with LPM addressing is eliminated with LAM addressing. In operation, even during programming and emission from the next row, the drive transistor 144 remains on until it is reprogrammed. Figure 3 refer to Figure 5 In one embodiment, even while light is being emitted from a second LED 150 (e.g., in the middle row, same column) or while programming a second memory cell 135 coupled to the second LED 150, the driver transistors 144 connected to the programmed memory cell 135 and the first LED 150 (e.g., in the top row) remain on. Thus, all driver transistors 144 from all columns in the first row (e.g., top row) can remain on during the remainder of the programming operation to program subsequent rows for that frame. The same relationship exists for subsequent rows. This addressing scheme can be further facilitated by additional emission switches, etc.

[0042] Figure 6 is a circuit diagram of a local sub-pixel circuit 100 according to one embodiment. Figure 6 Similar to Figure 5 A generalized circuit diagram of the local sub-pixel circuit 130 of FIG, with emission, sensing, and LED redundancy circuits added. Similar to Figure 5, the local sub-pixel circuits 130 and the local pixel circuit matrix 160 can be fully connected to the local input / output terminals of the pixel driver chip 102 and, therefore, not connected to any global signal or power lines. As shown, the column data line 134 can connect a column of local sub-pixel circuits 130. Similarly, the high-voltage power line 136, the low-voltage power line 138, and the column sense line 166 can be connected to the same column of local sub-pixel circuits 130. Similarly, the row scan line 132, the row sense line 146, the main LED row select line 148, the redundant LED row select line 162, and the row emission line 164 can be connected to a row of local sub-pixel circuits 130.

[0043] In the particular embodiment shown, the row emission line 164 is connected to the emission control switch 165 (e.g., transistor) of the local sub-pixel circuit 130. In operation, selection of the row emission line 164 turns on the emission control switch 165. Since the drive transistor 144 is turned on after being programmed, this allows emission from the LED 150. Since this is a redundant configuration, emission occurs from either the primary LED 150P or the redundant LED 150R, depending on whether the primary switch 149 (transistor) or the redundant switch 163 (transistor) is turned on. Sense circuitry may optionally be included, with a sense switch (transistor) 147 coupled to the row sense line 146 and the column sense line 166.

[0044] Each of the switches or transistors in the local sub-pixel circuits shown may be a TFT. It should be understood that Figure 5-Figure 6 The particular local sub-pixel circuit 130 shown is exemplary, and embodiments are not limited thereto. Other circuit implementations may be used to reduce the number of TFTs and input / output connections to the pixel driver chip 102. For example, the emission control switch 165 may be replaced by providing the pixel driver chip 102 current supply directly to the drive transistor 144 per column, and the sense switch 147 may be combined with the drive transistor 144 using the pixel driver chip 102 current supply for sensing. Furthermore, if NMOS and PMOS are used as the main switch 149 and the redundant switch 163 or switches from the pixel driver chip 102, the terminals of the main LED 150P and the redundant LED 150R to the pixel driver chip 102 may be combined.

[0045] Now see Figure 7 , which provides a cross-sectional side view illustration of a portion of an LPM stack according to one embodiment. Figure 8 is a flow chart of a method for manufacturing an LPM display panel according to one embodiment. Figure 7-Figure 8 Describe together at the same time.

[0046] In one embodiment, the LAM display panel includes an array of pixel driver chips 102, a thin film transistor TFT layer 230 above and electrically in contact with the array of pixel driver chips 102, and an array of LEDs 150 on the TFT layer 230. As previously described, the pixel driver chips 102 can be designed to digitally provide local matrix digital drive capabilities, and can be designed to receive digital data signals and include a digital data storage module. Each pixel driver chip 102 can be electrically connected to a corresponding matrix 156 of LEDs 150 and a corresponding local pixel circuit matrix 160 that can be formed in the TFT layer 230. In an alternative configuration, the TFT layer 230 can be manufactured and then the pixel driver chip 102 is placed on the TFT layer 230. In this configuration, the pixel driver chip 102 will be located above the TFT layer 230. Then, vertical interconnects such as through-holes or copper pillars can provide electrical connections from the TFT layer 230 through the passivation layer 204 to the LEDs 150. Optionally, a top-side redistribution layer may be formed over the passivation layer to provide additional routing options between the vertical interconnects and the LEDs 150 .

[0047] The manufacturing method may include: at operation 8010, transferring the array of pixel driver chips 102 to the display substrate 200. For example, the display substrate 102 can be a rigid or flexible substrate, such as glass, polyimide, etc. An adhesion layer 202 can be optionally formed on the display substrate 200 to receive the pixel driver chips 102. The transfer can be achieved using a pick-and-place tool. In one embodiment, the back (non-functionalized) surface is placed on the adhesion layer 202, with the front (active surface, including the contact pads 180) facing up. The contact pads 180 can be formed before or after the transfer. As shown in the figure, a passivation layer 204 can be formed around the pixel driver chips 102, for example, to fix the pixel driver chips 102 to the display substrate 102 and provide step coverage for additional routing. Suitable materials for the passivation layer 204 include polymers, spin-on glass, oxides, etc. In one embodiment, the passivation layer is a thermosetting material, such as acrylic, epoxy, benzocyclobutene (BCB), etc.

[0048] A redistribution layer (RDL) 220 may then be formed over the array of pixel driver chips 102. The RDL may, for example, fan out from the contact pads 180 to provide connections for the TFT layer 230, which is then formed at operation 8030. Figure 7As shown, the RDL 200 may include one or more redistribution lines 224 and a dielectric layer 226. For example, the redistribution lines may be metal lines (e.g., Cu, Al, etc.), and the dielectric layer 226 may be formed of a suitable insulating material (including oxides (e.g., SiOx), nitrides, polymers, etc.). Depending on the embodiment, the RDL 220 includes one or more of a plurality of global signal lines and power lines (e.g., data lines 118, row signal lines 116, bus columns 114, etc.).

[0049] Any of a plurality of global signal lines and power lines may also or alternatively be formed in the TFT layer 230. In one embodiment, the TFT layer 230 is primarily used for local routing. The TFT layer 230 may include a TFT array, capacitors, and electrical routing. For example, the TFT may be a silicon or oxide transistor. In the embodiment shown, the TFT includes a silicon channel 238 and an oxide gate layer 239. Similar to the RDL 220, the TFT layer 230 may additionally include a plurality of metal routing lines 234 and a dielectric layer 236. The routing lines 234 (or their through-vias) may contact the source / drain of the TFT. In the embodiment shown, the top metal routing line 234 is the anode for the local sub-pixel circuitry.

[0050] At this stage in the manufacturing process, the display panel is suitable for subsequent processing of both micro-LEDs and OLEDs. At operation 8080, the LED array is connected to the TFT array. In the OLED manufacturing process, this may include the deposition of the organic emissive layer and then the pixel defining layer. Figure 7 In the micro-LED manufacturing process shown, additional dielectric layers and routing layers may optionally be formed before the micro-LED 150 is transferred and bonded to the stack. In one embodiment, the micro-LED 150 is bonded inside the reservoir structure opening 242 in the reservoir layer 240. The reservoir structure opening 242 may optionally be reflective and may optionally be filled after the micro-LED 150 is bonded. The reservoir layer 240 may be further patterned to create openings 244 to expose routing layers such as the low voltage power line 138 or the cathode. A top transparent or translucent conductive layer may then be deposited to provide an electrical connection from the top surface of the micro-LED 150 to the low voltage power line 138 or the cathode. Suitable materials include transparent conductive oxides (TCOs), conductive polymers, thin transparent metal layers, etc. Further processing may then be performed on the encapsulation, polarizer, etc.

[0051] Figures 9-12 Various portable electronic systems are shown in which various embodiments may be implemented. Figure 9 An exemplary mobile phone 900 is shown that includes a display system 100 comprising a display screen 101 enclosed in a housing 902 . Figure 10An exemplary tablet computing device 1000 is shown that includes a display system 100 including a display screen 101 enclosed in a housing 1002 . Figure 11 An exemplary wearable device 1100 is shown that includes a display system 100 comprising a display screen 101 enclosed in a housing 1102 . Figure 12 An exemplary laptop computer 1200 is shown that includes a display system 100 including a display screen 101 enclosed in a housing 1202 .

[0052] Figure 13 A system diagram of one embodiment of a portable electronic device 1300 including a display panel 110 as described herein is shown. The portable electronic device 1300 includes a processor 1320 for managing the system and executing instructions and a memory 1340. The memory includes non-volatile memory, such as flash memory, and may additionally include volatile memory, such as static or dynamic random access memory (RAM). The memory 1340 may additionally include a portion dedicated to read-only memory (ROM) for storing firmware and configuration utilities.

[0053] The system also includes a power module 1380 (e.g., a flexible battery, wired or wireless charging circuitry, etc.), a peripheral interface 1308, and one or more external ports 1390 (e.g., Universal Serial Bus (USB), HDMI, DisplayPort, and / or other). In one embodiment, the portable electronic device 1300 includes a communication module 1312 configured to interface with the one or more external ports 1390. For example, the communication module 1312 may include one or more transceivers that operate according to IEEE standards, 3GPP standards, or other communication standards and are configured to receive and transmit data via the one or more external ports 1390. The communication module 1312 may additionally include one or more WWAN transceivers configured to communicate with a wide area network including one or more cellular towers or base stations to communicatively connect the portable electronic device 1300 to additional devices or components. Additionally, the communication module 1312 may include one or more WLAN and / or WPAN transceivers configured to connect the portable electronic device 1300 to a local area network and / or a personal area network, such as a Bluetooth network.

[0054] The display system 1300 may also include a sensor controller 1370 to manage input from one or more sensors (such as, for example, a proximity sensor, an ambient light sensor, or an infrared transceiver). In one embodiment, the system includes an audio module 1331 that includes one or more speakers 1334 for audio output and one or more microphones 1332 for receiving audio. In an embodiment, the speakers 1334 and the microphones 1332 may be piezoelectric components. The portable electronic device 1300 also includes an input / output (I / O) controller 1322, a display panel 110, and additional I / O components 1318 (e.g., keys, buttons, lights, LEDs, cursor control devices, tactile devices, etc.). The display panel 110 and the additional I / O components 1318 may be considered to form part of a user interface (e.g., the portion of the portable electronic device 1300 associated with presenting information to a user and / or receiving input from a user).

[0055] When utilizing various aspects of the embodiments, it will be apparent to those skilled in the art that combinations or variations of the above embodiments are possible for forming and operating a partial active matrix display. Although the embodiments have been described in language specific to structural features and / or methodological acts, it should be understood that the appended claims are not necessarily limited to the specific features or acts described. Instead, the specific features and acts disclosed should be understood as illustrating embodiments of the claims.

Claims

1. A local active matrix display panel comprising: Pixel driver chip array; a thin film transistor (TFT) layer, wherein the TFT layer is in electrical contact with the pixel driver chip array; a light emitting diode (LED) array, wherein the LED array is electrically connected to the TFT layer; The TFT layer includes a local pixel circuit matrix array, each pixel driving chip is electrically connected to a corresponding local pixel circuit matrix in the local pixel circuit matrix array, each local pixel circuit matrix includes a plurality of local sub-pixel circuits arranged in rows and columns, and each local sub-pixel circuit is coupled to a corresponding LED in the LED array.

2. The partial active matrix display panel according to claim 1, wherein the TFT layer is located above the pixel driving chip array, and the LED array is located on the TFT layer.

3. The partial active matrix display panel of claim 1, wherein each pixel driver chip in the pixel driver chip array comprises a digital data storage module.

4. The local active matrix display panel according to claim 1, wherein each pixel driving chip comprises a plurality of local scan line (132) outputs.

5. A local active matrix display panel according to claim 4, wherein each local pixel circuit matrix includes a plurality of local scan lines connected to the plurality of local scan line outputs, each local scan line being connected to a separate row of local sub-pixel circuits within the local pixel circuit matrix.

6. The local active matrix display panel of claim 1, wherein each local pixel circuit matrix comprises a power grid.

7. A partial active matrix display panel according to claim 6, wherein the power grid is completely contained within the partial pixel circuit matrix and is connected to corresponding pixel driving chips.

8. A partial active matrix display panel according to claim 6, wherein the grid is directly connected to a global voltage supply line.

9. The local active matrix display panel according to claim 5 further includes bus lines, wherein the bus lines include global signal lines routed to a column of pixel driver chips in the pixel driver chip array, and a row of bundled signal lines connecting a row of pixel driver chips.

10. The partial active matrix display panel according to claim 1: wherein the TFT layer is located above the pixel driver chip array and the LED array is located above the TFT layer, or the pixel driver chip array is located above the TFT layer and the LED array is located above the TFT layer; Each pixel driver chip includes multiple local scan line outputs; wherein each local pixel circuit matrix comprises a plurality of local scan lines connected to the plurality of local scan line outputs, each local scan line being connected to a single row of local sub-pixel circuits within the local pixel circuit matrix; Each pixel driver chip includes a plurality of Vdd line outputs; wherein each local pixel circuit matrix comprises a plurality of Vdd lines connected to the plurality of Vdd line outputs, each Vdd line being connected to a single column of local sub-pixel circuits within the local pixel circuit matrix; Each pixel driver chip includes multiple Vss line outputs; wherein each local pixel circuit matrix includes a plurality of Vss lines connected to the plurality of Vss line outputs, each Vss line being connected to a single column of local sub-pixel circuits within the local pixel circuit; wherein each local sub-pixel circuit includes a drive transistor, and each Vdd line is connected to a first source / drain terminal of each drive transistor in the column of local sub-pixel circuits; wherein each Vss line is connected to a plurality of LEDs in the column of local sub-pixel circuits; The pixel driving chip array includes a plurality of driving pixel driving chips and a plurality of hybrid pixel driving chips; Also included are global signal lines of a bus column coupled to the plurality of hybrid pixel driving chips; as well as Each hybrid pixel driving chip is connected to a group of driving pixel driving chips through a row signal line to transmit the manipulated row signal to the group of driving pixel driving chips.

11. A local active matrix display circuit comprising: Pixel driver chips dispersed within a pixel driver chip array within a display area of a display panel; Multiple global signal line inputs to the pixel driver chip; as well as a local pixel circuit matrix, wherein the local pixel circuit matrix is coupled to the pixel driving chip; a thin film transistor (TFT) layer, the TFT layer comprising a local pixel circuit matrix array, each local pixel circuit matrix being coupled to a corresponding pixel driver chip; as well as a light emitting diode (LED) array, wherein the LED array is electrically connected to the TFT layer; Each local pixel circuit matrix includes a sample-and-hold capability and a drive transistor for each sub-pixel in the local pixel circuit matrix, and each drive transistor is coupled to an LED in the LED array.

12. The local active matrix display circuit according to claim 11 further includes a first local sub-pixel circuit of a first local pixel circuit matrix in the local pixel circuit matrix array, wherein the first local pixel circuit includes a first sub-pixel memory unit, and the first sub-pixel memory unit is coupled to the local emission data line from the corresponding pixel driving chip and the local scanning line from the corresponding pixel driving chip.

13. The local active matrix display circuit according to claim 12, wherein the local emission data line is coupled to a column of local sub-pixel circuits in the local pixel circuit matrix, and the local scan line is coupled to a row of local sub-pixel circuits in the local pixel circuit matrix.

14. The local active matrix display circuit of claim 11, wherein each local pixel circuit matrix comprises a power grid.

15. The local active matrix display circuit of claim 14, wherein the power grid is completely contained within the local pixel circuit matrix and connected to corresponding pixel driver chips.

16. A local active matrix display circuit according to claim 14, wherein the grid is directly connected to a global voltage supply line.

17. A method of operating a local active matrix display panel, comprising: receiving a global data signal at a pixel driver chip, the pixel driver chip being one of an array of pixel driver chips dispersed within a display area of the display panel; programming a first sub-pixel memory unit with first local emission data from the pixel driving chip, the first sub-pixel memory unit being located in a first local sub-pixel circuit external to the pixel driving chip; and emitting light from a first LED within the first local sub-pixel circuit; The first local sub-pixel circuit is located in a thin film transistor (TFT) layer comprising a local pixel circuit matrix array, and each local pixel circuit matrix is coupled to a corresponding pixel driver chip of the pixel driver chip array; wherein the first LED is located within an LED array coupled to the TFT layer; Each local pixel circuit matrix includes a sample-and-hold capability and a drive transistor for each sub-pixel in the local pixel circuit matrix, and each drive transistor is coupled to an LED in the LED array.

18. The method of claim 17, wherein programming the first sub-pixel memory cell with the first local emission data comprises: The column data signal and the row scan signal are sent from the pixel driving chip to the switch in the first sub-pixel memory unit.

19. The method of claim 17, wherein programming the first sub-pixel memory unit with the first local emission data is performed when programming a first row of sub-pixel memory units with the pixel driver chip, the first row of sub-pixel memory units being located in a first row of corresponding local sub-pixel circuits.

20. The method according to claim 19, further comprising: After programming the first row of sub-pixel memory units, the pixel driver chip is used to program the second row of sub-pixel memory units, where the second row of sub-pixel memory units are located in the second row of corresponding local sub-pixel circuits. The method of claim 20 , wherein the global data signal is a digital signal.

22. The method according to claim 20, further comprising: and emitting light from a second LED within the LED array, the second LED being within a second local sub-pixel circuit corresponding to the local sub-pixel circuit in the second row, wherein a first drive transistor connected to the first LED and the first sub-pixel memory unit is turned on when light is emitted from the second LED, and wherein the first LED does not emit when the second LED emits light.

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