Pixel circuit, driving method, display substrate and display device

Abstract

A pixel circuit, a driving method, a display substrate and a display device. The pixel circuit comprises a driving circuit (11), a first light-emitting control circuit (12), a light-emitting element (EL), a first initialization circuit (13) and a second initialization circuit (14); the first initialization circuit (13) controls writing of an initialization voltage provided by an initialization voltage line (I1) into a control end of the driving circuit (11) under control of a first initialization control signal; the second initialization circuit (14) controls the initial data voltage provided by an initial data line (D02) to an anode of the light-emitting element (EL) under control of a second initialization control signal provided by a second initialization control line (R2); thereby the occurrence of the case of light leakage due to light emission of the light-emitting element (EL) and the case of lateral light leakage at a low gray scale when initializing the anode of the light-emitting element (EL) can be prevented.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit, a driving method, a display substrate and a display device. Background Art

[0002] With the continuous development of AMOLED (Active Matrix Organic Light Emitting Diode) display technology, in order to adapt to more complex display environments, the pixel definition layer (PDL) is gradually increased, which makes the spacing between pixel definition layers (PDL Gap) gradually decrease, and the efficiency of OLED (organic light emitting diode) devices is gradually improved and the turn-on voltage is reduced. The above factors have led to more and more attention being paid to the anode node of OLED devices. Summary of the invention

[0003] The main purpose of the present invention is to provide a pixel circuit, a driving method, a display substrate and a display device to solve the problems in the prior art of leakage lighting caused by the light emitting element when the anode of the light emitting element is initialized and lateral leakage at low grayscale.

[0004] In one aspect, an embodiment of the present invention provides a pixel circuit, including a driving circuit, a first light emitting control circuit, a light emitting element, a first initialization circuit and a second initialization circuit;

[0005] The driving circuit is used to generate a driving current to drive the light-emitting element under the control of its control terminal; the cathode of the light-emitting element is electrically connected to the first voltage line;

[0006] The first light-emitting control circuit is electrically connected to the light-emitting control line, the drive circuit and the anode of the light-emitting element respectively, and is used to control the connection or disconnection between the drive circuit and the anode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control line;

[0007] The first initialization circuit is electrically connected to a first initialization control line, the control end of the drive circuit and an initialization voltage line respectively, and is used to control the writing of the initialization voltage provided by the initialization voltage line into the control end of the drive circuit under the control of a first initialization control signal provided by the first initialization control line;

[0008] The second initialization circuit is electrically connected to a second initialization control line, the anode of the light emitting element and an initial data line respectively, and is used to control the initial data voltage provided by the initial data line to be supplied to the anode of the light emitting element under the control of a second initialization control signal provided by the second initialization control line.

[0009] Optionally, the second initialization circuit includes a first transistor;

[0010] A gate of the first transistor is electrically connected to the second initialization control line, a first electrode of the first transistor is electrically connected to the initial data line, and a second electrode of the first transistor is electrically connected to an anode of the light emitting element.

[0011] Optionally, the first initialization circuit includes a second transistor;

[0012] A gate of the second transistor is electrically connected to the first initialization control line, a first electrode of the second transistor is electrically connected to the initialization voltage line, and a second electrode of the second transistor is electrically connected to the control terminal of the driving circuit.

[0013] Optionally, the pixel circuit described in at least one embodiment of the present invention further includes a second light emitting control circuit, a storage circuit, a data writing circuit and a compensation circuit; the first light emitting control circuit is electrically connected to the second end of the driving circuit;

[0014] The second light-emitting control circuit is electrically connected to the light-emitting control line, the second voltage line and the first end of the driving circuit respectively, and is used to control the connection or disconnection between the first end of the driving circuit and the second voltage line under the control of the light-emitting control signal;

[0015] The energy storage circuit is electrically connected to the control end of the drive circuit and is used to maintain the potential of the control end of the drive circuit;

[0016] The data writing circuit is electrically connected to the gate line, the display data line and the first end of the driving circuit respectively, and is used to write the display data voltage on the display data line into the first end of the driving circuit under the control of the gate driving signal;

[0017] The compensation circuit is electrically connected to the gate line, the control end of the drive circuit and the second end of the drive circuit respectively, and is used to control the connection or disconnection between the control end of the drive circuit and the second end of the drive circuit under the control of the gate drive signal.

[0018] Optionally, the driving circuit includes a driving transistor; the gate of the driving transistor is the control terminal of the driving circuit, the first electrode of the driving transistor is the first terminal of the driving circuit, and the second electrode of the driving transistor is the second terminal of the driving circuit;

[0019] The first light emitting control circuit includes a third transistor; a gate of the third transistor is electrically connected to the light emitting control line, a first electrode of the third transistor is electrically connected to the second electrode of the driving transistor, and a second electrode of the third transistor is electrically connected to the anode of the light emitting element;

[0020] The second light emitting control circuit comprises a fourth transistor; a gate of the fourth transistor is electrically connected to the light emitting control line, a first electrode of the fourth transistor is electrically connected to the second voltage line, and a second electrode of the fourth transistor is electrically connected to the first electrode of the driving transistor;

[0021] The energy storage circuit includes a storage capacitor; a first plate of the storage capacitor is electrically connected to the gate of the driving transistor, and a second plate of the storage capacitor is electrically connected to the second voltage line;

[0022] The data writing circuit comprises a fifth transistor; a gate of the fifth transistor is electrically connected to the gate line, a first electrode of the fifth transistor is electrically connected to the display data line, and a second electrode of the fifth transistor is electrically connected to the first electrode of the driving transistor;

[0023] The compensation circuit includes a sixth transistor; a gate of the sixth transistor is electrically connected to the gate line, a first electrode of the sixth transistor is electrically connected to the gate of the driving transistor, and a second electrode of the sixth transistor is electrically connected to the second electrode of the driving transistor.

[0024] In a second aspect, an embodiment of the present invention further provides a driving method, which is applied to the above-mentioned pixel circuit, and the driving method includes:

[0025] Under the control of a first initialization control signal, the first initialization circuit controls the writing of the initialization voltage provided by the initialization voltage line into the control end of the driving circuit; under the control of a second initialization control signal, the second initialization circuit controls the writing of the initial data voltage provided by the initial data line to the anode of the light-emitting element.

[0026] Optionally, the pixel circuit further includes a data writing circuit, and the pixel circuit is included in the display panel; the driving method further includes: the data writing circuit writes the display data voltage on the display data line into the driving circuit under the control of the gate driving signal on the gate line;

[0027] The lowest display data voltage connected to all pixel circuits in the display panel is greater than a predetermined grayscale voltage, and the initial data voltage is the same as the first voltage provided by the first voltage line; or

[0028] The minimum display data voltage is less than the predetermined grayscale voltage, the initial data voltage is different from the first voltage, the absolute value of the difference between the initial data voltage and the first voltage is less than a predetermined voltage value, the difference between the initial data voltage and the first voltage is less than the start-up voltage of the light-emitting element, and the predetermined voltage value is a positive value.

[0029] In a third aspect, an embodiment of the present invention further provides a display substrate, which includes a base substrate and the above-mentioned pixel circuit disposed on the base substrate.

[0030] Optionally, the pixel circuit includes a driving transistor and a storage capacitor; the display substrate also includes an initial data line disposed on the base substrate;

[0031] The gate of the driving transistor is multiplexed as the first plate of the storage capacitor;

[0032] The initial data line is provided at the same layer and with the same material as the gate electrode of the driving transistor, or the initial data line is provided at the same layer and with the same material as the second electrode plate of the storage capacitor.

[0033] Optionally, the display substrate further comprises a gate line disposed on the base substrate;

[0034] An extending direction of the initial data line is the same as an extending direction of the gate line.

[0035] Optionally, the display substrate further comprises a display data line arranged on the base substrate;

[0036] The initial data line and the display data line are arranged in the same layer and the same material, or the initial data line is arranged on a side of the display data line facing away from the base substrate.

[0037] Optionally, an extending direction of the initial data line is the same as an extending direction of the display data line.

[0038] Optionally, the pixel circuit further includes a first transistor; the display substrate further includes a second initialization control line and an initial data line disposed on the base substrate;

[0039] The gate of the first transistor and the gate of the driving transistor are provided in the same layer and the same material, and the gate of the first transistor is electrically connected to a second initialization control line;

[0040] The first electrode of the first transistor, the second electrode of the first transistor, the first electrode of the driving transistor and the second electrode of the driving transistor are arranged in the same layer and with the same material;

[0041] A first electrode of the first transistor is electrically connected to the initial data line, and a second electrode of the first transistor is electrically connected to an anode of the light emitting element.

[0042] Optionally, the pixel circuit includes a driving transistor and a storage capacitor;

[0043] The gate of the driving transistor is multiplexed as the first plate of the storage capacitor;

[0044] The initialization voltage line is provided in the same layer and material as the gate of the driving transistor, or the initialization voltage line is provided in the same layer and material as the second plate of the storage capacitor.

[0045] Optionally, the display substrate further comprises a gate line disposed on the base substrate;

[0046] An extending direction of the initialization voltage line is the same as an extending direction of the gate line.

[0047] In a fourth aspect, an embodiment of the present invention further provides a display device, comprising the above-mentioned display substrate.

[0048] Optionally, the display device described in at least one embodiment of the present invention further includes a driving chip and an initial data wiring, a first voltage wiring, and a second voltage wiring arranged outside the effective display area of ​​the base substrate;

[0049] The initial data routing line includes a first initial data routing line portion directly electrically connected to the driving chip;

[0050] The first voltage line includes a first voltage line portion directly electrically connected to the driver chip, and the second voltage line includes a first voltage line portion directly electrically connected to the driver chip;

[0051] The first initial data wiring portion is disposed between the first voltage wiring portion and the first voltage wiring portion.

[0052] Optionally, the first initial data wiring portion, the first voltage wiring portion and the first voltage wiring portion all extend along the second direction;

[0053] The second direction is the direction in which the display data lines extend.

[0054] Optionally, the display device described in at least one embodiment of the present invention further includes a driving chip and an initial data wiring, an initialization voltage wiring, a first voltage wiring, and a second voltage wiring arranged outside the effective display area of ​​the base substrate;

[0055] The initial data routing line includes a first initial data routing line portion directly electrically connected to the driving chip;

[0056] The initialization voltage wiring includes a first initialization voltage wiring portion directly electrically connected to the driving chip;

[0057] The first voltage line includes a first voltage line portion directly electrically connected to the driver chip, and the second voltage line includes a first voltage line portion directly electrically connected to the driver chip;

[0058] The first initialization voltage wiring portion, the first initial data wiring portion, the first voltage line portion, and the first voltage wiring portion are sequentially arranged along a direction approaching the effective display area.

[0059] Compared with the prior art, the pixel circuit, driving method, display substrate and display device described in the present invention write an initialization voltage to the control end of the driving circuit through a first initialization circuit to initialize the control end of the driving circuit, and write an initial data voltage to the anode of the light-emitting element through a second initialization circuit to initialize the anode of the light-emitting element. By adjusting the initial data voltage, leakage lighting caused by the light-emitting element when initializing the anode of the light-emitting element and lateral leakage at low grayscale can be prevented. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] Figure 1 is a structural diagram of a pixel circuit according to at least one embodiment of the present invention;

[0061] Figure 2 is a structural diagram of a pixel circuit according to at least one embodiment of the present invention;

[0062] Figure 3 is a circuit diagram of a pixel circuit according to at least one embodiment of the present invention;

[0063] Figure 4 is a schematic layout diagram of a pixel circuit according to at least one embodiment of the present invention;

[0064] Figure 5 yes Figure 4 Structural diagram of the active layer in ;

[0065] Figure 6 yes Figure 4 A structural diagram of the first gate metal layer in FIG.

[0066] Figure 7 yes Figure 4 A structural diagram of the second gate metal layer in FIG.

[0067] Figure 8 yes Figure 4 Schematic diagram of vias in

[0068] Fig. 9 yes Figure 4 A schematic structural diagram of the first source-drain metal layer in FIG.

[0069] Fig.10 is a schematic layout diagram of a pixel circuit according to at least one embodiment of the present invention;

[0070] Fig.11 yes Fig.10 A structural diagram of the second gate metal layer in FIG.

[0071] Fig.12 yes Fig.10 Schematic diagram of vias in

[0072] Fig.13 yes Fig.10 A structural diagram of the second source-drain metal layer in FIG.

[0073] Fig.14 is a structural diagram of a display device according to at least one embodiment of the present invention;

[0074] Fig.15 is a structural diagram of a display device according to at least one embodiment of the present invention. DETAILED DESCRIPTION

[0075] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0076] The transistors used in all embodiments of the present invention may be triodes, thin film transistors, field effect transistors or other devices with the same characteristics. In the embodiments of the present invention, in order to distinguish the two electrodes of the transistor except the control electrode, one electrode is called the first electrode and the other electrode is called the second electrode.

[0077] In actual operation, when the transistor is a triode, the control electrode may be a base, the first electrode may be a collector, and the second electrode may be an emitter; or, the control electrode may be a base, the first electrode may be an emitter, and the second electrode may be a collector.

[0078] In actual operation, when the transistor is a thin film transistor or a field effect transistor, the control electrode can be a gate, the first electrode can be a source, and the second electrode can be a drain; or, the control electrode can be a gate, the first electrode can be a drain, and the second electrode can be a source.

[0079] like Figure 1 As shown, the pixel circuit according to at least one embodiment of the present invention includes a driving circuit 11, a first light emitting control circuit 12, a light emitting element EL, a first initialization circuit 13 and a second initialization circuit 14;

[0080] The driving circuit 11 is used to generate a driving current for driving the light emitting element EL under the control of its control terminal; the cathode of the light emitting element is electrically connected to the first voltage line V1;

[0081] The first light emitting control circuit 12 is electrically connected to the light emitting control line E1, the driving circuit 11 and the anode of the light emitting element EL, respectively, and is used to control the connection or disconnection between the driving circuit 11 and the anode of the light emitting element EL under the control of the light emitting control signal provided by the light emitting control line E1;

[0082] The first initialization circuit 13 is electrically connected to the first initialization control line R1, the control end of the drive circuit 11 and the initialization voltage line I1 respectively, and is used to control the initialization voltage provided by the initialization voltage line I1 to be written into the control end of the drive circuit 11 under the control of the first initialization control signal provided by the first initialization control line R1;

[0083] The second initialization circuit 14 is electrically connected to the second initialization control line R2, the anode of the light-emitting element EL and the initial data line D02, respectively, and is used to control the initial data voltage provided by the initial data line D02 to the anode of the light-emitting element EL under the control of the second initialization control signal provided by the second initialization control line R2.

[0084] The pixel circuit described in the embodiment of the present invention writes an initialization voltage to the control end of the driving circuit 11 through the first initialization circuit 13 to initialize the control end of the driving circuit 11, and writes an initial data voltage to the anode of the light-emitting element EL through the second initialization circuit 14 to initialize the anode of the light-emitting element EL. By adjusting the initial data voltage, it is possible to prevent leakage lighting caused by the light-emitting element EL when the anode of the light-emitting element EL is initialized, and lateral leakage at low grayscale can be prevented.

[0085] Optionally, the first initialization control line and the second initialization control line may be the same initialization control line; or, the first initialization control line and the second initialization control line may be different.

[0086] In at least one embodiment of the present invention, the pixel circuit is included in a display substrate, and the display substrate includes a base substrate, and a plurality of rows of gate lines, a plurality of columns of display data lines, and a plurality of rows and columns of pixel circuits disposed on the base substrate;

[0087] The pixel circuits in the nth row are electrically connected to the first initialization control line in the nth row and the gate line in the nth row respectively; n is a positive integer; the first initialization control line in the nth row and the second initialization control line in the nth row are the same initialization control line;

[0088] The first initialization control signal of the nth row on the first initialization control line of the nth row is the same as the gate driving signal of the n-1th row on the n-1th row gate line;

[0089] n is a positive integer.

[0090] In at least one embodiment of the present invention, the pixel circuit is included in a display substrate, and the display substrate includes a base substrate, and a plurality of rows of gate lines, a plurality of columns of display data lines, and a plurality of rows and columns of pixel circuits disposed on the base substrate;

[0091] The nth row of pixel circuits are electrically connected to the nth row of first initialization control lines, the nth row of second initialization control lines and the nth row of gate lines respectively; n is a positive integer; the nth row of first initialization control lines and the nth row of second initialization control lines are different initialization control lines;

[0092] The first initialization control signal of the nth row on the first initialization control line of the nth row is the same as the gate driving signal of the n-1th row on the n-1th row gate line;

[0093] The nth row second initialization control signal on the nth row second initialization control line is the same as the nth row gate drive signal on the nth row gate line;

[0094] n is a positive integer.

[0095] In a specific implementation, the rows of pixel circuits included in the display substrate can be arranged in sequence along the extension direction of the display data lines. For example, the rows of pixel circuits can be arranged in sequence toward the side of the display substrate where the driving chip is provided, but not limited to this.

[0096] Optionally, the first voltage line may be a ground line or a low voltage signal line, but is not limited thereto.

[0097] In at least one embodiment of the present invention, the light emitting element EL may be an OLED (Organic Light-Emitting Diode), but is not limited thereto.

[0098] Optionally, the second initialization circuit includes a first transistor;

[0099] A gate of the first transistor is electrically connected to the second initialization control line, a first electrode of the first transistor is electrically connected to the initial data line, and a second electrode of the first transistor is electrically connected to an anode of the light emitting element.

[0100] Optionally, the first initialization circuit includes a second transistor;

[0101] A gate of the second transistor is electrically connected to the first initialization control line, a first electrode of the second transistor is electrically connected to the initialization voltage line, and a second electrode of the second transistor is electrically connected to the control terminal of the driving circuit.

[0102] like Figure 2 As shown, in Figure 1On the basis of at least one embodiment of the pixel circuit shown, the pixel circuit further includes a second light emitting control circuit 21, a storage circuit 22, a data writing circuit 23 and a compensation circuit 24; the first light emitting control circuit 12 is electrically connected to the second end of the driving circuit 11;

[0103] The second light emitting control circuit 21 is electrically connected to the light emitting control line E1, the second voltage line V2 and the first end of the driving circuit 11 respectively, and is used to control the connection or disconnection between the first end of the driving circuit 11 and the second voltage line V2 under the control of the light emitting control signal;

[0104] The energy storage circuit 22 is electrically connected to the control end of the drive circuit 11, and is used to maintain the potential of the control end of the drive circuit 11;

[0105] The data writing circuit 23 is electrically connected to the gate line G0, the display data line D01 and the first end of the driving circuit 11 respectively, and is used to write the display data voltage on the display data line D01 into the first end of the driving circuit 11 under the control of the gate driving signal;

[0106] The compensation circuit 24 is electrically connected to the gate line G0, the control end of the drive circuit 11 and the second end of the drive circuit 11 respectively, and is used to control the connection or disconnection between the control end of the drive circuit 11 and the second end of the drive circuit 11 under the control of the gate drive signal.

[0107] In at least one embodiment of the present invention, the second voltage line may be a high voltage signal line, but is not limited thereto.

[0108] The pixel circuit described in at least one embodiment of the present invention may further include a second light-emitting control circuit 21, a storage circuit 22, a data writing circuit 23 and a compensation circuit 24, wherein the second light-emitting control circuit 21 controls the connection or disconnection between the first end of the driving circuit 11 and the second voltage line V2, the storage circuit 22 maintains the potential of the control end of the driving circuit 11, the data writing circuit 23 controls the writing of the display data voltage into the first end of the driving circuit 11, and the compensation circuit 24 controls the compensation of the threshold voltage of the driving transistor included in the driving circuit 11.

[0109] Optionally, the driving circuit includes a driving transistor; the gate of the driving transistor is the control terminal of the driving circuit, the first electrode of the driving transistor is the first terminal of the driving circuit, and the second electrode of the driving transistor is the second terminal of the driving circuit;

[0110] The first light emitting control circuit includes a third transistor; a gate of the third transistor is electrically connected to the light emitting control line, a first electrode of the third transistor is electrically connected to the second electrode of the driving transistor, and a second electrode of the third transistor is electrically connected to the anode of the light emitting element;

[0111] The second light emitting control circuit comprises a fourth transistor; a gate of the fourth transistor is electrically connected to the light emitting control line, a first electrode of the fourth transistor is electrically connected to the second voltage line, and a second electrode of the fourth transistor is electrically connected to the first electrode of the driving transistor;

[0112] The energy storage circuit includes a storage capacitor; a first plate of the storage capacitor is electrically connected to the gate of the driving transistor, and a second plate of the storage capacitor is electrically connected to the second voltage line;

[0113] The data writing circuit comprises a fifth transistor; a gate of the fifth transistor is electrically connected to the gate line, a first electrode of the fifth transistor is electrically connected to the display data line, and a second electrode of the fifth transistor is electrically connected to the first electrode of the driving transistor;

[0114] The compensation circuit includes a sixth transistor; a gate of the sixth transistor is electrically connected to the gate line, a first electrode of the sixth transistor is electrically connected to the gate of the driving transistor, and a second electrode of the sixth transistor is electrically connected to the second electrode of the driving transistor.

[0115] like Figure 3 As shown, based on at least one embodiment of the pixel circuit shown in the figure, the light emitting element is an organic light emitting diode O1; the driving circuit 11 includes a driving transistor T7;

[0116] The second initialization circuit includes a first transistor T1;

[0117] The gate G1 of the first transistor T1 is electrically connected to the second initialization control line R2, the first electrode S1 of the first transistor T1 is electrically connected to the initial data line D02, and the second electrode D1 of the first transistor T1 is electrically connected to the anode of O1;

[0118] The first initialization circuit includes a second transistor T2;

[0119] The gate G2 of the second transistor T2 is electrically connected to the first initialization control line R1, the first electrode S2 of the second transistor T2 is electrically connected to the initialization voltage line I1, and the second electrode D2 of the second transistor T2 is electrically connected to the control terminal of the driving circuit;

[0120] The gate G7 of the driving transistor T7 is the control terminal of the driving circuit 11, the first electrode S7 of the driving transistor T7 is the first terminal of the driving circuit 11, and the second electrode D7 of the driving transistor T7 is the second terminal of the driving circuit 11;

[0121] The first light emitting control circuit comprises a third transistor T3;

[0122] The gate G3 of the third transistor T3 is electrically connected to the light emitting control line E1, the first electrode S3 of the third transistor T3 is electrically connected to the second electrode D7 of the driving transistor T7, and the second electrode D3 of the third transistor T3 is electrically connected to the anode of O1;

[0123] The second light emitting control circuit comprises a fourth transistor T4;

[0124] The gate G4 of the fourth transistor T4 is electrically connected to the light emitting control line E1, the first electrode S4 of the fourth transistor T4 is electrically connected to the second voltage line V2, and the second electrode D4 of the fourth transistor T4 is electrically connected to the first electrode S7 of the driving transistor T7;

[0125] The energy storage circuit includes a storage capacitor C1; a first plate C1a of the storage capacitor C1 is electrically connected to the gate G7 of the driving transistor T7, and a second plate C1b of the storage capacitor C1 is electrically connected to the second voltage line V2;

[0126] The data writing circuit includes a fifth transistor T5; a gate G5 of the fifth transistor T5 is electrically connected to the gate line G0, a first electrode of the fifth transistor is electrically connected to the display data line D01, and a second electrode of the fifth transistor is electrically connected to the first electrode of the driving transistor;

[0127] The compensation circuit includes a sixth transistor T6; a gate G6 of the sixth transistor T6 is electrically connected to the gate line G0, a first electrode S6 of the sixth transistor T6 is electrically connected to the gate G7 of the driving transistor T7, and a second electrode D6 of the sixth transistor T6 is electrically connected to the second electrode D7 of the driving transistor T7.

[0128] exist Figure 3 In at least one embodiment of the pixel circuit shown, all transistors are p-type thin film transistors, but the present invention is not limited thereto.

[0129] exist Figure 3 In at least one embodiment of the pixel circuit shown, the second initialization control signal on R2 is the same as the gate driving signal on G0, but the present invention is not limited thereto.

[0130] The present invention Figure 3When at least one embodiment of the pixel circuit shown is in operation, a display cycle includes an initialization phase, a data writing phase, and a light emitting phase which are arranged in sequence;

[0131] In the initialization stage, R1 provides a low voltage signal, E0, G0 and R2 provide a high voltage signal, T2 is turned on, T1, T5, T3, T4 and T6 are all turned off, and I1 provides an initialization voltage signal to the gate of T7 to turn off T7;

[0132] In the data writing stage, R1 provides a high voltage signal, G0 and R2 provide low voltage signals, E0 provides a high voltage signal, T1, T5 and T6 are all turned on, T2, T3 and T4 are all turned off, D02 provides an initial data voltage to the anode of O1 so that O1 does not emit light; D01 provides a display data voltage Vd to S7, G7 is connected to D7 to write the data voltage and compensate for the threshold voltage of T7;

[0133] In the light-emitting stage, R1, G0 and R2 all provide high voltage signals, E0 provides a low voltage signal, T1, T2, T5 and T6 are all turned off, T3 and T4 are turned on, and T7 drives O1 to emit light.

[0134] A driving method according to at least one embodiment of the present invention is applied to the above-mentioned pixel circuit, and the driving method includes:

[0135] The first initialization circuit controls, under the control of a first initialization control signal, to write an initialization voltage provided by an initialization voltage line into a control terminal of the driving circuit;

[0136] The second initialization circuit controls the initial data voltage provided by the initial data line to the anode of the light emitting element under the control of the second initialization control signal.

[0137] The driving method described in at least one embodiment of the present invention writes an initialization voltage to the control end of the driving circuit 11 through a first initialization circuit to initialize the control end of the driving circuit, and writes an initial data voltage to the anode of the light-emitting element through a second initialization circuit to initialize the anode of the light-emitting element. By adjusting the initial data voltage, it is possible to prevent leakage lighting caused by the light-emitting element when the anode of the light-emitting element is initialized and lateral leakage at low grayscale from occurring.

[0138] In a specific implementation, the pixel circuit may further include a data writing circuit, and the pixel circuit is included in a display panel (the display panel may include the display substrate); the driving method may further include:

[0139] The data writing circuit writes the display data voltage on the display data line into the first end of the driving circuit under the control of the gate driving signal;

[0140] The lowest display data voltage connected to all pixel circuits in the display panel is greater than a predetermined grayscale voltage, and the initial data voltage is the same as the first voltage provided by the first voltage line; or

[0141] The minimum display data voltage is less than the predetermined grayscale voltage, the initial data voltage is different from the first voltage, the absolute value of the difference between the initial data voltage and the first voltage is less than a predetermined voltage value, the difference between the initial data voltage and the first voltage is less than the start-up voltage of the light-emitting element, and the predetermined voltage value is a positive value.

[0142] In at least one embodiment of the present invention, the predetermined grayscale voltage and the predetermined voltage value may be selected according to actual conditions. For example, the predetermined grayscale voltage may be a grayscale voltage corresponding to L32, but is not limited thereto.

[0143] At least one embodiment of the present invention sets the initial data voltage according to the lowest display data voltage connected to the pixel circuit of the display panel;

[0144] When the minimum display data voltage is relatively large, the initial data voltage is set to be the same as the first voltage, so that when the anode of the light-emitting element is initialized, the light-emitting element can be ensured not to emit light, thereby preventing leakage caused by the light-emitting element emitting light;

[0145] When the minimum display data voltage is small, the initial data voltage is set to be slightly larger than the first voltage, or the initial data voltage is set to be slightly smaller than the first voltage according to actual conditions, so as to improve the lateral leakage under low gray scale, and the difference between the initial data voltage and the first voltage is smaller than the start-up voltage of the light-emitting element, so as to ensure that the light-emitting element does not emit light when the anode of the light-emitting element is initialized.

[0146] In the embodiment of the present invention, the display cycle may include an initialization phase, a data writing phase and a light emitting phase which are arranged in sequence;

[0147] When R1 and R2 are different initialization control lines, in the initialization stage, the first initialization circuit controls the initialization voltage provided by the initialization voltage line to be written into the control end of the driving circuit under the control of the first initialization control signal; in the data writing stage, the second initialization circuit controls the initial data voltage provided by the initial data line to be sent to the anode of the light-emitting element under the control of the second initialization control signal, and the data writing circuit controls the display data voltage on the display data line to be written into the first end of the driving circuit under the control of the gate driving signal;

[0148] When R1 and R2 are the same initialization control lines, in the initialization stage, the first initialization circuit, under the control of the first initialization control signal, controls the initialization voltage provided by the initialization voltage line to be written into the control end of the driving circuit; the second initialization circuit, under the control of the second initialization control signal, controls the initial data voltage provided by the initial data line to be sent to the anode of the light-emitting element; in the data writing stage, the data writing circuit, under the control of the gate driving signal, writes the display data voltage on the display data line into the first end of the driving circuit.

[0149] The display substrate described in at least one embodiment of the present invention includes a base substrate and the above-mentioned pixel circuit disposed on the base substrate.

[0150] Optionally, the pixel circuit includes a driving transistor and a storage capacitor; the display substrate further includes an initial data line disposed on the base substrate;

[0151] The gate of the driving transistor is multiplexed as the first plate of the storage capacitor;

[0152] The initial data line is provided at the same layer and with the same material as the gate electrode of the driving transistor, or the initial data line is provided at the same layer and with the same material as the second electrode plate of the storage capacitor.

[0153] In at least one embodiment of the present invention, the display substrate may include an active layer, a first gate metal layer, a second gate metal layer and a first source-drain metal layer sequentially disposed on the base substrate;

[0154] The first gate metal layer may be patterned to form gate lines and gates of each transistor, and the second gate metal layer may be patterned to form a second plate of the storage capacitor; the initial data line may be provided in the same layer and material as the gates of each transistor, or the initial data line may be provided in the same layer and material as the second plate of the storage capacitor. That is, the initial data line may be formed in the first gate metal layer or the second gate metal layer.

[0155] In a specific implementation, when the initial data line is formed on the first gate metal layer or the second gate metal layer, the display substrate further includes a gate line disposed on the base substrate;

[0156] An extending direction of the initial data line is the same as an extending direction of the gate line.

[0157] In at least one embodiment of the present invention, the extension direction of the initial data line is the same as the extension direction of the gate line, which may mean that: the extension direction of the initial data line is exactly the same as the extension direction of the gate line, or, the angle between the extension direction of the initial data line and the extension direction of the gate line is less than a predetermined angle, so that the extension direction of the initial data line is substantially the same as the extension direction of the gate line; but the present invention is not limited thereto.

[0158] Optionally, the display substrate further comprises a display data line arranged on the base substrate;

[0159] The initial data line and the display data line are arranged in the same layer and the same material, or the initial data line is arranged on a side of the display data line facing away from the base substrate.

[0160] In at least one embodiment of the present invention, the display substrate may include an active layer, a first gate metal layer, a second gate metal layer and a first source-drain metal layer sequentially arranged on the base substrate, and the first source-drain metal layer may be patterned to form a display data line and an initial data line, and the initial data line may be arranged in the same layer and material as the display data line, that is, the initial data line is formed in the first source-drain metal layer; or,

[0161] The display substrate may include an active layer, a first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer sequentially arranged on the base substrate; the first source-drain metal layer may be subjected to a patterning process to form a display data line, and the second source-drain metal layer may be subjected to a patterning process to form an initial data line, that is, the initial data line is arranged on a side of the display data line facing away from the base substrate, and the initial data line is formed in the second source-drain metal layer.

[0162] In a specific implementation, when the initial data line is formed in the first source-drain metal layer or the second source-drain metal layer, the extension direction of the initial data line may be the same as the extension direction of the display data line.

[0163] In at least one embodiment of the present invention, the extending direction of the initial data line is the same as the extending direction of the display data line, which may mean that: the extending direction of the initial data line is exactly the same as the extending direction of the display data line, or, the angle between the extending direction of the initial data line and the extending direction of the display data line is less than a predetermined angle, so that the extending direction of the initial data line is substantially the same as the extending direction of the display data line; but the present invention is not limited thereto.

[0164] Optionally, the pixel circuit further includes a first transistor; the display substrate further includes a second initialization control line and an initial data line disposed on the base substrate;

[0165] The gate of the first transistor and the gate of the driving transistor are provided in the same layer and the same material, and the gate of the first transistor is electrically connected to a second initialization control line;

[0166] The first electrode of the first transistor, the second electrode of the first transistor, the first electrode of the driving transistor and the second electrode of the driving transistor are arranged in the same layer and with the same material;

[0167] A first electrode of the first transistor is electrically connected to the initial data line, and a second electrode of the first transistor is electrically connected to an anode of the light emitting element.

[0168] In at least one embodiment of the present invention, the second initialization control line may be provided in the same layer and material as the gate line, and the second initialization control signal on the second initialization control line may be the same as the gate driving signal on the gate line.

[0169] Optionally, the pixel circuit may include a driving transistor and a storage capacitor;

[0170] The gate of the driving transistor is multiplexed as the first plate of the storage capacitor;

[0171] The initialization voltage line is provided in the same layer and material as the gate of the driving transistor, or the initialization voltage line is provided in the same layer and material as the second plate of the storage capacitor.

[0172] In a specific implementation, the initialization voltage line may be formed in the first gate metal layer, or the initialization voltage line may also be formed in the second gate metal layer, but the present invention is not limited thereto.

[0173] Optionally, the display substrate may further include gate lines disposed on the base substrate;

[0174] An extending direction of the initialization voltage line is the same as an extending direction of the gate line.

[0175] In at least one embodiment of the present invention, the extending direction of the initialization voltage line is the same as the extending direction of the gate line, which may mean that: the extending direction of the initialization voltage line is exactly the same as the extending direction of the gate line, or, the angle between the extending direction of the initialization voltage line and the extending direction of the gate line is less than a predetermined angle, so that the extending direction of the initialization voltage line is approximately the same as the extending direction of the gate line; but not limited to this.

[0176] Figure 4 The schematic diagram is a layout diagram of a pixel circuit according to at least one embodiment of the present invention. The pixel circuit is arranged in an effective display area of ​​a display substrate.

[0177] exist Figure 4 In the figure, the first initialization voltage line portion included in the initialization voltage line is labeled I11, the first initial data line portion included in the initial data line is labeled D021, the second initialization voltage line portion included in the initialization voltage line is labeled I12, and the second initial data line portion included in the initial data line is labeled D022; I11, I12, D021 and D022 can be arranged in the effective display area; I11 and I12 can both be electrically connected to the initialization voltage routing arranged outside the effective display area, I11 and I12 are electrically connected to each other, D021 and D022 can both be electrically connected to the initial data routing arranged outside the effective display area, and D021 and D022 are electrically connected to each other, but it is not limited to this.

[0178] In at least one embodiment of the present invention, the display substrate includes a plurality of rows and columns of pixel circuits disposed on a base substrate, each row of pixel circuits is electrically connected to the same row of gate lines, and the same column of pixel circuits is electrically connected to the same column of display data lines; when the pixel circuits are configured as follows Figure 4 In the structure shown, the initialization voltage line includes a plurality of initialization voltage line portions extending along the first direction, and each row of pixel circuits is electrically connected to a corresponding initialization voltage line portion, and the initial data line includes a plurality of initial data line portions extending along the first direction, and each row of pixel circuits is electrically connected to a corresponding initial data line portion;

[0179] The pixel circuits in the same row can be electrically connected to the same initialization voltage line portion, and the pixel circuits in the same row can be electrically connected to the same initial data line portion;

[0180] In addition, an initial data line and an initialization voltage line are provided outside the effective display area of ​​the display substrate. The initialization voltage line is used to provide an initialization voltage to each of the initialization voltage line portions, and the initial data line is used to provide an initial data voltage to each of the initial data line portions. Each of the initialization voltage line portions is electrically connected to each other, and each of the initial data line portions is electrically connected to each other.

[0181] exist Figure 4 In the figure, R1 is the first initialization control line, G0 is the gate line, C1b is the second plate of the storage capacitor in the pixel circuit, E1 is the light emitting control line, D01 is the display data line, and R2 is the second initialization control line;

[0182] The second initialization control signal supplied to the second initialization control line R2 is the same as the gate driving signal supplied to G0.

[0183] exist Figure 4In at least one corresponding embodiment, on the base substrate, an active layer, a first gate metal layer, a second gate metal layer and a first source-drain metal layer are sequentially arranged in a direction away from the base substrate;

[0184] Performing a patterning process on the first gate metal layer to form a gate line G0, a first initialization control line R1, a second initialization control line R2, a light emitting control line E1 and gates of each transistor in the pixel circuit;

[0185] Performing a patterning process on the second gate metal layer to form an initial data line, an initialization voltage line and a second plate of a storage capacitor in a pixel circuit;

[0186] exist Figure 4 In at least one embodiment shown, the initial data line and the initialization voltage line are formed in the second gate metal layer, and the extension direction of the initial data line is the same as that of the gate line G0 , and the extension direction of the initialization voltage line is the same as that of the gate line G0 .

[0187] exist Figure 4 In at least one embodiment shown, the extension direction of G0 may be a first direction, such as a horizontal direction, and the extension direction of D01 may be a second direction, such as a vertical direction, but is not limited thereto.

[0188] In at least one embodiment of the present invention, the gate lines may extend in a first direction, the display data lines may extend in a second direction, and the first direction and the second direction intersect; but the present invention is not limited thereto.

[0189] like Figure 5 As shown, Figure 4 The pattern of the active layer in includes a first electrode S1 of the first transistor, a second electrode D1 of the first transistor, a first electrode S2 of the second transistor, a second electrode D2 of the second transistor, a first electrode S4 of the fourth transistor, a first electrode S5 of the fifth transistor, a second electrode D5 of the fifth transistor and a second electrode D6 of the sixth transistor;

[0190] exist Figure 4 , Figure 5 In at least one corresponding embodiment, the second electrode D2 of the second transistor is multiplexed as the first electrode of the sixth transistor, the second electrode D5 of the fifth transistor is multiplexed as the second electrode of the fourth transistor, and the second electrode D5 of the fifth transistor is multiplexed as the first electrode of the driving transistor; the second electrode D6 of the sixth transistor is multiplexed as the second electrode of the driving transistor.

[0191] like Figure 6As shown, T2 is a dual-gate transistor, the first gate pattern included in the gate of the second transistor is labeled G21, and the second gate pattern included in the gate of the second transistor is labeled G22;

[0192] The gate of the fifth transistor is labeled G5;

[0193] T6 is a dual-gate transistor, the third gate pattern included in the gate of the sixth transistor is labeled G61, and the fourth gate pattern included in the gate of the sixth transistor is labeled G62;

[0194] The gate of the third transistor is labeled G3, the gate of the fourth transistor is labeled G4, and the gate of the first transistor is labeled G1;

[0195] The gate of the driving transistor is labeled G7, and G7 is multiplexed as the first plate of the storage capacitor in the pixel circuit.

[0196] like Figure 7 As shown, C1b is the second electrode plate of the storage capacitor, H0 is the connection hole provided on C1b, and D2 is electrically connected to G2 through the connection hole H0.

[0197] After the active layer, the first gate metal layer and the second gate metal layer are sequentially arranged, an interlayer dielectric layer may be arranged, and via holes may be made after the interlayer dielectric layer is arranged. Figure 8 As shown, the via hole labeled H1 is the first via hole, the via hole labeled H2 is the second via hole, the via hole labeled H3 is the third via hole, the via hole labeled H4 is the fourth via hole, the via hole labeled H5 is the fifth via hole, the via hole labeled H6 is the sixth via hole, the via hole labeled H7 is the seventh via hole, the via hole labeled H8 is the eighth via hole, the via hole labeled H9 is the ninth via hole, the via hole labeled H10 is the tenth via hole, the via hole labeled H11 is the eleventh via hole, the via hole labeled H12 is the twelfth via hole, the via hole labeled H13 is the thirteenth via hole, the via hole labeled H14 is the fourteenth via hole, and the via hole labeled H15 is the fifteenth via hole.

[0198] like Fig. 9 As shown, the pattern of the first source-drain metal layer includes a display data line D01, a second voltage line, a first conductive connection part L1, a second conductive connection part L2, a third conductive connection part L3, a fourth conductive connection part L4, a fifth conductive connection part L5 and a sixth conductive connection part L6. Figure 8 In the figure, the first voltage line portion labeled V21 is included in the second voltage line.

[0199] When the pixel circuit adopts Figure 4In the structure shown, the second voltage line includes multiple voltage line parts extending along the second direction, and each column of pixel circuits is electrically connected to the corresponding voltage line part; a second voltage wiring is provided outside the effective display area of ​​the display substrate, and the second voltage wiring is used to provide a second voltage signal to each of the voltage line parts included in the second voltage line, and each of the voltage line parts included in the second voltage line is electrically connected to each other.

[0200] like Figure 4-Figure 9 As shown, S2 is electrically connected to the first conductive connection portion L1 through the fourth via hole H4, and L1 is electrically connected to I11 through the first via hole H1, so that S2 is electrically connected to I11, that is, S2 is electrically connected to the initialization voltage line;

[0201] S1 is electrically connected to L6 through H14, and L6 is electrically connected to D022 through H11, so that S1 is electrically connected to D022, that is, S1 is electrically connected to the initial data line;

[0202] D2 is electrically connected to L3 via H7, and L3 is electrically connected to G7 via H0;

[0203] S5 is electrically connected to D01 through H3;

[0204] S4 is electrically connected to V21 through H8;

[0205] D1 is electrically connected to L4 through H9, and L4 is electrically connected to the anode layer through a via.

[0206] When manufacturing the display substrate, after manufacturing the first source and drain metal layer, a first flat layer and an anode layer are manufactured in sequence, and the anode layer includes a plurality of independent anodes; L4 can be electrically connected to the anode through a via hole penetrating the first flat layer; after manufacturing the anode layer, a PDL layer (pixel definition layer), an organic light-emitting functional layer and a cathode layer can also be manufactured in sequence.

[0207] In at least one embodiment of the present invention, the cathode layer may cover the entire effective display area, and the cathode layer may be overlapped with the first voltage line through the anode layer in the non-display area of ​​the display substrate, so that the cathode of the light-emitting element is electrically connected to the first voltage line, but the present invention is not limited thereto. Optionally, the first voltage line may be arranged around the effective display area, but the present invention is not limited thereto.

[0208] In at least one embodiment of the present invention, a first gate insulating layer may be provided between the active layer and the first gate metal layer, a second gate insulating layer may be provided between the first gate metal layer and the second gate metal layer, and an interlayer dielectric layer may be provided between the second gate metal layer and the first source and drain metal layer, but the present invention is not limited thereto.

[0209] exist Figure 4 In at least one embodiment shown, the initial data line and the initialization voltage line are both formed in the second gate metal layer, but the present invention is not limited thereto.

[0210] When the display substrate includes Figure 4 In at least one embodiment of the pixel circuit shown, the initial data line and the initialization voltage line both extend along the first direction, for example, the first direction may be a horizontal direction, then the multiple rows of initial data line portions included in the initial data line also extend along the first direction, and the multiple rows of initialization voltage line portions included in the initialization voltage line also extend along the first direction. Outside the effective display area of ​​the display substrate, an initial data line for providing an initial data voltage and an initialization voltage line for providing an initialization voltage may be provided, the initial data line and the initialization voltage line may be arranged on the first side and / or the second side of the display substrate (the first side may be the left side, and the second side may be the right side), at least part of the lines included in the initial data line and at least part of the lines included in the initialization voltage line may extend along the second direction (the second direction may be, for example, a vertical direction), each row of initial data line portions may extend along the first direction until electrically connected to the initial data line, and each row of initialization voltage line portions may extend along the first direction until electrically connected to the initialization voltage line.

[0211] And because of Figure 4 In at least one embodiment shown, the second voltage line extends along the second direction, and the second voltage line includes multiple voltage line portions extending along the second direction. Therefore, the second voltage line for providing a second voltage signal can be arranged on the side of the effective display area of ​​the display substrate close to the driving chip. For example, the second voltage line can be arranged on the lower side of the display substrate, but is not limited to this.

[0212] Optionally, the second voltage routing portion may include a second voltage routing portion extending along the first direction and a first voltage routing portion extending along the second direction, the second voltage routing portion being used to electrically connect multiple voltage routing portions included in the second voltage line (for example, when the second voltage routing portion is arranged on the lower side of the display substrate, each voltage routing portion included in the second voltage line may extend downward along the second direction to be electrically connected to the second voltage routing portion), a first end of the first voltage routing portion is electrically connected to the second voltage routing portion, and a second end of the first voltage routing portion is directly electrically connected to the driving chip to receive a second voltage signal provided by the driving chip.

[0213] exist Figure 4 In at least one embodiment shown, R1 and R2 are different initialization control lines. In actual operation, R1 and R2 may also be the same initialization control line.

[0214] like Fig.10At least one embodiment of the pixel circuit shown is Figure 4 At least one embodiment of the pixel circuit shown is different in that: a second source-drain metal layer is provided on a side of the first source-drain metal layer away from the substrate, the initial data line extends along a second direction, that is, the extension direction of the initial data line is the same as the extension direction of the display data line, and the second source-drain metal layer is patterned to form each initial data line portion included in the initial data line. Fig.10 Among them, the portion labeled D021 is the first initial data line portion included in the initial data line.

[0215] Fig.10 The structure of the active layer in Figure 5 As shown, Fig.10 The structure of the first gate metal layer in Figure 6 As shown, Fig.10 The structure of the second gate metal layer in Fig.11 As shown, Fig.10 The via diagram in Fig.12 As shown, Fig.10 The structure of the first source and drain metal layer is shown in Fig. 9 As shown, Fig.10 The structure of the second source and drain metal layer is shown in FIG. Fig.13 shown.

[0216] like Fig. 9 , Figure 10-13 As shown, L6 is electrically connected to D021 through H11, as shown in FIG. Fig.10 As shown, the extending direction of D021 is the same as the extending direction of D01.

[0217] Fig.10 The connection relationship between the other components in Figure 4 The connection relationship of each component in is the same.

[0218] When the display substrate includes multiple rows and columns such as Fig.10 In at least one embodiment of the pixel circuit shown, the pixel circuits in the same column can be electrically connected to the same initial data line portion, and the pixel circuits in the same row can be electrically connected to the same initialization voltage line portion.

[0219] exist Fig.10 In at least one embodiment shown, R1 and R2 are different initialization control lines. In actual operation, R1 and R2 may also be the same initialization control line. The display device described in the embodiment of the present invention includes the above-mentioned display substrate.

[0220] In a specific implementation, the display device described in at least one embodiment of the present invention may further include a driving chip and an initial data wiring, a first voltage wiring, and a second voltage wiring arranged outside the effective display area of ​​the base substrate;

[0221] The initial data routing line includes a first initial data routing line portion directly electrically connected to the driving chip;

[0222] The first voltage line includes a first voltage line portion directly electrically connected to the driver chip, and the second voltage line includes a first voltage line portion directly electrically connected to the driver chip;

[0223] The first initial data wiring portion is disposed between the first voltage wiring portion and the first voltage wiring portion.

[0224] In at least one embodiment of the present invention, the first initial data wiring portion is arranged between the first voltage line portion and the first voltage wiring portion, the first voltage line portion is used to provide a first voltage signal, and the first voltage wiring portion is used to provide a second voltage signal, and the first voltage signal and the second voltage signal are both DC voltage signals, so as not to interfere with the initial data voltage on the first initial data wiring portion.

[0225] Optionally, the driver chip can be arranged on a COF (chip on film) or directly bonded to a base substrate, and the COF can be attached to the side of the display substrate, but is not limited thereto. The driver chip can be used to provide a first voltage signal, a second voltage signal, an initialization voltage, and an initial data voltage.

[0226] In at least one embodiment of the present invention, the base substrate may be a flexible substrate or a rigid substrate, and the driving chip may be bound to the base substrate using COP (Chip On Pi, COP is a technology in which the chip is bound to a flexible substrate) technology or COG (Chip On Glass, COG is a technology in which the chip is directly bound to a glass surface) technology.

[0227] Optionally, the first initial data wiring portion, the first voltage wiring portion, and the first voltage wiring portion all extend along the second direction, but the present invention is not limited thereto;

[0228] The second direction is the direction in which the display data lines extend.

[0229] In at least one embodiment of the present invention, the display device may further include a driving chip and an initial data wiring, an initialization voltage wiring, a first voltage wiring, and a second voltage wiring arranged outside the effective display area of ​​the base substrate;

[0230] The initial data routing line includes a first initial data routing line portion directly electrically connected to the driving chip;

[0231] The initialization voltage wiring includes a first initialization voltage wiring portion directly electrically connected to the driving chip;

[0232] The first voltage line includes a first voltage line portion directly electrically connected to the driver chip, and the second voltage line includes a first voltage line portion directly electrically connected to the driver chip;

[0233] The first initialization voltage wiring portion, the first initial data wiring portion, the first voltage line portion, and the first voltage wiring portion are sequentially arranged along a direction approaching the effective display area.

[0234] In a specific implementation, if space is limited, the first initial data wiring portion may also be arranged between the first initialization voltage wiring portion and the first voltage line portion.

[0235] like Fig.14 As shown, when the extension direction of the initialization voltage line and the extension direction of the initial data line are the same as the extension direction of the gate line (the extension direction of the gate line is the first direction), the display substrate described in at least one embodiment of the present invention further includes an initial data line, an initialization voltage line, a gate driving circuit 140, a first voltage line, and a second voltage line arranged outside the effective display area A0;

[0236] The second voltage wiring includes a second voltage wiring portion L22 extending along the first direction and a first voltage wiring portion L21 extending along the second direction, the second voltage wiring portion L22 is used to electrically connect a plurality of voltage wiring portions included in the second voltage line (when the second voltage wiring is arranged on the lower side of the display substrate, each voltage wiring portion included in the second voltage line can extend downward along the second direction to be electrically connected to the second voltage wiring portion), a first end of the first voltage wiring portion L21 is electrically connected to the second voltage wiring portion L22, and a second end of the first voltage wiring portion L21 is directly electrically connected to the driving chip 141 to receive a second voltage signal provided by the driving chip 141;

[0237] The initial data line includes a first initial data line portion L31 extending along the second direction, a second initial data line portion L32 arranged at the left side of the effective display area A0, and a third initial data line portion L33 for electrically connecting L31 and L32; L32 can extend along the second direction; each initial data line portion included in the initial data line is directly electrically connected to the second initial data line portion L32; L31, L32 and L33 are an integrated structure; L31 is directly electrically connected to the driving chip 141 to receive the second voltage signal provided by the driving chip 141;

[0238] The initialization voltage wiring includes a first initialization voltage wiring portion L41 extending along the second direction, and a second initialization voltage wiring portion L42 arranged on the left side of the effective display area A0, L41 and L42 are directly electrically connected; L41 and L42 are an integral structure; L41 is directly electrically connected to the driving chip 141, and the driving chip 141 is used to provide an initialization voltage to L41; L42 also extends along the second direction;

[0239] The gate driving circuit 140 is disposed on a side of L42 away from the effective display area A0; the gate driving circuit 140 may be electrically connected to a plurality of rows of gate lines;

[0240] The first voltage line includes a first voltage line portion L51 directly electrically connected to the driving chip 141, a second voltage line portion L52 disposed on the left side of the effective display area A0, and a third initial data wiring portion L53 for electrically connecting L51 and L52; L51 and L52 extend along the second direction, and L53 extends along the first direction; the driving chip 141 provides a first voltage signal to L51;

[0241] In actual operation, the first voltage line may be arranged on each side of the display substrate where the driving chip is not arranged, and the first voltage line is electrically connected to the driving chip to receive the first voltage signal provided by the driving chip, but the present invention is not limited thereto;

[0242] Furthermore, an initial data wiring, an initialization voltage wiring, and a second voltage wiring may also be disposed on the right side of the effective display area, but the present invention is not limited thereto.

[0243] In at least one embodiment of the present invention, the initialization voltage line can be set in the same layer and material as the initialization voltage line, the initial data line can be set in the same layer and material as the initial data line, and the second voltage line can be set in the same layer and material as the second voltage line, but is not limited to this.

[0244] In at least one embodiment of the present invention, the first voltage line may be made of the first source-drain metal layer or the second source-drain metal layer, but is not limited thereto.

[0245] exist Fig.14 In at least one embodiment shown, L42 and L32 can be set in the same layer and the same material, and L42 is electrically connected to the initialization voltage line in the effective display area through a jumper to avoid the connection line between L42 and the initialization voltage line in the effective display area from overlapping with L32 to avoid a short circuit.

[0246] like Fig.15As shown, when the extension direction of the initialization voltage line is the same as the extension direction of the gate line, and the extension direction of the initial data line is the same as the extension direction of the display data line (the extension direction of the gate line is the first direction, and the extension direction of the display data line is the second direction), the display substrate described in at least one embodiment of the present invention further includes an initial data routing, an initialization voltage routing, a gate driving circuit 140, a first voltage line, and a second voltage routing, which are arranged outside the effective display area A0;

[0247] The initial data wiring is arranged below the effective display area A0 (that is, the initial data wiring is arranged on the lower side of the display substrate);

[0248] The initial data routing line includes a first initial data routing line portion L31 extending along the second direction, a second initial data routing line portion L32 extending along the first direction, and a third initial data routing line portion L33 for electrically connecting L31 and L32; L33 extends along the second direction; L31 is directly electrically connected to the driving chip 141 to receive a second voltage signal provided by the driving chip 141;

[0249] The second voltage wiring is arranged below the effective display area A0 (that is, the second voltage wiring is arranged on the lower side of the display substrate), the second voltage wiring includes a second voltage wiring portion L22 extending along the first direction and a first voltage wiring portion L21 extending along the second direction, the second voltage wiring portion L22 is used to electrically connect a plurality of voltage wiring portions included in the second voltage line, a first end of the first voltage wiring portion L21 is electrically connected to the second voltage wiring portion L22, and a second end of the first voltage wiring portion L21 is directly electrically connected to the driving chip 141 to receive a second voltage signal provided by the driving chip 141; the second voltage wiring portion L22 can be electrically connected to the voltage wiring portion included in the second voltage line in the effective display area A0 through a jumper to avoid overlapping with L32 and short circuit;

[0250] The initialization voltage wiring includes a first initialization voltage wiring portion L41 extending along the second direction, a second initialization voltage wiring portion L42 arranged at the left side of the effective display area A0, and a third initialization voltage wiring portion L43 extending along the first direction for electrically connecting L41 and L42; L41 is directly electrically connected to the driving chip 141, and the driving chip 141 is used to provide an initialization voltage to L41; L42 also extends along the second direction;

[0251] The gate driving circuit 140 is disposed on a side of L41 away from the effective display area A0; the gate driving circuit 140 may be electrically connected to a plurality of rows of gate lines;

[0252] The first voltage line includes a first voltage line portion L51 directly electrically connected to the driving chip 141, a second voltage line portion L52 disposed on the left side of the effective display area A0, and a third initial data wiring portion L53 for electrically connecting L51 and L52; L51 and L52 extend along the second direction, and L53 extends along the first direction; the driving chip 141 provides a first voltage signal to L51;

[0253] In actual operation, the first voltage line may be arranged on each side of the display substrate where the driving chip is not arranged, and the first voltage line is electrically connected to the driving chip to receive the first voltage signal provided by the driving chip, but the present invention is not limited thereto;

[0254] Furthermore, an initialization voltage wiring and a second voltage wiring may also be disposed on the right side of the effective display area, but the present invention is not limited thereto.

[0255] The display device provided in the embodiment of the present invention can be any product or component with a display touch function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, etc.

[0256] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A pixel circuit, comprising a driving circuit, a first light emitting control circuit, a light emitting element, a first initialization circuit and a second initialization circuit; The driving circuit is used to generate a driving current to drive the light-emitting element under the control of its control terminal; the cathode of the light-emitting element is electrically connected to the first voltage line; The first light-emitting control circuit is electrically connected to the light-emitting control line, the drive circuit and the anode of the light-emitting element respectively, and is used to control the connection or disconnection between the drive circuit and the anode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control line; The first initialization circuit is electrically connected to a first initialization control line, the control end of the drive circuit and an initialization voltage line respectively, and is used to control the writing of the initialization voltage provided by the initialization voltage line into the control end of the drive circuit under the control of a first initialization control signal provided by the first initialization control line; The second initialization circuit is electrically connected to the second initialization control line, the anode of the light emitting element and the initial data line respectively, and is used to control the initial data voltage provided by the initial data line to be supplied to the anode of the light emitting element under the control of the second initialization control signal provided by the second initialization control line; The display cycle includes an initialization phase and a data writing phase which are arranged successively. The first initialization circuit is used for controlling, in the initialization phase, under the control of a first initialization control signal provided by the first initialization control line, to write the initialization voltage provided by the initialization voltage line into the control end of the driving circuit; the second initialization circuit is used for controlling, in the data writing phase, under the control of a second initialization control signal, to write the initial data voltage to the anode of the light-emitting element; The pixel circuit further includes a data writing circuit, and the pixel circuit is included in the display panel; the data writing circuit writes the display data voltage on the display data line into the driving circuit under the control of the gate driving signal on the gate line; The lowest display data voltage connected to all pixel circuits in the display panel is greater than a predetermined grayscale voltage, and the initial data voltage is the same as the first voltage provided by the first voltage line; or The minimum display data voltage is less than the predetermined grayscale voltage, the initial data voltage is different from the first voltage, the absolute value of the difference between the initial data voltage and the first voltage is less than a predetermined voltage value, the difference between the initial data voltage and the first voltage is less than the start-up voltage of the light-emitting element, and the predetermined voltage value is a positive value.

2. The pixel circuit according to claim 1, wherein: The second initialization circuit includes a first transistor; A gate of the first transistor is electrically connected to the second initialization control line, a first electrode of the first transistor is electrically connected to the initial data line, and a second electrode of the first transistor is electrically connected to an anode of the light emitting element.

3. The pixel circuit according to claim 1, wherein: The first initialization circuit includes a second transistor; A gate of the second transistor is electrically connected to the first initialization control line, a first electrode of the second transistor is electrically connected to the initialization voltage line, and a second electrode of the second transistor is electrically connected to the control terminal of the driving circuit.

4. The pixel circuit according to any one of claims 1 to 3, wherein: It also includes a second light-emitting control circuit, an energy storage circuit, a data writing circuit and a compensation circuit; the first light-emitting control circuit is electrically connected to the second end of the driving circuit; The second light-emitting control circuit is electrically connected to the light-emitting control line, the second voltage line and the first end of the driving circuit respectively, and is used to control the connection or disconnection between the first end of the driving circuit and the second voltage line under the control of the light-emitting control signal; The energy storage circuit is electrically connected to the control end of the drive circuit and is used to maintain the potential of the control end of the drive circuit; The data writing circuit is electrically connected to the gate line, the display data line and the first end of the driving circuit respectively, and is used to write the display data voltage on the display data line into the first end of the driving circuit under the control of the gate driving signal; The compensation circuit is electrically connected to the gate line, the control end of the drive circuit and the second end of the drive circuit respectively, and is used to control the connection or disconnection between the control end of the drive circuit and the second end of the drive circuit under the control of the gate drive signal.

5. The pixel circuit according to claim 4, wherein: The driving circuit comprises a driving transistor; the gate of the driving transistor is the control terminal of the driving circuit, the first electrode of the driving transistor is the first terminal of the driving circuit, and the second electrode of the driving transistor is the second terminal of the driving circuit; The first light emitting control circuit includes a third transistor; a gate of the third transistor is electrically connected to the light emitting control line, a first electrode of the third transistor is electrically connected to the second electrode of the driving transistor, and a second electrode of the third transistor is electrically connected to the anode of the light emitting element; The second light emitting control circuit comprises a fourth transistor; a gate of the fourth transistor is electrically connected to the light emitting control line, a first electrode of the fourth transistor is electrically connected to the second voltage line, and a second electrode of the fourth transistor is electrically connected to the first electrode of the driving transistor; The energy storage circuit includes a storage capacitor; a first plate of the storage capacitor is electrically connected to the gate of the driving transistor, and a second plate of the storage capacitor is electrically connected to the second voltage line; The data writing circuit comprises a fifth transistor; a gate of the fifth transistor is electrically connected to the gate line, a first electrode of the fifth transistor is electrically connected to the display data line, and a second electrode of the fifth transistor is electrically connected to the first electrode of the driving transistor; The compensation circuit includes a sixth transistor; a gate of the sixth transistor is electrically connected to the gate line, a first electrode of the sixth transistor is electrically connected to the gate of the driving transistor, and a second electrode of the sixth transistor is electrically connected to the second electrode of the driving transistor.

6. A driving method, applied to the pixel circuit according to any one of claims 1 to 5, the driving method comprising: The first initialization circuit controls, under the control of a first initialization control signal, to write an initialization voltage provided by an initialization voltage line into a control terminal of the driving circuit; The second initialization circuit controls the initial data voltage provided by the initial data line to the anode of the light emitting element under the control of the second initialization control signal; The display cycle includes an initialization phase and a data writing phase which are arranged successively, and the driving method includes: In the initialization stage, the first initialization circuit controls the writing of the initialization voltage into the control terminal of the driving circuit under the control of the first initialization control signal; In the data writing stage, the second initialization circuit controls the initial data voltage to the anode of the light emitting element under the control of the second initialization control signal; The pixel circuit further includes a data writing circuit, and the pixel circuit is included in the display panel; the driving method further includes: the data writing circuit writes the display data voltage on the display data line into the driving circuit under the control of the gate driving signal on the gate line; The lowest display data voltage connected to all pixel circuits in the display panel is greater than a predetermined grayscale voltage, and the initial data voltage is the same as the first voltage provided by the first voltage line; or The minimum display data voltage is less than the predetermined grayscale voltage, the initial data voltage is different from the first voltage, the absolute value of the difference between the initial data voltage and the first voltage is less than a predetermined voltage value, the difference between the initial data voltage and the first voltage is less than the start-up voltage of the light-emitting element, and the predetermined voltage value is a positive value. 7 . A display substrate, comprising a base substrate and a pixel circuit according to any one of claims 1 to 5 arranged on the base substrate.

8. The display substrate according to claim 7, wherein: The pixel circuit includes a driving transistor and a storage capacitor; the display substrate also includes an initial data line disposed on the base substrate; The gate of the driving transistor is multiplexed as the first plate of the storage capacitor; The initial data line is provided at the same layer and with the same material as the gate electrode of the driving transistor, or the initial data line is provided at the same layer and with the same material as the second electrode plate of the storage capacitor.

9. The display substrate according to claim 8, wherein: The display substrate further comprises a gate line disposed on the base substrate; An extending direction of the initial data line is the same as an extending direction of the gate line.

10. The display substrate according to claim 7, wherein: The display substrate further comprises a display data line disposed on the base substrate; The initial data line and the display data line are arranged in the same layer and the same material, or the initial data line is arranged on a side of the display data line facing away from the base substrate.

11. The display substrate according to claim 10, wherein: An extending direction of the initial data line is the same as an extending direction of the display data line.

12. The display substrate according to claim 10, wherein: The pixel circuit further includes a first transistor; the display substrate further includes a second initialization control line and an initial data line disposed on the base substrate; The gate of the first transistor and the gate of the driving transistor are arranged in the same layer and the same material, and the gate of the first transistor is electrically connected to the second initialization control line; The first electrode of the first transistor, the second electrode of the first transistor, the first electrode of the driving transistor and the second electrode of the driving transistor are arranged in the same layer and with the same material; A first electrode of the first transistor is electrically connected to the initial data line, and a second electrode of the first transistor is electrically connected to an anode of the light emitting element.

13. The display substrate according to any one of claims 7 to 12, wherein: The pixel circuit includes a driving transistor and a storage capacitor; The gate of the driving transistor is multiplexed as the first plate of the storage capacitor; The initialization voltage line is provided in the same layer and material as the gate of the driving transistor, or the initialization voltage line is provided in the same layer and material as the second plate of the storage capacitor.

14. The display substrate according to claim 13, wherein: The display substrate further comprises a gate line disposed on the base substrate; An extending direction of the initialization voltage line is the same as an extending direction of the gate line.

15. A display device comprising the display substrate according to any one of claims 7 to 14.

16. The display device according to claim 15, wherein: It also includes a driving chip and an initial data wiring, a first voltage wiring and a second voltage wiring arranged outside the effective display area of ​​the base substrate; The initial data routing line includes a first initial data routing line portion directly electrically connected to the driving chip; The first voltage line includes a first voltage line portion directly electrically connected to the driver chip, and the second voltage line includes a first voltage line portion directly electrically connected to the driver chip; The first initial data wiring portion is disposed between the first voltage wiring portion and the first voltage wiring portion.

17. The display device according to claim 16, wherein: The first initial data wiring portion, the first voltage wiring portion and the first voltage wiring portion all extend along a second direction; The second direction is the direction in which the display data lines extend.

18. The display device according to claim 15, wherein: It also includes a driving chip and an initial data wiring, an initialization voltage wiring, a first voltage wiring and a second voltage wiring arranged outside the effective display area of ​​the base substrate; The initial data routing line includes a first initial data routing line portion directly electrically connected to the driving chip; The initialization voltage wiring includes a first initialization voltage wiring portion directly electrically connected to the driving chip; The first voltage line includes a first voltage line portion directly electrically connected to the driver chip, and the second voltage line includes a first voltage line portion directly electrically connected to the driver chip; The first initialization voltage wiring portion, the first initial data wiring portion, the first voltage line portion, and the first voltage wiring portion are sequentially arranged along a direction approaching the effective display area.

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