A method for preparing a solar cell and a solar cell

Abstract

The present invention discloses a method for preparing a solar cell and a solar cell. The preparation method comprises: step 1, texturing a silicon substrate to form a velvet surface; step 2, wet etching a velvet surface of the silicon substrate, and preparing a patterned mask layer on the surface of the wet-etched silicon substrate, wherein the patterned mask layer covers multiple first regions of the silicon substrate, exposes multiple second regions of the silicon substrate, and the second regions are alternately arranged with the first regions; step 3, texturing the second regions again; step 4, removing the patterned mask layer, and arranging a fine grid in the first region. The preparation method can obtain a wet facet having a smaller contact area than the velvet surface by texturing and wet etching the first region corresponding to the fine grid on the silicon substrate, thereby reducing the recombination speed between the silicon substrate surface and the fine grid, and improving the open circuit voltage and photoelectric conversion efficiency of the solar cell.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and in particular to a method for preparing a solar cell and a solar cell. Background Art

[0002] In the existing solar cell manufacturing process, texturing is usually performed on the surface of crystalline silicon to change the smooth surface into a pyramid structure (i.e., velvet). Then, a source-containing mask layer is prepared on the velvet. After a specific area of ​​the source-containing mask layer is opened by laser scanning, the velvet in the specific area can be doped with the element to be diffused, and at the same time, a fine grid is printed on the unopened area (i.e., velvet).

[0003] After the fine grid is printed on the velvet surface, the recombination between the fine grid and the metal of the fine grid will be increased, thereby reducing the open circuit voltage of the solar cell and the photoelectric conversion rate of the solar cell. Summary of the invention

[0004] In view of this, the embodiment of the present invention provides a method for preparing a solar cell and a solar cell. By texture-forming and wet-etching the first area corresponding to the fine grid on the silicon substrate, a wet facet with a smaller contact area than the textured surface can be obtained, which reduces the recombination speed between the silicon substrate surface and the fine grid. At the same time, the wet facet meets the light limiting requirements to effectively improve the open circuit voltage and photoelectric conversion efficiency of the solar cell. At the same time, the preparation method is simple, easy to operate, and has a low preparation cost.

[0005] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0006] In a first aspect, the present invention provides a method for preparing a solar cell, comprising: step one, texturing a silicon substrate to form a velvet surface; step two, wet-etching one of the velvet surfaces of the silicon substrate, and preparing a patterned mask layer on the surface of the silicon substrate after wet etching, wherein the patterned mask layer covers multiple first regions of the silicon substrate and exposes multiple second regions of the silicon substrate, and the second regions are alternately arranged with the first regions; step three, re-texturing the second regions; step four, removing the patterned mask layer and setting a fine grid in the first region.

[0007] In a second aspect, the present invention provides a solar cell obtained based on the above-mentioned preparation method, comprising: a silicon substrate 1, a first region 2 arranged on a surface of the silicon substrate 1, and a second region 3 arranged between two adjacent first regions 2; wherein the first region 2 is obtained by wet etching and is provided with a fine grid; the surface of the second region 3 is a pyramid structure.

[0008] The technical solution of the first aspect of the above invention has the following advantages or beneficial effects: by texturing and wet etching the first area corresponding to the fine gate on the silicon substrate, a wet facet with a smaller contact area than the textured surface can be obtained, thereby reducing the recombination speed between the silicon substrate surface and the fine gate. At the same time, the preparation method is simple, easy to operate, and the preparation cost is low. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a schematic diagram of a cross-sectional structure of a solar cell structure in the prior art;

[0010] Figure 2 is a schematic diagram of the main process of a method for preparing a solar cell according to an embodiment of the present invention;

[0011] Figure 3 is a schematic diagram of a main process of preparing a patterned mask layer according to an embodiment of the present invention;

[0012] Figure 4 is a schematic diagram of a main process of preparing a patterned mask layer according to another embodiment of the present invention;

[0013] Figure 5 is a schematic cross-sectional structure diagram of a solar cell according to an embodiment of the present invention;

[0014] Figure 6 is a top view of a solar cell according to an embodiment of the present invention.

[0015] The reference numerals are as follows:

[0016] 1 Silicon substrate;

[0017] 2. First Area

[0018] 3 Second Area DETAILED DESCRIPTION

[0019] A solar cell is a photoelectric semiconductor wafer that uses sunlight to generate electricity directly. It is also called a "solar chip" or "photovoltaic cell". As long as it is illuminated by light that meets certain illumination conditions, it can instantly output voltage and generate current in the presence of a circuit. In physics, it is called solar photovoltaic (PV), or photovoltaic for short. In order to conveniently and clearly describe the method for preparing a solar cell and the solar cell of the present invention, the following exemplary embodiments of the present invention are described in conjunction with the accompanying drawings, which include various details of the embodiments of the present invention to facilitate understanding, and they should be considered to be merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0020] Existing solar cell structures such as Figure 1 As shown, the surface of the silicon substrate is usually textured to obtain a pyramid structure with a full velvet surface, and then a mask layer is prepared on the velvet surface. Through laser scanning, a part of the mask layer is exposed to the air to further dope P-type or N-type elements in some areas, and print fine grids on the pyramid structure. This method can significantly increase the surface area of ​​the silicon substrate and improve the light trapping effect by changing the surface of the silicon substrate from a smooth surface to a pyramid structure, but the part in contact with the fine grid will undergo a metallization reaction, resulting in a too fast recombination rate between the metal and the silicon substrate, affecting the open circuit voltage of the solar cell. Therefore, the embodiment of the present invention can change the part in contact with the fine grid (i.e., the first area) from a velvet surface to a wet facet through steps one and two, which reduces the contact area while also reducing the comprehensive recombination rate of the surface, and can effectively improve the open circuit voltage and photoelectric conversion efficiency of the solar cell. Furthermore, the embodiment of the present invention can eliminate the damage caused by laser mold opening through the step of re-texturing in step three, and ensure the velvet structure on the second area.

[0021] In one embodiment of the present invention, Figure 2 As shown, this embodiment provides a method for preparing a solar cell, and the preparation method may include the following steps:

[0022] Step S201, texturing the silicon substrate to form a velvet surface;

[0023] Step S202, wet-etching a velvet surface of the silicon substrate, and preparing a patterned mask layer on the surface of the silicon substrate after wet etching, wherein the patterned mask layer covers a plurality of first regions of the silicon substrate and exposes a plurality of second regions of the silicon substrate, and the second regions are alternately arranged with the first regions;

[0024] Step S203, re-texturing the second area;

[0025] Step S204, removing the patterned mask layer and setting a fine gate in the first region.

[0026] Among them, the texturing process in step S201 is the usual alkali texturing, and its reaction principle is that in a low concentration of alkaline solution, the surface of the silicon substrate undergoes anisotropic corrosion to produce a dense pyramid-shaped pyramid structure, that is, the pyramid structure of the velvet surface. By texturing the silicon substrate, the mechanical damage layer on the surface of the single crystal silicon substrate can be removed, and the pyramid structure formed at the same time can reduce the light reflectivity. In an optional embodiment, step S201 includes: soaking the silicon substrate in a corrosion solution at 80°C to 85°C for 20 to 25 minutes, and using the anisotropy of the corrosion solution on the silicon substrate to obtain the velvet surface. Among them, the corrosion solution includes an alkaline solution and an additive; further, the alkaline solution may include at least one of sodium hydroxide, potassium hydroxide, sodium silicate and sodium phosphate, such as any one, any two, any three or all four. The additive may include at least one of isopropanol, ammonium thiosulfate and hydrazine hydrate, such as any one, any two or all three. The specific addition concentration of the alkaline solution and the additive can be set according to the actual process requirements, and the present invention is not limited here.

[0027] For the wet etching process in step S202, in an optional embodiment, the silicon substrate includes a relative front surface and a back surface, and a velvet surface of the silicon substrate is wet-etched, including: wet-etching the velvet surface located on the front surface after the silicon substrate is textured. It should be noted that the front surface in the present invention is the side of the solar cell that receives direct sunlight during use, and the back surface is the side that is away from direct sunlight. By wet-etching the front surface after the silicon substrate is textured, the surface area of ​​the side in contact with the fine grid can be reduced, thereby achieving the purpose of improving the open circuit voltage and photoelectric conversion efficiency of the solar cell. In a further optional embodiment, the width of the first region corresponds to the width of the fine grid, and the width of the second region corresponds to the spacing between adjacent fine grids. By setting the width of the first region and the second region, it can be ensured that only the first region of the wet facet is in contact with the fine grid, while the second region of the velvet structure is not in contact with the fine grid.

[0028] Wet etching is a technique of etching by immersing the etching material in an etching solution. The etching process can usually be completed with the help of a chain wet etching machine. For wet etching, an acidic aqueous solution is usually selected as the etching solution. In an optional embodiment, the etching solution selected for wet etching includes the following components by mass: 30 to 40 parts of nitric acid, 30 to 40 parts of hydrofluoric acid, and 30 parts of deionized water. For example, nitric acid can be 30 parts, 32 parts, 34 parts, 36 parts, 38 parts, and 40 parts, and hydrofluoric acid can be 30 parts, 32 parts, 34 parts, 36 parts, 38 parts, and 40 parts. By immersing the silicon substrate in the etching solution, the velvet surface on the surface of the silicon substrate is etched and wet facets are generated. Compared with the velvet surface of the pyramid structure, wet etching can corrode the sharp edges and corners of the pyramid structure to obtain a smoother wet facet with a smaller surface area.

[0029] It should be noted that although etching can be performed on a smooth silicon substrate in theory, the inventors have found through exploration that after etching on a smooth silicon substrate, what is obtained is almost still a smooth plane, and no uneven wet facets can be obtained. Therefore, it is very necessary to perform the texturing in step S201 before wet etching. Wet faceting not only facilitates a firm connection with the fine grid, but also reduces the metal compound between the fine grid and the silicon substrate, which is beneficial to improving the open circuit voltage and photoelectric conversion rate of the solar cell.

[0030] In a further optional embodiment, the reaction conditions of wet etching are affected by the concentration of the etching solution, the reaction time, the number of etchings, whether stirring, etc. Therefore, the present invention does not limit the specific reaction conditions, but only limits the etching results, that is, the mass of the silicon substrate after wet etching is reduced by 0.3 to 0.4 g compared with the mass of the silicon substrate before wet etching. Through wet etching, a small amount of silicon substrate can be dissolved in the etching solution to achieve the effect of reducing the mass of the silicon substrate.

[0031] It should be noted that the patterned mask layer in the embodiment of the present invention is used to protect the wet facet of the first area, and at the same time distinguish the first area from the second area, so as to re-texture the second area not covered by the patterned mask layer, that is, patterning can distinguish the first area and the second area, and the mask layer can protect the wet facet. Therefore, there can be multiple components of the mask layer as long as they play a protective role.

[0032] In an optional embodiment, silicon oxide is used as a mask layer, and the step of preparing a patterned mask layer on the surface of the wet-etched silicon substrate in step S202 is as follows: Figure 3 As shown, it may include:

[0033] Step S301: thermally oxidizing the wet-etched silicon substrate at 700° C. to 850° C. for 15 to 25 minutes to prepare a mask layer with a thickness of 10 to 20 nm and made of silicon oxide;

[0034] Step S302: using laser to remove part of the mask layer to obtain a patterned mask layer.

[0035] Among them, the temperature can be set to any value between 700℃ and 850℃, such as 700℃, 750℃, 800℃ or 850℃; the thermal oxidation time can be set to any value between 15 and 25min, such as 15min, 18min, 20min, 22min or 25min; the thickness of the silicon oxide mask layer can also be any value between 10 and 20nm, such as 10nm, 12nm, 15nm, 18nm or 20nm.

[0036] In another optional embodiment, silicon nitride is used as the mask layer, and the step of preparing a patterned mask layer on the surface of the wet-etched silicon substrate in step S202 is as follows: Figure 4 As shown, it may include:

[0037] Step S401: using plasma enhanced chemical vapor deposition at a temperature of 350° C. to 450° C. to deposit on the wet-etched silicon substrate to form a mask layer with a thickness of 60 to 80 nm and made of silicon nitride;

[0038] Step S402: using laser to remove part of the mask layer to obtain a patterned mask layer.

[0039] Among them, plasma chemical vapor deposition (PCVD) refers to the technology of using plasma to activate the reaction gas to promote chemical reaction on the surface of the substrate or near the surface space to form a solid film. Silane and ammonia can be activated by radio frequency voltage, and react to deposit a silicon nitride mask layer on the surface of the silicon substrate, that is, deposit a thin film. The temperature can be set to any value between 350 and 450°C, such as 350°C, 400°C, 420°C or 450°C; the thickness of the silicon nitride mask layer can also be any value between 60 and 80nm, such as 60nm, 62nm, 65nm, 70nm, 75nm or 80nm.

[0040] In order to ensure that a patterned mask layer can be obtained, it is necessary to use a laser to remove the mask layer corresponding to the second area from the fully covered mask layer, while retaining the mask layer corresponding to the first area. However, for mask layers of different components, the thickness prepared at different reaction temperatures is also different, so the laser removal process is also slightly different. In an optional embodiment, green light or purple light is used to perform a line scan on the portion of the mask layer opposite to the second area, with a scanning speed of 5 to 7 m / s, a pulse width of 35 to 400 μm, and a scanning number of 110 to 150 times to remove part of the mask layer and expose the second area. It should be noted that the depth of laser scanning of different colors is different. In order to remove mask layers of different thicknesses on the second area, the laser color of the appropriate depth can be selected according to the actual thickness of the mask layer, and at the same time, by setting different scanning speeds and different scanning times, the mask layer on the second area can be completely removed as much as possible to obtain the final patterned mask layer.

[0041] In an optional embodiment, after step S202, before re-texturing the second region in step S203, the second region may be polished, specifically comprising: placing the silicon substrate with the patterned mask layer in a tetramethylammonium hydroxide liquid or a potassium hydroxide solution or a sodium hydroxide solution for polishing to obtain a second region with a smooth surface; wherein the polishing temperature is 80°C to 90°C and the polishing time is 10 to 15 minutes. By polishing the second region, the damage to the second region caused by laser scanning can be removed, and a smoother upper surface can be obtained, which is conducive to improving the texturing effect of subsequent re-texturing.

[0042] In an optional embodiment, the silicon substrate after step three is immersed in a hydrofluoric acid aqueous solution with a mass concentration of 40% to 45% to remove the patterned mask layer. After removing the patterned mask layer and before setting a fine gate in the first area, the method provided in the embodiment of the present invention may also include: setting a lightly doped layer on the surface of the silicon substrate, and scanning the first area with a laser to obtain a heavily doped first area and a lightly doped second area. In which, due to the high temperature generated during the laser scanning process, the molecular activity at the scanning location can be increased, so as to achieve the purpose of driving the elements in the lightly doped layer into the silicon substrate, that is, to increase the concentration of the doping elements at the scanning location to obtain a heavily doped first area. In an optional embodiment, for the selection of laser, it is also possible to select from a variety of colors of lasers according to actual needs, and the present invention is not limited to this.

[0043] In summary, the method for preparing a solar cell provided in an embodiment of the present invention can obtain a wet facet having a smaller contact area than the velvet surface by texturing and wet etching the first area corresponding to the fine grid on the silicon substrate, thereby reducing the recombination rate between the silicon substrate surface and the fine grid. And because the second area is re-textured after the second area is removed from the fully covered mask layer by laser, the damage caused by laser mold opening can be effectively removed by texturing, thereby increasing the service life of the battery. Moreover, the preparation method provided in an embodiment of the present invention is simple, easy to operate, and has a low preparation cost.

[0044] The present invention provides Figure 5 and Figure 6 The schematic diagram of the cross-sectional structure and the top view structure of the solar cell is shown. Figure 5 The cross-sectional structure of a solar cell according to an embodiment of the present invention is shown, and the relative positional relationship among a silicon substrate 1, a first region 2 disposed on a surface of the silicon substrate 1, and a second region 3 disposed between two adjacent first regions 2 is given. Figure 6 The top view structure of the solar cell is shown, and the relative position relationship between the first region and the second region corresponding to the fine grid is given.

[0045] like Figure 5 and Figure 6 As shown, a solar cell according to an embodiment of the present invention may include a silicon substrate 1, a first region 2 disposed on a surface of the silicon substrate 1, and a second region 3 disposed between two adjacent first regions 2; wherein the surface of the first region 2 is a wet facet corresponding to the region where the fine gate is located; the surface of the second region 3 is a pyramid structure, i.e., a velvet structure. By velveting and wet-etching the first region corresponding to the fine gate on the silicon substrate, a wet facet with a smaller contact area than the velvet can be obtained, thereby reducing the recombination speed between the silicon substrate surface and the fine gate. Figure 6 It can be seen from the top view that the width of the first region 2 corresponds to the width of the fine grid, which is represented by w in the figure, and the width of the second region 3 corresponds to the spacing between adjacent fine grids. The distance between the center lines of adjacent fine grids is represented by d, and the width of the second region 3 is dw.

[0046] In summary, by providing a first region 2 with a wet facet surface and a second region 3 with a pyramid structure on a surface of a silicon substrate 1, the surface in contact with the fine grid can be changed from a pyramid structure to a wet facet structure, thereby reducing the contact area, thereby reducing the recombination speed between the silicon substrate surface and the fine grid, and improving the open circuit voltage of the solar cell. And because the second region is re-textured after being removed from the fully covered mask layer by laser, the damage caused by laser mold opening can be effectively removed by texturizing, thereby improving the service life of the battery.

[0047] Example 1

[0048] A method for manufacturing a solar cell, characterized by comprising:

[0049] Step 1: alkaline texturing is performed on the P-type silicon substrate to form a pyramid structure on the surface of the silicon substrate;

[0050] Step 2: Place the silicon substrate into a chain wet etching machine and wet-etch the front surface of the silicon substrate after texturing; wherein the etching solution includes 36 parts by mass of nitric acid, 34 parts by mass of hydrofluoric acid and 30 parts by mass of deionized water, and the weight loss of the silicon substrate after wet etching is 0.35 grams;

[0051] Step 3: Place the wet-etched silicon substrate into a furnace tube for high-temperature thermal oxidation at a reaction temperature of 830° C. for 20 minutes to prepare a 15 nm mask layer made of silicon oxide;

[0052] Step 4: Use green light (wavelength 532 nanometers) to perform line scanning on the portion of the mask layer corresponding to the second area. The laser power is 20 watts, the scanning speed is 7 meters per second, the pulse width is 60 microns, and the scan is 120 times. Each adjacent line overlaps by 2 microns to obtain multiple second areas with a width of approximately 1.5 mm and a patterned mask layer covering the first area and the second area.

[0053] Step 5, immersing the laser-treated silicon substrate in a polishing liquid to polish the second area; wherein the polishing liquid includes 80 parts by weight of tetramethylammonium hydroxide liquid and 20 parts by weight of deionized water, the polishing temperature is 85° C., and the polishing time is 15 minutes;

[0054] Step 6: Soak the polished silicon substrate in a 82°C corrosion solution for 20 minutes. <100> The second region is re-textured by anisotropic etching in the direction; wherein the etching solution includes a mixed solution of 10 parts by mass of sodium hydroxide and 1 part by mass of isopropyl alcohol;

[0055] Step 7, immersing the re-textured silicon substrate in a hydrofluoric acid aqueous solution with a mass concentration of 40%, and removing the patterned mask layer corresponding to the first region whose material is silicon oxide;

[0056] Step eight, a lightly doped layer containing phosphorus is provided on the surface of the silicon substrate, phosphorus silicon glass is formed on the front side of the silicon substrate, and at the same time, the first area is scanned by laser to obtain a heavily doped first area and a lightly doped second area to form a PN junction;

[0057] Step nine, wet etching the back surface of the P-type silicon substrate after texturing to remove the side junction and the back junction; wherein the etching solution selected for the wet etching includes 30 parts by mass of nitric acid, 40 parts by mass of hydrofluoric acid and 30 parts by mass of deionized water;

[0058] Step 10, immersing the silicon substrate in a hydrofluoric acid solution with a mass concentration of 30% to remove the phosphosilicate glass on the front side of the silicon substrate in step 8;

[0059] Step 11, preparing a passivation anti-reflection layer on the front surface and the back surface of the silicon substrate, wherein the passivation anti-reflection layer is silicon nitride with a thickness of 75 nm and a refractive index of 2.15;

[0060] Step twelve: arrange a fine gate and a main gate interconnected therewith in the first region, and perform corresponding metallization on the back surface of the silicon substrate.

[0061] The prepared solar cells were sintered and tested. The specific test data are as follows:

[0062]

[0063] Among them, the comparison scheme is a conventional P-type SE cell, and the difference between its preparation process and Example 1 includes that the first region is a solar cell prepared by velvet, Isc represents short-circuit current, Voc represents open-circuit voltage, FF represents fill factor, Rs represents series resistance, Rsh represents parallel resistance, and Eta represents efficiency. Compared with velvet, wet faceting can bring about a 3mV increase in open-circuit voltage, indicating that the recombination rate at the interface is effectively reduced. At the same time, through the comparison of the efficiency of the final battery, it can be seen that Example 1 has improved performance compared with the P-type SE cell in the comparison scheme.

[0064] Example 2

[0065] A method for manufacturing a solar cell, characterized by comprising:

[0066] Step 1: alkaline texturing is performed on the P-type silicon substrate to form a pyramid structure on the surface of the silicon substrate;

[0067] Step 2: Place the silicon substrate into a chain wet etching machine and wet-etch the front surface of the silicon substrate after texturing; wherein the etching solution includes 36 parts by mass of nitric acid, 34 parts by mass of hydrofluoric acid and 30 parts by mass of deionized water, and the weight loss of the silicon substrate after wet etching is 0.35 grams;

[0068] Step 3: using plasma chemical vapor deposition to prepare a mask layer made of silicon nitride on the surface of the wet-etched silicon substrate, wherein the reaction temperature is 430° C., the reaction time is 20 min, and the thickness of the patterned mask layer is 75 nm;

[0069] Step 4: Use green light (wavelength 532 nanometers) to perform line scanning on the portion of the silicon nitride mask layer corresponding to the second area. The laser power is 35 watts, the scanning speed is 7 meters per second, the pulse width is 40 microns, and the scan is 150 times. Each adjacent line overlaps by 2 microns, obtaining multiple second areas with a width of approximately 1.2 mm and a patterned mask layer covering the first area and the second area.

[0070] Step 5, immersing the laser-treated silicon substrate in a polishing liquid to polish the second area; wherein the polishing liquid includes 80 parts by weight of tetramethylammonium hydroxide liquid and 20 parts by weight of deionized water, the polishing temperature is 85° C., and the polishing time is 15 minutes;

[0071] Step 6: Soak the polished silicon substrate in a 82°C corrosion solution for 20 minutes. <100> The second region is re-textured by anisotropic etching in the direction; wherein the etching solution includes a mixed solution of 10 parts by mass of sodium hydroxide and 1 part by mass of isopropanol;

[0072] Step 7, immersing the re-textured silicon substrate in a hydrofluoric acid aqueous solution with a mass concentration of 45%, and removing the patterned mask layer corresponding to the first region whose material is silicon nitride;

[0073] Step eight, a lightly doped layer containing phosphorus is provided on the surface of the silicon substrate, phosphorus silicon glass is formed on the front side of the silicon substrate, and the first region is scanned by laser to obtain a heavily doped first region and a lightly doped second region to form a PN junction;

[0074] Step nine, wet etching the back surface of the P-type silicon substrate after texturing to remove the side junction and the back junction; wherein the etching solution selected for the wet etching includes 30 parts by mass of nitric acid, 40 parts by mass of hydrofluoric acid and 30 parts by mass of deionized water;

[0075] Step 10, immersing the silicon substrate in a hydrofluoric acid solution with a mass concentration of 30% to remove the phosphosilicate glass on the front side of the silicon substrate in step 8;

[0076] Step 11, preparing a passivation anti-reflection layer on the front surface and the back surface of the silicon substrate, wherein the passivation anti-reflection layer is silicon nitride with a thickness of 75 nm and a refractive index of 2.15;

[0077] Step twelve: arrange a fine gate and a main gate interconnected therewith in the first region, and perform corresponding metallization on the back surface of the silicon substrate.

[0078] The introduction provided in the above steps is only used to help understand the structure, method and core idea of ​​the present invention. For ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also belong to the scope of protection of the claims of the present invention.

Claims

1. A method for preparing a solar cell, characterized in that: include: Step 1: texturing the silicon substrate with an alkaline solution to form a pyramid-structured texture surface; Step 2: wet-etching one of the velvet surfaces of the silicon substrate using an acidic aqueous solution, and preparing a patterned mask layer on the wet facet formed by the wet-etched silicon substrate, wherein the patterned mask layer covers a plurality of first regions of the silicon substrate and exposes a plurality of second regions of the silicon substrate, and the second regions are alternately arranged with the first regions; Step 3, re-texturing the second area with an alkaline solution to form a velvet surface with a pyramid structure; Step 4, removing the patterned mask layer and setting a fine gate in the first area; Wherein, after the step 2 and before the step 3, the method further includes: polishing the silicon substrate having the patterned mask layer to obtain a second region with a smooth surface.

2. The method according to claim 1, characterized in that The silicon substrate comprises a front surface and a back surface opposite to each other, and the step 2 of wet etching one of the velvet surfaces of the silicon substrate comprises: The textured surface located on the front surface of the silicon substrate after the texture is formed is wet-etched.

3. The method according to claim 1, characterized in that The etching solution used in the wet etching process includes the following components in parts by mass: 30-40 parts of nitric acid, 30-40 parts of hydrofluoric acid and 30 parts of deionized water; and / or, The mass of the silicon substrate after wet etching is reduced by 0.3 to 0.4 g compared with the mass of the silicon substrate before wet etching.

4. The method according to claim 1, characterized in that: The method of preparing a patterned mask layer on the surface of a silicon substrate after wet etching comprises: Thermally oxidizing the wet-etched silicon substrate at 700° C. to 850° C. for 15 to 25 minutes to prepare a mask layer of silicon oxide with a thickness of 10 to 20 nm; Using laser to remove part of the mask layer to obtain the patterned mask layer; or, Plasma enhanced chemical vapor deposition is used to deposit a silicon substrate after wet etching at a temperature of 350° C. to 450° C. to prepare a mask layer with a thickness of 60 to 80 nm and made of silicon nitride; A portion of the mask layer is removed by using laser to obtain the patterned mask layer.

5. The method according to claim 4, characterized in that The method of removing part of the mask layer by laser comprises: Green light or purple light is used to perform line scanning on the portion of the mask layer corresponding to the second region, with a scanning speed of 5 to 7 m / s, a pulse width of 35 to 400 μm, and a scanning number of 110 to 150 times, so as to remove part of the mask layer and expose the second region.

6. The method according to claim 1, characterized in that The step of polishing the silicon substrate having the patterned mask layer to obtain a second region with a smooth surface comprises: The silicon substrate with the patterned mask layer is placed in tetramethylammonium hydroxide liquid, potassium hydroxide solution or sodium hydroxide solution for polishing to obtain a second area with a smooth surface; wherein the polishing temperature is 80° C. to 90° C. and the polishing time is 10 to 15 minutes.

7. The method according to claim 1, characterized in that The removing of the patterned mask layer comprises: The silicon substrate after step three is immersed in a hydrofluoric acid aqueous solution with a mass concentration of 40% to 45% to remove the patterned mask layer.

8. The method according to claim 1, characterized in that The width of the first region corresponds to the width of the fine gates, and the width of the second region corresponds to the interval between adjacent fine gates.

9. The method according to claim 1, characterized in that: After removing the patterned mask layer and before setting the fine gate in the first region, the method further includes: setting a lightly doped layer on the surface of the silicon substrate, scanning the first region with a laser to obtain a heavily doped first region and a lightly doped second region; And / or, the texturing of the silicon substrate to form a velvet surface comprises: The silicon substrate is placed in a corrosion solution at 80° C. to 85° C. and immersed for 20 to 25 minutes to obtain the velvet surface; The corrosion solution includes an alkaline solution and an additive; the alkaline solution includes at least one of sodium hydroxide, potassium hydroxide, sodium silicate and sodium phosphate; and the additive includes at least one of isopropyl alcohol, ammonium thiosulfate and hydrazine hydrate.

10. A solar cell obtained by the preparation method according to any one of claims 1 to 9, characterized in that: include: A silicon substrate (1), a first region (2) arranged on a surface of the silicon substrate (1), and a second region (3) arranged between two adjacent first regions (2); The first region (2) is obtained by wet etching, and the surface is a wet facet, which is provided with a fine grid; The surface of the second region (3) is a velvet surface with a pyramid structure.

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