Fault phase identification method and device for converter control system containing series compensation device

Abstract

The present application discloses a method and device for distinguishing the fault phase of a converter control system containing a series compensation device, the method comprising: injecting a high-frequency harmonic signal into the converter control system to be tested; extracting the harmonic current at the protection installation of the converter control system to be tested, and extracting the positive sequence component, negative sequence component and zero sequence component of the harmonic current; distinguishing the fault phase according to the amplitude of the positive sequence component, negative sequence component and zero sequence component of the harmonic current and the phase difference between them, combined with a preset phase selection criterion. The present application injects a harmonic signal, extracts the harmonic current at the protection installation through an FFT algorithm, and performs fault phase selection using the phase relationship of the harmonic current sequence components. Since the capacitive reactance of the series compensation capacitor decreases with increasing frequency, while the line impedance and the synchronous machine impedance increase with increasing frequency, the fault phase distinguishing method provided by the present application has good performance in a system containing a series compensation device.

Description

Technical Field

[0001] The present application relates to the technical field of relay protection, and in particular to a method and device for distinguishing a fault phase of a converter control system including a series compensation device. Background Art

[0002] At present, most of my country's large-capacity new energy stations, such as photovoltaic power stations and wind power stations, are located in remote areas in the west. In order to improve the transmission capacity of the stations, series compensation devices (series compensation devices) are often installed at the end of their transmission lines. However, the traditional protection principle relies on the sequence impedance characteristics of the system. Unlike the equivalent sequence impedance phase of the transmission line and the synchronous machine, which is approximately 90°, the series compensation device presents obvious capacitive reactance characteristics, which may cause some traditional protections to have adaptability problems in systems containing series compensation.

[0003] At present, the research on the impact of series compensation devices on traditional protection is mainly focused on distance protection. Among them, some studies point out that the capacity of the series compensation device may cause the "transient overrun" phenomenon based on the power frequency distance protection, and some studies point out the impact of the connection of the series compensation device on the longitudinal protection, and put forward corresponding improvement schemes. However, there is no prior art to study the impact of the connection of the series compensation device on the phase selection element. In practical applications, whether it is for the sequence current phase selection element or the sequence voltage phase selection element, its protection principle depends on the characteristic that the sequence impedance phase of the system element is approximately 90°. When there is a series compensation device in the system, this feature will be destroyed. Therefore, when the traditional phase selection element contains a series compensation device, it is easy to misjudge the normal phase of the system as a fault phase. At present, there is no solution for this situation. Summary of the invention

[0004] The purpose of the present application is to provide a method and device for identifying a faulty phase in a converter control system containing a series compensation device, so as to solve the problem that the performance of phase selection elements in the existing converter control system containing a series compensation device is degraded, and even phase selection failure is prone to occur.

[0005] To achieve the above-mentioned purpose, the present application provides a method for identifying a fault phase of a converter control system including a series compensation device, comprising:

[0006] Injecting high-frequency harmonic signals into the control system of the converter to be tested;

[0007] Extract the harmonic current at the protection installation location of the converter control system to be tested, and extract the positive sequence component, negative sequence component and zero sequence component of the harmonic current;

[0008] The fault phase is identified based on the amplitudes of the positive-sequence component, negative-sequence component and zero-sequence component of the harmonic current and the phase difference between them, combined with the preset phase selection criteria.

[0009] Further, preferably, the fault phase is determined based on the amplitudes of the positive sequence component, the negative sequence component and the zero sequence component of the harmonic current and the phase difference between them, combined with a preset phase selection criterion, including:

[0010] The positive sequence component, negative sequence component and zero sequence component of harmonic current are respectively denoted as and

[0011] when and The magnitudes are less than When the fault is 5%, the fault type is judged to be a three-phase symmetrical fault;

[0012] when The magnitude is less than and Amplitude greater than When , the fault type is determined to be the first phase-to-phase fault;

[0013] when The amplitude and The magnitudes are greater than When , the fault type is determined to be a single-phase fault or a second phase-to-phase fault.

[0014] Further, as a preferred embodiment, the method for identifying a faulty phase of a converter control system including a series compensation device further comprises:

[0015] When the fault type is the first phase fault, calculate and Phase difference:

[0016] like Then the fault type is determined to be BC fault;

[0017] like Then the fault type is determined to be a CA fault;

[0018] like Then the fault type is determined to be AB fault;

[0019] When the fault type is a single-phase fault or a second phase fault, calculate and and Phase difference:

[0020] like and Then the fault type is determined to be AG fault;

[0021] like and Then the fault type is determined to be a BCG fault;

[0022] like and Then the fault type is determined to be a BG fault;

[0023] like and Then the fault type is determined to be a CAG fault;

[0024] like and Then the fault type is determined to be a CG fault;

[0025] like and The fault type is determined to be ABG fault.

[0026] Further, preferably, the injecting high-frequency harmonic signal into the control system of the converter to be tested comprises:

[0027] The harmonic electrical reference value is superimposed on the PWM link of the converter control system to realize the injection of high-frequency harmonic signals.

[0028] Further, as a preferred embodiment, the method for identifying a faulty phase of a converter control system including a series compensation device further comprises:

[0029] An improved phase-locked loop is used to realize decoupling control of power frequency electrical quantities and harmonic electrical quantities of injected high-frequency harmonic signals in a converter control system; wherein the high-frequency harmonic signal is a high-frequency high-order harmonic signal.

[0030] Further, preferably, a full-wave Fourier algorithm is used to extract the harmonic components of the harmonic current.

[0031] Further, preferably, the extracting of the positive sequence component, the negative sequence component and the zero sequence component of the harmonic current includes:

[0032] The positive sequence component, negative sequence component and zero sequence component of harmonic current are extracted by Park transformation; wherein, Park transformation matrix C Park for:

[0033]

[0034] Among them, θ is the common point voltage phase calculated by the phase-locked loop.

[0035] The present application also provides a fault phase identification device for a converter control system including a series compensation device, comprising:

[0036] A high-frequency harmonic injection unit, used for injecting high-frequency harmonic signals into the control system of the converter to be tested;

[0037] A harmonic component extraction unit is used to extract the harmonic current at the protection installation location of the converter control system to be tested, and to extract the positive sequence component, negative sequence component and zero sequence component of the harmonic current;

[0038] The fault phase identification unit is used to identify the fault phase according to the amplitudes of the positive sequence component, negative sequence component and zero sequence component of the harmonic current and the phase difference between them, combined with the preset phase selection criteria.

[0039] The present application also provides a terminal device, including:

[0040] one or more processors;

[0041] A memory, coupled to the processor, for storing one or more programs;

[0042] When the one or more programs are executed by the one or more processors, the one or more processors implement the fault phase identification method of the converter control system containing a series compensation device as described in any one of the above items.

[0043] The present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the method for distinguishing a fault phase of a converter control system containing a series compensation device as described in any one of the above items is implemented.

[0044] Compared with the prior art, the beneficial effects of this application are:

[0045] This application comprehensively considers the fault sequence network characteristics of the series compensation system, the decoupling of power frequency electrical quantities and harmonic electrical quantities in active harmonic injection control, and the impact of harmonic frequency on protection performance. First, a control strategy that can inject harmonics into the power system is designed. Then, combined with the full fault network constructed by harmonic components, the phase relationship of the sequence components of the current at the protection installation under different fault types is derived, and the phase selection criterion is proposed. When a system fault occurs, fault phase selection can be achieved by calculating the phase difference of the harmonic current sequence components at the protection installation.

[0046] The present application realizes the injection of harmonic signals by adjusting the control strategy of the converter, extracts the harmonic current at the protection installation through the FFT algorithm, and uses the phase relationship of the harmonic current sequence components to select the fault phase. Since the capacitive reactance of the series compensation capacitor decreases with the increase of frequency, while the line impedance and the synchronous machine impedance increase with the increase of frequency, the fault phase identification method of the present application has good performance in the system containing the series compensation device. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solution of the present application, the drawings required for use in the implementation manner will be briefly introduced below. Obviously, the drawings described below are only some implementation manners of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0048] Figure 1 It is a flowchart of a method for distinguishing a fault phase of a converter control system including a series compensation device provided in a certain embodiment of the present application;

[0049] Figure 2 This is a schematic diagram of a 175MW photovoltaic system constructed in the PSCAD software provided in a certain embodiment of the present application;

[0050] Figure 3 is a control block diagram of active harmonic injection provided by a certain embodiment of the present application;

[0051] Figure 4 is a flow chart of a phase selection element provided in a certain embodiment of the present application;

[0052] Figure 5 It is a structural schematic diagram of a fault phase identification device of a converter control system including a series compensation device provided in a certain embodiment of the present application;

[0053] Figure 6 It is a structural diagram of a terminal device provided in a certain embodiment of the present application. DETAILED DESCRIPTION

[0054] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0055] It should be understood that the step numbers used in this document are only for convenience of description and are not intended to limit the order in which the steps are executed.

[0056] It should be understood that the terms used in this application specification are only for the purpose of describing specific embodiments and are not intended to limit the application. As used in this application specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0057] The terms “include” and “comprising” indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0058] The term "and / or" means and includes any and all possible combinations of one or more of the associated listed items.

[0059] See also Figure 1In one embodiment of the present application, a method for identifying a fault phase in a converter control system including a series compensation device is provided. Figure 1 As shown, the fault phase identification method of the converter control system including the series compensation device includes steps S10 to S30. The specific steps are as follows:

[0060] S10. Injecting a high-frequency harmonic signal into the control system of the converter to be tested.

[0061] See also Figure 2 , Figure 2 A schematic diagram of a 175MW photovoltaic system built in PSCAD software is provided, including a converter station system (converter control system) and a synchronous machine system. In this step, during a system fault, a harmonic voltage signal, i.e., a harmonic electrical reference value, is superimposed on the pulse width modulation (PWM) link of the converter control system to achieve injection of high-frequency harmonic signals.

[0062] Further, Figure 3 The proposed active harmonic control block diagram is shown, based on Figure 3 The control strategy shown in Figure 1 injects harmonic signals into the converter control system during a fault. They are the power frequency signal components of the common point of the converter station respectively; the superscript * represents the reference value of the corresponding component; and Represents the reference value of the positive and negative sequence components of the power frequency voltage; u k Represents the reference value of the injected harmonic component.

[0063] In one embodiment, an improved phase-locked loop is used to realize decoupling control of power frequency electrical quantities and harmonic electrical quantities of injected high-frequency harmonic signals in a converter control system. Preferably, the high-frequency harmonic signal is a high-frequency high-order harmonic signal, thereby reducing the impact of the series compensation device in the line on the protection performance.

[0064] S20, extracting the harmonic current at the protection installation location of the control system of the converter to be tested, and extracting the positive sequence component, negative sequence component and zero sequence component of the harmonic current.

[0065] In this step, the full-wave Fourier algorithm is used to extract the harmonic components of the harmonic current.

[0066] In a specific implementation, taking the system power frequency signal of 50 Hz and the injected harmonic signal of 200 Hz as an example, a time window of at least 20 ms is required to accurately extract the 200 Hz signal, which is extracted using a full wave Fourier transform (FFT) algorithm.

[0067] Furthermore, the positive sequence component, negative sequence component and zero sequence component of the harmonic current are extracted by using Park transformation; wherein the Park transformation matrix C Park for:

[0068]

[0069] Among them, θ is the common point voltage phase calculated by the phase-locked loop.

[0070] S30, according to the amplitudes of the positive sequence component, the negative sequence component and the zero sequence component of the harmonic current and the phase difference between them, combined with the preset phase selection criterion, the fault phase is determined.

[0071] In this step, by comparing the amplitudes of the positive sequence component, negative sequence component and zero sequence component, their phase difference is calculated, and the fault phase selection is completed in combination with the judgment criteria. The specific flow chart is as follows Figure 4 As shown, the specific steps include:

[0072] The positive sequence component, negative sequence component and zero sequence component of harmonic current are respectively denoted as and

[0073] when and The magnitudes are less than When the fault is 5%, the fault type is judged to be a three-phase symmetrical fault;

[0074] when The magnitude is less than and Amplitude greater than When , the fault type is determined to be the first phase-to-phase fault;

[0075] when The amplitude and The magnitudes are greater than When , the fault type is determined to be a single-phase fault or a second phase-to-phase fault.

[0076] In a specific implementation manner, when the fault type is a first phase-to-phase fault, the calculation and Phase difference:

[0077] like Then the fault type is determined to be BC fault;

[0078] like Then the fault type is determined to be a CA fault;

[0079] like Then the fault type is determined to be AB fault;

[0080] In a specific implementation, when the fault type is a single-phase fault or a second phase-to-phase fault, the calculation and and Phase difference:

[0081] like and Then the fault type is determined to be AG fault;

[0082] like and Then the fault type is determined to be a BCG fault;

[0083] like and Then the fault type is determined to be a BG fault;

[0084] like and Then the fault type is determined to be a CAG fault;

[0085] like and Then the fault type is determined to be a CG fault;

[0086] like and The fault type is determined to be ABG fault.

[0087] In summary, the fault phase identification method of the converter control system containing a series compensation device provided in the embodiment of the present application realizes the injection of harmonic signals by adjusting the control strategy of the converter, extracts the harmonic current at the protection installation through the FFT algorithm, and performs fault phase selection using the phase relationship of the harmonic current sequence components. Since the capacitive reactance of the series compensation capacitor decreases with increasing frequency, while the line impedance and the synchronous machine impedance increase with increasing frequency, the fault phase identification method of the present application has good performance in a system containing a series compensation device.

[0088] See also Figure 5 A certain embodiment of the present application further provides a fault phase identification device of a converter control system including a series compensation device, comprising:

[0089] A high-frequency harmonic injection unit 01 is used to inject a high-frequency harmonic signal into the control system of the converter to be tested;

[0090] The harmonic component extraction unit 02 is used to extract the harmonic current at the protection installation of the control system of the converter to be tested, and extract the positive sequence component, negative sequence component and zero sequence component of the harmonic current;

[0091] The fault phase identification unit 03 is used to identify the fault phase according to the amplitudes of the positive sequence component, negative sequence component and zero sequence component of the harmonic current and the phase difference between them, combined with the preset phase selection criteria.

[0092] In one embodiment, the fault phase identification unit 03 is further used for:

[0093] The positive sequence component, negative sequence component and zero sequence component of harmonic current are respectively denoted as and

[0094] when and The magnitudes are less than When the fault is 5%, the fault type is judged to be a three-phase symmetrical fault;

[0095] when The magnitude is less than and Amplitude greater than When , the fault type is determined to be the first phase-to-phase fault;

[0096] when The amplitude and The magnitudes are greater than When , the fault type is determined to be a single-phase fault or a second phase-to-phase fault.

[0097] When the fault type is the first phase fault, calculate and Phase difference:

[0098] like Then the fault type is determined to be BC fault;

[0099] like Then the fault type is determined to be a CA fault;

[0100] like Then the fault type is determined to be AB fault;

[0101] When the fault type is a single-phase fault or a second phase fault, calculate and and Phase difference:

[0102] like and Then the fault type is determined to be AG fault;

[0103] like and Then the fault type is determined to be a BCG fault;

[0104] like and Then the fault type is determined to be a BG fault;

[0105] like and Then the fault type is determined to be a CAG fault;

[0106] like and Then the fault type is determined to be a CG fault;

[0107] like and The fault type is determined to be ABG fault.

[0108] In one embodiment, the high-frequency harmonic injection unit 01 is further used to superimpose a harmonic electrical reference value on a PWM link of a converter control system to achieve injection of a high-frequency harmonic signal.

[0109] In one embodiment, the high-frequency harmonic injection unit 01 is also used to use an improved phase-locked loop to achieve decoupling control of the industrial frequency electrical quantity and the harmonic electrical quantity of the injected high-frequency harmonic signal in the converter control system; wherein the high-frequency harmonic signal is a high-frequency high-order harmonic signal.

[0110] In one embodiment, the harmonic component extraction unit 02 is further configured to extract the harmonic components of the harmonic current using a full-wave Fourier algorithm.

[0111] In one embodiment, the harmonic component extraction unit 02 is further used to extract the positive sequence component, negative sequence component and zero sequence component of the harmonic current using Park transformation; wherein the Park transformation matrix C Park for:

[0112]

[0113] Among them, θ is the common point voltage phase calculated by the phase-locked loop.

[0114] It can be understood that the fault phase identification device of the converter control system containing the series compensation device provided in the embodiment of the present application is used to execute the fault phase identification method of the converter control system containing the series compensation device as described in any of the above embodiments, and achieve the same effect as the method, which will not be further elaborated here.

[0115] See also Figure 6 , a certain embodiment of the present application provides a terminal device, including:

[0116] one or more processors;

[0117] A memory, coupled to the processor, for storing one or more programs;

[0118] When the one or more programs are executed by the one or more processors, the one or more processors implement the method for identifying the fault phase of the converter control system containing the series compensation device as described above.

[0119] The processor is used to control the overall operation of the terminal device to complete all or part of the steps of the fault phase identification method of the converter control system containing the series compensation device. The memory is used to store various types of data to support the operation of the terminal device, and these data may include, for example, instructions for any application or method used to operate on the terminal device, and data related to the application. The memory can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (Static Random Access Memory, referred to as SRAM), electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, referred to as EEPROM), erasable programmable read-only memory (Erasable Programmable Read-Only Memory, referred to as EPROM), programmable read-only memory (Programmable Read-Only Memory, referred to as PROM), read-only memory (Read-Only Memory, referred to as ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0120] In an exemplary embodiment, the terminal device can be implemented by one or more application specific integrated circuits (Application Specific 1n Integrated Circuit, ASC), digital signal processors (Digital Signal Processor, DSP), digital signal processing devices (Digital Signal Processing Device, DSPD), programmable logic devices (Programmable Logic Device, PLD), field programmable gate arrays (Field Programmable Gate Array, FPGA), controllers, microcontrollers, microprocessors or other electronic components, and is used to execute the fault phase identification method of the converter control system containing a series compensation device as described in any of the above embodiments, and achieve the technical effect consistent with the above method.

[0121] In another exemplary embodiment, a computer-readable storage medium including a computer program is further provided, and when the computer program is executed by a processor, the steps of the method for distinguishing the fault phase of a converter control system including a series compensation device as described in any of the above embodiments are implemented. For example, the computer-readable storage medium may be the above-mentioned memory including the computer program, and the above-mentioned computer program may be executed by a processor of a terminal device to complete the method for distinguishing the fault phase of a converter control system including a series compensation device as described in any of the above embodiments, and achieve the technical effect consistent with the above-mentioned method.

[0122] The above is a preferred embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications are also considered to be within the scope of protection of the present application.

Claims

1. A method for identifying a faulty phase in a converter control system including a series compensation device, characterized in that: include: Injecting high-frequency harmonic signals into the control system of the converter to be tested; Extract the harmonic current at the protection installation location of the converter control system to be tested, and extract the positive sequence component, negative sequence component and zero sequence component of the harmonic current; According to the amplitudes of the positive sequence component, negative sequence component and zero sequence component of the harmonic current and the phase difference between them, the fault phase is identified in combination with the preset phase selection criteria; The method of determining the fault phase according to the amplitudes of the positive sequence component, the negative sequence component and the zero sequence component of the harmonic current and the phase difference between the two components in combination with a preset phase selection criterion includes: The positive sequence component, negative sequence component and zero sequence component of harmonic current are respectively denoted as and when and The magnitudes are less than When the fault is 5%, the fault type is judged to be a three-phase symmetrical fault; when The magnitude is less than and Amplitude greater than When , the fault type is determined to be the first phase-to-phase fault; when The amplitude and The magnitudes are greater than When , the fault type is determined to be a single-phase fault or a second phase-to-phase fault.

2. The method for identifying faulty phases in a converter control system including a series compensation device according to claim 1, characterized in that: Also includes: When the fault type is the first phase fault, calculate and Phase difference: like Then the fault type is determined to be BC fault; like Then the fault type is determined to be a CA fault; like Then the fault type is determined to be AB fault; When the fault type is a single-phase fault or a second phase fault, calculate and and Phase difference: like and Then the fault type is determined to be AG fault; like and Then the fault type is determined to be a BCG fault; like and Then the fault type is determined to be a BG fault; like and Then the fault type is determined to be a CAG fault; like and Then the fault type is determined to be a CG fault; like and The fault type is determined to be ABG fault.

3. The method for identifying faulty phases in a converter control system including a series compensation device according to claim 1, characterized in that: The step of injecting a high-frequency harmonic signal into the control system of the converter to be tested comprises: The harmonic electrical reference value is superimposed on the PWM link of the converter control system to realize the injection of high-frequency harmonic signals.

4. The method for identifying faulty phases in a converter control system including a series compensation device according to claim 3, characterized in that: Also includes: An improved phase-locked loop is used to realize decoupling control of power frequency electrical quantities and harmonic electrical quantities of injected high-frequency harmonic signals in a converter control system; wherein the high-frequency harmonic signal is a high-frequency high-order harmonic signal.

5. The method for identifying faulty phases in a converter control system including a series compensation device according to claim 1, characterized in that: The harmonic components of the harmonic current are extracted using a full-wave Fourier algorithm.

6. The method for identifying faulty phases in a converter control system including a series compensation device according to claim 1, characterized in that: The method of extracting the positive sequence component, the negative sequence component and the zero sequence component of the harmonic current includes: The positive sequence component, negative sequence component and zero sequence component of harmonic current are extracted by Park transformation; wherein, Park transformation matrix C Park for: Among them, θ is the common point voltage phase calculated by the phase-locked loop.

7. A fault phase identification device for a converter control system including a series compensation device, characterized in that: include: A high-frequency harmonic injection unit, used for injecting high-frequency harmonic signals into the control system of the converter to be tested; A harmonic component extraction unit is used to extract the harmonic current at the protection installation location of the control system of the converter to be tested, and to extract the positive sequence component, negative sequence component and zero sequence component of the harmonic current; A fault phase identification unit is used to identify the fault phase according to the amplitudes of the positive sequence component, negative sequence component and zero sequence component of the harmonic current and the phase difference between them, combined with a preset phase selection criterion; The fault phase identification unit is further used for: The positive sequence component, negative sequence component and zero sequence component of harmonic current are respectively denoted as and when and The magnitudes are less than When the fault is 5%, the fault type is judged to be a three-phase symmetrical fault; when The magnitude is less than and Amplitude greater than When , the fault type is determined to be the first phase-to-phase fault; when The amplitude and The magnitudes are greater than When , the fault type is determined to be a single-phase fault or a second phase-to-phase fault.

8. A terminal device, characterized in that: include: one or more processors; A memory, coupled to the processor, for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the fault phase identification method of the converter control system containing a series compensation device as described in any one of claims 1-6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method for identifying a faulty phase of a converter control system containing a series compensation device as described in any one of claims 1 to 6 is implemented.

Images