A method and system for identifying newly added defects of a wafer
By dividing wafer samples into regions and performing distributed computing, new defects on the wafers are identified, solving the problem of low identification efficiency in existing technologies. This achieves efficient defect identification and timely feedback, meeting the needs of high-volume wafer processing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANGHAI ZHONGYI CLOUD COMPUTING TECH CO LTD
- Filing Date
- 2022-07-15
- Publication Date
- 2026-06-02
AI Technical Summary
Existing technologies are inefficient in identifying new defects in wafers, especially when scanning multiple wafers simultaneously, which results in excessive computational load and makes in-depth analysis difficult. They also fail to provide timely feedback on machine problems, leading to production losses.
By dividing wafer samples into regions, establishing sub-tasks, and utilizing distributed computing, new defects are identified, including computing management, defect data grouping, task construction and allocation, thereby optimizing the utilization of computing resources.
It improves the efficiency of new defect identification, reduces the amount of invalid data processing, adapts to high-volume and high-standard wafer processing environments, and enables timely defect feedback and production quality control.
Smart Images

Figure CN115170524B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method and system for identifying new defects in wafers. Background Technology
[0002] In semiconductor wafer fabrication, a series of processes including single crystal pulling, slicing, grinding, polishing, layer addition, photolithography, doping, heat treatment, probe testing, and dicing can all introduce defects into the wafer surface through chemical vapor deposition, optical development, and chemical mechanical polishing. These defects directly affect the wafer's lifespan and reliability.
[0003] Because wafers consist of multiple structural layers, each layer may exhibit different wafer defects. Defect analysis systems need to compare wafer defects (or defect points) in adjacent layers and identify newly added defects in the current structural layer to determine if there is a preceding process influence (i.e., the impact of the processing step corresponding to the previous structural layer on the current processing step). However, this is a time-consuming operation, especially when multiple wafers are scanned simultaneously on the machine, placing a significant computational load on the system. In actual operation, identifying newly added defects is a particularly time-consuming step. Timeliness is crucial in wafer defect analysis; timely detection and feedback to the machine can prevent defects from recurring and avoid substantial production losses.
[0004] For example, Chinese patent application CN201210464156.6 discloses a method and system for monitoring the quality of semiconductor equipment. This application obtains the number of newly added defects between two processes by comparing the previous value data (i.e., the number of defects) monitored in the previous process with the subsequent value data (i.e., the number of defects) monitored in the next process. However, this method generates an overlay image for calculation, which is slow. Furthermore, this method can only perform calculations on a single wafer basis, and its efficiency is not ideal when multiple wafers are scanned simultaneously. Since this method also involves image processing, significant errors may occur when defects are very close together. In addition, the result obtained by this method is the number of newly added defects, which can only be used to simply determine whether the equipment is abnormal, but cannot provide a deeper analysis of the specific abnormalities. Summary of the Invention
[0005] To partially solve or alleviate the above-mentioned technical problems, the present invention provides a method for identifying new defects in a wafer, comprising:
[0006] The first defect data group corresponding to at least one wafer sample is obtained through the computing management terminal. The first defect data group includes: first defect information of the wafer sample obtained under several defect detection devices, and the several defect detection devices are respectively used to detect the defect information of the wafer sample after different processing steps.
[0007] The wafer sample is divided into several sub-regions, and the first defect data group is grouped into several second defect data groups based on the several sub-regions. The second defect data group includes: defect information obtained by the same sub-region under different defect detection devices.
[0008] Several sub-tasks are established based on several sets of the second defect data, and the sub-tasks are used to identify new defects that appear in the wafer sample after at least one processing step.
[0009] Based on the computational complexity and priority of the subtask, at least one of the subtasks is assigned to a corresponding computing node;
[0010] After the subtask is completed, the calculation result of the corresponding computing node is obtained.
[0011] Furthermore, in some embodiments, the calculation results include information on at least one newly added defect.
[0012] Furthermore, in some embodiments, the size of the sub-region is the same as or similar to the size of the die of the wafer sample.
[0013] Furthermore, in some embodiments, the computing management terminal monitors the usage of the computing nodes through heartbeat detection.
[0014] Furthermore, in some embodiments, the first defect information includes a defect image reflecting the defect information of the wafer sample.
[0015] Furthermore, in some embodiments, the first defect information includes: structured data reflecting the defect information of the wafer sample.
[0016] Furthermore, in some embodiments, the first defect information further includes the coordinates of the defect.
[0017] Furthermore, in some embodiments, the subtask includes: a primary task; correspondingly, the step of establishing several subtasks based on several second defect data groups includes:
[0018] Multiple second defect data groups are grouped on a single wafer sample basis; and a primary task is established based on the second defect data groups belonging to the same wafer sample, the primary task being applied to identify new defects on a single wafer sample.
[0019] Furthermore, in some embodiments, the subtask further includes a secondary task; correspondingly, the method further includes:
[0020] The primary task is broken down into multiple secondary tasks, which are used to identify new defects in one or more of the sub-regions.
[0021] Furthermore, in some embodiments, the step of establishing several sub-tasks based on several sets of second defect data includes:
[0022] Valid information is obtained from multiple second defect data groups. When no defect features are reflected in the second defect data group, the corresponding second defect data group is determined to be invalid information. When the second defect data reflects the presence of defect features, the corresponding second defect data group is determined to be valid information.
[0023] And based on the effective information, several sub-tasks are established.
[0024] Furthermore, in some embodiments, the step of assigning at least one of the subtasks to the corresponding computing nodes includes:
[0025] Obtain the computational cost of the subtask;
[0026] Obtain the computation threshold of the computing node;
[0027] The subtasks are assigned to the corresponding computing nodes based on the computational complexity of the subtasks and the computational threshold of each computing node.
[0028] A second aspect of the present invention is that, corresponding to the above method, a system for identifying new defects in a wafer is also provided, comprising: a connected computing management terminal and multiple computing nodes;
[0029] The computing management terminal includes:
[0030] The first information acquisition module is configured to acquire a first defect data group corresponding to at least one wafer sample through a computing management terminal. The first defect data group includes: first defect information acquired by the wafer sample under several defect detection devices, and the several defect detection devices are respectively used to detect the defect information of the wafer sample after different processing steps.
[0031] The defect data grouping module is configured to divide the wafer sample into several sub-regions, and group the first defect data group into several second defect data groups based on the several sub-regions, wherein the second defect data group includes: defect information obtained by the same sub-region under different defect detection devices;
[0032] The task construction module is configured to establish a plurality of subtasks based on a plurality of second defect data sets, the subtasks being used to identify new defects that appear in the wafer sample after at least one processing step;
[0033] The task allocation module is configured to allocate at least one of the subtasks to a corresponding computing node based on the computational load and priority of the subtasks.
[0034] The result acquisition module is configured to acquire the calculation result of the corresponding computing node after the subtask has been executed.
[0035] Furthermore, in some embodiments, the calculation results include information on at least one newly added defect.
[0036] Beneficial effects
[0037] With the gradual improvement of semiconductor processing technology and the market's higher requirements for wafer capacity and quality, the number of wafers processed per unit time in the wafer manufacturing process has greatly increased. Correspondingly, the amount of wafer inspection data (such as wafer defect data) output within the same timeframe has also increased significantly. Therefore, in order to ensure the timeliness of new defect identification (and to promptly feed the analysis results of defect information back to the processing equipment) and to ensure that the yield in the wafer production process remains within the standard range, higher requirements are placed on the efficiency and accuracy of wafer inspection data analysis.
[0038] The method proposed in this invention first refines the defect data calculation dimension by dividing the wafer sample into regions. It then compares defect data from the same region (e.g., die) on the same wafer at different processing stages to more effectively identify newly added defects in specific regions. Furthermore, this more refined comparison method does not sacrifice recognition efficiency. On the contrary, based on the regional division of defect information, this invention effectively reduces the amount of invalid data processing (only requiring comparison by sub-region as the comparison unit). In other words, the regional division of defect information reduces the complexity of the solution. On the other hand, considering the divided data dimensions, this application prioritizes distributed computing to split and reorganize the more finely divided defect information into multiple sub-tasks. This allows for simultaneous identification of newly added defects in multiple die regions on the wafer, resulting in higher identification efficiency and better adaptability to high-volume, high-standard wafer processing environments. In other words, this invention improves the efficiency of newly added defect identification by combining appropriate regional division of the wafer sample with the application of distributed technology.
[0039] In other words, this application incorporates an adaptive design across two dimensions in the process of identifying new defects. One dimension is the data dimension, which involves dividing the original defect data into regions (e.g., by die) to obtain more refined comparison units. The second dimension is the task processing dimension, which employs distributed technology to construct tasks based on these refined comparison units. This dual-dimensional design collectively achieves higher identification efficiency. Attached Figure Description
[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. The elements or parts in the drawings are not necessarily drawn to scale. Obviously, the drawings described below are some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without any creative effort.
[0041] Figure 1 This is an exemplary embodiment of the present invention, which describes a method for identifying new defects in a wafer.
[0042] Figure 2a This is a partial schematic diagram of the image to be tested of a wafer sample in an exemplary embodiment of the present invention;
[0043] Figure 2b This is a schematic diagram of the region division of the wafer image under test in another exemplary embodiment of the present invention;
[0044] Figure 3 This is a schematic diagram of the method flow in a specific embodiment of the present invention;
[0045] Figure 4 This is a schematic diagram of the device structure of a system for identifying new defects in a wafer, according to an exemplary embodiment of the present invention.
[0046] Figure 5 This is a structural block diagram of an electronic device for identifying new defects in a wafer, according to an exemplary embodiment of the present invention.
[0047] Among them, 1 is a historical defect, 2 is the first newly added defect, 3 is the second newly added defect, 4 is the third newly added defect, and 5 is the fourth newly added defect. Detailed Implementation
[0048] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0049] In this document, suffixes such as "module," "part," or "unit" used to denote elements are used only for the purpose of illustrative purposes and have no specific meaning in themselves. Therefore, "module," "part," or "unit" may be used interchangeably.
[0050] In this article, "wafer" refers to the silicon wafer used in the fabrication of silicon semiconductor integrated circuits. Because of its circular shape, it is called a wafer, also known as a wafer. Various circuit element structures can be fabricated on silicon wafers to create IC products with specific electrical functions. "Wafer sample" refers to a wafer undergoing defect inspection.
[0051] In this article, "newly added defects" refers to wafer defects that appear in the wafer image obtained after the current processing step compared to any previous processing step (such as the last processing step). For example, Figure 2a The first newly added defect 2 shown is a defect newly added to the wafer after step 2 compared to the wafer after step 1.
[0052] In this article, "lot" refers to a basic batch of wafers. For example, 1 lot typically consists of 12 wafers.
[0053] In this article, "die," also known as a bare die or bare chip, refers to a small, unpackaged integrated circuit made of semiconductor material. A die is a very small unit within a wafer, comprising the complete design of a single chip and the adjacent horizontal and vertical dicing areas. Each wafer can produce many square dies, and the shape and size of the dies are predetermined by the engineers during wafer design.
[0054] In this article, "same or similar" means that the values of two items are exactly the same, or that the difference between the two items is very small and has a negligible impact on practical engineering applications. For example, "the size of the sub-region is the same as or similar to the size of the die in the wafer sample" means that the size of the sub-region is the same as the size of the die or the size difference is very small and can be ignored in practical engineering applications.
[0055] Example 1
[0056] See Figure 1 and Figure 3 This invention provides a method for identifying new defects in a wafer, such as... Figure 1 As shown, the method includes the following steps:
[0057] S01: Obtain a first defect data group corresponding to at least one wafer sample through the computing management terminal, wherein the first defect data group includes: first defect information of the wafer sample obtained under several defect detection devices, and the several defect detection devices are respectively used to detect the defect information of the wafer sample after different processing steps;
[0058] S03: Divide the wafer sample into several sub-regions, and group the first defect data group into several second defect data groups based on the several sub-regions. The second defect data group includes: defect information obtained from the same sub-region under different defect detection devices.
[0059] S05: Based on several second defect data sets, establish several sub-tasks, which are used to identify new defects that appear in wafer samples after at least one processing step;
[0060] S07: Based on the computational load and priority of the subtask, assign at least one subtask to the corresponding computing node;
[0061] S09: After the subtask is completed, obtain the calculation result of the corresponding computing node.
[0062] Furthermore, in some embodiments, the calculation result includes information on at least one newly added defect. In this embodiment, the final output information of the identification method is specific information corresponding to each newly added defect (such as the coordinate information of the newly added defect, or the number of the newly added defect, etc.), which is more conducive to engineers performing subsequent defect analysis based on this information.
[0063] Furthermore, in some embodiments, the information of at least one newly added defect is coordinate information. For example, the calculation result includes: the coordinate position of the newly added defect.
[0064] Specifically, in some embodiments, the subtask in step S05 can be used to calculate new defects in the wafer sample at the current processing step compared to any previous processing step. For example, the coordinate information of the defects can be compared to determine whether the defects are new.
[0065] Identifying new defects is crucial, especially for wafer defects with industrial mechanisms and high reproducibility. These defects are usually related to machine malfunctions (e.g., component aging, loosening, etc.) and tend to recur on a batch of wafers, significantly impacting wafer yield. Therefore, defect identification is necessary for each wafer processed by each machine to quickly determine if new defects exist. Based on the information related to these new defects, the corresponding faults can be analyzed to quickly provide feedback to the machine and prevent further production of defects. Specifically, once a new defect is identified on a particular machine, operators can further identify and determine the location of the defect based on its coordinates and analyze the cause of its formation. For example, determining whether the new defect is caused by equipment malfunction, random error, or debris (such as dust) allows for rapid resolution and troubleshooting.
[0066] For example, in some embodiments, the main wafer processing steps include steps 1, 2, 3, 4, and 5. To analyze the processing at different steps, it is necessary to accurately obtain the defects caused on the wafer after each processing step. Specifically, it is necessary to perform defect scanning on the wafers obtained after each processing stage, such as steps 1, 2, 3, 4, and 5, for example, by using defect detection equipment (such as scanning electron microscopes (SEM)). Figure 2a Figures (a), (b), (c), (d), and (e) are shown in the diagram. Figure 2a Figures (a), (b), (c), (d), and (e) are the wafer images to be tested (equivalent to the first defect information) obtained after step 1, step 2, step 3, step 4, and step 5, respectively.
[0067] Furthermore, respectively on Figure 2aMultiple wafer images to be tested are divided into regions. By comparing Figure 2(a) and Figure 2(b), it can be seen that there is a historical defect 1 in Figure 2(a). Compared with the wafer obtained after processing in step 1, the wafer obtained after processing in step 2 has a new defect (i.e., the first new defect 2). Compared with the wafer obtained in step 2, the wafer obtained in step 3 has a second new defect 3. Compared with the wafer obtained in step 3, the wafer obtained in step 4 has a third new defect 4. Compared with the wafer obtained in step 4, the wafer obtained in step 5 has a fourth new defect 5.
[0068] Furthermore, it is necessary not only to compare adjacent processing steps of the wafer, but also to compare the current step with multiple previously executed steps. For example, as Figure 2a As shown, in order to analyze processing step 4 more comprehensively, it is also necessary to obtain information on the defects added to the wafer after step 4 compared to steps 1, 2, and 3 (e.g., the number of defects and the location of defects). Specifically, the wafer obtained in step 4 has a third new defect 3 and a fourth new defect 4 compared to the wafer obtained in step 1. The wafer obtained in step 4 has a third new defect 3 and a fourth new defect 4 compared to the wafers obtained in steps 1 and 3. However, the wafer obtained in step 4 only has a fourth new defect 4 compared to the wafer obtained in step 3.
[0069] It is understandable that, as shown in Figures (a) and (c) of Figure 2, historical defect 1 appears in Figure (a) of Figure 2, but cannot be directly observed in Figure (c) of Figure 2. This is because, in subsequent processing, defects generated by previous processes, such as historical defect 1, may be covered by other structural layers.
[0070] Preferably, in some embodiments, the wafer sample is divided based on the size of the die, and the size of the sub-region is the same as or similar to the size of the die of the wafer sample.
[0071] Preferably, in some embodiments, the defect attributes in the wafer sample (or first defect information) obtained by the defect detection device have already recorded die information (e.g., the die's encoded ID). In this embodiment, the region division method with the die as the smallest unit can both refine the comparison dimensions and collect and organize the refined defect data (e.g., collect and manage defect data based on the die's encoded information).
[0072] Furthermore, in some embodiments, the computing management terminal also periodically or in real time obtains the usage status of computing nodes.
[0073] In some embodiments, usage includes: health status, occupancy status of computing nodes (including enabled and disabled states), and computing threshold.
[0074] Preferably, in some embodiments, the computing management terminal monitors the usage of computing nodes through heartbeat detection.
[0075] For example, in some embodiments, the computing management terminal monitors the health status of computing nodes through heartbeat detection.
[0076] Specifically, in some embodiments, the computing node sends its usage status to the computing management terminal via heartbeat packets in real time or periodically (e.g., every first preset period, such as 1 second or 4 seconds). The usage status includes: the occupancy status of the computing node, which includes two states: enabled and disabled, as well as the computing threshold.
[0077] Furthermore, when a computing node is executing a corresponding subtask, the usage information sent also includes the computing progress of the subtask. In this embodiment, the computing management terminal can obtain the working status of the computing node based on the computing progress of the subtask to determine whether the computing node is operating normally, for example, to determine whether the computing speed of the computing node is normal.
[0078] Specifically, in some embodiments, each computing node periodically sends a heartbeat packet to the computing management terminal. When the computing management terminal receives a heartbeat packet from the computing node within the expected time, it determines that the corresponding computing node is healthy. If the computing management terminal does not receive a heartbeat packet from the computing node within the expected time, it determines that the same computing node is abnormal.
[0079] In this embodiment, the computing management terminal monitors each computing node in real time by receiving heartbeat packets. Specifically, the computing management terminal can dynamically combine the current subtask allocation status with the computing node usage to rationally manage and plan the computing nodes (i.e., computing resources), achieving coordination between task allocation and computing nodes.
[0080] Understandably, multiple compute nodes can be set up on the same server or on different servers.
[0081] For example, in some instances, the computing management terminal determines the health status (or other usage conditions) of computing nodes by receiving heartbeat packets from them. Specifically, multiple computing nodes include: computing node a, computing node b, ..., computing node n. If no heartbeat packet is received from computing node a within a set time I, computing node a is considered to have malfunctioned, and the timer starts from the moment the last heartbeat packet from computing node a is received. If a heartbeat packet from computing node a is received within a set time II, computing node a is considered to have recovered (i.e., is in a healthy state). If no heartbeat packet is received from computing node a within a set time III, starting from the moment the last heartbeat packet from computing node a is received, computing node a malfunctions and sends an instruction to the computing management terminal to activate a new computing node (e.g., computing node b). Furthermore, if there are tasks to be executed on the malfunctioning computing node, the computing management terminal can activate one of the backup computing nodes based on the health status of other computing nodes to continue processing the tasks originally executed on computing node a.
[0082] Furthermore, in some embodiments, the heartbeat packet sending interval is preset, for example, once every 4 seconds. If the computing management terminal does not receive a heartbeat packet from the computing node for more than a set time, such as 6 seconds, it determines that the corresponding computing node is abnormal and starts timing from the last heartbeat packet received from that computing node. Of course, the computing management terminal may not be able to know in time what specific problems have occurred with the computing node. Therefore, in order to ensure the normal progress of the task's computing process, it is preferable to have several contingency plans.
[0083] If the compute node experiences only a brief malfunction and logs back in within a set time (e.g., 6 seconds), the corresponding subtasks will be restored to the original compute node, meaning the compute management terminal can restart the compute node.
[0084] If a compute node experiences a short-term, unrecoverable failure, the compute management system will redistribute the applications running on that compute node to other available compute nodes within a set time period II. Furthermore, to ensure processing efficiency, the abnormal compute node will be forcibly taken offline, i.e., its compute process will be forcibly stopped, preventing the abnormal compute node from consuming excessive computing space.
[0085] Understandably, Time Setting I, Time Setting II, and Time Setting III can all be flexibly set based on specific application scenarios and monitoring timeliness requirements.
[0086] In some embodiments, the first defect information includes a defect image that reflects defect information of the wafer sample.
[0087] For example, in some embodiments, the first defect information may be an image of the defect to be tested corresponding to the wafer, output by a defect detection device (such as a scanning electron microscope).
[0088] In some embodiments, the first defect information includes: structured data reflecting defect information of the wafer sample.
[0089] For example, in some embodiments, the first defect information may be a list of defect data reflecting the results of defect scanning.
[0090] It is understood that the first defect information selected in this embodiment, whether it is the image of the defect to be tested or the structured data information, can be directly obtained by scanning with a defect detection device (such as a scanning electron microscope) without the need for special image processing (such as overlay processing). That is to say, this embodiment can more directly identify new defects based on the relatively original scanning results.
[0091] Of course, the identification method in this embodiment does not exclude the use of some image processing techniques on the obtained defect image to be tested.
[0092] Furthermore, in some embodiments, to improve the efficiency of identifying new defects, before comparing new defects, defects on the wafer have already been preliminarily identified based on the first defect information, thereby initially marking the identified defects on the first defect information. In this embodiment, the first defect information further includes: the coordinate position of the defect.
[0093] For example, in some embodiments, the defect image to be tested is marked with the defect and the corresponding coordinate position of the defect is recorded.
[0094] For example, in some embodiments, the first defect information is presented as a list of defect data (including the coordinates of the defects), which reflects that relevant information such as the coordinates of the defects has already been marked during the initial defect identification process. Specifically, based on the corresponding coordinate pairs, defect data located in the same die region can be grouped into one group (equivalent to a second defect data group).
[0095] In some embodiments, the initial identification of defects can be performed by defect detection equipment.
[0096] Furthermore, in some embodiments, the subtasks include: a primary task; correspondingly, the step of establishing several subtasks based on several second defect data sets includes:
[0097] Multiple second defect data groups are grouped on a per-wafer sample basis;
[0098] A primary task is established based on a second defect data group belonging to the same wafer sample. This primary task is used to identify new defects on a single wafer sample.
[0099] For example, in some embodiments, the second defect data set includes defect information obtained from scanning various sub-regions of a single wafer at different processing stages. In one specific embodiment, the second defect data set includes defect information obtained from scanning a die of a wafer at different processing stages.
[0100] For example, in some embodiments, the established subtask can be used to compute new defects in a lot.
[0101] For example, in some embodiments, the established subtasks can be used to calculate new defects that occur in different processing steps in various sub-regions of a single wafer.
[0102] Furthermore, in some embodiments, the subtask further includes a secondary task; accordingly, the method also includes:
[0103] The primary task is broken down into multiple secondary tasks, which are used to identify new defects in one or more sub-regions.
[0104] For example, in some embodiments, a primary task can be split based on a single decomposition method.
[0105] For example, a secondary task can be used to identify new defects in 10 or 20 dies in a wafer.
[0106] In some embodiments, the step of establishing several sub-tasks based on several second defect data sets includes:
[0107] Valid information is obtained from multiple second defect data groups. When no defect features are reflected in the second defect data group, the corresponding second defect data group is determined to be invalid information. When the second defect data reflects the presence of defect features, the corresponding second defect data group is determined to be valid information.
[0108] And based on the valid information, several sub-tasks are established.
[0109] Unlike traditional approaches in this field, this embodiment employs a more complex independent computation mode (i.e., a sub-region one-to-one comparison mode). However, the independent computation mode used in this embodiment can be closely integrated with the characteristics of the selected distributed computing, thereby effectively ensuring the efficiency of identifying new defects and mitigating the problem of low processing efficiency that may result from the independent computation mode.
[0110] Furthermore, the filtering of valid information in this embodiment can further reduce the amount of invalid data processing and improve recognition efficiency.
[0111] In some embodiments, the priority of subtasks can be set in conjunction with specific business requirements. Under the condition that computing resources (such as the number of computing nodes) are relatively limited, task calculation is performed based on priority.
[0112] For example, sub-tasks corresponding to sub-regions with a relatively high probability of defects in a wafer are set as the first priority, while sub-regions with a relatively low probability of defects in a wafer are set as the second priority.
[0113] For example, subtasks corresponding to key areas of the wafer (i.e., areas with high quality requirements) can be set as first priority, while subtasks corresponding to secondary key areas of the wafer (areas with relatively low quality requirements) can be set as second priority.
[0114] In this embodiment, since the defects generated on the wafer have been divided into regions according to die, the identification of newly added defects in specific regions can be more targeted. For example, in the prior art, when it is necessary to... Figure 2a When determining whether a defect graphic in diagram (b) is a newly added defect, it is necessary to compare the corresponding defect graphic with... Figure 2a The defect patterns appearing in all areas of Figure (a) are compared (specifically, their coordinate positions can be compared). However, in this embodiment, it is only necessary to compare the defect patterns in all areas of the figure. Figure 2a In Figure (b), the defect pattern (such as the first newly added defect 2) can be compared with the previous scan information in its sub-region, without the need for a global comparison. As a result, the efficiency of identifying a single newly added defect is greatly reduced, and correspondingly, the amount of data to be analyzed involved in the identification of the entire new defect is also greatly reduced.
[0115] Furthermore, based on the dimensional characteristics of the defect information after region segmentation, this invention preferably employs distributed computing for task processing. A single wafer can be divided into multiple dies; therefore, for a single wafer, different dies on the wafer can be processed synchronously to further improve the efficiency of identifying new defects.
[0116] In this embodiment, although the defect data of the wafer sample is divided into more detailed dimensions (such as dividing the image of the wafer under test into regions, such as...), Figure 2bAs shown in Figures (a), (b), and (c), this method does not sacrifice the efficiency of identifying new defects, nor does it increase the complexity of the solution. On the contrary, this method effectively reduces the amount of invalid data processing based on the regional division of defect information (only sub-regions need to be compared one by one). In other words, the regional division of defect information actually reduces the complexity of the solution. On the other hand, considering the divided data dimensions, distributed computing is used to split and reorganize the defect information with finer dimensions to obtain multiple sub-tasks. This allows for the simultaneous identification of new defects in multiple die regions on the wafer, resulting in higher efficiency in identifying new defects and making it more adaptable to high-volume, high-standard wafer processing environments.
[0117] Furthermore, in this embodiment, the defect information is divided into valid and invalid categories, such as... Figure 2a As shown in Figures (a) and (b), when identifying new defects, only the sub-regions with defects need to be compared, without comparing sub-regions without defects. This significantly reduces the amount of data to be compared and analyzed.
[0118] For example, in some embodiments, when the first defect information is an image of the wafer under test, the defect feature is a defect pattern. That is, if no defect is identified in one sub-region of the image of the wafer under test, the relevant defect information of that sub-region is determined to be invalid information; if a defect pattern is identified in the corresponding sub-region, the relevant defect information of that sub-region is determined to be valid information.
[0119] For example, in some embodiments, when the first defect information is a list of defect data including defect scanning information, the defect feature is the defect data marked as a defect.
[0120] In some embodiments, the step of assigning at least one subtask to a corresponding computing node includes:
[0121] Obtain the computational cost of the subtask;
[0122] Obtain the computing threshold of the computing node, where the computing threshold is the amount of data that the computing node can process under normal operating conditions;
[0123] Subtasks are assigned to corresponding computing nodes based on the computational complexity of the subtasks and the computational threshold of each computing node.
[0124] Preferably, in some embodiments, the method is implemented through a distributed platform consisting of the Spark development framework and a YARN resource cluster.
[0125] Example 2
[0126] Based on the system for identifying new defects in a wafer proposed in the above embodiments, the present invention also provides a system for identifying new defects in a wafer, comprising: a connected computing management terminal and multiple computing nodes;
[0127] like Figure 4 As shown, the computing management terminal 1 includes:
[0128] The first information acquisition module 11 is configured to acquire a first defect data group corresponding to at least one wafer sample through a computing management terminal. The first defect data group includes: first defect information of the wafer sample acquired by several defect detection devices, and the several defect detection devices are respectively used to detect the defect information of the wafer sample after different processing steps.
[0129] The defect data grouping module 13 is configured to divide the wafer sample into several sub-regions, and group the first defect data group into several second defect data groups based on the several sub-regions. The second defect data group includes: defect information obtained by the same sub-region under different defect detection devices.
[0130] Task building module 15 is configured to build several subtasks based on several second defect data sets. The subtasks are used to identify new defects that appear in the wafer sample after at least one processing step.
[0131] The task allocation module 17 is configured to allocate at least one subtask to a corresponding (preset) computing node based on the computational load and priority of the subtask.
[0132] The result acquisition module 19 is configured to acquire the calculation results of the corresponding computing node after the subtask has been executed.
[0133] Furthermore, in some embodiments, the calculation results include information on at least one newly added defect.
[0134] Furthermore, in some embodiments, the information of at least one newly added defect is coordinate information. For example, the calculation result includes: the coordinate position of the newly added defect.
[0135] Furthermore, in some embodiments, the size of the sub-region is the same as or similar to the size of the die of the wafer sample.
[0136] Furthermore, in some embodiments, the computing management terminal monitors the usage of computing nodes through heartbeat detection.
[0137] In some embodiments, usage includes: health status, occupancy status of computing nodes (including enabled and disabled states), and computing threshold.
[0138] Specifically, in some embodiments, the computing node sends its usage status to the computing management terminal via heartbeat packets in real time or periodically (e.g., every first preset period, such as 1 second or 4 seconds). The usage status includes: the occupancy status of the computing node, which includes two states: enabled and disabled, as well as the computing threshold.
[0139] Furthermore, in some embodiments, the first defect information includes a defect image reflecting defect information of the wafer sample.
[0140] Furthermore, in other embodiments, the first defect information includes structured data that reflects defect information of the wafer sample.
[0141] Furthermore, in some embodiments, the first defect information also includes the coordinates of the defect.
[0142] Furthermore, in some embodiments, the subtask includes: a primary task; correspondingly, the task construction module includes:
[0143] The first grouping unit is configured to group multiple second defect data groups on a per-wafer sample basis;
[0144] The first building unit is configured to establish a primary task based on a second defect data set belonging to the same wafer sample. The primary task is applied to identify new defects on a single wafer sample.
[0145] Furthermore, in some embodiments, the subtask further includes a secondary task; correspondingly, the task construction module further includes:
[0146] The second building unit is configured to split the primary task into multiple secondary tasks, which are used to identify new defects in one or more sub-regions.
[0147] Furthermore, in some embodiments, the task construction module further includes:
[0148] The effective information extraction unit is configured to obtain effective information from multiple second defect data groups. When no defect features are reflected in the second defect data group, the corresponding second defect data group is determined to be invalid information. When defect features are reflected in the second defect data, the corresponding second defect data group is determined to be effective information. Accordingly, the first construction unit establishes several sub-tasks based on the effective information.
[0149] Furthermore, in some embodiments, the task allocation module includes:
[0150] The first information acquisition unit is configured to acquire the computational cost of the subtask;
[0151] The second information acquisition unit is configured to acquire the computing threshold of the computing node;
[0152] The task allocation unit is configured to allocate subtasks to corresponding computing nodes based on the computational cost of the subtasks and the computational threshold of each computing node.
[0153] It is understood that the system provided in this embodiment has the same or similar beneficial technical effects as the methods described above, and will not be repeated here.
[0154] Example 3
[0155] A third aspect of the present invention provides an electronic device, including a memory 502, a processor 501, and a computer program stored in the memory 502 and executable on the processor 501. When the processor 501 executes the program, it implements the steps of the method described above. For ease of explanation, only the parts related to the embodiments of this specification are shown; for specific technical details not disclosed, please refer to the method section of the embodiments of this specification. This electronic device can be any electronic device, including various electronic devices such as PCs, cloud servers, and even mobile phones, tablets, PDAs (Personal Digital Assistants), POS (Point of Sales) terminals, in-vehicle computers, and desktop computers.
[0156] Specifically, Figure 5 The illustrated block diagram of an electronic device configuration related to the technical solutions provided in the embodiments of this specification shows that bus 500 may include any number of interconnected buses and bridges, linking various circuits including one or more processors represented by processor 501 and memory represented by memory 502. Bus 500 may also link various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. Communication interface 503 provides an interface between bus 500 and receiver and / or transmitter 504, which may be separate independent receivers or transmitters or a single element such as a transceiver, providing a unit for communicating with various other devices over a transmission medium. Processor 501 is responsible for managing bus 500 and general processing, while memory 502 may be used to store data used by processor 501 during operation.
[0157] The computer-readable storage medium may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The readable storage medium may also be any readable medium other than a readable storage medium, capable of transmitting, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.
[0158] Program code for performing the operations of this disclosure can be written in any combination of one or more programming languages, including object-oriented programming languages such as Java and C++, and conventional procedural programming languages such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).
[0159] The aforementioned computer-readable medium carries one or more programs. When the one or more programs are executed by a device, the computer-readable medium performs the following functions: acquiring a first defect data group corresponding to at least one wafer sample via a computing management terminal, wherein the first defect data group includes: first defect information acquired by the wafer sample under several defect detection devices, and the several defect detection devices are respectively used to detect defect information of the wafer sample after different processing steps; dividing the wafer sample into several sub-regions, and grouping the first defect data group according to the several sub-regions to obtain several second defect data groups, wherein the second defect data groups include: defect information acquired by the same sub-region under different defect detection devices; establishing several sub-tasks based on the several second defect data groups, the sub-tasks being used to identify new defects appearing in the wafer sample after at least one processing step; allocating at least one sub-task to a corresponding computing node based on the computational load and priority of the sub-tasks; and acquiring the computational result of the corresponding computing node after the sub-task is completed.
[0160] Those skilled in the art will understand that the above modules can be distributed in the device as described in the embodiments, or they can be modified accordingly and placed in one or more devices that are unique to this embodiment. The modules in the above embodiments can be combined into one module, or they can be further divided into multiple sub-modules.
[0161] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk, CD-ROM, USB flash drive, mobile hard drive, etc.) and includes several instructions to cause a computer terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.
[0162] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0163] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.
Claims
1. A method for identifying newly added defects in a wafer, characterized in that, include: The first defect data group corresponding to at least one wafer sample is obtained through the computing management terminal. The first defect data group includes: first defect information of the wafer sample obtained under several defect detection devices, and the several defect detection devices are respectively used to detect the defect information of the wafer sample after different processing steps. The wafer sample is divided into several sub-regions, and the first defect data group is grouped into several second defect data groups based on the several sub-regions. The second defect data group includes: defect information obtained by the same sub-region under different defect detection devices. Several sub-tasks are established based on several sets of the second defect data, and the sub-tasks are used to identify new defects that appear in the wafer sample after at least one processing step. Based on the computational complexity and priority of the subtask, at least one of the subtasks is assigned to a corresponding computing node; The step of assigning at least one of the subtasks to the corresponding computing nodes includes: Obtain the computational cost of the subtask; Obtain the computation threshold of the computing node; The subtasks are assigned to the corresponding computing nodes based on the computational complexity of the subtasks and the computational threshold of each computing node. After the subtask is completed, the calculation result of the corresponding computing node is obtained, and the calculation result includes information on at least one of the newly added defects.
2. The method according to claim 1, characterized in that, The size of the sub-region is the same as or similar to the size of the die of the wafer sample.
3. The method according to claim 1, characterized in that, The computing management terminal monitors the usage of the computing nodes through heartbeat detection.
4. The method according to claim 1, characterized in that, The first defect information includes: a defect image reflecting the defect information of the wafer sample; and / or, The first defect information includes: structured data reflecting the defect information of the wafer sample.
5. The method according to claim 4, characterized in that, The first defect information also includes: the coordinates of the defect.
6. The method according to claim 1, characterized in that, The subtasks include: primary tasks; correspondingly, the steps of establishing several subtasks based on several second defect data groups include: The multiple second defect data groups are grouped on a single wafer sample basis; and the first-level task is established based on the second defect data groups belonging to the same wafer sample, the first-level task being applied to identify new defects on a single wafer sample.
7. The method according to claim 6, characterized in that, The subtask further includes a secondary task; correspondingly, the method further includes: The primary task is broken down into multiple secondary tasks, which are used to identify new defects in one or more of the sub-regions.
8. The method according to claim 1, characterized in that, The steps for establishing several sub-tasks based on several sets of second defect data include: Valid information is obtained from multiple second defect data groups. When no defect features are reflected in the second defect data group, the corresponding second defect data group is determined to be invalid information. When the second defect data reflects the presence of defect features, the corresponding second defect data group is determined to be valid information. And based on the effective information, several sub-tasks are established.
9. A system for identifying new defects in a wafer, characterized in that, include: A connected computing management terminal and multiple computing nodes; The computing management terminal includes: The first information acquisition module is configured to acquire a first defect data group corresponding to at least one wafer sample through a computing management terminal. The first defect data group includes: first defect information acquired by the wafer sample under several defect detection devices, and the several defect detection devices are respectively used to detect the defect information of the wafer sample after different processing steps. The defect data grouping module is configured to divide the wafer sample into several sub-regions, and group the first defect data group into several second defect data groups based on the several sub-regions, wherein the second defect data group includes: defect information obtained by the same sub-region under different defect detection devices; The task construction module is configured to establish a plurality of subtasks based on a plurality of second defect data sets, the subtasks being used to identify new defects that appear in the wafer sample after at least one processing step; A task allocation module is configured to allocate at least one of the subtasks to corresponding computing nodes based on the computational load and priority of the subtasks; wherein, allocating at least one of the subtasks to corresponding computing nodes includes: obtaining the computational load of the subtask; obtaining the computational threshold of the computing node; and allocating the subtask to the corresponding computing node based on the computational load of the subtask and the computational threshold of each computing node. The result acquisition module is configured to acquire the calculation result of the corresponding computing node after the subtask is completed, wherein the calculation result includes information on at least one newly added defect.