A method and system for preventing soft failure of a harvesting circuit

Abstract

The application relates to a method and system for preventing soft failure of a collection circuit, which stores data in RAM at least twice, compares the data, judges whether the RAM has failure and the failure type of the RAM, and if the failure is soft failure, the data can be effectively avoided through data rewriting, the RAM can normally work, error alarms caused by RAM soft failure can be avoided, and the availability of the system is improved. Meanwhile, the data sampled by the ADC in the collection module cannot be completely consistent, the comparison method provided by the application is used to ensure that the data comparison is accurate within the accuracy requirement, and the high availability of the system is ensured.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of industrial control, and particularly relates to a method and system for preventing soft failure of a collection circuit. BACKGROUND

[0002] During the life cycle of a device with random access memory (RAM), functional failure may be caused by various reasons. Generally speaking, when the hardware itself is damaged, it is called device firm error, otherwise, it is called device soft error.

[0003] Soft failure is mainly caused by the impact of charged particles on the storage unit RAM of the device. The high-energy particles interact with the atoms of the semiconductor memory to generate electron-hole pairs, which cause changes in the stored information in the storage unit, and further cause device functional errors.

[0004] In the field of industrial control, random access memory (RAM) is widely used. In the collection circuit of the control system, various data are stored in the RAM during the process of data collection from the front end, data calculation and reporting of the calculation results. If a RAM fails, the data reported by the collection circuit will be incorrect, which will cause the control system to report errors, resulting in system shutdown and affecting continuous operation of the system. SUMMARY

[0005] In view of the above-mentioned shortcomings and deficiencies of the prior art, the application provides a method and system for preventing soft failure of a collection circuit, which can verify the soft failure of each link of the steady-state signal collection circuit and ensure the accuracy of the collected data.

[0006] To achieve the above-mentioned purpose, the application adopts the following technical solutions:

[0007] A method for preventing soft failure of a collection circuit is used in a steady-state signal collection circuit, comprising:

[0008] S1: The collection module collects field data at least twice, and stores the collected data in at least two addresses of the RAM of the collection module;

[0009] S2: The collected data in the RAM of the collection module are compared, if the data are consistent, the collection data are sent to the calculation module, if the data are inconsistent, S3 is executed;

[0010] S3: It is judged whether the collected data comparison is inconsistent for multiple times, if yes, a hard failure alarm of the RAM of the collection module is initiated, if not, S1 is returned;

[0011] S4: the calculation module receives the acquisition data sent by the acquisition module, and calculates at least two acquisition data, and stores the calculation results in at least two addresses of the RAM of the calculation module respectively;

[0012] S5: the calculation module sends at least two calculation results to the reporting module, the reporting module compares the calculation results after adding a check, if consistent, sends the calculation results after adding a check to the outside, if inconsistent, executes S6;

[0013] S6: if the comparison of the calculation results is inconsistent for multiple times, the calculation module RAM hard failure alarm is initiated, if not, returns to S1.

[0014] Preferably, the comparison method in S2 and S5 comprises:

[0015] S201: acquiring the precision requirement x of the acquisition circuit and the ADC bit number y of the acquisition circuit;

[0016] S202: calculating the allowed error value e according to the precision requirement x and the ADC bit number y:

[0017]

[0018] S203: calculating the ADC sampling bit number n of the allowed error according to the allowed error value e:

[0019]

[0020] Wherein, n is a positive integer;

[0021] S204: comparing the data in the RAM of the acquisition module, if the first y-n bits of the data are consistent, it is determined that the data in the RAM of the acquisition module is consistent.

[0022] In S203, the ADC sampling bit number n of the allowed error is the maximum integer.

[0023] Preferably, in S3 and S6, if the comparison of the two times is inconsistent, the RAM hard failure alarm is triggered.

[0024] Preferably, after the reporting module adds a check to the calculation result, the generated data comprises a data header, a calculation result and a CRC check code.

[0025] The application also discloses a system for preventing soft failure of an acquisition circuit, which is used for acquiring a steady-state signal, and comprises:

[0026] ​The acquisition module is used for acquiring at least two times of field data, and storing the acquired data in at least two addresses of the RAM of the acquisition module; comparing the at least two times of acquired data, if consistent, sending the acquired data to the calculation module, if inconsistent for continuous multiple times, initiating a RAM hard failure alarm of the acquisition module;

[0027] The calculation module receives the at least two times of acquired data sent by the acquisition module, and respectively performs calculation, and after storing the calculation results in at least two addresses of the RAM of the calculation module, sends the calculation results to the reporting module;

[0028] The reporting module receives the at least two times of calculation results sent by the calculation module and adds a check, compares the calculation results after adding the check, if consistent, sends externally; if inconsistent for continuous multiple times, initiates a RAM hard failure alarm of the acquisition module.

[0029] Preferably, the method for comparing data of the acquisition module and the reporting module comprises:

[0030] Obtaining precision requirement x of the acquisition circuit and ADC bit number y of the acquisition circuit;

[0031] According to the precision requirement x and the ADC bit number y, calculating an allowable error value e:

[0032]

[0033] According to the allowable error value e, calculating an ADC sampling bit number n of the allowable error:

[0034] ,

[0035] Wherein, n is a positive integer;

[0036] Comparing the data in the RAM of the acquisition module, if the first y-n bits of the data are consistent, it is determined that the data in the RAM of the acquisition module is consistent.

[0037] Preferably, the ADC sampling bit number n of the allowable error is an integer.

[0038] Preferably, if the calculation module and the reporting module judge that the calculation results are inconsistent for continuous two times, a RAM hard failure alarm is triggered.

[0039] Preferably, after the reporting module adds a check to the calculation results, the generated data comprises a data header, the calculation results and a CRC check code.

[0040] The beneficial effects of the present application are: the present application relates to a method and system for preventing soft failure of a collection circuit, by storing data in RAM at least twice, comparing the data to determine whether the RAM has failed, and the failure type of the RAM, if it is a soft failure, it can be effectively avoided through data rewriting, ensuring the normal work of the RAM, avoiding the error alarm caused by the soft failure of the RAM, and improving the usability of the system. At the same time, since the data sampled by the ADC in the collection module cannot be completely consistent, the comparison method provided by the present application ensures that the accuracy of data comparison is ensured within the accuracy requirement, and the high usability of the system is ensured. BRIEF DESCRIPTION OF DRAWINGS

[0041] The present application is described with the help of the following drawings:

[0042] Figure 1 A flowchart of an embodiment of the present application is shown;

[0043] Figure 2 A flowchart of the RAM data comparison method of the present application is shown;

[0044] Figure 3 A schematic diagram of an embodiment of the present application is shown;

[0045] Figure 4 A schematic diagram of another embodiment of the present application is shown. DETAILED DESCRIPTION

[0046] In order to better explain the present application, the following specific embodiments are described in detail in combination with the drawings. It can be understood that the specific embodiments described below are only used to explain the related application, and are not limited to the application. In addition, it should be noted that the embodiments and features in the embodiments in the present application can be combined with each other without conflict; for the convenience of description, only the parts related to the application are shown in the drawings.

[0047] As Figure 1 shown, the present application discloses a method for preventing soft failure of a collection circuit, which is used for a steady-state signal collection circuit, comprising:

[0048] S1: the collection module collects field data at least twice, and stores the collected data in at least two addresses of the RAM of the collection module.

[0049] In this embodiment, two field data collection is taken as an example for illustration, the steady-state signal of the field is collected by the collection module, the data collected each time is an integer multiple of the steady-state signal period, for example, 2 periods of data, after collecting 2 periods of data, the data is stored in the address of the RAM of the collection module, and the process is repeated twice. That is, two storage addresses in the RAM of the collection module store two periods of steady-state signal collection data.

[0050] S2: compare the collection data in the RAM of the collection module, if the data is consistent, send the collection data to the calculation module, if the data is inconsistent, execute S3;

[0051] This embodiment takes 16-bit ADC with 1% accuracy requirement of the collection circuit as an example for illustration, and the specific data comparison method is as follows:

[0052] S201: obtain the accuracy requirement x of the collection circuit, which is 1%, and the ADC bit number y of the collection circuit, which is 16.

[0053] S202: calculate the allowable error value e according to the accuracy requirement x and the ADC bit number y, the maximum value of the data collected by the 16-bit collection circuit ADC is , and the allowable error value of the signal collected by the collection module is confirmed in combination with the accuracy requirement .

[0054] S203: calculate the allowable error ADC sampling bit number n according to the allowable error value e.

[0055] The ADC sampling bit number n within the error range allows the data deviation, and the value of the collection data of the last n bits of the ADC is less than or equal to the allowable error value e, that is , and the solution n≤9. Further, n takes the maximum integer, that is, the allowable error bit number n of the ADC sampling is 9, and the change of the last 9 bits of data affects the entire ADC collection data within 1%, which meets the accuracy requirement.

[0056] S204: compare the collection data in the RAM of the collection module, if the first y-n bits of the collection data are consistent, it is determined that the data in the RAM of the collection module is consistent.

[0057] That is, the first 7 bits of the 16-bit ADC collection data are compared, if the first 7 bits of the data are consistent, it means that the sampling results of the ADC are compared, and the error is within 1%. Since the field signals collected by the ADC all have fluctuations, the collected data cannot be completely consistent, and the sampling results with consistent first 7 bits of data can ensure that the accuracy of the data meets the requirement of 1%, and does not affect the normal operation of the system.

[0058] In other embodiments, different precisions and different ADC bit numbers can also determine the number of bits of data comparison through the method. For example, an 8-bit ADC collector with 1% precision allows error bits , the solution is , that is, the first 4 bits of the 8-bit ADC collected data are compared, and if the first 4 bits of the data are consistent, the data error is within 1%, and the data comparison result is determined to be consistent.

[0059] S3: Determine whether the data comparison is inconsistent for multiple consecutive data collection, if yes, initiate RAM hard failure alarm of the collection module, if not, return to S1.

[0060] In this step, in order to improve the sampling rate, the data comparison is performed twice. When the data comparison result in the collection module RAM is inconsistent for the first time, return to step S1 to re-collect and write data. At this time, if the data is different due to RAM soft failure, the abnormal collected data caused by soft failure can be covered when the data is re-collected and written, and the comparison result is the same when the data is compared again. If the data comparison result is inconsistent for two consecutive times, it indicates that the data re-write cannot avoid the data failure in the collection module RAM. At this time, the factor of RAM soft failure of the collection module is excluded, and it is determined that the RAM is hard failure. The system initiates the RAM hard failure alarm of the collection module to remind the maintenance personnel to maintain and replace.

[0061] S4: The calculation module receives the collected data sent by the collection module, and calculates at least two collected data, and stores the calculation results in at least two addresses of the calculation module RAM.

[0062] The calculation module receives two collected data sent by the collection module and calculates them respectively. Since the two collected data are compared and determined to have an error less than the system precision requirement, the two collected data are calculated respectively, and the deviation of the calculation results is also within the system required precision. The two calculation results are respectively saved in two addresses of the calculation module RAM.

[0063] S5: The calculation module sends at least two calculation results to the reporting module, and the reporting module compares the calculation results after adding a check. If they are consistent, the calculation results after adding a check are sent externally, if they are not consistent, S6 is executed.

[0064] After the reporting module receives the two calculation results sent by the calculation module, it adds a check respectively. Preferably, the data generated after adding a check includes a data header, a calculation result and a CRC check code. After the reporting module sends the data externally, the downstream module can verify the integrity of the data transmission according to the CRC check code.

[0065] The reporting module compares the two data with added check after adding check to the calculation result, and the specific comparison method is the same as the comparison method in S2, that is, after the accuracy requirement of the system and the ADC sampling bit number are obtained, the allowed error value is determined, and based on the allowed error value, the data comparison method meeting the system accuracy requirement is obtained. Taking the system accuracy requirement of 1% and the collection circuit of 16bit ADC as an example, the first 7 bits of the calculation result are compared, if they are consistent, it is determined that the error between the two calculation results is within 1%, which meets the system accuracy requirement, and the reporting module selects one of the data with added check to send externally.

[0066] S6: judging whether the comparison of the continuous multiple calculation results is inconsistent, if yes, initiating the RAM hard failure alarm of the calculation module, if not, returning to S1.

[0067] For the failure judgment of the RAM of the calculation module, the method is consistent with the judgment method of the RAM of the collection module, that is, when the comparison of the two calculation results first appears abnormal, returning to step S1 to start data collection from the beginning. If the RAM of the calculation module has soft failure, the data accuracy is ensured when the data is written into the calculation module by re-collecting, calculating and writing data. If the comparison result of the reporting module is still wrong after the calculation module rewrites the data, it is confirmed that the RAM of the calculation module has hard failure, and the system initiates the RAM hard failure alarm of the calculation module.

[0068] Through the method, the data saved in the RAM of the collection module and the calculation module in the collection circuit is compared, when the data comparison in the RAM first has data failure, the data is re-collected and written, if the RAM has soft failure, the soft failure data can be covered by re-writing to restore the data to normal. The soft failure of the RAM stored data can be effectively avoided, the system false alarm caused by soft failure is avoided, the long-term stable operation of the system is ensured, and the system reliability is improved.

[0069] In another embodiment of the application, the collection module collects 3 field data in S1, and saves the 3 field data in 3 addresses of the RAM of the collection module respectively. The comparison of the 3 data is first determined by the system accuracy and the bit number of the ADC of the collection module, and then the comparison system comparison method is determined, and after the three data are compared and confirmed, the three data are compared in the three out of two voting mode. If two of the three data are consistent, the correct two results are transmitted to the calculation module. Similarly, for 4 or more data, four out of two voting, four out of three voting and other comparison methods can also be used to improve the reliability of the data.

[0070] The application also discloses a system for preventing soft failure of a collection circuit, which is used for collecting steady-state signals and comprises:

[0071] The acquisition module is used for acquiring at least two times of field data, and storing the acquired data in at least two addresses of the RAM of the acquisition module; comparing the at least two times of acquired data, if consistent, sending the acquired data to the calculation module, if inconsistent for continuous multiple times, initiating a RAM hard failure alarm of the acquisition module;

[0072] The calculation module receives the at least two times of acquired data sent by the acquisition module, and respectively performs calculation, and after storing the calculation results in at least two addresses of the RAM of the calculation module, sends the calculation results to the reporting module;

[0073] The reporting module receives the at least two times of calculation results sent by the calculation module and adds a check, compares the calculation results after adding the check, if consistent, sends externally; if inconsistent for continuous multiple times, initiates a RAM hard failure alarm of the acquisition module.

[0074] The method for comparing data by the acquisition module and the reporting module comprises:

[0075] Obtaining precision requirement x of the acquisition circuit and ADC bit number y of the acquisition circuit;

[0076] According to the precision requirement x and the ADC bit number y, calculating an allowable error value e:

[0077]

[0078] According to the allowable error value e, calculating an ADC sampling bit number n of the allowable error:

[0079] ,

[0080] Wherein, n is a positive integer;

[0081] Comparing the data in the RAM of the acquisition module, if the first y-n bits of the data are consistent, it is determined that the data in the RAM of the acquisition module is consistent.

[0082] It should be noted that in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word 'comprising' does not exclude the presence of elements or steps not listed in the claim. The word 'a' or 'an' preceding an element does not exclude the presence of a plurality of such elements. The application can be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. The use of the word 'at least' followed by a list of one or more items does not exclude additional such items. The use of the words 'first','second' and 'third', etc., does not limit the number of these elements. These words are only used to distinguish between two or more elements or steps.

[0083] Moreover, it is to be understood that the description of the present application set forth herein is illustrative of the present application and is not intended to limit the scope of the present application as defined in the following claims. Various modifications of the preferred embodiment as described herein, will be apparent to those with ordinary skill in the art and can be made without departing from the spirit and scope of the application.

[0084] Although the preferred embodiment of the application has been described, those skilled in the art will be able to make modifications and alterations to this preferred embodiment without departing from the spirit and scope of the application. Accordingly, it is intended that the scope of the application be governed by the following claims and their equivalents.

[0085] Obviously, many modifications and variations of the present application are possible in light of the above teachings. It is, therefore, to be understood that within the scope of the appended claims and their equivalents, the application can be practiced otherwise than as specifically described.

Claims

1. A method for preventing soft failure of a collection circuit, for a steady-state signal collection circuit, characterized by: S1: a collection module performing at least two field data collections and storing the collection data in at least two addresses of a collection module RAM; S2: comparing the collection data in the collection module RAM, if the data are consistent, sending the collection data to a calculation module, if the data are inconsistent, performing S3; wherein the method of comparing the collection data comprises: S201: obtaining a collection circuit precision requirement x and an ADC bit number y of the collection circuit; S202: calculating an allowable error value e according to the precision requirement x and the ADC bit number y; S203: calculating an ADC sampling bit number n of the allowable error according to the allowable error value e; wherein n is a positive integer; S204: comparing the data in the collection module RAM, if the first y-n bits of the data are consistent, determining that the data in the collection module RAM are consistent; S3: determining whether the comparison of the collection data is inconsistent for multiple times in succession, if yes, initiating a collection module RAM hard failure alarm, if no, returning to S1; S4: the calculation module receiving the collection data sent by the collection module and performing calculation on at least two collection data and storing the calculation results in at least two addresses of a calculation module RAM; S5: the calculation module sending at least two calculation results to a reporting module, the reporting module comparing the calculation results after adding a check, if consistent, sending the calculation results after adding the check to the outside, if inconsistent, performing S6; S6: determining whether the comparison of the calculation results is inconsistent for multiple times in succession, if yes, initiating a calculation module RAM hard failure alarm, if no, returning to S1. In S203, the ADC sampling bit number n of the allowable error is the maximum integer. In S3 and S6, if the determination is inconsistent for two times in succession, a RAM hard failure alarm is triggered. After the reporting module adds a check to the calculation results, the generated data comprises a data header, the calculation results and a CRC check code. The method comprises: a collection module for collecting at least two field data and storing the collection data in at least two addresses of a collection module RAM; comparing at least two collection data, if consistent, sending the collection data to a calculation module, if inconsistent for multiple times in succession, initiating a collection module RAM hard failure alarm; a calculation module for receiving at least two collection data sent by the collection module and performing calculation respectively and storing the calculation results in at least two addresses of a calculation module RAM and sending the calculation results to a reporting module; the reporting module for receiving at least two calculation results sent by the calculation module and adding a check, comparing the calculation results after adding the check, if consistent, sending to the outside; if inconsistent for multiple times in succession, initiating a collection module RAM hard failure alarm; the method of comparing data by the collection module and the reporting module comprises: obtaining a collection circuit precision requirement x and an ADC bit number y of the collection circuit; calculating an allowable error value e according to the precision requirement x and the ADC bit number y; calculating an ADC sampling bit number n of the allowable error according to the allowable error value e; wherein n is a positive integer. ​ ​ ​ ​ ​ e = 2 y x x ​ 2 n ≤e， ​ ​ ​ ​ ​ ​ 2. The method of claim 1, wherein: ​ 3. The method of claim 1, wherein: ​ 4. The method of claim 1, wherein: ​ 5. A system for preventing soft failure of the acquisition circuit, used for acquiring steady-state signals, characterized in that: ​ ​ ​ ​ ​ ​ ​ ​ ​ e = 2 y x x ​ 2 n ≤e， ​ Comparing the data in the acquisition module RAM, if the first y-n bits of the data are consistent, it is determined that the data in the acquisition module RAM is consistent.

6. The system for preventing soft failure of a harvesting circuit according to claim 5, wherein: The number of ADC sampling bits n allowing error is the maximum integer.

7. The system for preventing soft failure of a harvesting circuit of claim 5, wherein: If the calculation module and the reporting module are inconsistent twice in succession, a RAM hard failure alarm is triggered.

8. The system for preventing soft failure of a harvesting circuit of claim 5, wherein: After the reporting module adds a check to the calculation result, the generated data includes a data header, the calculation result and a CRC check code.

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