High thermal conductive silicon-based composite interconnection network

Abstract

The application provides a high-thermal-conductivity silicon-based composite interconnection network, which comprises, from top to bottom, a welding layer, a control network layer, a power network layer, a micro coaxial network layer and a micro flow channel network layer; the front surface of the silicon-based composite interconnection network is provided with a solder pad, and the input and output of control, power and radio frequency signals are realized by welding BGA balls or connectors on the solder pad. The application adopts a multi-layer silicon wafer stacking, integrates the radio frequency, control, power and thermal interconnection networks, realizes the vertical interconnection between the silicon substrates through dense micro-nano interconnection holes, saves the connecting devices and structural space, and realizes the high-density three-dimensional integration of the interconnection network.

Description

Technical Field

[0001] This invention relates to the field of antenna and microwave technology, and in particular to a high thermal conductivity silicon-based composite interconnect network. Background Technology

[0002] Due to the short wavelength of millimeter waves, the cell spacing is very small. Traditional wafer fabrication technology makes it difficult for transceiver components and phased arrays to meet requirements such as large scanning angles, lightweight design, and low profile. Silicon-based wafer array technology uses highly integrated chips and a three-dimensional heterogeneous integration architecture to improve the integration of transceiver components and phased arrays, enabling wide scanning angles and significantly reducing the profile height and weight of phased arrays. After adopting three-dimensional integration technology, the size of silicon-based wafer arrays is greatly reduced. The integrated network layer of silicon-based wafer arrays needs to achieve high-density routing of control and power networks and efficient interconnection and transmission of RF networks within a limited size. At the same time, it is necessary to solve the urgent heat dissipation requirements brought about by high integration, so as to ensure the high performance and high reliability of the wafer array. Summary of the Invention

[0003] The purpose of this invention is to solve the above-mentioned problems and propose a high thermal conductivity silicon-based composite interconnect network, which consists of a solder layer, a control network layer, a power network layer, a micro-coaxial network layer, and a microchannel network layer from top to bottom. The front side of the silicon-based composite interconnect network is provided with solder pads, and the input and output of control, power, and radio frequency signals are realized by soldering BGA balls or connectors on the solder pads.

[0004] Furthermore, the microfluidic network layer is provided with a control power input port, an RF interconnect port, and a flow channel. The flow channel has an inlet and an outlet at both ends. After the coolant enters the microfluidic network layer through the inlet, the heat conducted down from above the silicon-based composite interconnect network is carried away from the outlet along the flow channel.

[0005] Furthermore, the control network layer and the power network layer include multiple silicon wafer in-circuit circuits, with the control network layer used to distribute control signals and the power network layer used to distribute power signals.

[0006] Furthermore, the micro-coaxial network layer is used to distribute radio frequency signals. By etching and metallizing the inner and outer conductors of the coaxial transmission structure on the silicon wafer substrate, broadband and low-loss transmission of radio frequency signals is achieved.

[0007] Furthermore, the silicon-based composite interconnect network employs a micro-nano interconnect via structure to achieve signal transmission interconnection between the welding layer, control network layer, power network layer, micro-coaxial network layer, and microchannel network layer; the micro-nano interconnect via structure specifically consists of multiple metallized vias that penetrate the silicon-based composite interconnect network from top to bottom.

[0008] Furthermore, the microfluidic network layer uses surface-mount connectors or spring-loaded pin connectors to realize control and power signal input, and radio frequency signal input and output.

[0009] Compared with the prior art, the present invention has the following advantages:

[0010] 1. High integration: This invention uses multilayer silicon wafer stacking to integrate radio frequency, control, power and thermal interconnect networks. The silicon substrates are vertically interconnected through dense micro-nano interconnect vias, saving connection devices and structural space, and realizing high-density three-dimensional integration of the interconnect network.

[0011] 2. High heat dissipation efficiency: This invention uses a silicon wafer with good thermal conductivity as the substrate of the interconnect network layer, and integrates a microfluidic network, which can quickly remove the heat of the power chip of the wafer array through the coolant, greatly improve the temperature uniformity of the array surface and improve the performance of the wafer array.

[0012] 3. Low RF loss and high broadband performance: The micro coaxial network used in this invention achieves low-loss transmission of RF signals, with transmission loss only one-tenth to one-fifth of that of conventional wired transmission; the coaxial transmission structure has broadband transmission capability, and the use of high-precision microsystem technology with consistent manufacturing ensures high broadband consistency of the network. Attached Figure Description

[0013] Figure 1 This is a principle block diagram of Embodiment 1 of the present invention.

[0014] Figure 2 This is a front view of the structure of Embodiment 1 of the present invention.

[0015] Figure 3 This is a schematic diagram of the back of the structure of Embodiment 1 of the present invention.

[0016] Figure 4 This is a structural exploded perspective view of Embodiment 1 of the present invention.

[0017] The meanings of the labels in the diagram are as follows:

[0018] 1. Solder layer; 2. Control network layer; 3. Power network layer; 4. Micro-coaxial network layer; 5. Microchannel network layer; 6. Pad; 7. Control power input port; 8. RF interconnect port; 9. Liquid inlet; 10. Liquid outlet; 11. Micro-nano interconnect via structure; 12. Coaxial transmission structure; 13. Flow channel. Detailed Implementation

[0019] The present invention will now be described in further detail with reference to the accompanying drawings.

[0020] This disclosure describes various aspects of the invention with reference to the accompanying drawings, which illustrate numerous illustrative embodiments. The embodiments of this disclosure are not necessarily intended to encompass all aspects of the invention. It should be understood that the various concepts and embodiments described above, as well as those described in more detail below, can be implemented in any of many ways, as the concepts and embodiments disclosed herein are not limited to any particular implementation. Furthermore, some aspects of the invention disclosed may be used alone or in any suitable combination with other aspects of the invention disclosed.

[0021] This invention discloses a high thermal conductivity silicon-based composite interconnect network, comprising a bonding layer 1, a control network layer 2, a power network layer 3, a microcoaxial network layer 4, and a microfluidic network layer 5. Its key feature is that: firstly, the bonding layer 1, control network layer 2, power network layer 3, microcoaxial network layer 4, and microfluidic network layer 5 are fabricated on a silicon wafer using semiconductor processes; then, silicon wafer bonding technology is used to integrate the substrate layers into a multilayer silicon wafer composite interconnect network.

[0022] Example 1

[0023] This embodiment provides a high thermal conductivity silicon-based composite interconnect network for wafer phased arrays, and its principle block diagram is as follows: Figure 1 As shown, it includes a control network, a power network, an RF network, and flow channels.

[0024] The silicon-based composite interconnect network is interconnected at the top with 16 RF front-ends of the wafer phased array, and integrates a microfluidic network at the bottom. Liquid cooling is used to remove heat conducted from the front-ends of the composite interconnect network. RF signals, power signals, and control signals of the silicon-based composite interconnect network are input from the bottom of the network, pass through the microfluidic network and vertical transition interconnects, and are respectively sent to the 16-to-16 micro-coaxial network, power network, and control network for signal distribution. Finally, the signals are output through the vertical transition interconnect structure to the 16 RF front-ends interconnected with the silicon-based composite interconnect network.

[0025] Figure 2 The silicon-based composite interconnect network shown is functionally divided into, from top to bottom, a bonding layer 1, a control network layer 2, a power network layer 3, a micro-coaxial network layer 4, and a microchannel network layer 5. After each functional layer substrate is fabricated on a silicon wafer using semiconductor processes, multiple silicon-based wafer substrates are stacked using wafer bonding technology to form the silicon-based composite interconnect network.

[0026] The front side of the silicon-based composite interconnect network has pads 6, on which BGA balls or connectors are soldered to achieve input and output of control, power, and RF signals. For example... Figure 3As shown, the microfluidic network layer 5 is provided with a control power input port 7, an RF interconnect port 8, a liquid inlet 9, and a liquid outlet 10. It uses surface-mount connectors or spring-loaded pin connectors to realize the input of control and power signals and the input and output of RF signals.

[0027] After the coolant enters the microchannel network layer 5 through the inlet 9, the heat conducted down from above the silicon-based composite interconnect network along the flow channel 13 is carried away from the outlet 10.

[0028] The silicon-based composite interconnect network employs a micro-nano interconnect via structure 11 to achieve signal transmission interconnection between the bonding layer 1, control network layer 2, power network layer 3, micro-coaxial network layer 4, and microfluidic network layer 5, reducing connection devices and structural space and improving the integration of the interconnect network. Specifically, the micro-nano interconnect via structure 11 consists of multiple metallized vias running from top to bottom through the silicon-based composite interconnect network.

[0029] The pads 6 on the upper surface of solder layer 1 are interconnect interfaces used to distribute and transmit control, power, and radio frequency signals. The control network layer 2 and power network layer 3 include multiple silicon wafer internal circuits; the control network layer 2 is used to distribute control signals, and the power network layer 3 is used to distribute power signals.

[0030] The micro-coaxial network layer 4 is used to distribute radio frequency signals. By etching and metallizing the inner and outer conductors of the coaxial transmission structure 12 on the silicon wafer substrate, broadband and low-loss transmission of radio frequency signals is achieved.

[0031] The microchannel network layer 5 forms the flow channels 13 by etching trenches on the silicon substrate, which are used for the distribution of coolant to achieve efficient heat dissipation of the wafer array.

[0032] After the functional layers 1, 2, 3, 4, and 5 of the silicon wafer are fabricated using semiconductor technology, the wafer bonding process is then used to stack the multilayer silicon-based wafer substrates to form a silicon-based composite interconnect network.

[0033] Compared with the prior art, the present invention has the following advantages:

[0034] This invention discloses the structural composition and fabrication method of a high thermal conductivity silicon-based composite interconnect network. Compared with existing technologies, its significant advantages are:

[0035] 1. High integration: This invention uses multilayer silicon wafer stacking to integrate radio frequency, control, power and thermal interconnect networks. The silicon substrates are vertically interconnected through dense micro-nano interconnect vias, saving connection devices and structural space, and realizing high-density three-dimensional integration of the interconnect network.

[0036] 2. High heat dissipation efficiency: This invention uses a silicon wafer with good thermal conductivity as the substrate of the interconnect network layer, and integrates a microfluidic network, which can quickly remove the heat of the power chip of the wafer array through the coolant, greatly improve the temperature uniformity of the array surface and improve the performance of the wafer array.

[0037] 3. Low RF loss and high broadband performance: The micro coaxial network used in this invention achieves low-loss transmission of RF signals, with transmission loss only one-tenth to one-fifth of that of conventional wired transmission; the coaxial transmission structure has broadband transmission capability, and the use of high-precision microsystem technology with consistent manufacturing ensures high broadband consistency of the network.

[0038] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A high thermal conductivity silicon-based composite interconnect network, characterized in that, From top to bottom, the layers are: solder layer (1), control network layer (2), power network layer (3), micro coaxial network layer (4) and microfluidic network layer (5); the front side of the silicon-based composite interconnect network is provided with pads (6), and the input and output of control, power and radio frequency signals are realized by soldering BGA balls or connectors on the pads (6); The silicon-based composite interconnect network uses a micro-nano interconnect via structure (11) to realize the signal transmission interconnection of the welding layer (1), control network layer (2), power network layer (3), micro-coaxial network layer (4) and microchannel network layer (5); the micro-nano interconnect via structure (11) is specifically a plurality of metallized holes that run from top to bottom through the silicon-based composite interconnect network.

2. The high thermal conductivity silicon-based composite interconnect network according to claim 1, characterized in that, The microfluidic network layer (5) is provided with a control power input port (7), a radio frequency interconnect port (8) and a flow channel (13). The flow channel (13) has an inlet (9) and an outlet (10) at both ends. After the coolant enters the microfluidic network layer (5) through the inlet (9), the heat conducted down from the top of the silicon-based composite interconnect network is carried away from the outlet (10) along the flow channel (13).

3. The high thermal conductivity silicon-based composite interconnect network according to claim 2, characterized in that, The control network layer (2) and power network layer (3) include multiple silicon wafer in-circuit circuits. The control network layer (2) is used to distribute control signals, and the power network layer (3) is used to distribute power signals.

4. The high thermal conductivity silicon-based composite interconnect network according to claim 3, characterized in that, The micro-coaxial network layer (4) is used to distribute radio frequency signals. By etching and metallizing the inner and outer conductors of the coaxial transmission structure (12) on the silicon wafer substrate, broadband and low-loss transmission of radio frequency signals is achieved.

5. The high thermal conductivity silicon-based composite interconnect network according to claim 4, characterized in that, The microfluidic network layer (5) uses surface-mount connectors or spring-loaded pin connectors to realize control and power signal input, and radio frequency signal input and output.

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