A method and apparatus for generating a midamble sequence for a fourier transform

Abstract

The application provides a Fourier transform bit-reversal permutation sequence generating method and device, which comprises the following steps: determining an input order N of an input sequence of a current Fourier transform, and obtaining a number of the input sequence of the input order N to be inversed according to the input order N and a database, wherein the database stores sequence number orders of bit-reversal permutation sequences of reference orders; and processing the input sequence according to the number of the input order to be inversed to obtain an N-order bit-reversal permutation sequence. The application improves the generating rate of the bit-reversal permutation sequence by using the bit-reversal permutation of the reference order, and further optimizes the performance of the fast Fourier transform.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of fast Fourier transform, in particular to a method and device for generating bit-reversed permutation sequence in Fourier transform. BACKGROUND

[0002] Fast Fourier Transform (FFT) is a numerical algorithm for computing the discrete Fourier transform (DFT) of a sequence rapidly, which is widely used in engineering, science and mathematics fields, and is often used in different fields such as digital signal processing and data analysis.

[0003] The most common fast Fourier transform algorithm is the radix-2 butterfly algorithm (Cooley-Tukey algorithm), which uses a butterfly network. The radix-2 butterfly algorithm requires bit-reversal of the sequence numbers of the sequence after it leaves the butterfly network (or before it enters the butterfly network) and exchanges the positions of the corresponding elements in the sequence, otherwise the order of the output (result) sequence of the Fourier transform will not be consistent with the order of the input sequence.

[0004] For example Figure 1 As shown in a signal flow diagram of a 3-order (8-point) fast Fourier transform, the output sequence of the butterfly transform network 101, i.e., the bit-reversed permutation sequence of the butterfly transform network 101 (F[0], F[4], F[2], F[6], F[1], F[5], F[3], F[7]), is not the same as the input sequence of the Fourier transform, i.e., the bit-reversed permutation sequence of the butterfly transform network 101 (F[0], F[1], F[2], F[3], F[4], F[5], F[6], F[7]);

[0005] Correspondingly, the sequence number order 0, 4, 2, 6, 1, 5, 3, 7 of the bit-reversed permutation sequence of the butterfly transform network 101 is the bit-reversal of the sequence number order 0, 1, …, 7 of the input sequence of the Fourier transform (for example, 1 = 0012, and its bit-reversal is 4 = 1002). In order to restore the input sequence of the Fourier transform (F[0], F[1], F[2], F[3], F[4], F[5], F[6], F[7]), the bit-reversed permutation sequence corresponding to the sequence number order 0-7 of the input sequence of the Fourier transform needs to be obtained, and then the bit-reversed permutation sequence needs to be processed by the bit-reversal permutation network 102 to restore the output sequence of the Fourier transform. The permutation (Permutation) composed of a number and its bit-reversal is called bit-reversal permutation (Bit Reversal Permutation).

[0006] The current bit-reversal permutation generation algorithm needs to traverse all the serial numbers of the Fourier input sequence completely, which will seriously affect the speed and performance of the Fourier transform when the number of input sequences is large.

[0007] It should be noted that the above introduction to the technical background is only for the convenience of clearly and completely describing the technical scheme of the present application and facilitating the understanding of those skilled in the art. The above technical scheme cannot be considered as known to those skilled in the art just because it is described in the background section of the present application. SUMMARY

[0008] In view of the above-mentioned disadvantages of the prior art, the purpose of the present application is to provide a Fourier transform bit-reversal permutation sequence generation method and device, which is used to solve the problem of slow Fourier transform speed in the prior art.

[0009] To achieve the above-mentioned purpose and other related purposes, the present application provides a Fourier transform bit-reversal permutation sequence generation method, which at least includes the following steps:

[0010] determining the input order N of the input sequence of the current Fourier transform, and obtaining the number to be transposed in the input sequence of the input order N according to the input order N and a database, wherein the database stores the serial number order of the bit-reversal permutation sequence of the reference order;

[0011] processing the input sequence according to the number to be transposed in the input sequence of the input order N to obtain the N-order bit-reversal permutation sequence.

[0012] Preferably, the obtaining of the number to be transposed in the input sequence of the input order N according to the input order N and the database includes:

[0013] determining the serial number order of the bit-reversal permutation sequence of the reference order M in the database according to the input order N of the input sequence of the current Fourier transform;

[0014] screening an effective serial number group from the serial number order of the bit-reversal permutation sequence of the reference order M according to the input order N and a screening condition;

[0015] determining the number to be transposed in the input order N according to the effective serial number group.

[0016] Preferably, the relationship between the input order N and the reference order M is: which represents the result of N / 2 rounded down.

[0017] Preferably, when the input order N of the Fourier transform input sequence is determined, the number to be transposed in the input order N needs to be determined according to determining a reference order M to be called; and finally, calling the sequence number order of the bit-flipping position sequence of the reference order M directly in the database according to the reference order M.

[0018] Preferably, the valid sequence number group is screened from the sequence number order of the bit-flipping position sequence of the reference order M according to the input order N and the screening condition, comprising:

[0019] determining the parity of the input order according to the input order N, and determining the sequence number group in the bit-flipping position sequence according to the parity of the input order N and the screening condition;

[0020] screening the valid sequence number from the sequence number order of the bit-flipping position sequence according to the sequence number group in each of the bit-flipping position sequences.

[0021] Preferably, when the input order N is even, the screening condition comprises a first even screening condition and a second even screening condition.

[0022] The first even screening condition is: 1≤A<2 M-1 , 0≤B<A.

[0023] The second even screening condition is: 2 M-1 ≤A<2 M , 0≤B<2 M-1 .

[0024] Wherein, A and B represent the sequence number in the bit-flipping position sequence; A and B are integers.

[0025] Preferably, when the input order N is odd, the screening condition comprises a first odd screening condition and a second odd screening condition.

[0026] The first odd screening condition is: 1≤A<2 M-1 , 0≤B<A, wherein A and B are integers.

[0027] The second odd screening condition is: 2 M-1 ≤A<2 M , 0≤B<2 M-1 , wherein A and B are integers.

[0028] Wherein, A and B represent the sequence number in the bit-flipping position sequence; A and B are integers.

[0029] Preferably, the number to be reversed in the input order N is determined according to the valid sequence number group, comprising:

[0030] When the input order N is even, the valid sequence number group is processed to obtain a processing result.

[0031] Wherein, the processing mode is: p=B×2M +T[A], q=A*2 M +T[B]; the processing result is (p, q);

[0032] According to the processing result, the number to be transposed in the input sequence of the Fourier transform with the input order N is determined; the calculation method of the number to be transposed is (p, q) and ((2 N -1)-q, (2 N -1)-p).

[0033] For the processing result of the effective serial number group obtained according to the first even screening condition, the number to be transposed is determined through (p, q) and ((2 N -1)-q, (2 N -1)-p).

[0034] For the processing result of the effective serial number group obtained according to the second even screening condition, the number to be transposed is determined through (p, q).

[0035] Preferably, determining the number to be transposed in the input order N according to the effective serial number group comprises:

[0036] When the input order N is odd, the processing of each effective serial number group is performed and the processing result is obtained.

[0037] Wherein, the processing method is: p=B*2 M+1 +m+T[A], q=A*2 M+1 +m+T[B], wherein m is 0, 2 M ; the processing result is (p, q);

[0038] According to the processing result, the number to be transposed in the input sequence of the Fourier transform with the input order N is determined; the calculation method of the number to be transposed is (p, q) and ((2 N -1)-q, (2 N -1)-p)

[0039] For the processing result of the effective serial number group obtained according to the first even screening condition, the number to be transposed is determined through (p, q) and ((2 N -1)-q, (2 N -1)-p).

[0040] For the processing result of the effective serial number group obtained according to the second even screening condition, the number to be transposed is determined through (p, q).

[0041] To achieve the above object and other related objects, the present application further provides a Fourier transform mid-reverse permutation sequence generating device, comprising a memory, a processor, and a program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps of the Fourier transform mid-reverse permutation sequence generating method described above are implemented.

[0042] As described above, the Fourier transform mid-reverse permutation sequence generating method and device of the present application have the following beneficial effects:

[0043] The Fourier transform mid-reverse permutation sequence generating process of the present application first constructs a database, which stores the order of the sequence number of the reference order number of the reverse permutation sequence; based on the constructed database and the input order N of the input sequence of the current Fourier transform, the number to be transposed in the input sequence of the input order N is obtained; and the input sequence is processed according to the number to be transposed in the input order to obtain the N-order reverse permutation sequence. The present application improves the generation rate of the reverse permutation sequence by using the reference order number of the reverse permutation according to the reverse permutation, and further optimizes the performance of the fast Fourier transform. BRIEF DESCRIPTION OF DRAWINGS

[0044] Figure 1 A signal flow diagram of a 3-order (8-point) fast Fourier transform in the prior art is shown.

[0045] Figure 2 A flowchart of the Fourier transform mid-reverse permutation sequence generating method of the present application is shown.

[0046] Reference signs: 101, butterfly network; 102, reverse permutation network; DETAILED DESCRIPTION

[0047] The embodiments of the present application will be described in detail below with specific reference to certain specific examples. Those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in the present specification. The present application can also be implemented or applied in other different specific embodiments, and various modifications or changes can be made to the details in the present specification based on different viewpoints and applications without departing from the spirit of the present application.

[0048] It should be noted that the diagrams provided in the present embodiment only schematically illustrate the basic concept of the present application, and only the components related to the present application are shown in the diagrams, not the number, shape and size of the components when actually implemented. The actual implementation of each component can be randomly changed in terms of shape, number and proportion, and the layout pattern of the components can also be more complex.

[0049] The present application considers that a large order of Fourier input sequence results in a large number of elements contained in the input sequence, and all elements in the input sequence need to be processed by a complete traversal in the Fourier transform process to obtain the output sequence. In order to improve the speed and performance of Fourier transform, for an input sequence of order N, all elements that need to be adjusted when converting the corresponding order sequence of elements into the bit-reversed sequence are directly derived from the known bit-reversed sequence of order N, without traversing all 2 N elements in the sequence. Based on this technical concept, the present application proposes a method and device for generating a bit-reversed sequence in Fourier transform.

[0050] Before introducing the method and device for generating a bit-reversed sequence in Fourier transform, the following definitions are first explained: an N-order bit-reversed function and an N-order bit-reversed sequence.

[0051] The bit-reversed function is

[0052] BRV N (i) = BRV N ((i t …i1i0)2) = BRV N ((i N-1 i N-2 …i1i0)2) = (i0i1…i N-2 i N-1 )2

[0053] In the formula, N represents the order, i represents a decimal number, 0≤i≤2 N -1, BRV represents bit-reversal, BRV N (i) represents the bit-reversed position of the decimal number i when the order is N, i t represents the tth bit of the decimal number i, 0≤t<N; (i N-1 i N-2 …i1i0)2 represents the binary of the bit-reversed position of the decimal number i.

[0054] The N-order bit-reversed sequence obtained by transforming each decimal number element by the bit-reversed function when the order is N is:

[0055] x(k) = BRV N (k) (0≤k<2 N ), k is an integer.

[0056] In the formula, k represents a set of decimal number elements, and k is an integer.

[0057] Method embodiment:

[0058] For example, Figure 2The figure is a flow chart of the method for generating a bit-reversal permutation sequence in Fourier transform according to the present application. Figure 1 The method for generating a bit-reversal permutation sequence in Fourier transform according to the present application is described in detail.

[0059] The present application aims to generate a bit-reversal permutation sequence of order N, and the input order N of the input sequence of Fourier transform is converted into a bit-reversal permutation sequence by the algorithm of the present application. And N>0, is a natural number. N The algorithm of the present application converts the sequence {0, 1, 2, …, 2 N -1} into a bit-reversal permutation sequence {BRV N (0), BRV N (1), …, BRV N (2 -1)}.

[0060] The method for generating a bit-reversal permutation sequence in Fourier transform according to the present application comprises at least the following steps:

[0061] S1, constructing a database, which stores the sequence number order of the bit-reversal permutation sequence of a reference order;

[0062] In the present application, the sequence number of the bit-reversal permutation sequence of a reference order is the number of each element in the input sequence of Fourier transform before bit-reversal permutation;

[0063] The sequence order T M of the bit-reversal permutation sequence of a reference order M of 1, 2, 3, … is calculated in advance and stored in the database. The bit-reversal permutation sequence

[0064] The bit-reversal permutation sequence calculated in advance can be calculated by the method of traversing all elements in the prior art, or by the recursive method. As other embodiments, it is calculated by the algorithm described in the paper "Fast bit-reversal algorithms" by A.C.Elster.

[0065] The sequence number order of the bit-reversal permutation sequence is obtained according to the input sequence and the bit-reversal permutation sequence.

[0066] The present application does not limit the specific calculation method and storage method of the bit-reversal permutation sequence corresponding to different reference orders calculated in advance.

[0067] For example, when the reference order M=1, T M＝1 ={0}; when the reference order M=2, T M＝2 ={0, 2, 1, 3}; when the reference order M=3, T M＝3 ={0, 4, 2, 6, 1, 5, 3, 7}; when the reference order M=4, TM＝4 ={0, 8, 4, 12, 2, 10, 6, 14, 1, 9, 5, 13, 3, 11, 7, 15}; ...

[0068] To more accurately understand the concept of the indexing of the bit-flipped set sequence as the sequential numbering of each element in the input sequence of the bit-flipped set pre-Fourier transform, let's first explain it through an example:

[0069] For example, if the elements in the input sequence of a Fourier transform are numbered sequentially as 0, 1, 2, 3, then the order of the elements in the input sequence of the Fourier transform is {0, 1, 2, 3}. The bit-flip set sequence swaps the first and second elements of the input sequence, so the order of the bit-flip set sequence is {0, 2, 1, 3}.

[0070] In this embodiment of the invention, the database is self-constructed. In other implementations, the database may also be known and can be directly called in step S2.

[0071] S2, determine the input order N of the current Fourier transform input sequence, and obtain the numbers in the input sequence of the input order N that need to be swapped according to the input order N and the database;

[0072] S21, determine the sequence number of the bit-flipping sequence of the reference order M in the database based on the input order N of the current Fourier transform input sequence;

[0073] In this invention, This indicates that the result of N / 2 is rounded down.

[0074] The present invention Therefore, once the input order N of the Fourier transform input sequence is determined, it is necessary to... Determine the reference order M to be retrieved; finally, retrieve the sequence number of the bit-flip set sequence of the reference order M directly from the database based on the reference order M.

[0075] When the input order N=3, the reference order is retrieved from the data. The order of the bit flip sequence T M＝1 ={0};

[0076] When the input order N=4, the reference order is retrieved from the data. The order of the bit flip sequence T M＝2 ={0, 2, 1, 3}.

[0077] S22, select valid number groups from the sequence order of the bit flip reset sequence of the reference order M according to the input order N and the filtering conditions;

[0078] The step firstly determines the parity of the input order, determines the screening condition according to the parity of the input order; and then screens the effective sequence number group from the sequence number order of the position flip sequence according to the screening condition.

[0079] S221, determines the parity of the input order N according to the input order N, and determines the sequence number group in the bit flip permutation sequence according to the parity of the input order N and the screening condition;

[0080] In order to clearly and accurately distinguish the sequence number in the bit flip permutation sequence in the step and the sequence number order of the bit flip permutation sequence, the following examples are used for explanation and description:

[0081] For example, referring to the sequence number order of the bit flip permutation sequence of the order M=2, T M＝2 ={0, 2, 1, 3}, then the sequence number 0 in the sequence number order corresponds to the sequence number 0 in the bit flip permutation sequence, that is, T[0]=0; the sequence number 2 in the sequence number order corresponds to the sequence number 1 in the bit flip permutation sequence, that is, T[1]=2; the sequence number 1 in the sequence number order corresponds to the sequence number 2 in the bit flip permutation sequence, that is, T[2]=1; and the sequence number 3 in the sequence number order corresponds to the sequence number 3 in the bit flip permutation sequence, that is, T[3]=3.

[0082] (1) When the input order N is even, the screening condition includes a first even screening condition and a second even screening condition;

[0083] The first even screening condition is: 1≤A<2 M-1 , 0≤B<A;

[0084] The second even screening condition is: 2 M-1 ≤A<2 M , 0≤B<2 M-1 ;

[0085] Wherein, A and B represent the sequence numbers in the bit flip permutation sequence; A and B are both integers.

[0086] In the embodiment of the application, when the input order N=4, M=2;

[0087] The first even screening condition is actually 1≤A<2, 0≤B<A, then according to the first even screening condition, the value of the sequence number group formed by A and B has one group as shown in Table 1, that is, (A=1, B=0).

[0088] Table 1

[0089] A B 1 0

[0090] When the second even screening condition is 2≤A<4 and 0≤B<2, the value of the order number group formed by A and B according to the second even screening condition is four groups as shown in Table 2, i.e., (A=2, B=0), (A=2, B=1), (A=3, B=0) and (A=3, B=1).

[0091] Table 2

[0092] A B 2 0 2 1 3 0 3 1

[0093] (2) When the input order N is odd, the screening condition includes a first odd screening condition and a second odd screening condition.

[0094] The first odd screening condition is 1≤A<2 M-1 , 0≤B<A, wherein A and B are integers.

[0095] The second odd screening condition is 2 M-1 ≤A<2 M , 0≤B<2 M-1 , wherein A and B are integers.

[0096] A and B represent order numbers in the bit-flipping permutation sequence; A and B are integers.

[0097] In the embodiment of the application, when the input order N=5, M=2.

[0098] The first odd screening condition is actually 1≤A<2 and 0≤B<A, and the value of the order number group formed by A and B according to the first odd screening condition is one group as shown in Table 1, i.e., (A=1, B=0).

[0099] The second odd screening condition is actually 2≤A<4 and 0≤B<2, and the value of the order number group formed by A and B according to the second odd screening condition is four groups as shown in Table 2, i.e., (A=2, B=0), (A=2, B=1), (A=3, B=0) and (A=3, B=1).

[0100] S222, screening the corresponding effective order number group from the order number sequence of the bit-flipping permutation sequence according to the order number group in each bit-flipping permutation sequence.

[0101] In the embodiment of the application, when the input order N is even, i.e., N=4, M=2; at this time, T[j]={0, 2, 1, 3}, j is an order number; 0≤j<2 2 ; A∈j, B∈j; and when M=2, T[0]=0, T[1]=2, T[2]=1, T[3]=3.

[0102] According to the first even screening condition, the values of A and B are (A=1, B=0), in which case T[A]=2 and T[B]=0; therefore, according to the first even screening condition, the valid serial number group screened out is (2 and 0) as shown in Table 3, i.e., T[A]=2 and T[B]=0.

[0103] Table 3

[0104] A T[A] B T[B] 1 2 0 0

[0105] According to the second even screening condition, the values of A and B are (A=2, B=0), (A=2, B=1), (A=3, B=0) and (A=3, B=1); when the values of A and B are (A=2, B=0), T[A]=1 and T[B]=0; when the values of A and B are (A=2, B=1), T[A]=1 and T[B]=2; when the values of A and B are (A=3, B=0), T[A]=3 and T[B]=0; when the values of A and B are (A=3, B=1), T[A]=3 and T[B]=2; therefore, according to the second even screening condition, the valid serial number groups screened out are four groups as shown in Table 4, i.e., (1 and 0) T[A]=1 and T[B]=0, (1 and 2) T[A]=1 and T[B]=2, (3 and 0) T[A]=3 and T[B]=0, and (3 and 2) T[A]=3 and T[B]=2.

[0106] Table 4

[0107] A T[A] B T[B] 2 1 0 0 2 1 1 2 3 3 0 0 3 3 1 2

[0108] In the embodiment of the present application, when the input order N is odd, i.e., N=5, M=2; in this case, T[j]={0, 2, 1, 3}, j is the serial number; 0≤j<2 2 ; A∈j, B∈j; and when M=2, T[0]=0, T[1]=2, T[2]=1, T[3]=3;

[0109] According to the first even screening condition, the values of A and B are (A=1, B=0), in which case T[A]=2 and T[B]=0; therefore, according to the first even screening condition, the valid serial number group screened out is (2 and 0) as shown in Table 3, i.e., T[A]=2 and T[B]=0.

[0110] According to the second odd screening condition, the values of A and B have four groups, i.e. (A=2, B=0), (A=2, B=1), (A=3, B=0) and (A=3, B=1); when the values of A and B are (A=2, B=0), T[A]=1 and T[B]=0; when the values of A and B are (A=2, B=1), T[A]=1 and T[B]=2; when the values of A and B are (A=3, B=0), T[A]=3 and T[B]=0; when the values of A and B are (A=3, B=1), T[A]=3 and T[B]=2; therefore, according to the second even screening condition, the effective serial numbers screened have four groups as shown in Table 4, i.e. (1 and 0) i.e. T[A]=1 and T[B]=0, (1 and 2) i.e. T[A]=1 and T[B]=2, (3 and 0) i.e. T[A]=3 and T[B]=0, (3 and 2) i.e. T[A]=3 and T[B]=2.

[0111] S23, determining the number to be inversed in the input order N according to the effective serial number group.

[0112] The application processes the effective serial number to obtain a processing result, and determines the number to be inversed in the input sequence of the Fourier transform when the input order is N according to the processing result.

[0113] In the application, when the input order N is even, the processing of each effective serial number group is performed to obtain a processing result.

[0114] The processing manner is as follows:

[0115] p=B*2 M +T[A], q=A*2 M +T[B]

[0116] The processing result is (p, q).

[0117] The number to be inversed in the input sequence of the Fourier transform when the input order is N is determined according to the processing result.

[0118] The calculation manner of the number to be inversed is (p, q) and ((2 N -1)-q, (2 N -1)-p).

[0119] For the processing result of the effective serial number group obtained according to the first even screening condition, the number to be inversed is determined through (p, q) and ((2 N -1)-q, (2 N -1)-p).

[0120] For the processing result of the effective serial number group obtained according to the second even screening condition, the number to be inversed is determined through (p, q).

[0121] In the embodiment of the present application, when the input order N is even, i.e. N=4, M=2;

[0122] The valid serial number groups screened according to the first even screening condition are shown in Table 5, which are one group (2 and 0), i.e. T[A]=2, T[B]=0.

[0123] The processing result p=2, q=4 after processing the valid serial number group;

[0124] According to the processing result, the numbers to be transposed are determined to be (2, 4) and (11, 13) through (p, q) and ((2 N -1)-q, (2 N -1)-p) respectively.

[0125] Table 5

[0126]

[0127] The valid serial number groups screened according to the second even screening condition are shown in Table 6, which are four groups, i.e. (1 and 0), i.e. T[A]=1, T[B]=0, (1 and 2), i.e. T[A]=1, T[B]=2, (3 and 0), i.e. T[A]=3, T[B]=0, (3 and 1), i.e. T[A]=3, T[B]=1.

[0128] The processing results after processing the four valid serial number groups are (p=1, q=8), (p=5, q=10), (p=3, q=12) and (p=7, q=14) respectively;

[0129] According to the processing result, the numbers to be transposed are determined to be (1, 8), (5, 10), (3, 12) and (7, 14) through (p, q) respectively.

[0130] Table 6

[0131]

[0132] In the present application, when the input order N is odd, the processing of each valid serial number group is performed and the processing result is obtained.

[0133] The processing mode is as follows:

[0134] p=B×2 M+1 +m+T[A], q=A×2 M+1 +m+T[B], wherein m is 0, 2 M in turn.

[0135] The processing result is (p, q)

[0136] The number to be transposed is determined according to (p, q) and ((2

[0137] The number to be transposed is determined according to (p, q) and ((2 N -1)-q,(2 N -1)-p)

[0138] The number to be transposed is determined according to (p, q) and ((2 N -1)-q,(2 N -1)-p)

[0139] The number to be transposed is determined according to (p, q) and ((2 N -1)-q,(2 N -1)-p)

[0140] In the embodiment of the present application, when the input order N is an odd number, i.e. N=5, M=2; at this time, m is 0 and 4 in turn.

[0141] As shown in Table 7, the effective serial number group selected according to the first odd screening condition is (2 and 0), i.e. T[A]=2, T[B]=0.

[0142] Since m has two values of 0 and 4, the processing result of the effective serial number group has two groups, when m=0, p=2, q=8; when m=4, p=6, q=12.

[0143] According to the processing result of p=2, q=8, the number to be transposed is determined according to (p, q) and ((2 N -1)-q,(2 N -1)-p)

[0144] According to the processing result of p=6, q=12, the number to be transposed is determined according to (p, q) and ((2 N -1)-q,(2 N -1)-p)

[0145] Table 7

[0146]

[0147] As shown in Table 8, the effective serial number group selected according to the second odd screening condition has four kinds, which are (1 and 0) i.e. T[A]=1, T[B]=0, (1 and 2) i.e. T[A]=1, T[B]=2, (3 and 0) i.e. T[A]=3, T[B]=0, (3 and 1) i.e. T[A]=3, T[B]=1.

[0148] Since m has two values of 0 and 4, the processing results after processing each group of valid serial numbers are two groups;

[0149] For the valid serial number group (1 and 0), i.e. T[A]=1, T[B]=0, when m=0, p=1, q=16; when m=4, p=5, q=20;

[0150] For the valid serial number group (1 and 2), i.e. T[A]=1, T[B]=2, when m=0, p=9, q=18; when m=4, p=13, q=22;

[0151] For the valid serial number group (3 and 0), i.e. T[A]=3, T[B]=0, when m=0, p=3, q=24; when m=4, p=7, q=28;

[0152] For the valid serial number group (3 and 1), i.e. T[A]=3, T[B]=1, when m=0, p=11, q=26; when m=4, p=15, q=30.

[0153] Therefore, the processing results after processing the four groups of valid serial numbers are (p=1, q=16), (p=5, q=20), (p=9, q=18), (p=13, q=22), (p=3, q=24), (p=7, q=28), (p=11, q=26) and (p=15, q=30) respectively.

[0154] For each processing result, the serial numbers to be transposed are determined by (p, q) to be (1, 16), (5, 20), (9, 18), (13, 22), (3, 24), (7, 28), (11, 26) and (15, 30) respectively.

[0155] Table 8

[0156]

[0157] S3, processing the input sequence according to the serial numbers to be transposed to obtain an N-order bit-reversal permutation sequence.

[0158] The present application only needs to process according to the serial numbers to be transposed to quickly obtain an N-order bit-reversal permutation sequence. Each group of serial numbers to be transposed represents that the elements of two serial numbers need to be transposed.

[0159] In the embodiment of the present application,

[0160] For the input order is even, when N=4, the number of each element of the input sequence is represented as {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, the sequence number order of the bit-reversal permutation sequence is {0, 8, 4, 12, 2, 10, 6, 14, 1, 9, 5, 13, 3, 11, 7, 15}, and the bit-reversal permutation sequence is {F[0], F[8], F[4], F

[12] , F[2], F

[10] , F[6], F

[14] , F[1], F[9], F[5], F

[13] , F[3], F

[11] , F[7], F

[15] }.

[0161] For the input order is odd, when N=5, the number of each element of the input sequence is represented as {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, the sequence number order of the bit-reversal permutation sequence is {0, 16, 8, 24, 4, 20, 12, 28, 2, 18, 10, 26, 6, 22, 14, 30, 1, 17, 9, 25, 5, 21, 13, 29, 3, 19, 11, 27, 7, 23, 15, 31}, and the bit-reversal permutation sequence is {F[0], F

[16] , F[8], F

[24] , F[4], F

[20] , F

[12] , F

[28] , F[2], F

[18] , F

[10] , F

[26] , F[6], F

[22] , F

[14] , F

[30] , F[1], F

[17] , F[9], F

[25] , F[5], F

[21] , F

[13] , F

[29] , F[3], F

[19] , F

[11] , F

[27] , F[7], F

[23] , F

[15] , F

[31] }.

[0162] It is to be noted that, for the sake of simple and clear explanation of the technical solution, in the embodiment of the present application, for the input order N, whether odd or even, the value of N is not large, and the method of the present application is better in speed (performance) of Fourier transform when the input order N is large. The present application simplifies the generation process of the bit-reversal permutation by using the property of the bit-reversal permutation, improves the generation rate of the bit-reversal permutation, and further optimizes the performance of the fast Fourier transform algorithm.

[0163] Device embodiment:

[0164] The present application also provides a device for generating a bit-reversal permutation sequence in Fourier transform, comprising a memory, a processor, and a program stored in the memory and executable on the processor, and the processor implements the steps of the method for generating a bit-reversal permutation sequence in Fourier transform when executing the program.

[0165] The detailed process of the steps of the method for generating bit-reversal permutation sequence in Fourier transform has been described in the method embodiment, and will not be repeated here.

[0166] In summary, the present application uses the pre-computed BRV M (i) sequence (N is the order of fast Fourier transform, ), to directly obtain all the indices (i.e. numbers) and BRV N (i) required for constructing the bit-reversal permutation sequence, avoiding unnecessary traversal. In particular, when the algorithm is used for the implementation of fast Fourier transform, the speed (performance) of fast Fourier transform can be effectively improved. Therefore, the present application effectively overcomes the various shortcomings in the prior art and has high industrial utilization value.

[0167] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes completed by those skilled in the art without departing from the spirit and technical thought disclosed by the present application should be covered by the claims of the present application.

Claims

1. A method for generating a midamble sequence for a Fourier transform, characterized by, The method is suitable for a digital signal processing process and comprises at least the following steps: constructing a database storing the sequence order of bit-reversal permutation sequences of reference orders; determining an input order N of a signal input sequence of a current Fourier transform, and obtaining a number to be inversed in the signal input sequence of the input order N from the input order N and a database storing the sequence order of bit-reversal permutation sequences of reference orders; processing the signal input sequence according to the number to be inversed in the signal input sequence of the input order N to obtain a bit-reversal permutation sequence of the input order N; the obtaining of the number to be inversed in the input sequence of the input order N from the input order N and the database comprises: determining the sequence order of bit-reversal permutation sequences of a reference order M in the database according to an input order N of an input sequence of a current Fourier transform; Screening an effective sequence number group from the sequence number order of the bit-flipping sequence of the reference sequence number M according to the input sequence number N and a screening condition; when the input sequence number N is even, the screening condition comprises a first even screening condition and a second even screening condition; the first even screening condition is: 1≤A<2 M-1 , 0≤B<A; the second even screening condition is: 2 M-1 ≤A<2 M , 0≤B<2 M-1 ; wherein, A and B represent the sequence numbers in the bit-flipping sequence; A and B are integers; determining the number to be inversed in the input order N according to the effective sequence group.

2. The method of claim 1, wherein the method is characterized by: The relationship between the input order N and the reference order M is: denotes the floor of N / 2.

3. The method of claim 2, wherein the method further comprises: When the input order N of the Fourier transform signal input sequence is determined, the reference order M to be called needs to be determined according to Finally, the sequence number order of the bit-flipping sequence of the reference order M is directly called in the database according to the reference order M.

4. The method of claim 3, wherein, the screening of an effective sequence group from the sequence order of bit-reversal permutation sequences of the reference order M according to the input order N and a screening condition comprises: determining the parity of the input order N according to the input order N, and determining the sequence number group in the bit-reversal permutation sequence according to the parity of the input order N and the screening condition; screening the effective sequence from the sequence order of the bit-reversal permutation sequence according to each sequence number group in the bit-reversal permutation sequence.

5. The method of claim 4, wherein, when the input order N is odd, the screening condition comprises a first odd screening condition and a second odd screening condition; The first odd screening condition is: 1≤A<2 M-1 , 0≤B<A, wherein A and B are integers. The second odd screening condition is: 2 M-1 ≤ A < 2 M , 0 ≤ B < 2 M-1 , wherein A and B are integers. wherein A and B represent the sequence numbers in the bit-reversal permutation sequence; A and B are integers.

6. The method of claim 1, wherein, the determining of the number to be inversed in the input order N according to the effective sequence group comprises: when the input order N is even, processing each effective sequence group and obtaining a processing result; wherein the processing is in the manner: p = B x 2 M + T[A], q = A x 2 M + T[B]; the processing result is: (p, q); According to the processing result, the number to be inversed in the signal input sequence of the Fourier transform with the input order N is determined; the calculation method of the number to be inversed is: (p, q) and ((2 N -1)-q,(2 N -1)-p). For the processing result of the valid serial number group obtained according to the first even sieve selection condition, the serial number to be inversed is determined through (p, q) and ((2 N -1)-q,(2 N -1)-p). for the processing result of the effective sequence group obtained according to the second even screening condition, determining the number to be inversed through (p, q).

7. The method of claim 5, wherein the number of the midamble sequences is 64. the determining of the number to be inversed in the input order N according to the effective sequence group comprises: when the input order N is odd, processing each effective sequence group and obtaining a processing result; Wherein, the processing mode is: p = B x 2 M+1 + m + T[A], q = A x 2 M+1 + m + T[B], wherein m is 0, 2 M ; the processing result is: (p, q); According to the processing result, the number to be inversed in the signal input sequence of the Fourier transform with the input order N is determined; the calculation method of the number to be inversed is: (p, q) and ((2 N -1)-q,(2 N -1)-p). For the processing result of the valid serial number group obtained according to the first odd screening condition, the serial number to be inversed is determined through (p, q) and ((2 N -1)-q,(2 N -1)-p). for the processing result of the effective sequence group obtained according to the second odd screening condition, determining the number to be inversed through (p, q).

8. A Fourier transform median flip sequence generation device, characterized in that, The computer program product comprises a memory, a processor, and a program stored in the memory and executable on the processor, and the processor executes the program to implement the steps of the bit-reversal permutation sequence generation method in the Fourier transform according to any one of claims 1-7.

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